Jhon Plantikow / mbed

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Dependents:   RTC

TARGET_NUCLEO_F072RB/core_cmFunc.h@0:88e313c910d0, 2015-08-13 (annotated)

Committer:
jhon309
Date:
Thu Aug 13 00:20:09 2015 +0000
Revision:
0:88e313c910d0
RTC Example

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jhon309 0:88e313c910d0 1 /**************************************************************************//**
jhon309 0:88e313c910d0 2 * @file core_cmFunc.h
jhon309 0:88e313c910d0 3 * @brief CMSIS Cortex-M Core Function Access Header File
jhon309 0:88e313c910d0 4 * @version V3.20
jhon309 0:88e313c910d0 5 * @date 25. February 2013
jhon309 0:88e313c910d0 6 *
jhon309 0:88e313c910d0 7 * @note
jhon309 0:88e313c910d0 8 *
jhon309 0:88e313c910d0 9 ******************************************************************************/
jhon309 0:88e313c910d0 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
jhon309 0:88e313c910d0 11
jhon309 0:88e313c910d0 12 All rights reserved.
jhon309 0:88e313c910d0 13 Redistribution and use in source and binary forms, with or without
jhon309 0:88e313c910d0 14 modification, are permitted provided that the following conditions are met:
jhon309 0:88e313c910d0 15 - Redistributions of source code must retain the above copyright
jhon309 0:88e313c910d0 16 notice, this list of conditions and the following disclaimer.
jhon309 0:88e313c910d0 17 - Redistributions in binary form must reproduce the above copyright
jhon309 0:88e313c910d0 18 notice, this list of conditions and the following disclaimer in the
jhon309 0:88e313c910d0 19 documentation and/or other materials provided with the distribution.
jhon309 0:88e313c910d0 20 - Neither the name of ARM nor the names of its contributors may be used
jhon309 0:88e313c910d0 21 to endorse or promote products derived from this software without
jhon309 0:88e313c910d0 22 specific prior written permission.
jhon309 0:88e313c910d0 23 *
jhon309 0:88e313c910d0 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jhon309 0:88e313c910d0 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jhon309 0:88e313c910d0 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
jhon309 0:88e313c910d0 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
jhon309 0:88e313c910d0 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
jhon309 0:88e313c910d0 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
jhon309 0:88e313c910d0 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
jhon309 0:88e313c910d0 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
jhon309 0:88e313c910d0 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
jhon309 0:88e313c910d0 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
jhon309 0:88e313c910d0 34 POSSIBILITY OF SUCH DAMAGE.
jhon309 0:88e313c910d0 35 ---------------------------------------------------------------------------*/
jhon309 0:88e313c910d0 36
jhon309 0:88e313c910d0 37
jhon309 0:88e313c910d0 38 #ifndef __CORE_CMFUNC_H
jhon309 0:88e313c910d0 39 #define __CORE_CMFUNC_H
jhon309 0:88e313c910d0 40
jhon309 0:88e313c910d0 41
jhon309 0:88e313c910d0 42 /* ########################### Core Function Access ########################### */
jhon309 0:88e313c910d0 43 /** \ingroup CMSIS_Core_FunctionInterface
jhon309 0:88e313c910d0 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
jhon309 0:88e313c910d0 45 @{
jhon309 0:88e313c910d0 46 */
jhon309 0:88e313c910d0 47
jhon309 0:88e313c910d0 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
jhon309 0:88e313c910d0 49 /* ARM armcc specific functions */
jhon309 0:88e313c910d0 50
jhon309 0:88e313c910d0 51 #if (__ARMCC_VERSION < 400677)
jhon309 0:88e313c910d0 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
jhon309 0:88e313c910d0 53 #endif
jhon309 0:88e313c910d0 54
jhon309 0:88e313c910d0 55 /* intrinsic void __enable_irq(); */
jhon309 0:88e313c910d0 56 /* intrinsic void __disable_irq(); */
jhon309 0:88e313c910d0 57
jhon309 0:88e313c910d0 58 /** \brief Get Control Register
jhon309 0:88e313c910d0 59
jhon309 0:88e313c910d0 60 This function returns the content of the Control Register.
jhon309 0:88e313c910d0 61
jhon309 0:88e313c910d0 62 \return Control Register value
jhon309 0:88e313c910d0 63 */
jhon309 0:88e313c910d0 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
jhon309 0:88e313c910d0 65 {
jhon309 0:88e313c910d0 66 register uint32_t __regControl __ASM("control");
jhon309 0:88e313c910d0 67 return(__regControl);
jhon309 0:88e313c910d0 68 }
jhon309 0:88e313c910d0 69
jhon309 0:88e313c910d0 70
jhon309 0:88e313c910d0 71 /** \brief Set Control Register
jhon309 0:88e313c910d0 72
jhon309 0:88e313c910d0 73 This function writes the given value to the Control Register.
jhon309 0:88e313c910d0 74
jhon309 0:88e313c910d0 75 \param [in] control Control Register value to set
jhon309 0:88e313c910d0 76 */
jhon309 0:88e313c910d0 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
jhon309 0:88e313c910d0 78 {
jhon309 0:88e313c910d0 79 register uint32_t __regControl __ASM("control");
jhon309 0:88e313c910d0 80 __regControl = control;
jhon309 0:88e313c910d0 81 }
jhon309 0:88e313c910d0 82
jhon309 0:88e313c910d0 83
jhon309 0:88e313c910d0 84 /** \brief Get IPSR Register
jhon309 0:88e313c910d0 85
jhon309 0:88e313c910d0 86 This function returns the content of the IPSR Register.
jhon309 0:88e313c910d0 87
jhon309 0:88e313c910d0 88 \return IPSR Register value
jhon309 0:88e313c910d0 89 */
jhon309 0:88e313c910d0 90 __STATIC_INLINE uint32_t __get_IPSR(void)
jhon309 0:88e313c910d0 91 {
jhon309 0:88e313c910d0 92 register uint32_t __regIPSR __ASM("ipsr");
jhon309 0:88e313c910d0 93 return(__regIPSR);
jhon309 0:88e313c910d0 94 }
jhon309 0:88e313c910d0 95
jhon309 0:88e313c910d0 96
jhon309 0:88e313c910d0 97 /** \brief Get APSR Register
jhon309 0:88e313c910d0 98
jhon309 0:88e313c910d0 99 This function returns the content of the APSR Register.
jhon309 0:88e313c910d0 100
jhon309 0:88e313c910d0 101 \return APSR Register value
jhon309 0:88e313c910d0 102 */
jhon309 0:88e313c910d0 103 __STATIC_INLINE uint32_t __get_APSR(void)
jhon309 0:88e313c910d0 104 {
jhon309 0:88e313c910d0 105 register uint32_t __regAPSR __ASM("apsr");
jhon309 0:88e313c910d0 106 return(__regAPSR);
jhon309 0:88e313c910d0 107 }
jhon309 0:88e313c910d0 108
jhon309 0:88e313c910d0 109
jhon309 0:88e313c910d0 110 /** \brief Get xPSR Register
jhon309 0:88e313c910d0 111
jhon309 0:88e313c910d0 112 This function returns the content of the xPSR Register.
jhon309 0:88e313c910d0 113
jhon309 0:88e313c910d0 114 \return xPSR Register value
jhon309 0:88e313c910d0 115 */
jhon309 0:88e313c910d0 116 __STATIC_INLINE uint32_t __get_xPSR(void)
jhon309 0:88e313c910d0 117 {
jhon309 0:88e313c910d0 118 register uint32_t __regXPSR __ASM("xpsr");
jhon309 0:88e313c910d0 119 return(__regXPSR);
jhon309 0:88e313c910d0 120 }
jhon309 0:88e313c910d0 121
jhon309 0:88e313c910d0 122
jhon309 0:88e313c910d0 123 /** \brief Get Process Stack Pointer
jhon309 0:88e313c910d0 124
jhon309 0:88e313c910d0 125 This function returns the current value of the Process Stack Pointer (PSP).
jhon309 0:88e313c910d0 126
jhon309 0:88e313c910d0 127 \return PSP Register value
jhon309 0:88e313c910d0 128 */
jhon309 0:88e313c910d0 129 __STATIC_INLINE uint32_t __get_PSP(void)
jhon309 0:88e313c910d0 130 {
jhon309 0:88e313c910d0 131 register uint32_t __regProcessStackPointer __ASM("psp");
jhon309 0:88e313c910d0 132 return(__regProcessStackPointer);
jhon309 0:88e313c910d0 133 }
jhon309 0:88e313c910d0 134
jhon309 0:88e313c910d0 135
jhon309 0:88e313c910d0 136 /** \brief Set Process Stack Pointer
jhon309 0:88e313c910d0 137
jhon309 0:88e313c910d0 138 This function assigns the given value to the Process Stack Pointer (PSP).
jhon309 0:88e313c910d0 139
jhon309 0:88e313c910d0 140 \param [in] topOfProcStack Process Stack Pointer value to set
jhon309 0:88e313c910d0 141 */
jhon309 0:88e313c910d0 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
jhon309 0:88e313c910d0 143 {
jhon309 0:88e313c910d0 144 register uint32_t __regProcessStackPointer __ASM("psp");
jhon309 0:88e313c910d0 145 __regProcessStackPointer = topOfProcStack;
jhon309 0:88e313c910d0 146 }
jhon309 0:88e313c910d0 147
jhon309 0:88e313c910d0 148
jhon309 0:88e313c910d0 149 /** \brief Get Main Stack Pointer
jhon309 0:88e313c910d0 150
jhon309 0:88e313c910d0 151 This function returns the current value of the Main Stack Pointer (MSP).
jhon309 0:88e313c910d0 152
jhon309 0:88e313c910d0 153 \return MSP Register value
jhon309 0:88e313c910d0 154 */
jhon309 0:88e313c910d0 155 __STATIC_INLINE uint32_t __get_MSP(void)
jhon309 0:88e313c910d0 156 {
jhon309 0:88e313c910d0 157 register uint32_t __regMainStackPointer __ASM("msp");
jhon309 0:88e313c910d0 158 return(__regMainStackPointer);
jhon309 0:88e313c910d0 159 }
jhon309 0:88e313c910d0 160
jhon309 0:88e313c910d0 161
jhon309 0:88e313c910d0 162 /** \brief Set Main Stack Pointer
jhon309 0:88e313c910d0 163
jhon309 0:88e313c910d0 164 This function assigns the given value to the Main Stack Pointer (MSP).
jhon309 0:88e313c910d0 165
jhon309 0:88e313c910d0 166 \param [in] topOfMainStack Main Stack Pointer value to set
jhon309 0:88e313c910d0 167 */
jhon309 0:88e313c910d0 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
jhon309 0:88e313c910d0 169 {
jhon309 0:88e313c910d0 170 register uint32_t __regMainStackPointer __ASM("msp");
jhon309 0:88e313c910d0 171 __regMainStackPointer = topOfMainStack;
jhon309 0:88e313c910d0 172 }
jhon309 0:88e313c910d0 173
jhon309 0:88e313c910d0 174
jhon309 0:88e313c910d0 175 /** \brief Get Priority Mask
jhon309 0:88e313c910d0 176
jhon309 0:88e313c910d0 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
jhon309 0:88e313c910d0 178
jhon309 0:88e313c910d0 179 \return Priority Mask value
jhon309 0:88e313c910d0 180 */
jhon309 0:88e313c910d0 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
jhon309 0:88e313c910d0 182 {
jhon309 0:88e313c910d0 183 register uint32_t __regPriMask __ASM("primask");
jhon309 0:88e313c910d0 184 return(__regPriMask);
jhon309 0:88e313c910d0 185 }
jhon309 0:88e313c910d0 186
jhon309 0:88e313c910d0 187
jhon309 0:88e313c910d0 188 /** \brief Set Priority Mask
jhon309 0:88e313c910d0 189
jhon309 0:88e313c910d0 190 This function assigns the given value to the Priority Mask Register.
jhon309 0:88e313c910d0 191
jhon309 0:88e313c910d0 192 \param [in] priMask Priority Mask
jhon309 0:88e313c910d0 193 */
jhon309 0:88e313c910d0 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
jhon309 0:88e313c910d0 195 {
jhon309 0:88e313c910d0 196 register uint32_t __regPriMask __ASM("primask");
jhon309 0:88e313c910d0 197 __regPriMask = (priMask);
jhon309 0:88e313c910d0 198 }
jhon309 0:88e313c910d0 199
jhon309 0:88e313c910d0 200
jhon309 0:88e313c910d0 201 #if (__CORTEX_M >= 0x03)
jhon309 0:88e313c910d0 202
jhon309 0:88e313c910d0 203 /** \brief Enable FIQ
jhon309 0:88e313c910d0 204
jhon309 0:88e313c910d0 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
jhon309 0:88e313c910d0 206 Can only be executed in Privileged modes.
jhon309 0:88e313c910d0 207 */
jhon309 0:88e313c910d0 208 #define __enable_fault_irq __enable_fiq
jhon309 0:88e313c910d0 209
jhon309 0:88e313c910d0 210
jhon309 0:88e313c910d0 211 /** \brief Disable FIQ
jhon309 0:88e313c910d0 212
jhon309 0:88e313c910d0 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
jhon309 0:88e313c910d0 214 Can only be executed in Privileged modes.
jhon309 0:88e313c910d0 215 */
jhon309 0:88e313c910d0 216 #define __disable_fault_irq __disable_fiq
jhon309 0:88e313c910d0 217
jhon309 0:88e313c910d0 218
jhon309 0:88e313c910d0 219 /** \brief Get Base Priority
jhon309 0:88e313c910d0 220
jhon309 0:88e313c910d0 221 This function returns the current value of the Base Priority register.
jhon309 0:88e313c910d0 222
jhon309 0:88e313c910d0 223 \return Base Priority register value
jhon309 0:88e313c910d0 224 */
jhon309 0:88e313c910d0 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
jhon309 0:88e313c910d0 226 {
jhon309 0:88e313c910d0 227 register uint32_t __regBasePri __ASM("basepri");
jhon309 0:88e313c910d0 228 return(__regBasePri);
jhon309 0:88e313c910d0 229 }
jhon309 0:88e313c910d0 230
jhon309 0:88e313c910d0 231
jhon309 0:88e313c910d0 232 /** \brief Set Base Priority
jhon309 0:88e313c910d0 233
jhon309 0:88e313c910d0 234 This function assigns the given value to the Base Priority register.
jhon309 0:88e313c910d0 235
jhon309 0:88e313c910d0 236 \param [in] basePri Base Priority value to set
jhon309 0:88e313c910d0 237 */
jhon309 0:88e313c910d0 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
jhon309 0:88e313c910d0 239 {
jhon309 0:88e313c910d0 240 register uint32_t __regBasePri __ASM("basepri");
jhon309 0:88e313c910d0 241 __regBasePri = (basePri & 0xff);
jhon309 0:88e313c910d0 242 }
jhon309 0:88e313c910d0 243
jhon309 0:88e313c910d0 244
jhon309 0:88e313c910d0 245 /** \brief Get Fault Mask
jhon309 0:88e313c910d0 246
jhon309 0:88e313c910d0 247 This function returns the current value of the Fault Mask register.
jhon309 0:88e313c910d0 248
jhon309 0:88e313c910d0 249 \return Fault Mask register value
jhon309 0:88e313c910d0 250 */
jhon309 0:88e313c910d0 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
jhon309 0:88e313c910d0 252 {
jhon309 0:88e313c910d0 253 register uint32_t __regFaultMask __ASM("faultmask");
jhon309 0:88e313c910d0 254 return(__regFaultMask);
jhon309 0:88e313c910d0 255 }
jhon309 0:88e313c910d0 256
jhon309 0:88e313c910d0 257
jhon309 0:88e313c910d0 258 /** \brief Set Fault Mask
jhon309 0:88e313c910d0 259
jhon309 0:88e313c910d0 260 This function assigns the given value to the Fault Mask register.
jhon309 0:88e313c910d0 261
jhon309 0:88e313c910d0 262 \param [in] faultMask Fault Mask value to set
jhon309 0:88e313c910d0 263 */
jhon309 0:88e313c910d0 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
jhon309 0:88e313c910d0 265 {
jhon309 0:88e313c910d0 266 register uint32_t __regFaultMask __ASM("faultmask");
jhon309 0:88e313c910d0 267 __regFaultMask = (faultMask & (uint32_t)1);
jhon309 0:88e313c910d0 268 }
jhon309 0:88e313c910d0 269
jhon309 0:88e313c910d0 270 #endif /* (__CORTEX_M >= 0x03) */
jhon309 0:88e313c910d0 271
jhon309 0:88e313c910d0 272
jhon309 0:88e313c910d0 273 #if (__CORTEX_M == 0x04)
jhon309 0:88e313c910d0 274
jhon309 0:88e313c910d0 275 /** \brief Get FPSCR
jhon309 0:88e313c910d0 276
jhon309 0:88e313c910d0 277 This function returns the current value of the Floating Point Status/Control register.
jhon309 0:88e313c910d0 278
jhon309 0:88e313c910d0 279 \return Floating Point Status/Control register value
jhon309 0:88e313c910d0 280 */
jhon309 0:88e313c910d0 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
jhon309 0:88e313c910d0 282 {
jhon309 0:88e313c910d0 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
jhon309 0:88e313c910d0 284 register uint32_t __regfpscr __ASM("fpscr");
jhon309 0:88e313c910d0 285 return(__regfpscr);
jhon309 0:88e313c910d0 286 #else
jhon309 0:88e313c910d0 287 return(0);
jhon309 0:88e313c910d0 288 #endif
jhon309 0:88e313c910d0 289 }
jhon309 0:88e313c910d0 290
jhon309 0:88e313c910d0 291
jhon309 0:88e313c910d0 292 /** \brief Set FPSCR
jhon309 0:88e313c910d0 293
jhon309 0:88e313c910d0 294 This function assigns the given value to the Floating Point Status/Control register.
jhon309 0:88e313c910d0 295
jhon309 0:88e313c910d0 296 \param [in] fpscr Floating Point Status/Control value to set
jhon309 0:88e313c910d0 297 */
jhon309 0:88e313c910d0 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
jhon309 0:88e313c910d0 299 {
jhon309 0:88e313c910d0 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
jhon309 0:88e313c910d0 301 register uint32_t __regfpscr __ASM("fpscr");
jhon309 0:88e313c910d0 302 __regfpscr = (fpscr);
jhon309 0:88e313c910d0 303 #endif
jhon309 0:88e313c910d0 304 }
jhon309 0:88e313c910d0 305
jhon309 0:88e313c910d0 306 #endif /* (__CORTEX_M == 0x04) */
jhon309 0:88e313c910d0 307
jhon309 0:88e313c910d0 308
jhon309 0:88e313c910d0 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
jhon309 0:88e313c910d0 310 /* IAR iccarm specific functions */
jhon309 0:88e313c910d0 311
jhon309 0:88e313c910d0 312 #include <cmsis_iar.h>
jhon309 0:88e313c910d0 313
jhon309 0:88e313c910d0 314
jhon309 0:88e313c910d0 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
jhon309 0:88e313c910d0 316 /* TI CCS specific functions */
jhon309 0:88e313c910d0 317
jhon309 0:88e313c910d0 318 #include <cmsis_ccs.h>
jhon309 0:88e313c910d0 319
jhon309 0:88e313c910d0 320
jhon309 0:88e313c910d0 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
jhon309 0:88e313c910d0 322 /* GNU gcc specific functions */
jhon309 0:88e313c910d0 323
jhon309 0:88e313c910d0 324 /** \brief Enable IRQ Interrupts
jhon309 0:88e313c910d0 325
jhon309 0:88e313c910d0 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
jhon309 0:88e313c910d0 327 Can only be executed in Privileged modes.
jhon309 0:88e313c910d0 328 */
jhon309 0:88e313c910d0 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
jhon309 0:88e313c910d0 330 {
jhon309 0:88e313c910d0 331 __ASM volatile ("cpsie i" : : : "memory");
jhon309 0:88e313c910d0 332 }
jhon309 0:88e313c910d0 333
jhon309 0:88e313c910d0 334
jhon309 0:88e313c910d0 335 /** \brief Disable IRQ Interrupts
jhon309 0:88e313c910d0 336
jhon309 0:88e313c910d0 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
jhon309 0:88e313c910d0 338 Can only be executed in Privileged modes.
jhon309 0:88e313c910d0 339 */
jhon309 0:88e313c910d0 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
jhon309 0:88e313c910d0 341 {
jhon309 0:88e313c910d0 342 __ASM volatile ("cpsid i" : : : "memory");
jhon309 0:88e313c910d0 343 }
jhon309 0:88e313c910d0 344
jhon309 0:88e313c910d0 345
jhon309 0:88e313c910d0 346 /** \brief Get Control Register
jhon309 0:88e313c910d0 347
jhon309 0:88e313c910d0 348 This function returns the content of the Control Register.
jhon309 0:88e313c910d0 349
jhon309 0:88e313c910d0 350 \return Control Register value
jhon309 0:88e313c910d0 351 */
jhon309 0:88e313c910d0 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
jhon309 0:88e313c910d0 353 {
jhon309 0:88e313c910d0 354 uint32_t result;
jhon309 0:88e313c910d0 355
jhon309 0:88e313c910d0 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
jhon309 0:88e313c910d0 357 return(result);
jhon309 0:88e313c910d0 358 }
jhon309 0:88e313c910d0 359
jhon309 0:88e313c910d0 360
jhon309 0:88e313c910d0 361 /** \brief Set Control Register
jhon309 0:88e313c910d0 362
jhon309 0:88e313c910d0 363 This function writes the given value to the Control Register.
jhon309 0:88e313c910d0 364
jhon309 0:88e313c910d0 365 \param [in] control Control Register value to set
jhon309 0:88e313c910d0 366 */
jhon309 0:88e313c910d0 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
jhon309 0:88e313c910d0 368 {
jhon309 0:88e313c910d0 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
jhon309 0:88e313c910d0 370 }
jhon309 0:88e313c910d0 371
jhon309 0:88e313c910d0 372
jhon309 0:88e313c910d0 373 /** \brief Get IPSR Register
jhon309 0:88e313c910d0 374
jhon309 0:88e313c910d0 375 This function returns the content of the IPSR Register.
jhon309 0:88e313c910d0 376
jhon309 0:88e313c910d0 377 \return IPSR Register value
jhon309 0:88e313c910d0 378 */
jhon309 0:88e313c910d0 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
jhon309 0:88e313c910d0 380 {
jhon309 0:88e313c910d0 381 uint32_t result;
jhon309 0:88e313c910d0 382
jhon309 0:88e313c910d0 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
jhon309 0:88e313c910d0 384 return(result);
jhon309 0:88e313c910d0 385 }
jhon309 0:88e313c910d0 386
jhon309 0:88e313c910d0 387
jhon309 0:88e313c910d0 388 /** \brief Get APSR Register
jhon309 0:88e313c910d0 389
jhon309 0:88e313c910d0 390 This function returns the content of the APSR Register.
jhon309 0:88e313c910d0 391
jhon309 0:88e313c910d0 392 \return APSR Register value
jhon309 0:88e313c910d0 393 */
jhon309 0:88e313c910d0 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
jhon309 0:88e313c910d0 395 {
jhon309 0:88e313c910d0 396 uint32_t result;
jhon309 0:88e313c910d0 397
jhon309 0:88e313c910d0 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
jhon309 0:88e313c910d0 399 return(result);
jhon309 0:88e313c910d0 400 }
jhon309 0:88e313c910d0 401
jhon309 0:88e313c910d0 402
jhon309 0:88e313c910d0 403 /** \brief Get xPSR Register
jhon309 0:88e313c910d0 404
jhon309 0:88e313c910d0 405 This function returns the content of the xPSR Register.
jhon309 0:88e313c910d0 406
jhon309 0:88e313c910d0 407 \return xPSR Register value
jhon309 0:88e313c910d0 408 */
jhon309 0:88e313c910d0 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
jhon309 0:88e313c910d0 410 {
jhon309 0:88e313c910d0 411 uint32_t result;
jhon309 0:88e313c910d0 412
jhon309 0:88e313c910d0 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
jhon309 0:88e313c910d0 414 return(result);
jhon309 0:88e313c910d0 415 }
jhon309 0:88e313c910d0 416
jhon309 0:88e313c910d0 417
jhon309 0:88e313c910d0 418 /** \brief Get Process Stack Pointer
jhon309 0:88e313c910d0 419
jhon309 0:88e313c910d0 420 This function returns the current value of the Process Stack Pointer (PSP).
jhon309 0:88e313c910d0 421
jhon309 0:88e313c910d0 422 \return PSP Register value
jhon309 0:88e313c910d0 423 */
jhon309 0:88e313c910d0 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
jhon309 0:88e313c910d0 425 {
jhon309 0:88e313c910d0 426 register uint32_t result;
jhon309 0:88e313c910d0 427
jhon309 0:88e313c910d0 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
jhon309 0:88e313c910d0 429 return(result);
jhon309 0:88e313c910d0 430 }
jhon309 0:88e313c910d0 431
jhon309 0:88e313c910d0 432
jhon309 0:88e313c910d0 433 /** \brief Set Process Stack Pointer
jhon309 0:88e313c910d0 434
jhon309 0:88e313c910d0 435 This function assigns the given value to the Process Stack Pointer (PSP).
jhon309 0:88e313c910d0 436
jhon309 0:88e313c910d0 437 \param [in] topOfProcStack Process Stack Pointer value to set
jhon309 0:88e313c910d0 438 */
jhon309 0:88e313c910d0 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
jhon309 0:88e313c910d0 440 {
jhon309 0:88e313c910d0 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
jhon309 0:88e313c910d0 442 }
jhon309 0:88e313c910d0 443
jhon309 0:88e313c910d0 444
jhon309 0:88e313c910d0 445 /** \brief Get Main Stack Pointer
jhon309 0:88e313c910d0 446
jhon309 0:88e313c910d0 447 This function returns the current value of the Main Stack Pointer (MSP).
jhon309 0:88e313c910d0 448
jhon309 0:88e313c910d0 449 \return MSP Register value
jhon309 0:88e313c910d0 450 */
jhon309 0:88e313c910d0 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
jhon309 0:88e313c910d0 452 {
jhon309 0:88e313c910d0 453 register uint32_t result;
jhon309 0:88e313c910d0 454
jhon309 0:88e313c910d0 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
jhon309 0:88e313c910d0 456 return(result);
jhon309 0:88e313c910d0 457 }
jhon309 0:88e313c910d0 458
jhon309 0:88e313c910d0 459
jhon309 0:88e313c910d0 460 /** \brief Set Main Stack Pointer
jhon309 0:88e313c910d0 461
jhon309 0:88e313c910d0 462 This function assigns the given value to the Main Stack Pointer (MSP).
jhon309 0:88e313c910d0 463
jhon309 0:88e313c910d0 464 \param [in] topOfMainStack Main Stack Pointer value to set
jhon309 0:88e313c910d0 465 */
jhon309 0:88e313c910d0 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
jhon309 0:88e313c910d0 467 {
jhon309 0:88e313c910d0 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
jhon309 0:88e313c910d0 469 }
jhon309 0:88e313c910d0 470
jhon309 0:88e313c910d0 471
jhon309 0:88e313c910d0 472 /** \brief Get Priority Mask
jhon309 0:88e313c910d0 473
jhon309 0:88e313c910d0 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
jhon309 0:88e313c910d0 475
jhon309 0:88e313c910d0 476 \return Priority Mask value
jhon309 0:88e313c910d0 477 */
jhon309 0:88e313c910d0 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
jhon309 0:88e313c910d0 479 {
jhon309 0:88e313c910d0 480 uint32_t result;
jhon309 0:88e313c910d0 481
jhon309 0:88e313c910d0 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
jhon309 0:88e313c910d0 483 return(result);
jhon309 0:88e313c910d0 484 }
jhon309 0:88e313c910d0 485
jhon309 0:88e313c910d0 486
jhon309 0:88e313c910d0 487 /** \brief Set Priority Mask
jhon309 0:88e313c910d0 488
jhon309 0:88e313c910d0 489 This function assigns the given value to the Priority Mask Register.
jhon309 0:88e313c910d0 490
jhon309 0:88e313c910d0 491 \param [in] priMask Priority Mask
jhon309 0:88e313c910d0 492 */
jhon309 0:88e313c910d0 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
jhon309 0:88e313c910d0 494 {
jhon309 0:88e313c910d0 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
jhon309 0:88e313c910d0 496 }
jhon309 0:88e313c910d0 497
jhon309 0:88e313c910d0 498
jhon309 0:88e313c910d0 499 #if (__CORTEX_M >= 0x03)
jhon309 0:88e313c910d0 500
jhon309 0:88e313c910d0 501 /** \brief Enable FIQ
jhon309 0:88e313c910d0 502
jhon309 0:88e313c910d0 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
jhon309 0:88e313c910d0 504 Can only be executed in Privileged modes.
jhon309 0:88e313c910d0 505 */
jhon309 0:88e313c910d0 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
jhon309 0:88e313c910d0 507 {
jhon309 0:88e313c910d0 508 __ASM volatile ("cpsie f" : : : "memory");
jhon309 0:88e313c910d0 509 }
jhon309 0:88e313c910d0 510
jhon309 0:88e313c910d0 511
jhon309 0:88e313c910d0 512 /** \brief Disable FIQ
jhon309 0:88e313c910d0 513
jhon309 0:88e313c910d0 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
jhon309 0:88e313c910d0 515 Can only be executed in Privileged modes.
jhon309 0:88e313c910d0 516 */
jhon309 0:88e313c910d0 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
jhon309 0:88e313c910d0 518 {
jhon309 0:88e313c910d0 519 __ASM volatile ("cpsid f" : : : "memory");
jhon309 0:88e313c910d0 520 }
jhon309 0:88e313c910d0 521
jhon309 0:88e313c910d0 522
jhon309 0:88e313c910d0 523 /** \brief Get Base Priority
jhon309 0:88e313c910d0 524
jhon309 0:88e313c910d0 525 This function returns the current value of the Base Priority register.
jhon309 0:88e313c910d0 526
jhon309 0:88e313c910d0 527 \return Base Priority register value
jhon309 0:88e313c910d0 528 */
jhon309 0:88e313c910d0 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
jhon309 0:88e313c910d0 530 {
jhon309 0:88e313c910d0 531 uint32_t result;
jhon309 0:88e313c910d0 532
jhon309 0:88e313c910d0 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
jhon309 0:88e313c910d0 534 return(result);
jhon309 0:88e313c910d0 535 }
jhon309 0:88e313c910d0 536
jhon309 0:88e313c910d0 537
jhon309 0:88e313c910d0 538 /** \brief Set Base Priority
jhon309 0:88e313c910d0 539
jhon309 0:88e313c910d0 540 This function assigns the given value to the Base Priority register.
jhon309 0:88e313c910d0 541
jhon309 0:88e313c910d0 542 \param [in] basePri Base Priority value to set
jhon309 0:88e313c910d0 543 */
jhon309 0:88e313c910d0 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
jhon309 0:88e313c910d0 545 {
jhon309 0:88e313c910d0 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
jhon309 0:88e313c910d0 547 }
jhon309 0:88e313c910d0 548
jhon309 0:88e313c910d0 549
jhon309 0:88e313c910d0 550 /** \brief Get Fault Mask
jhon309 0:88e313c910d0 551
jhon309 0:88e313c910d0 552 This function returns the current value of the Fault Mask register.
jhon309 0:88e313c910d0 553
jhon309 0:88e313c910d0 554 \return Fault Mask register value
jhon309 0:88e313c910d0 555 */
jhon309 0:88e313c910d0 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
jhon309 0:88e313c910d0 557 {
jhon309 0:88e313c910d0 558 uint32_t result;
jhon309 0:88e313c910d0 559
jhon309 0:88e313c910d0 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
jhon309 0:88e313c910d0 561 return(result);
jhon309 0:88e313c910d0 562 }
jhon309 0:88e313c910d0 563
jhon309 0:88e313c910d0 564
jhon309 0:88e313c910d0 565 /** \brief Set Fault Mask
jhon309 0:88e313c910d0 566
jhon309 0:88e313c910d0 567 This function assigns the given value to the Fault Mask register.
jhon309 0:88e313c910d0 568
jhon309 0:88e313c910d0 569 \param [in] faultMask Fault Mask value to set
jhon309 0:88e313c910d0 570 */
jhon309 0:88e313c910d0 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
jhon309 0:88e313c910d0 572 {
jhon309 0:88e313c910d0 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
jhon309 0:88e313c910d0 574 }
jhon309 0:88e313c910d0 575
jhon309 0:88e313c910d0 576 #endif /* (__CORTEX_M >= 0x03) */
jhon309 0:88e313c910d0 577
jhon309 0:88e313c910d0 578
jhon309 0:88e313c910d0 579 #if (__CORTEX_M == 0x04)
jhon309 0:88e313c910d0 580
jhon309 0:88e313c910d0 581 /** \brief Get FPSCR
jhon309 0:88e313c910d0 582
jhon309 0:88e313c910d0 583 This function returns the current value of the Floating Point Status/Control register.
jhon309 0:88e313c910d0 584
jhon309 0:88e313c910d0 585 \return Floating Point Status/Control register value
jhon309 0:88e313c910d0 586 */
jhon309 0:88e313c910d0 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
jhon309 0:88e313c910d0 588 {
jhon309 0:88e313c910d0 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
jhon309 0:88e313c910d0 590 uint32_t result;
jhon309 0:88e313c910d0 591
jhon309 0:88e313c910d0 592 /* Empty asm statement works as a scheduling barrier */
jhon309 0:88e313c910d0 593 __ASM volatile ("");
jhon309 0:88e313c910d0 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
jhon309 0:88e313c910d0 595 __ASM volatile ("");
jhon309 0:88e313c910d0 596 return(result);
jhon309 0:88e313c910d0 597 #else
jhon309 0:88e313c910d0 598 return(0);
jhon309 0:88e313c910d0 599 #endif
jhon309 0:88e313c910d0 600 }
jhon309 0:88e313c910d0 601
jhon309 0:88e313c910d0 602
jhon309 0:88e313c910d0 603 /** \brief Set FPSCR
jhon309 0:88e313c910d0 604
jhon309 0:88e313c910d0 605 This function assigns the given value to the Floating Point Status/Control register.
jhon309 0:88e313c910d0 606
jhon309 0:88e313c910d0 607 \param [in] fpscr Floating Point Status/Control value to set
jhon309 0:88e313c910d0 608 */
jhon309 0:88e313c910d0 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
jhon309 0:88e313c910d0 610 {
jhon309 0:88e313c910d0 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
jhon309 0:88e313c910d0 612 /* Empty asm statement works as a scheduling barrier */
jhon309 0:88e313c910d0 613 __ASM volatile ("");
jhon309 0:88e313c910d0 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
jhon309 0:88e313c910d0 615 __ASM volatile ("");
jhon309 0:88e313c910d0 616 #endif
jhon309 0:88e313c910d0 617 }
jhon309 0:88e313c910d0 618
jhon309 0:88e313c910d0 619 #endif /* (__CORTEX_M == 0x04) */
jhon309 0:88e313c910d0 620
jhon309 0:88e313c910d0 621
jhon309 0:88e313c910d0 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
jhon309 0:88e313c910d0 623 /* TASKING carm specific functions */
jhon309 0:88e313c910d0 624
jhon309 0:88e313c910d0 625 /*
jhon309 0:88e313c910d0 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
jhon309 0:88e313c910d0 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
jhon309 0:88e313c910d0 628 * Including the CMSIS ones.
jhon309 0:88e313c910d0 629 */
jhon309 0:88e313c910d0 630
jhon309 0:88e313c910d0 631 #endif
jhon309 0:88e313c910d0 632
jhon309 0:88e313c910d0 633 /*@} end of CMSIS_Core_RegAccFunctions */
jhon309 0:88e313c910d0 634
jhon309 0:88e313c910d0 635
jhon309 0:88e313c910d0 636 #endif /* __CORE_CMFUNC_H */