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TARGET_NUCLEO_F072RB/stm32f0xx_hal_pwr_ex.h@0:666850d06c9f, 2015-08-20 (annotated)

Committer:
jhon309
Date:
Thu Aug 20 00:37:14 2015 +0000
Revision:
0:666850d06c9f
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jhon309 0:666850d06c9f 1 /**
jhon309 0:666850d06c9f 2 ******************************************************************************
jhon309 0:666850d06c9f 3 * @file stm32f0xx_hal_pwr_ex.h
jhon309 0:666850d06c9f 4 * @author MCD Application Team
jhon309 0:666850d06c9f 5 * @version V1.2.0
jhon309 0:666850d06c9f 6 * @date 11-December-2014
jhon309 0:666850d06c9f 7 * @brief Header file of PWR HAL Extension module.
jhon309 0:666850d06c9f 8 ******************************************************************************
jhon309 0:666850d06c9f 9 * @attention
jhon309 0:666850d06c9f 10 *
jhon309 0:666850d06c9f 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
jhon309 0:666850d06c9f 12 *
jhon309 0:666850d06c9f 13 * Redistribution and use in source and binary forms, with or without modification,
jhon309 0:666850d06c9f 14 * are permitted provided that the following conditions are met:
jhon309 0:666850d06c9f 15 * 1. Redistributions of source code must retain the above copyright notice,
jhon309 0:666850d06c9f 16 * this list of conditions and the following disclaimer.
jhon309 0:666850d06c9f 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
jhon309 0:666850d06c9f 18 * this list of conditions and the following disclaimer in the documentation
jhon309 0:666850d06c9f 19 * and/or other materials provided with the distribution.
jhon309 0:666850d06c9f 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
jhon309 0:666850d06c9f 21 * may be used to endorse or promote products derived from this software
jhon309 0:666850d06c9f 22 * without specific prior written permission.
jhon309 0:666850d06c9f 23 *
jhon309 0:666850d06c9f 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jhon309 0:666850d06c9f 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jhon309 0:666850d06c9f 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
jhon309 0:666850d06c9f 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
jhon309 0:666850d06c9f 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
jhon309 0:666850d06c9f 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
jhon309 0:666850d06c9f 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
jhon309 0:666850d06c9f 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
jhon309 0:666850d06c9f 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
jhon309 0:666850d06c9f 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
jhon309 0:666850d06c9f 34 *
jhon309 0:666850d06c9f 35 ******************************************************************************
jhon309 0:666850d06c9f 36 */
jhon309 0:666850d06c9f 37
jhon309 0:666850d06c9f 38 /* Define to prevent recursive inclusion -------------------------------------*/
jhon309 0:666850d06c9f 39 #ifndef __STM32F0xx_HAL_PWR_EX_H
jhon309 0:666850d06c9f 40 #define __STM32F0xx_HAL_PWR_EX_H
jhon309 0:666850d06c9f 41
jhon309 0:666850d06c9f 42 #ifdef __cplusplus
jhon309 0:666850d06c9f 43 extern "C" {
jhon309 0:666850d06c9f 44 #endif
jhon309 0:666850d06c9f 45
jhon309 0:666850d06c9f 46 /* Includes ------------------------------------------------------------------*/
jhon309 0:666850d06c9f 47 #include "stm32f0xx_hal_def.h"
jhon309 0:666850d06c9f 48
jhon309 0:666850d06c9f 49 /** @addtogroup STM32F0xx_HAL_Driver
jhon309 0:666850d06c9f 50 * @{
jhon309 0:666850d06c9f 51 */
jhon309 0:666850d06c9f 52
jhon309 0:666850d06c9f 53 /** @addtogroup PWREx
jhon309 0:666850d06c9f 54 * @{
jhon309 0:666850d06c9f 55 */
jhon309 0:666850d06c9f 56
jhon309 0:666850d06c9f 57 /* Exported types ------------------------------------------------------------*/
jhon309 0:666850d06c9f 58
jhon309 0:666850d06c9f 59 /** @defgroup PWREx_Exported_Types PWREx Exported Types
jhon309 0:666850d06c9f 60 * @{
jhon309 0:666850d06c9f 61 */
jhon309 0:666850d06c9f 62
jhon309 0:666850d06c9f 63 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:666850d06c9f 64 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:666850d06c9f 65 defined (STM32F091xC)
jhon309 0:666850d06c9f 66
jhon309 0:666850d06c9f 67 /**
jhon309 0:666850d06c9f 68 * @brief PWR PVD configuration structure definition
jhon309 0:666850d06c9f 69 */
jhon309 0:666850d06c9f 70 typedef struct
jhon309 0:666850d06c9f 71 {
jhon309 0:666850d06c9f 72 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level
jhon309 0:666850d06c9f 73 This parameter can be a value of @ref PWREx_PVD_detection_level */
jhon309 0:666850d06c9f 74
jhon309 0:666850d06c9f 75 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
jhon309 0:666850d06c9f 76 This parameter can be a value of @ref PWREx_PVD_Mode */
jhon309 0:666850d06c9f 77 }PWR_PVDTypeDef;
jhon309 0:666850d06c9f 78
jhon309 0:666850d06c9f 79 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:666850d06c9f 80 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:666850d06c9f 81 /* defined (STM32F091xC) */
jhon309 0:666850d06c9f 82 /**
jhon309 0:666850d06c9f 83 * @}
jhon309 0:666850d06c9f 84 */
jhon309 0:666850d06c9f 85 /* Exported constants --------------------------------------------------------*/
jhon309 0:666850d06c9f 86
jhon309 0:666850d06c9f 87 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
jhon309 0:666850d06c9f 88 * @{
jhon309 0:666850d06c9f 89 */
jhon309 0:666850d06c9f 90
jhon309 0:666850d06c9f 91
jhon309 0:666850d06c9f 92 /** @defgroup PWREx_WakeUp_Pins PWREx Wakeup Pins
jhon309 0:666850d06c9f 93 * @{
jhon309 0:666850d06c9f 94 */
jhon309 0:666850d06c9f 95 #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
jhon309 0:666850d06c9f 96 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
jhon309 0:666850d06c9f 97 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
jhon309 0:666850d06c9f 98 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
jhon309 0:666850d06c9f 99 #define PWR_WAKEUP_PIN3 ((uint32_t)0x02)
jhon309 0:666850d06c9f 100 #define PWR_WAKEUP_PIN4 ((uint32_t)0x03)
jhon309 0:666850d06c9f 101 #define PWR_WAKEUP_PIN5 ((uint32_t)0x04)
jhon309 0:666850d06c9f 102 #define PWR_WAKEUP_PIN6 ((uint32_t)0x05)
jhon309 0:666850d06c9f 103 #define PWR_WAKEUP_PIN7 ((uint32_t)0x06)
jhon309 0:666850d06c9f 104 #define PWR_WAKEUP_PIN8 ((uint32_t)0x07)
jhon309 0:666850d06c9f 105
jhon309 0:666850d06c9f 106 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
jhon309 0:666850d06c9f 107 ((PIN) == PWR_WAKEUP_PIN2) || \
jhon309 0:666850d06c9f 108 ((PIN) == PWR_WAKEUP_PIN3) || \
jhon309 0:666850d06c9f 109 ((PIN) == PWR_WAKEUP_PIN4) || \
jhon309 0:666850d06c9f 110 ((PIN) == PWR_WAKEUP_PIN5) || \
jhon309 0:666850d06c9f 111 ((PIN) == PWR_WAKEUP_PIN6) || \
jhon309 0:666850d06c9f 112 ((PIN) == PWR_WAKEUP_PIN7) || \
jhon309 0:666850d06c9f 113 ((PIN) == PWR_WAKEUP_PIN8))
jhon309 0:666850d06c9f 114 #else
jhon309 0:666850d06c9f 115 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
jhon309 0:666850d06c9f 116 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
jhon309 0:666850d06c9f 117
jhon309 0:666850d06c9f 118 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
jhon309 0:666850d06c9f 119 ((PIN) == PWR_WAKEUP_PIN2))
jhon309 0:666850d06c9f 120 #endif /* defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || */
jhon309 0:666850d06c9f 121 /* defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
jhon309 0:666850d06c9f 122 /**
jhon309 0:666850d06c9f 123 * @}
jhon309 0:666850d06c9f 124 */
jhon309 0:666850d06c9f 125
jhon309 0:666850d06c9f 126 /** @defgroup PWREx_EXTI_Line PWREx EXTI Line
jhon309 0:666850d06c9f 127 * @{
jhon309 0:666850d06c9f 128 */
jhon309 0:666850d06c9f 129 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:666850d06c9f 130 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:666850d06c9f 131 defined (STM32F091xC)
jhon309 0:666850d06c9f 132
jhon309 0:666850d06c9f 133 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
jhon309 0:666850d06c9f 134
jhon309 0:666850d06c9f 135 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:666850d06c9f 136 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:666850d06c9f 137 /* defined (STM32F091xC) */
jhon309 0:666850d06c9f 138
jhon309 0:666850d06c9f 139 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:666850d06c9f 140 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:666850d06c9f 141 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:666850d06c9f 142
jhon309 0:666850d06c9f 143 #define PWR_EXTI_LINE_VDDIO2 ((uint32_t)0x80000000) /*!< External interrupt line 31 Connected to the Vddio2 Monitor EXTI Line */
jhon309 0:666850d06c9f 144
jhon309 0:666850d06c9f 145 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
jhon309 0:666850d06c9f 146 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:666850d06c9f 147 defined (STM32F091xC) || defined (STM32F098xx) ||*/
jhon309 0:666850d06c9f 148 /**
jhon309 0:666850d06c9f 149 * @}
jhon309 0:666850d06c9f 150 */
jhon309 0:666850d06c9f 151
jhon309 0:666850d06c9f 152 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:666850d06c9f 153 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:666850d06c9f 154 defined (STM32F091xC)
jhon309 0:666850d06c9f 155 /** @defgroup PWREx_PVD_detection_level PWREx PVD detection level
jhon309 0:666850d06c9f 156 * @{
jhon309 0:666850d06c9f 157 */
jhon309 0:666850d06c9f 158 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
jhon309 0:666850d06c9f 159 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
jhon309 0:666850d06c9f 160 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
jhon309 0:666850d06c9f 161 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
jhon309 0:666850d06c9f 162 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
jhon309 0:666850d06c9f 163 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
jhon309 0:666850d06c9f 164 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
jhon309 0:666850d06c9f 165 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
jhon309 0:666850d06c9f 166 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
jhon309 0:666850d06c9f 167 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
jhon309 0:666850d06c9f 168 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
jhon309 0:666850d06c9f 169 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
jhon309 0:666850d06c9f 170 /**
jhon309 0:666850d06c9f 171 * @}
jhon309 0:666850d06c9f 172 */
jhon309 0:666850d06c9f 173
jhon309 0:666850d06c9f 174 /** @defgroup PWREx_PVD_Mode PWREx PVD Mode
jhon309 0:666850d06c9f 175 * @{
jhon309 0:666850d06c9f 176 */
jhon309 0:666850d06c9f 177 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
jhon309 0:666850d06c9f 178 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
jhon309 0:666850d06c9f 179 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
jhon309 0:666850d06c9f 180 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
jhon309 0:666850d06c9f 181 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
jhon309 0:666850d06c9f 182 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
jhon309 0:666850d06c9f 183 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
jhon309 0:666850d06c9f 184
jhon309 0:666850d06c9f 185 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
jhon309 0:666850d06c9f 186 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
jhon309 0:666850d06c9f 187 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
jhon309 0:666850d06c9f 188 ((MODE) == PWR_PVD_MODE_NORMAL))
jhon309 0:666850d06c9f 189 /**
jhon309 0:666850d06c9f 190 * @}
jhon309 0:666850d06c9f 191 */
jhon309 0:666850d06c9f 192 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:666850d06c9f 193 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:666850d06c9f 194 /* defined (STM32F091xC) */
jhon309 0:666850d06c9f 195
jhon309 0:666850d06c9f 196 /** @defgroup PWREx_Flag PWREx Flag
jhon309 0:666850d06c9f 197 * @{
jhon309 0:666850d06c9f 198 */
jhon309 0:666850d06c9f 199 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:666850d06c9f 200 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:666850d06c9f 201 defined (STM32F091xC)
jhon309 0:666850d06c9f 202
jhon309 0:666850d06c9f 203 #define PWR_FLAG_WU PWR_CSR_WUF
jhon309 0:666850d06c9f 204 #define PWR_FLAG_SB PWR_CSR_SBF
jhon309 0:666850d06c9f 205 #define PWR_FLAG_PVDO PWR_CSR_PVDO
jhon309 0:666850d06c9f 206 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
jhon309 0:666850d06c9f 207 #elif defined (STM32F070x6) || defined (STM32F070xB) || defined (STM32F030xC)
jhon309 0:666850d06c9f 208 #define PWR_FLAG_WU PWR_CSR_WUF
jhon309 0:666850d06c9f 209 #define PWR_FLAG_SB PWR_CSR_SBF
jhon309 0:666850d06c9f 210 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
jhon309 0:666850d06c9f 211 #else
jhon309 0:666850d06c9f 212 #define PWR_FLAG_WU PWR_CSR_WUF
jhon309 0:666850d06c9f 213 #define PWR_FLAG_SB PWR_CSR_SBF
jhon309 0:666850d06c9f 214
jhon309 0:666850d06c9f 215 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:666850d06c9f 216 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:666850d06c9f 217 /* defined (STM32F091xC) */
jhon309 0:666850d06c9f 218 /**
jhon309 0:666850d06c9f 219 * @}
jhon309 0:666850d06c9f 220 */
jhon309 0:666850d06c9f 221
jhon309 0:666850d06c9f 222 /**
jhon309 0:666850d06c9f 223 * @}
jhon309 0:666850d06c9f 224 */
jhon309 0:666850d06c9f 225
jhon309 0:666850d06c9f 226 /* Exported macro ------------------------------------------------------------*/
jhon309 0:666850d06c9f 227 /** @defgroup PWREx_Exported_Macros PWREx Exported Macros
jhon309 0:666850d06c9f 228 * @{
jhon309 0:666850d06c9f 229 */
jhon309 0:666850d06c9f 230 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:666850d06c9f 231 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:666850d06c9f 232 defined (STM32F091xC)
jhon309 0:666850d06c9f 233 /**
jhon309 0:666850d06c9f 234 * @brief Enable interrupt on PVD Exti Line 16.
jhon309 0:666850d06c9f 235 * @retval None.
jhon309 0:666850d06c9f 236 */
jhon309 0:666850d06c9f 237 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
jhon309 0:666850d06c9f 238
jhon309 0:666850d06c9f 239 /**
jhon309 0:666850d06c9f 240 * @brief Disable interrupt on PVD Exti Line 16.
jhon309 0:666850d06c9f 241 * @retval None.
jhon309 0:666850d06c9f 242 */
jhon309 0:666850d06c9f 243 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
jhon309 0:666850d06c9f 244
jhon309 0:666850d06c9f 245 /**
jhon309 0:666850d06c9f 246 * @brief Enable event on PVD Exti Line 16.
jhon309 0:666850d06c9f 247 * @retval None.
jhon309 0:666850d06c9f 248 */
jhon309 0:666850d06c9f 249 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
jhon309 0:666850d06c9f 250
jhon309 0:666850d06c9f 251 /**
jhon309 0:666850d06c9f 252 * @brief Disable event on PVD Exti Line 16.
jhon309 0:666850d06c9f 253 * @retval None.
jhon309 0:666850d06c9f 254 */
jhon309 0:666850d06c9f 255 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
jhon309 0:666850d06c9f 256
jhon309 0:666850d06c9f 257 /**
jhon309 0:666850d06c9f 258 * @brief PVD EXTI line configuration: clear falling edge and rising edge trigger.
jhon309 0:666850d06c9f 259 * @retval None.
jhon309 0:666850d06c9f 260 */
jhon309 0:666850d06c9f 261 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_PVD); \
jhon309 0:666850d06c9f 262 EXTI->RTSR &= ~(PWR_EXTI_LINE_PVD)
jhon309 0:666850d06c9f 263
jhon309 0:666850d06c9f 264 /**
jhon309 0:666850d06c9f 265 * @brief PVD EXTI line configuration: set falling edge trigger.
jhon309 0:666850d06c9f 266 * @retval None.
jhon309 0:666850d06c9f 267 */
jhon309 0:666850d06c9f 268 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_PVD)
jhon309 0:666850d06c9f 269
jhon309 0:666850d06c9f 270 /**
jhon309 0:666850d06c9f 271 * @brief PVD EXTI line configuration: set rising edge trigger.
jhon309 0:666850d06c9f 272 * @retval None.
jhon309 0:666850d06c9f 273 */
jhon309 0:666850d06c9f 274 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->RTSR |= (PWR_EXTI_LINE_PVD)
jhon309 0:666850d06c9f 275
jhon309 0:666850d06c9f 276 /**
jhon309 0:666850d06c9f 277 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
jhon309 0:666850d06c9f 278 * @retval EXTI PVD Line Status.
jhon309 0:666850d06c9f 279 */
jhon309 0:666850d06c9f 280 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
jhon309 0:666850d06c9f 281
jhon309 0:666850d06c9f 282 /**
jhon309 0:666850d06c9f 283 * @brief Clear the PVD EXTI flag.
jhon309 0:666850d06c9f 284 * @retval None.
jhon309 0:666850d06c9f 285 */
jhon309 0:666850d06c9f 286 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
jhon309 0:666850d06c9f 287
jhon309 0:666850d06c9f 288 /**
jhon309 0:666850d06c9f 289 * @brief Generate a Software interrupt on selected EXTI line.
jhon309 0:666850d06c9f 290 * @retval None.
jhon309 0:666850d06c9f 291 */
jhon309 0:666850d06c9f 292 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
jhon309 0:666850d06c9f 293
jhon309 0:666850d06c9f 294 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:666850d06c9f 295 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:666850d06c9f 296 /* defined (STM32F091xC) */
jhon309 0:666850d06c9f 297
jhon309 0:666850d06c9f 298
jhon309 0:666850d06c9f 299 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:666850d06c9f 300 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:666850d06c9f 301 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:666850d06c9f 302 /**
jhon309 0:666850d06c9f 303 * @brief Enable interrupt on Vddio2 Monitor Exti Line 31.
jhon309 0:666850d06c9f 304 * @retval None.
jhon309 0:666850d06c9f 305 */
jhon309 0:666850d06c9f 306 #define __HAL_PWR_VDDIO2_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_VDDIO2))
jhon309 0:666850d06c9f 307
jhon309 0:666850d06c9f 308 /**
jhon309 0:666850d06c9f 309 * @brief Disable interrupt on Vddio2 Monitor Exti Line 31.
jhon309 0:666850d06c9f 310 * @retval None.
jhon309 0:666850d06c9f 311 */
jhon309 0:666850d06c9f 312 #define __HAL_PWR_VDDIO2_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_VDDIO2))
jhon309 0:666850d06c9f 313
jhon309 0:666850d06c9f 314 /**
jhon309 0:666850d06c9f 315 * @brief Vddio2 Monitor EXTI line configuration: clear falling edge and rising edge trigger.
jhon309 0:666850d06c9f 316 * @retval None.
jhon309 0:666850d06c9f 317 */
jhon309 0:666850d06c9f 318 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2); \
jhon309 0:666850d06c9f 319 EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2)
jhon309 0:666850d06c9f 320
jhon309 0:666850d06c9f 321 /**
jhon309 0:666850d06c9f 322 * @brief Vddio2 Monitor EXTI line configuration: set falling edge trigger.
jhon309 0:666850d06c9f 323 * @retval None.
jhon309 0:666850d06c9f 324 */
jhon309 0:666850d06c9f 325 #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_VDDIO2)
jhon309 0:666850d06c9f 326
jhon309 0:666850d06c9f 327 /**
jhon309 0:666850d06c9f 328 * @brief Check whether the specified VDDIO2 monitor EXTI interrupt flag is set or not.
jhon309 0:666850d06c9f 329 * @retval EXTI VDDIO2 Monitor Line Status.
jhon309 0:666850d06c9f 330 */
jhon309 0:666850d06c9f 331 #define __HAL_PWR_VDDIO2_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_VDDIO2))
jhon309 0:666850d06c9f 332
jhon309 0:666850d06c9f 333 /**
jhon309 0:666850d06c9f 334 * @brief Clear the VDDIO2 Monitor EXTI flag.
jhon309 0:666850d06c9f 335 * @retval None.
jhon309 0:666850d06c9f 336 */
jhon309 0:666850d06c9f 337 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_VDDIO2))
jhon309 0:666850d06c9f 338
jhon309 0:666850d06c9f 339 /**
jhon309 0:666850d06c9f 340 * @brief Generate a Software interrupt on selected EXTI line.
jhon309 0:666850d06c9f 341 * @retval None.
jhon309 0:666850d06c9f 342 */
jhon309 0:666850d06c9f 343 #define __HAL_PWR_VDDIO2_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_VDDIO2))
jhon309 0:666850d06c9f 344
jhon309 0:666850d06c9f 345
jhon309 0:666850d06c9f 346 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
jhon309 0:666850d06c9f 347 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:666850d06c9f 348 defined (STM32F091xC) || defined (STM32F098xx) */
jhon309 0:666850d06c9f 349
jhon309 0:666850d06c9f 350 /**
jhon309 0:666850d06c9f 351 * @}
jhon309 0:666850d06c9f 352 */
jhon309 0:666850d06c9f 353
jhon309 0:666850d06c9f 354 /* Exported functions --------------------------------------------------------*/
jhon309 0:666850d06c9f 355
jhon309 0:666850d06c9f 356 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
jhon309 0:666850d06c9f 357 * @{
jhon309 0:666850d06c9f 358 */
jhon309 0:666850d06c9f 359
jhon309 0:666850d06c9f 360 /** @addtogroup PWREx_Exported_Functions_Group1
jhon309 0:666850d06c9f 361 * @{
jhon309 0:666850d06c9f 362 */
jhon309 0:666850d06c9f 363 /* I/O operation functions ***************************************************/
jhon309 0:666850d06c9f 364 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:666850d06c9f 365 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:666850d06c9f 366 defined (STM32F091xC)
jhon309 0:666850d06c9f 367 void HAL_PWR_PVD_IRQHandler(void);
jhon309 0:666850d06c9f 368 void HAL_PWR_PVDCallback(void);
jhon309 0:666850d06c9f 369 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:666850d06c9f 370 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:666850d06c9f 371 /* defined (STM32F091xC) */
jhon309 0:666850d06c9f 372
jhon309 0:666850d06c9f 373 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:666850d06c9f 374 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:666850d06c9f 375 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:666850d06c9f 376 void HAL_PWR_Vddio2Monitor_IRQHandler(void);
jhon309 0:666850d06c9f 377 void HAL_PWR_Vddio2MonitorCallback(void);
jhon309 0:666850d06c9f 378 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:666850d06c9f 379 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:666850d06c9f 380 defined (STM32F091xC) || defined (STM32F098xx) */
jhon309 0:666850d06c9f 381
jhon309 0:666850d06c9f 382 /* Peripheral Control functions **********************************************/
jhon309 0:666850d06c9f 383 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:666850d06c9f 384 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:666850d06c9f 385 defined (STM32F091xC)
jhon309 0:666850d06c9f 386 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
jhon309 0:666850d06c9f 387 void HAL_PWR_EnablePVD(void);
jhon309 0:666850d06c9f 388 void HAL_PWR_DisablePVD(void);
jhon309 0:666850d06c9f 389 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:666850d06c9f 390 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:666850d06c9f 391 /* defined (STM32F091xC) */
jhon309 0:666850d06c9f 392
jhon309 0:666850d06c9f 393 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:666850d06c9f 394 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:666850d06c9f 395 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:666850d06c9f 396 void HAL_PWR_EnableVddio2Monitor(void);
jhon309 0:666850d06c9f 397 void HAL_PWR_DisableVddio2Monitor(void);
jhon309 0:666850d06c9f 398 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:666850d06c9f 399 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:666850d06c9f 400 defined (STM32F091xC) || defined (STM32F098xx) */
jhon309 0:666850d06c9f 401
jhon309 0:666850d06c9f 402 /**
jhon309 0:666850d06c9f 403 * @}
jhon309 0:666850d06c9f 404 */
jhon309 0:666850d06c9f 405
jhon309 0:666850d06c9f 406 /**
jhon309 0:666850d06c9f 407 * @}
jhon309 0:666850d06c9f 408 */
jhon309 0:666850d06c9f 409
jhon309 0:666850d06c9f 410 /**
jhon309 0:666850d06c9f 411 * @}
jhon309 0:666850d06c9f 412 */
jhon309 0:666850d06c9f 413
jhon309 0:666850d06c9f 414 /**
jhon309 0:666850d06c9f 415 * @}
jhon309 0:666850d06c9f 416 */
jhon309 0:666850d06c9f 417
jhon309 0:666850d06c9f 418 #ifdef __cplusplus
jhon309 0:666850d06c9f 419 }
jhon309 0:666850d06c9f 420 #endif
jhon309 0:666850d06c9f 421
jhon309 0:666850d06c9f 422 #endif /* __STM32F0xx_HAL_PWR_EX_H */
jhon309 0:666850d06c9f 423
jhon309 0:666850d06c9f 424 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
jhon309 0:666850d06c9f 425