GPIB_9914.h

00001 //GPIB_9914.h
00002 
00003 //NAT7210 - mbed I/O Port design
00004 BusInOut DATA(p9, p10, p11, p12, p13, p14, p15, p16); // LSB p9 - MSB p16 data bus
00005 DigitalOut RD(p18);
00006 DigitalOut WR(p19);
00007 BusOut RS(p21, p22, p23); //LSB p21 - MSB p23 address bus
00008 
00009 //Flags & Macros
00010 #define     _LOW        0
00011 #define     _HIGH       1
00012 #define     _OFF        0
00013 #define     _ON         1
00014 #define     SET_READ    DATA.input();
00015 #define     SET_WRITE   DATA.output();
00016 
00017 //NAT7210 9914 Mode READ Registers
00018 #define     ISR0        0           //Interrupt Status Register 0
00019 #define     ISR1        1           //Interrupt Status Register 1
00020 #define     ADSR        2           //Address Register
00021 #define     BSR         3           //Bus Status Register
00022 #define     ISR2        4           //Interrupt Status Register 2(Page-In)
00023 #define     SPSR        5           //Serial Poll Status Register(Page-In)
00024 #define     CPTR        6           //Command Pass Through Register
00025 #define     DIR         7           //Data In Register
00026 
00027 //NAT7210 9914 Mode WRITE Registers
00028 #define     IMR0        0           //Interrupt Mask Register 0
00029 #define     IMR1        1           //Interrupt Mask Register 1
00030 #define     IMR2        2           //Interrupt Mask register 2(Page-In)
00031 #define     EOSR        2           //End-Of-String Register(Page-In)
00032 #define     BCR         2           //Bus Control Register(Page-In)
00033 #define     ACCR        2           //Accessory Read Register(Page-In)
00034 #define     AUXCR       3           //Auxiliary Command Register
00035 #define     ADR         4           //Address Register
00036 #define     SPMR        5           //Serial Poll Mode Register
00037 #define     PPR         6           //Parallel Poll Register
00038 #define     CDOR        7           //Command/data Out Register
00039 
00040 #define     AUXMR       5           //7210 Auxiliary Mode Register
00041 #define     _sw9914     0x15        //Switch To 9914 Mode(7210 Mode AUXMR)
00042 
00043 //ACCR Accessory Read register Map
00044 #define     ICR         0x20
00045 #define     ACCA        0x80
00046 #define     ACCB        0xA0
00047 #define     ACCE        0xC0
00048 #define     ACCF        0xD0
00049 #define     ACCI        0xE0
00050 
00051 //AUXCR Auxiliary Commands
00052 #define     _clr_swrst  0x00        //Clear Software Reset
00053 #define     _set_swrst  0x80        //Set Software Reset
00054 #define     _nonvalid   0x01        //Nonvalid Release DAC Holdoff
00055 #define     _valid      0x81        //Valid Release DAC Holdoff
00056 #define     _rhdf       0x02        //Release RFD Holdoff
00057 #define     _clr_hdfa   0x03        //Clear Holdoff On All data
00058 #define     _set_hdfa   0x83        //Set Holdoff On All Data
00059 #define     _clr_hdfe   0x04        //Clear Holdoff On END Only
00060 #define     _set_hdfe   0x84        //Holdoff On END Only
00061 #define     _nbaf       0x05        //New Byte Available False
00062 #define     _clr_fget   0x06        //Clear Force Group Execute Trigger
00063 #define     _set_fget   0x86        //Set Force Group Execute Trigger
00064 #define     _clr_rtl    0x07        //Clear return To Local
00065 #define     _set_rtl    0x87        //Set Return To Local
00066 #define     _feoi       0x08        //Send EOI With The Next Byte
00067 #define     _clr_lon    0x09        //Clear Listen Only
00068 #define     _set_lon    0x89        //Set Listen only
00069 #define     _clr_ton    0x0A        //Clear Talk Only
00070 #define     _set_ton    0x8A        //Set Talk Only
00071 #define     _gts        0x0B        //Go To Standby
00072 #define     _tca        0x0C        //Take Control Asynchronously
00073 #define     _tcs        0x0D        //Take Control Synchronously
00074 #define     _clr_rpp    0x0E        //Clear Request Parallel Poll
00075 #define     _set_rpp    0x8E        //Set Request Parallel Poll
00076 #define     _clr_sic    0x0F        //Clear Send Interface Clear
00077 #define     _set_sic    0x8F        //Set Send Interface Clear
00078 #define     _clr_sre    0x10        //Clear Send Remote Enable
00079 #define     _set_sre    0x90        //Set Send Remote Enable
00080 #define     _rqc        0x11        //Request Control
00081 #define     _rlc        0x12        //Release Control
00082 #define     _clr_dai    0x13        //Clear Disable IMR2, IMR1, And IMR0 Interrupts
00083 #define     _set_dai    0x93        //Set Disable IMR2, IMR1 And IMR0 Interrupts
00084 #define     _pts        0x14        //Pass Through Next Secondary
00085 #define     _clr_stdl   0x15        //Clear Short T1 Delay
00086 #define     _set_std1   0x95        //Set Short T1 Delay
00087 #define     _clr_shdw   0x16        //Clear Shadow Handshaking
00088 #define     _set_shdw   0x96        //Set Shadow Handshaking
00089 #define     _clr_vstdl  0x17        //Clear Very Short T1 Delay
00090 #define     _set_vstdl  0x97        //Set Very Short T1 Delay
00091 #define     _clr_rsv2   0x18        //Clear Request Service bit 2
00092 #define     _set_rsv2   0x98        //Set Request Service bit 2
00093 #define     _sw7210     0x99        //Switch To 7210 Mode
00094 #define     _reqf       0x1A        //Request rsv False
00095 #define     _reqt       0x9A        //Request rsv True
00096 #define     _ch_rst     0x1C        //Chip Reset
00097 #define     _clr_ist    0x1D        //Clear Parallel Poll Flag
00098 #define     _set_ist    0x9D        //Set Parallel Poll Flag
00099 #define     _piimr2     0x1E        //Page-In Interrupt Mask Register 2
00100 #define     _pibcr      0x1F        //Page-In Bus Control Register
00101 #define     _clrpi      0x9C        //Clear_Page-In Register
00102 #define     _pieosr     0x9E        //Page-In End-Of-String Register
00103 #define     _piaccr     0x9F        //Page-In Accessory Register      
00104 
00105 //ISR0 Flags
00106 #define     _BI         0x20
00107 #define     _BO         0x10
00108 
00109 #define     _CR         0x0D        //Delemiter(CR) --- ignore
00110 #define     _LF         0x0A        //Delimiter(LF)
00111 
00112 //GPIB Command
00113 #define     _GTL        0x01        //
00114 #define     _SDC        0x04        //
00115 #define     _PPC        0x05        //
00116 #define     _GET        0x08        //
00117 #define     _TCT        0x09        //
00118 #define     _LLO        0x11        //Local Lock Out
00119 #define     _DCL        0x14        //
00120 #define     _PPU        0x15        //
00121 #define     _SPE        0x18        //
00122 #define     _SPD        0x19        //
00123 #define     _UNL        0x3F        //Unlisten
00124 #define     _UNT        0x5F        //Untalk
00125 
00126 #define     _BUFLEN        16
00127 
00128 char    databyte;
00129 char    databuff[_BUFLEN];
00130 
00131 //Data write to Internal Register
00132 //IN: RS = NAT7210 Internal Register Address
00133 //IN: DATA = data byte to write
00134 void GPIB_write() {
00135     WR = _LOW;
00136     wait_us(100);
00137     WR = _HIGH;
00138 }
00139 
00140 //IN: RS = NAT7210 Internal Register Address
00141 //OUT: databyte = get data byte
00142 void GPIB_read() {
00143     SET_READ;
00144     RD = _LOW;
00145     wait_us(100);
00146     databyte = DATA;
00147     wait_us(100);
00148     RD = _HIGH;
00149     SET_WRITE;
00150 }
00151 
00152 void auxcr(unsigned char aux_cmd){
00153     RS = AUXCR;
00154     DATA = aux_cmd;
00155     GPIB_write();
00156     if(aux_cmd == _gts) wait_ms(10); 
00157 }
00158 
00159 void GPIB_in(unsigned char gpib_reg){
00160     RS = gpib_reg;
00161     GPIB_read();
00162 }
00163 
00164 //Data Output to GPIB bus
00165 //IN: DATA = Data byte to out
00166 void GPIB_DOUT(){
00167     RS = CDOR;
00168     GPIB_write();   //Data out
00169 __WAIT_DOUT:
00170     wait_ms(1);
00171     GPIB_in(ISR0);
00172     if ((databyte & _BO) == _BO) return; //Wait for buffer out
00173     else {
00174         //lcd.locate(0,0);
00175         //lcd.printf("Waitng BO-1     ");
00176         goto __WAIT_DOUT;
00177     }
00178 }
00179 
00180 void GPIB_BOWT(){
00181 __WAIT_DOWT:
00182     GPIB_in(ISR0);
00183     if ((databyte & _BO) == _BO) return; //Wait for buffer out
00184     else {
00185         //lcd.locate(0,0);
00186         //lcd.printf("Waitng BO-2     ");
00187         goto __WAIT_DOWT;
00188     }
00189 }
00190 
00191 char GPIB_BIWT(){
00192 __WAIT_BIWT:
00193     GPIB_in(ISR0);
00194     if((databyte & _BI) == 0) {    //wait for Data available
00195         //lcd.locate(0,1);
00196         //lcd.printf("Waiting BI      ");
00197         goto __WAIT_BIWT;
00198     }
00199     GPIB_in(DIR);    //Get data byte
00200     return databyte;
00201 }
00202 
00203 void GPIB_out(unsigned char gpib_cmd){
00204     DATA = gpib_cmd;
00205     GPIB_DOUT();  //Out to GPIB data bus
00206 }
00207 
00208 void GPIB_OLA(unsigned char listener){
00209     GPIB_out(0x20 + listener);
00210 }
00211 
00212 void GPIB_OTA(unsigned char talker){
00213     GPIB_out(0x40 + talker);
00214 }
00215 
00216 void GPIB_DCL(){
00217     auxcr(_tca); //ATNL
00218     GPIB_out(_UNL);
00219     GPIB_out(_UNT);
00220     GPIB_out(_DCL);
00221     auxcr(_gts); //ATNH
00222 }
00223 
00224 void GPIB_SDC(unsigned char listener){
00225     auxcr(_tca); //ATNL
00226     GPIB_out(_UNL);
00227     auxcr(_set_ton); //MTA
00228     GPIB_OLA(listener);
00229     GPIB_out(_SDC);   
00230     auxcr(_gts); //ATNH
00231 }
00232 
00233 void GPIB_GPOUT(char *send_buffer){
00234 int i;
00235     for(i = 0; i < (_BUFLEN - 1); i++){
00236         if(send_buffer[i] == NULL) goto __GPOUT_EXIT;
00237         else {
00238             GPIB_out(send_buffer[i]);
00239         }
00240     }
00241 __GPOUT_EXIT:
00242     GPIB_out(_CR); //Delimiter
00243     auxcr(_feoi);
00244     GPIB_out(_LF);   
00245 }
00246 
00247 int GPIB_GPIN(char *rcv_buffer){
00248 int i;
00249     auxcr(_set_hdfa);
00250     for(i = 0; i < (_BUFLEN - 1); i++){
00251         rcv_buffer[i] = GPIB_BIWT(); //Get byte
00252         if(rcv_buffer[i] == _LF) { //Delimiter?
00253             rcv_buffer[i] = NULL;
00254             goto __GPIN_EXIT;            
00255         } else if(rcv_buffer[i] == _CR) { //Ignor
00256             i--;
00257         }
00258         auxcr(_rhdf); //Next
00259     }                
00260 __GPIN_EXIT:
00261     auxcr(_rhdf);
00262     auxcr(_clr_hdfa);
00263     return i;
00264 } 
00265 
00266 void GPIB_IFC(){
00267     auxcr(_tca); //ATNL
00268     wait_ms(1);
00269     auxcr(_set_sic);
00270     wait_us(100);
00271     auxcr(_clr_sic);
00272     wait_ms(1);
00273     auxcr(_gts); //ATNH
00274 }
00275     
00276 void GPIB_OUTPUT(char *send_buffer, unsigned char listener){  
00277     auxcr(_tca); //ATNL
00278     GPIB_out(_UNL);
00279     auxcr(_set_ton); //MTA
00280     GPIB_OLA(listener);
00281     auxcr(_gts); //ATNH
00282     GPIB_BOWT(); //wait talker
00283     GPIB_GPOUT(send_buffer);
00284 }
00285 
00286 int GPIB_ENTER(char *rcv_buffer, unsigned char talker){
00287     auxcr(_tca); //ATNL
00288     GPIB_out(_UNL);
00289     GPIB_OTA(talker);
00290     auxcr(_set_lon); //MLA
00291     auxcr(_gts);
00292     return GPIB_GPIN(rcv_buffer);
00293 }
00294     
00295 void GPIB_REMOTE(unsigned char listener){
00296     auxcr(_set_sre); //REN
00297     auxcr(_tca); //ATNL
00298     GPIB_out(_UNL);
00299     auxcr(_set_ton); //MTA
00300     GPIB_OLA(listener);
00301     auxcr(_gts);
00302 }
00303 
00304 void GPIB_LOCAL(unsigned char listener){
00305     auxcr(_tca); //ATNL
00306     GPIB_out(_UNL);
00307     auxcr(_set_ton); //MTA
00308     GPIB_OLA(listener);
00309     GPIB_out(_GTL);
00310     auxcr(_gts); //ATNH
00311 }    
00312     
00313 void GPIB_TRIGER(unsigned char listener){
00314     auxcr(_tca); //ATNL
00315     GPIB_out(_UNL);
00316     auxcr(_set_ton); //MTA
00317     GPIB_OLA(listener);
00318     GPIB_out(_GET);
00319     auxcr(_gts); //ATNH
00320 }
00321 
00322 void GPIB_Init(unsigned char my_address){
00323     SET_WRITE;
00324          
00325     RD = _HIGH;
00326     WR = _HIGH;
00327     
00328     RS = AUXMR;
00329     DATA = _sw9914;      //Switch To 9914 Mode
00330     GPIB_write();
00331     
00332     //RS = AUXCR;
00333     //DATA = _ch_rst;     //Chip Reset and pon
00334     //GPIB_write();
00335     
00336     RS = AUXCR;
00337     DATA = _set_swrst;   //Set Software Reset
00338     GPIB_write();
00339     
00340     wait_ms(1);
00341     
00342     RS = AUXCR;
00343     DATA = _clr_swrst;   //Clear Software Reset
00344     GPIB_write();
00345     
00346     RS = ADR;
00347     DATA = my_address;  //Set My Address
00348     GPIB_write();
00349 
00350     RS = AUXCR;
00351     DATA = _set_dai;    //Set Disable All Interrupt
00352     GPIB_write();
00353     
00354     RS = ISR0;          //Clear Interrupt Status Register 0
00355     GPIB_read();
00356     
00357     RS = ISR1;          //Clear Interrupt Status Register 1
00358     GPIB_read();        
00359     
00360     RS = SPMR;          //Clear Serial Poll register
00361     DATA = 0;
00362     GPIB_write();
00363 
00364     RS = PPR;           //Clear Parallel Poll register
00365     DATA = 0;
00366     GPIB_write();    
00367         
00368     RS = IMR0;          //Disable interrupt IMR0
00369     DATA = 0;
00370     GPIB_write();
00371 
00372     RS = IMR1;          //Disable interrupt IMR1
00373     DATA = 0;
00374     GPIB_write();
00375 
00376     RS = DIR;           //Clear Data In Register
00377     GPIB_read();
00378 
00379     RS = CDOR;          //Clear Command/Data Out Register
00380     DATA = 0;
00381     GPIB_write();
00382     
00383     RS = AUXCR;         //Set T1 Delay
00384     DATA = _set_std1;
00385     GPIB_write(); 
00386 }