diyembedded nrf24l01 tutorial 2 ported to mbed lpc1768
See diyembedded tutorials for more info
-Pull down p20 for receive mode
-Pull up p20 for transmitter mode
nRF24L01P/nrf24l01.cpp@0:2286a98ea739, 2012-12-08 (annotated)
- Committer:
- jeroen3
- Date:
- Sat Dec 08 22:11:23 2012 +0000
- Revision:
- 0:2286a98ea739
diyembedded.com nrf24l01 lib with shockburs tutorial 2 on mbed
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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jeroen3 | 0:2286a98ea739 | 1 | /****************************************************************************** |
jeroen3 | 0:2286a98ea739 | 2 | * |
jeroen3 | 0:2286a98ea739 | 3 | * File: nrf24l01.c |
jeroen3 | 0:2286a98ea739 | 4 | * |
jeroen3 | 0:2286a98ea739 | 5 | * Copyright S. Brennen Ball, 2006-2007 |
jeroen3 | 0:2286a98ea739 | 6 | * |
jeroen3 | 0:2286a98ea739 | 7 | * The author provides no guarantees, warantees, or promises, implied or |
jeroen3 | 0:2286a98ea739 | 8 | * otherwise. By using this software you agree to indemnify the author |
jeroen3 | 0:2286a98ea739 | 9 | * of any damages incurred by using it. |
jeroen3 | 0:2286a98ea739 | 10 | * |
jeroen3 | 0:2286a98ea739 | 11 | *****************************************************************************/ |
jeroen3 | 0:2286a98ea739 | 12 | |
jeroen3 | 0:2286a98ea739 | 13 | #include "nrf24l01.h" |
jeroen3 | 0:2286a98ea739 | 14 | #include "mbed.h" |
jeroen3 | 0:2286a98ea739 | 15 | |
jeroen3 | 0:2286a98ea739 | 16 | /* Extern DigitalPin objects for csn, irq and ce */ |
jeroen3 | 0:2286a98ea739 | 17 | extern DigitalOut nRF_CSN; |
jeroen3 | 0:2286a98ea739 | 18 | extern DigitalOut nRF_CE; |
jeroen3 | 0:2286a98ea739 | 19 | extern DigitalIn nRF_IRQ; |
jeroen3 | 0:2286a98ea739 | 20 | extern SPI nRF_spi; |
jeroen3 | 0:2286a98ea739 | 21 | |
jeroen3 | 0:2286a98ea739 | 22 | //Arguments except opt_rx_standby_mode fill the actual register they are named |
jeroen3 | 0:2286a98ea739 | 23 | // after. Registers that do not need to be initialized are not included here. |
jeroen3 | 0:2286a98ea739 | 24 | //The argument opt_rx_active_mode is only used if the user is initializing the |
jeroen3 | 0:2286a98ea739 | 25 | // 24L01 as a receiver. If the argument is false, the receiver will remain in |
jeroen3 | 0:2286a98ea739 | 26 | // standby mode and not monitor for packets. If the argument is true, the CE |
jeroen3 | 0:2286a98ea739 | 27 | // pin will be set and the 24L01 will monitor for packets. In TX mode, the value |
jeroen3 | 0:2286a98ea739 | 28 | // of this argument is insignificant. |
jeroen3 | 0:2286a98ea739 | 29 | //If the user wants to leave any 1-byte register in its default state, simply put |
jeroen3 | 0:2286a98ea739 | 30 | // as that register's argument nrf24l01_<reg>_DEFAULT_VAL, where <reg> is the register |
jeroen3 | 0:2286a98ea739 | 31 | // name. |
jeroen3 | 0:2286a98ea739 | 32 | //If the user wants to leave any of the 5-byte registers RX_ADDR_P0, RX_ADDR_P1, or |
jeroen3 | 0:2286a98ea739 | 33 | // TX_ADDR in its default state, simply put NULL in the argument for that address value. |
jeroen3 | 0:2286a98ea739 | 34 | void nrf24l01_initialize(unsigned char config, |
jeroen3 | 0:2286a98ea739 | 35 | unsigned char opt_rx_active_mode, |
jeroen3 | 0:2286a98ea739 | 36 | unsigned char en_aa, |
jeroen3 | 0:2286a98ea739 | 37 | unsigned char en_rxaddr, |
jeroen3 | 0:2286a98ea739 | 38 | unsigned char setup_aw, |
jeroen3 | 0:2286a98ea739 | 39 | unsigned char setup_retr, |
jeroen3 | 0:2286a98ea739 | 40 | unsigned char rf_ch, |
jeroen3 | 0:2286a98ea739 | 41 | unsigned char rf_setup, |
jeroen3 | 0:2286a98ea739 | 42 | unsigned char * rx_addr_p0, |
jeroen3 | 0:2286a98ea739 | 43 | unsigned char * rx_addr_p1, |
jeroen3 | 0:2286a98ea739 | 44 | unsigned char rx_addr_p2, |
jeroen3 | 0:2286a98ea739 | 45 | unsigned char rx_addr_p3, |
jeroen3 | 0:2286a98ea739 | 46 | unsigned char rx_addr_p4, |
jeroen3 | 0:2286a98ea739 | 47 | unsigned char rx_addr_p5, |
jeroen3 | 0:2286a98ea739 | 48 | unsigned char * tx_addr, |
jeroen3 | 0:2286a98ea739 | 49 | unsigned char rx_pw_p0, |
jeroen3 | 0:2286a98ea739 | 50 | unsigned char rx_pw_p1, |
jeroen3 | 0:2286a98ea739 | 51 | unsigned char rx_pw_p2, |
jeroen3 | 0:2286a98ea739 | 52 | unsigned char rx_pw_p3, |
jeroen3 | 0:2286a98ea739 | 53 | unsigned char rx_pw_p4, |
jeroen3 | 0:2286a98ea739 | 54 | unsigned char rx_pw_p5) |
jeroen3 | 0:2286a98ea739 | 55 | { |
jeroen3 | 0:2286a98ea739 | 56 | unsigned char data[5]; |
jeroen3 | 0:2286a98ea739 | 57 | |
jeroen3 | 0:2286a98ea739 | 58 | data[0] = en_aa; |
jeroen3 | 0:2286a98ea739 | 59 | nrf24l01_write_register(nrf24l01_EN_AA, data, 1); |
jeroen3 | 0:2286a98ea739 | 60 | |
jeroen3 | 0:2286a98ea739 | 61 | data[0] = en_rxaddr; |
jeroen3 | 0:2286a98ea739 | 62 | nrf24l01_write_register(nrf24l01_EN_RXADDR, data, 1); |
jeroen3 | 0:2286a98ea739 | 63 | |
jeroen3 | 0:2286a98ea739 | 64 | data[0] = setup_aw; |
jeroen3 | 0:2286a98ea739 | 65 | nrf24l01_write_register(nrf24l01_SETUP_AW, data, 1); |
jeroen3 | 0:2286a98ea739 | 66 | |
jeroen3 | 0:2286a98ea739 | 67 | data[0] = setup_retr; |
jeroen3 | 0:2286a98ea739 | 68 | nrf24l01_write_register(nrf24l01_SETUP_RETR, data, 1); |
jeroen3 | 0:2286a98ea739 | 69 | |
jeroen3 | 0:2286a98ea739 | 70 | data[0] = rf_ch; |
jeroen3 | 0:2286a98ea739 | 71 | nrf24l01_write_register(nrf24l01_RF_CH, data, 1); |
jeroen3 | 0:2286a98ea739 | 72 | |
jeroen3 | 0:2286a98ea739 | 73 | data[0] = rf_setup; |
jeroen3 | 0:2286a98ea739 | 74 | nrf24l01_write_register(nrf24l01_RF_SETUP, data, 1); |
jeroen3 | 0:2286a98ea739 | 75 | |
jeroen3 | 0:2286a98ea739 | 76 | if(rx_addr_p0 != NULL) |
jeroen3 | 0:2286a98ea739 | 77 | nrf24l01_set_rx_addr(rx_addr_p0, 5, 0); |
jeroen3 | 0:2286a98ea739 | 78 | else |
jeroen3 | 0:2286a98ea739 | 79 | { |
jeroen3 | 0:2286a98ea739 | 80 | data[0] = nrf24l01_RX_ADDR_P0_B0_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 81 | data[1] = nrf24l01_RX_ADDR_P0_B1_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 82 | data[2] = nrf24l01_RX_ADDR_P0_B2_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 83 | data[3] = nrf24l01_RX_ADDR_P0_B3_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 84 | data[4] = nrf24l01_RX_ADDR_P0_B4_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 85 | |
jeroen3 | 0:2286a98ea739 | 86 | nrf24l01_set_rx_addr(data, 5, 0); |
jeroen3 | 0:2286a98ea739 | 87 | } |
jeroen3 | 0:2286a98ea739 | 88 | |
jeroen3 | 0:2286a98ea739 | 89 | if(rx_addr_p1 != NULL) |
jeroen3 | 0:2286a98ea739 | 90 | nrf24l01_set_rx_addr(rx_addr_p1, 5, 1); |
jeroen3 | 0:2286a98ea739 | 91 | else |
jeroen3 | 0:2286a98ea739 | 92 | { |
jeroen3 | 0:2286a98ea739 | 93 | data[0] = nrf24l01_RX_ADDR_P1_B0_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 94 | data[1] = nrf24l01_RX_ADDR_P1_B1_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 95 | data[2] = nrf24l01_RX_ADDR_P1_B2_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 96 | data[3] = nrf24l01_RX_ADDR_P1_B3_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 97 | data[4] = nrf24l01_RX_ADDR_P1_B4_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 98 | |
jeroen3 | 0:2286a98ea739 | 99 | nrf24l01_set_rx_addr(data, 5, 1); |
jeroen3 | 0:2286a98ea739 | 100 | } |
jeroen3 | 0:2286a98ea739 | 101 | |
jeroen3 | 0:2286a98ea739 | 102 | data[0] = rx_addr_p2; |
jeroen3 | 0:2286a98ea739 | 103 | nrf24l01_set_rx_addr(data, 1, 2); |
jeroen3 | 0:2286a98ea739 | 104 | |
jeroen3 | 0:2286a98ea739 | 105 | data[0] = rx_addr_p3; |
jeroen3 | 0:2286a98ea739 | 106 | nrf24l01_set_rx_addr(data, 1, 3); |
jeroen3 | 0:2286a98ea739 | 107 | |
jeroen3 | 0:2286a98ea739 | 108 | data[0] = rx_addr_p4; |
jeroen3 | 0:2286a98ea739 | 109 | nrf24l01_set_rx_addr(data, 1, 4); |
jeroen3 | 0:2286a98ea739 | 110 | |
jeroen3 | 0:2286a98ea739 | 111 | data[0] = rx_addr_p5; |
jeroen3 | 0:2286a98ea739 | 112 | nrf24l01_set_rx_addr(data, 1, 5); |
jeroen3 | 0:2286a98ea739 | 113 | |
jeroen3 | 0:2286a98ea739 | 114 | if(tx_addr != NULL) |
jeroen3 | 0:2286a98ea739 | 115 | nrf24l01_set_tx_addr(tx_addr, 5); |
jeroen3 | 0:2286a98ea739 | 116 | else |
jeroen3 | 0:2286a98ea739 | 117 | { |
jeroen3 | 0:2286a98ea739 | 118 | data[0] = nrf24l01_TX_ADDR_B0_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 119 | data[1] = nrf24l01_TX_ADDR_B1_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 120 | data[2] = nrf24l01_TX_ADDR_B2_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 121 | data[3] = nrf24l01_TX_ADDR_B3_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 122 | data[4] = nrf24l01_TX_ADDR_B4_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 123 | |
jeroen3 | 0:2286a98ea739 | 124 | nrf24l01_set_tx_addr(data, 5); |
jeroen3 | 0:2286a98ea739 | 125 | } |
jeroen3 | 0:2286a98ea739 | 126 | |
jeroen3 | 0:2286a98ea739 | 127 | data[0] = rx_pw_p0; |
jeroen3 | 0:2286a98ea739 | 128 | nrf24l01_write_register(nrf24l01_RX_PW_P0, data, 1); |
jeroen3 | 0:2286a98ea739 | 129 | |
jeroen3 | 0:2286a98ea739 | 130 | data[0] = rx_pw_p1; |
jeroen3 | 0:2286a98ea739 | 131 | nrf24l01_write_register(nrf24l01_RX_PW_P1, data, 1); |
jeroen3 | 0:2286a98ea739 | 132 | |
jeroen3 | 0:2286a98ea739 | 133 | data[0] = rx_pw_p2; |
jeroen3 | 0:2286a98ea739 | 134 | nrf24l01_write_register(nrf24l01_RX_PW_P2, data, 1); |
jeroen3 | 0:2286a98ea739 | 135 | |
jeroen3 | 0:2286a98ea739 | 136 | data[0] = rx_pw_p3; |
jeroen3 | 0:2286a98ea739 | 137 | nrf24l01_write_register(nrf24l01_RX_PW_P3, data, 1); |
jeroen3 | 0:2286a98ea739 | 138 | |
jeroen3 | 0:2286a98ea739 | 139 | data[0] = rx_pw_p4; |
jeroen3 | 0:2286a98ea739 | 140 | nrf24l01_write_register(nrf24l01_RX_PW_P4, data, 1); |
jeroen3 | 0:2286a98ea739 | 141 | |
jeroen3 | 0:2286a98ea739 | 142 | data[0] = rx_pw_p5; |
jeroen3 | 0:2286a98ea739 | 143 | nrf24l01_write_register(nrf24l01_RX_PW_P5, data, 1); |
jeroen3 | 0:2286a98ea739 | 144 | |
jeroen3 | 0:2286a98ea739 | 145 | if((config & nrf24l01_CONFIG_PWR_UP) != 0) |
jeroen3 | 0:2286a98ea739 | 146 | nrf24l01_power_up_param(opt_rx_active_mode, config); |
jeroen3 | 0:2286a98ea739 | 147 | else |
jeroen3 | 0:2286a98ea739 | 148 | nrf24l01_power_down_param(config); |
jeroen3 | 0:2286a98ea739 | 149 | } |
jeroen3 | 0:2286a98ea739 | 150 | |
jeroen3 | 0:2286a98ea739 | 151 | //initializes the 24L01 to all default values except the PWR_UP and PRIM_RX bits |
jeroen3 | 0:2286a98ea739 | 152 | //this function also disables the auto-ack feature on the chip (EN_AA register is 0) |
jeroen3 | 0:2286a98ea739 | 153 | //bool rx is true if the device should be a receiver and false if it should be |
jeroen3 | 0:2286a98ea739 | 154 | // a transmitter. |
jeroen3 | 0:2286a98ea739 | 155 | //unsigned char payload_width is the payload width for pipe 0. All other pipes |
jeroen3 | 0:2286a98ea739 | 156 | // are left in their default (disabled) state. |
jeroen3 | 0:2286a98ea739 | 157 | //bool enable_auto_ack controls the auto ack feature on pipe 0. If true, auto-ack will |
jeroen3 | 0:2286a98ea739 | 158 | // be enabled. If false, auto-ack is disabled. |
jeroen3 | 0:2286a98ea739 | 159 | void nrf24l01_initialize_debug(bool rx, unsigned char p0_payload_width, bool enable_auto_ack) |
jeroen3 | 0:2286a98ea739 | 160 | { |
jeroen3 | 0:2286a98ea739 | 161 | unsigned char config; |
jeroen3 | 0:2286a98ea739 | 162 | unsigned char en_aa; |
jeroen3 | 0:2286a98ea739 | 163 | |
jeroen3 | 0:2286a98ea739 | 164 | config = nrf24l01_CONFIG_DEFAULT_VAL | nrf24l01_CONFIG_PWR_UP; |
jeroen3 | 0:2286a98ea739 | 165 | |
jeroen3 | 0:2286a98ea739 | 166 | if(enable_auto_ack != false) |
jeroen3 | 0:2286a98ea739 | 167 | en_aa = nrf24l01_EN_AA_ENAA_P0; |
jeroen3 | 0:2286a98ea739 | 168 | else |
jeroen3 | 0:2286a98ea739 | 169 | en_aa = nrf24l01_EN_AA_ENAA_NONE; |
jeroen3 | 0:2286a98ea739 | 170 | |
jeroen3 | 0:2286a98ea739 | 171 | if(rx == true) |
jeroen3 | 0:2286a98ea739 | 172 | config = config | nrf24l01_CONFIG_PRIM_RX; |
jeroen3 | 0:2286a98ea739 | 173 | |
jeroen3 | 0:2286a98ea739 | 174 | nrf24l01_initialize(config, |
jeroen3 | 0:2286a98ea739 | 175 | true, |
jeroen3 | 0:2286a98ea739 | 176 | en_aa, |
jeroen3 | 0:2286a98ea739 | 177 | nrf24l01_EN_RXADDR_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 178 | nrf24l01_SETUP_AW_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 179 | nrf24l01_SETUP_RETR_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 180 | nrf24l01_RF_CH_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 181 | nrf24l01_RF_SETUP_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 182 | NULL, |
jeroen3 | 0:2286a98ea739 | 183 | NULL, |
jeroen3 | 0:2286a98ea739 | 184 | nrf24l01_RX_ADDR_P2_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 185 | nrf24l01_RX_ADDR_P3_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 186 | nrf24l01_RX_ADDR_P4_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 187 | nrf24l01_RX_ADDR_P5_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 188 | NULL, |
jeroen3 | 0:2286a98ea739 | 189 | p0_payload_width, |
jeroen3 | 0:2286a98ea739 | 190 | nrf24l01_RX_PW_P1_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 191 | nrf24l01_RX_PW_P2_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 192 | nrf24l01_RX_PW_P3_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 193 | nrf24l01_RX_PW_P4_DEFAULT_VAL, |
jeroen3 | 0:2286a98ea739 | 194 | nrf24l01_RX_PW_P5_DEFAULT_VAL); |
jeroen3 | 0:2286a98ea739 | 195 | } |
jeroen3 | 0:2286a98ea739 | 196 | |
jeroen3 | 0:2286a98ea739 | 197 | //initializes only the CONFIG register and pipe 0's payload width |
jeroen3 | 0:2286a98ea739 | 198 | //the primary purpose of this function is to allow users with microcontrollers with |
jeroen3 | 0:2286a98ea739 | 199 | // extremely small program memories to still be able to init their 24L01. This code |
jeroen3 | 0:2286a98ea739 | 200 | // should have a smaller footprint than the above init functions. |
jeroen3 | 0:2286a98ea739 | 201 | //when using this method, the 24L01 MUST have its default configuration loaded |
jeroen3 | 0:2286a98ea739 | 202 | // in all registers to work. It is recommended that the device be reset or |
jeroen3 | 0:2286a98ea739 | 203 | // have its power cycled immediately before this code is run. |
jeroen3 | 0:2286a98ea739 | 204 | //in normal circumstances, the user should use nrf24l01_initialize() rather than this |
jeroen3 | 0:2286a98ea739 | 205 | // function, since this function does not set all of the register values. |
jeroen3 | 0:2286a98ea739 | 206 | void nrf24l01_initialize_debug_lite(bool rx, unsigned char p0_payload_width) |
jeroen3 | 0:2286a98ea739 | 207 | { |
jeroen3 | 0:2286a98ea739 | 208 | unsigned char config; |
jeroen3 | 0:2286a98ea739 | 209 | |
jeroen3 | 0:2286a98ea739 | 210 | config = nrf24l01_CONFIG_DEFAULT_VAL; |
jeroen3 | 0:2286a98ea739 | 211 | |
jeroen3 | 0:2286a98ea739 | 212 | if(rx != false) |
jeroen3 | 0:2286a98ea739 | 213 | config |= nrf24l01_CONFIG_PRIM_RX; |
jeroen3 | 0:2286a98ea739 | 214 | |
jeroen3 | 0:2286a98ea739 | 215 | nrf24l01_write_register(nrf24l01_RX_PW_P0, &p0_payload_width, 1); |
jeroen3 | 0:2286a98ea739 | 216 | nrf24l01_power_up_param(true, config); |
jeroen3 | 0:2286a98ea739 | 217 | } |
jeroen3 | 0:2286a98ea739 | 218 | |
jeroen3 | 0:2286a98ea739 | 219 | //powers up the 24L01 with all necessary delays |
jeroen3 | 0:2286a98ea739 | 220 | //this function takes the existing contents of the CONFIG register and sets the PWR_UP |
jeroen3 | 0:2286a98ea739 | 221 | //the argument rx_active_mode is only used if the user is setting up the |
jeroen3 | 0:2286a98ea739 | 222 | // 24L01 as a receiver. If the argument is false, the receiver will remain in |
jeroen3 | 0:2286a98ea739 | 223 | // standby mode and not monitor for packets. If the argument is true, the CE |
jeroen3 | 0:2286a98ea739 | 224 | // pin will be set and the 24L01 will monitor for packets. In TX mode, the value |
jeroen3 | 0:2286a98ea739 | 225 | // of this argument is insignificant. |
jeroen3 | 0:2286a98ea739 | 226 | //note: if the read value of the CONFIG register already has the PWR_UP bit set, this function |
jeroen3 | 0:2286a98ea739 | 227 | // exits in order to not make an unecessary register write. |
jeroen3 | 0:2286a98ea739 | 228 | void nrf24l01_power_up(bool rx_active_mode) |
jeroen3 | 0:2286a98ea739 | 229 | { |
jeroen3 | 0:2286a98ea739 | 230 | unsigned char config; |
jeroen3 | 0:2286a98ea739 | 231 | |
jeroen3 | 0:2286a98ea739 | 232 | nrf24l01_read_register(nrf24l01_CONFIG, &config, 1); |
jeroen3 | 0:2286a98ea739 | 233 | |
jeroen3 | 0:2286a98ea739 | 234 | if((config & nrf24l01_CONFIG_PWR_UP) != 0) |
jeroen3 | 0:2286a98ea739 | 235 | return; |
jeroen3 | 0:2286a98ea739 | 236 | |
jeroen3 | 0:2286a98ea739 | 237 | config |= nrf24l01_CONFIG_PWR_UP; |
jeroen3 | 0:2286a98ea739 | 238 | |
jeroen3 | 0:2286a98ea739 | 239 | nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); |
jeroen3 | 0:2286a98ea739 | 240 | |
jeroen3 | 0:2286a98ea739 | 241 | delay_us(1500); |
jeroen3 | 0:2286a98ea739 | 242 | |
jeroen3 | 0:2286a98ea739 | 243 | if((config & nrf24l01_CONFIG_PRIM_RX) == 0) |
jeroen3 | 0:2286a98ea739 | 244 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 245 | else |
jeroen3 | 0:2286a98ea739 | 246 | { |
jeroen3 | 0:2286a98ea739 | 247 | if(rx_active_mode != false) |
jeroen3 | 0:2286a98ea739 | 248 | nrf24l01_set_ce(); |
jeroen3 | 0:2286a98ea739 | 249 | else |
jeroen3 | 0:2286a98ea739 | 250 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 251 | } |
jeroen3 | 0:2286a98ea739 | 252 | } |
jeroen3 | 0:2286a98ea739 | 253 | |
jeroen3 | 0:2286a98ea739 | 254 | //powers up the 24L01 with all necessary delays |
jeroen3 | 0:2286a98ea739 | 255 | //this function allows the user to set the contents of the CONFIG register, but the function |
jeroen3 | 0:2286a98ea739 | 256 | // sets the PWR_UP bit in the CONFIG register, so the user does not need to. |
jeroen3 | 0:2286a98ea739 | 257 | //the argument rx_active_mode is only used if the user is setting up the |
jeroen3 | 0:2286a98ea739 | 258 | // 24L01 as a receiver. If the argument is false, the receiver will remain in |
jeroen3 | 0:2286a98ea739 | 259 | // standby mode and not monitor for packets. If the argument is true, the CE |
jeroen3 | 0:2286a98ea739 | 260 | // pin will be set and the 24L01 will monitor for packets. In TX mode, the value |
jeroen3 | 0:2286a98ea739 | 261 | // of this argument is insignificant. |
jeroen3 | 0:2286a98ea739 | 262 | void nrf24l01_power_up_param(bool rx_active_mode, unsigned char config) |
jeroen3 | 0:2286a98ea739 | 263 | { |
jeroen3 | 0:2286a98ea739 | 264 | // unsigned char test, test2; |
jeroen3 | 0:2286a98ea739 | 265 | |
jeroen3 | 0:2286a98ea739 | 266 | config |= nrf24l01_CONFIG_PWR_UP; |
jeroen3 | 0:2286a98ea739 | 267 | |
jeroen3 | 0:2286a98ea739 | 268 | nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); |
jeroen3 | 0:2286a98ea739 | 269 | |
jeroen3 | 0:2286a98ea739 | 270 | delay_us(1500); |
jeroen3 | 0:2286a98ea739 | 271 | |
jeroen3 | 0:2286a98ea739 | 272 | if((config & nrf24l01_CONFIG_PRIM_RX) == 0) |
jeroen3 | 0:2286a98ea739 | 273 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 274 | else |
jeroen3 | 0:2286a98ea739 | 275 | { |
jeroen3 | 0:2286a98ea739 | 276 | if(rx_active_mode != false) |
jeroen3 | 0:2286a98ea739 | 277 | nrf24l01_set_ce(); |
jeroen3 | 0:2286a98ea739 | 278 | else |
jeroen3 | 0:2286a98ea739 | 279 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 280 | } |
jeroen3 | 0:2286a98ea739 | 281 | } |
jeroen3 | 0:2286a98ea739 | 282 | |
jeroen3 | 0:2286a98ea739 | 283 | //powers down the 24L01 |
jeroen3 | 0:2286a98ea739 | 284 | //this function takes the existing contents of the CONFIG register and simply |
jeroen3 | 0:2286a98ea739 | 285 | // clears the PWR_UP bit in the CONFIG register. |
jeroen3 | 0:2286a98ea739 | 286 | //note: if the read value of the CONFIG register already has the PWR_UP bit cleared, this |
jeroen3 | 0:2286a98ea739 | 287 | // function exits in order to not make an unecessary register write. |
jeroen3 | 0:2286a98ea739 | 288 | void nrf24l01_power_down() |
jeroen3 | 0:2286a98ea739 | 289 | { |
jeroen3 | 0:2286a98ea739 | 290 | unsigned char config; |
jeroen3 | 0:2286a98ea739 | 291 | |
jeroen3 | 0:2286a98ea739 | 292 | nrf24l01_read_register(nrf24l01_CONFIG, &config, 1); |
jeroen3 | 0:2286a98ea739 | 293 | |
jeroen3 | 0:2286a98ea739 | 294 | if((config & nrf24l01_CONFIG_PWR_UP) == 0) |
jeroen3 | 0:2286a98ea739 | 295 | return; |
jeroen3 | 0:2286a98ea739 | 296 | |
jeroen3 | 0:2286a98ea739 | 297 | config &= (~nrf24l01_CONFIG_PWR_UP); |
jeroen3 | 0:2286a98ea739 | 298 | |
jeroen3 | 0:2286a98ea739 | 299 | nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); |
jeroen3 | 0:2286a98ea739 | 300 | |
jeroen3 | 0:2286a98ea739 | 301 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 302 | } |
jeroen3 | 0:2286a98ea739 | 303 | |
jeroen3 | 0:2286a98ea739 | 304 | //powers down the 24L01 |
jeroen3 | 0:2286a98ea739 | 305 | //this function allows the user to set the contents of the CONFIG register, but the function |
jeroen3 | 0:2286a98ea739 | 306 | // clears the PWR_UP bit in the CONFIG register, so the user does not need to. |
jeroen3 | 0:2286a98ea739 | 307 | void nrf24l01_power_down_param(unsigned char config) |
jeroen3 | 0:2286a98ea739 | 308 | { |
jeroen3 | 0:2286a98ea739 | 309 | config &= (~nrf24l01_CONFIG_PWR_UP); |
jeroen3 | 0:2286a98ea739 | 310 | |
jeroen3 | 0:2286a98ea739 | 311 | nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); |
jeroen3 | 0:2286a98ea739 | 312 | |
jeroen3 | 0:2286a98ea739 | 313 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 314 | } |
jeroen3 | 0:2286a98ea739 | 315 | |
jeroen3 | 0:2286a98ea739 | 316 | |
jeroen3 | 0:2286a98ea739 | 317 | //sets up the 24L01 as a receiver with all necessary delays |
jeroen3 | 0:2286a98ea739 | 318 | //this function takes the existing contents of the CONFIG register and sets the PRIM_RX |
jeroen3 | 0:2286a98ea739 | 319 | // bit in the CONFIG register. |
jeroen3 | 0:2286a98ea739 | 320 | //if the argument rx_active_mode is false, the receiver will remain in standby mode |
jeroen3 | 0:2286a98ea739 | 321 | // and not monitor for packets. If the argument is true, the CE pin will be set |
jeroen3 | 0:2286a98ea739 | 322 | // and the 24L01 will monitor for packets. |
jeroen3 | 0:2286a98ea739 | 323 | //note: if the read value of the CONFIG register already has the PRIM_RX bit set, this function |
jeroen3 | 0:2286a98ea739 | 324 | // exits in order to not make an unecessary register write. |
jeroen3 | 0:2286a98ea739 | 325 | void nrf24l01_set_as_rx(bool rx_active_mode) |
jeroen3 | 0:2286a98ea739 | 326 | { |
jeroen3 | 0:2286a98ea739 | 327 | unsigned char config; |
jeroen3 | 0:2286a98ea739 | 328 | volatile unsigned char status; |
jeroen3 | 0:2286a98ea739 | 329 | |
jeroen3 | 0:2286a98ea739 | 330 | status = nrf24l01_read_register(0, &config, 1); |
jeroen3 | 0:2286a98ea739 | 331 | |
jeroen3 | 0:2286a98ea739 | 332 | if((config & nrf24l01_CONFIG_PRIM_RX) != 0) |
jeroen3 | 0:2286a98ea739 | 333 | return; |
jeroen3 | 0:2286a98ea739 | 334 | |
jeroen3 | 0:2286a98ea739 | 335 | config |= nrf24l01_CONFIG_PRIM_RX; |
jeroen3 | 0:2286a98ea739 | 336 | |
jeroen3 | 0:2286a98ea739 | 337 | nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); |
jeroen3 | 0:2286a98ea739 | 338 | |
jeroen3 | 0:2286a98ea739 | 339 | if(rx_active_mode != false) |
jeroen3 | 0:2286a98ea739 | 340 | nrf24l01_set_ce(); |
jeroen3 | 0:2286a98ea739 | 341 | else |
jeroen3 | 0:2286a98ea739 | 342 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 343 | } |
jeroen3 | 0:2286a98ea739 | 344 | |
jeroen3 | 0:2286a98ea739 | 345 | //sets up the 24L01 as a receiver with all necessary delays |
jeroen3 | 0:2286a98ea739 | 346 | //this function allows the user to set the contents of the CONFIG register, but the function |
jeroen3 | 0:2286a98ea739 | 347 | // sets the PRIM_RX bit in the CONFIG register, so the user does not need to. |
jeroen3 | 0:2286a98ea739 | 348 | //if the argument rx_active_mode is false, the receiver will remain in standby mode |
jeroen3 | 0:2286a98ea739 | 349 | // and not monitor for packets. If the argument is true, the CE pin will be set |
jeroen3 | 0:2286a98ea739 | 350 | // and the 24L01 will monitor for packets. |
jeroen3 | 0:2286a98ea739 | 351 | void nrf24l01_set_as_rx_param(bool rx_active_mode, unsigned char config) |
jeroen3 | 0:2286a98ea739 | 352 | { |
jeroen3 | 0:2286a98ea739 | 353 | config |= nrf24l01_CONFIG_PRIM_RX; |
jeroen3 | 0:2286a98ea739 | 354 | |
jeroen3 | 0:2286a98ea739 | 355 | if((config & nrf24l01_CONFIG_PWR_UP) != 0) |
jeroen3 | 0:2286a98ea739 | 356 | nrf24l01_power_up_param(rx_active_mode, config); |
jeroen3 | 0:2286a98ea739 | 357 | else |
jeroen3 | 0:2286a98ea739 | 358 | nrf24l01_power_down_param(config); |
jeroen3 | 0:2286a98ea739 | 359 | } |
jeroen3 | 0:2286a98ea739 | 360 | |
jeroen3 | 0:2286a98ea739 | 361 | //takes a 24L01 that is already in RX standby mode and puts it in active RX mode |
jeroen3 | 0:2286a98ea739 | 362 | void nrf24l01_rx_standby_to_active() |
jeroen3 | 0:2286a98ea739 | 363 | { |
jeroen3 | 0:2286a98ea739 | 364 | nrf24l01_set_ce(); |
jeroen3 | 0:2286a98ea739 | 365 | } |
jeroen3 | 0:2286a98ea739 | 366 | |
jeroen3 | 0:2286a98ea739 | 367 | //takes a 24L01 that is already in active RX mode and puts it in RX standy mode |
jeroen3 | 0:2286a98ea739 | 368 | void nrf24l01_rx_active_to_standby() |
jeroen3 | 0:2286a98ea739 | 369 | { |
jeroen3 | 0:2286a98ea739 | 370 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 371 | } |
jeroen3 | 0:2286a98ea739 | 372 | |
jeroen3 | 0:2286a98ea739 | 373 | //sets up the 24L01 as a transmitter |
jeroen3 | 0:2286a98ea739 | 374 | //this function takes the existing contents of the CONFIG register and simply |
jeroen3 | 0:2286a98ea739 | 375 | // clears the PRIM_RX bit in the CONFIG register. |
jeroen3 | 0:2286a98ea739 | 376 | //note: if the read value of the CONFIG register already has the PRIM_RX bit cleared, this |
jeroen3 | 0:2286a98ea739 | 377 | // function exits in order to not make an unecessary register write. |
jeroen3 | 0:2286a98ea739 | 378 | void nrf24l01_set_as_tx() |
jeroen3 | 0:2286a98ea739 | 379 | { |
jeroen3 | 0:2286a98ea739 | 380 | unsigned char config; |
jeroen3 | 0:2286a98ea739 | 381 | |
jeroen3 | 0:2286a98ea739 | 382 | nrf24l01_read_register(nrf24l01_CONFIG, &config, 1); |
jeroen3 | 0:2286a98ea739 | 383 | |
jeroen3 | 0:2286a98ea739 | 384 | if((config & nrf24l01_CONFIG_PRIM_RX) == 0) |
jeroen3 | 0:2286a98ea739 | 385 | return; |
jeroen3 | 0:2286a98ea739 | 386 | |
jeroen3 | 0:2286a98ea739 | 387 | config &= (~nrf24l01_CONFIG_PRIM_RX); |
jeroen3 | 0:2286a98ea739 | 388 | |
jeroen3 | 0:2286a98ea739 | 389 | nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); |
jeroen3 | 0:2286a98ea739 | 390 | |
jeroen3 | 0:2286a98ea739 | 391 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 392 | } |
jeroen3 | 0:2286a98ea739 | 393 | |
jeroen3 | 0:2286a98ea739 | 394 | //sets up the 24L01 as a transmitter |
jeroen3 | 0:2286a98ea739 | 395 | //this function allows the user to set the contents of the CONFIG register, but the function |
jeroen3 | 0:2286a98ea739 | 396 | // clears the PRIM_RX bit in the CONFIG register, so the user does not need to. |
jeroen3 | 0:2286a98ea739 | 397 | void nrf24l01_set_as_tx_param(unsigned char config) |
jeroen3 | 0:2286a98ea739 | 398 | { |
jeroen3 | 0:2286a98ea739 | 399 | config &= ~(nrf24l01_CONFIG_PRIM_RX); |
jeroen3 | 0:2286a98ea739 | 400 | |
jeroen3 | 0:2286a98ea739 | 401 | if((config & nrf24l01_CONFIG_PWR_UP) != 0) |
jeroen3 | 0:2286a98ea739 | 402 | nrf24l01_power_up_param(false, config); |
jeroen3 | 0:2286a98ea739 | 403 | else |
jeroen3 | 0:2286a98ea739 | 404 | nrf24l01_power_down_param(config); |
jeroen3 | 0:2286a98ea739 | 405 | } |
jeroen3 | 0:2286a98ea739 | 406 | |
jeroen3 | 0:2286a98ea739 | 407 | //executes the W_REGISTER SPI operation |
jeroen3 | 0:2286a98ea739 | 408 | //unsigned char regnumber indicates the register number assigned by the nrf24l01 specification. |
jeroen3 | 0:2286a98ea739 | 409 | // For regnumber values, see section titled "register definitions" in nrf24l01.h. |
jeroen3 | 0:2286a98ea739 | 410 | //unsigned char * data should be of size 1 for all register writes except for RX_ADDR_P0, RX_ADDR_P1, |
jeroen3 | 0:2286a98ea739 | 411 | // and TX_ADDR. The size of data should be set according to the user-specified size of the address |
jeroen3 | 0:2286a98ea739 | 412 | // length for the register the address is being sent to. |
jeroen3 | 0:2286a98ea739 | 413 | //unsigned int len is always the size of unsigned char * data. For example, if data is declared as |
jeroen3 | 0:2286a98ea739 | 414 | // data[6], len should equal 6. |
jeroen3 | 0:2286a98ea739 | 415 | //returns the value of the STATUS register |
jeroen3 | 0:2286a98ea739 | 416 | unsigned char nrf24l01_write_register(unsigned char regnumber, unsigned char * data, unsigned int len) |
jeroen3 | 0:2286a98ea739 | 417 | { |
jeroen3 | 0:2286a98ea739 | 418 | return nrf24l01_execute_command(nrf24l01_W_REGISTER | (regnumber & nrf24l01_W_REGISTER_DATA), data, len, false); |
jeroen3 | 0:2286a98ea739 | 419 | } |
jeroen3 | 0:2286a98ea739 | 420 | |
jeroen3 | 0:2286a98ea739 | 421 | //executes the R_REGISTER SPI operation |
jeroen3 | 0:2286a98ea739 | 422 | //unsigned char regnumber indicates the register number assigned by the nrf24l01 specification. |
jeroen3 | 0:2286a98ea739 | 423 | // For regnumber values, see section titled "register definitions" in nrf24l01.h. |
jeroen3 | 0:2286a98ea739 | 424 | //unsigned char * data should be of size 1 for all register writes except for RX_ADDR_P0, RX_ADDR_P1, |
jeroen3 | 0:2286a98ea739 | 425 | // and TX_ADDR. The size of data should be set according to the user-specified size of the address |
jeroen3 | 0:2286a98ea739 | 426 | // length for the register the address is being read from. |
jeroen3 | 0:2286a98ea739 | 427 | //unsigned int len is always the size of unsigned char * data. For example, if data is declared as |
jeroen3 | 0:2286a98ea739 | 428 | // data[6], len = 6. |
jeroen3 | 0:2286a98ea739 | 429 | //returns the value of the STATUS register |
jeroen3 | 0:2286a98ea739 | 430 | unsigned char nrf24l01_read_register(unsigned char regnumber, unsigned char * data, unsigned int len) |
jeroen3 | 0:2286a98ea739 | 431 | { |
jeroen3 | 0:2286a98ea739 | 432 | return nrf24l01_execute_command(regnumber & nrf24l01_R_REGISTER_DATA, data, len, true); |
jeroen3 | 0:2286a98ea739 | 433 | } |
jeroen3 | 0:2286a98ea739 | 434 | |
jeroen3 | 0:2286a98ea739 | 435 | //executes the W_TX_PAYLOAD operation |
jeroen3 | 0:2286a98ea739 | 436 | //unsigned char * data is the actual payload to be sent to the nrf24l01. |
jeroen3 | 0:2286a98ea739 | 437 | //unsigned int len is the length of the payload being sent (this should be sized |
jeroen3 | 0:2286a98ea739 | 438 | // according to the payload length specified by the receiving nrf24l01). |
jeroen3 | 0:2286a98ea739 | 439 | //if bool transmit is true, the nrf24l01 immediately transmits the data in the payload. |
jeroen3 | 0:2286a98ea739 | 440 | // if false, the user must use the nrf24l01_transmit() function to send the payload. |
jeroen3 | 0:2286a98ea739 | 441 | //returns the value of the STATUS register |
jeroen3 | 0:2286a98ea739 | 442 | unsigned char nrf24l01_write_tx_payload(unsigned char * data, unsigned int len, bool transmit) |
jeroen3 | 0:2286a98ea739 | 443 | { |
jeroen3 | 0:2286a98ea739 | 444 | unsigned char status; |
jeroen3 | 0:2286a98ea739 | 445 | |
jeroen3 | 0:2286a98ea739 | 446 | status = nrf24l01_execute_command(nrf24l01_W_TX_PAYLOAD, data, len, false); |
jeroen3 | 0:2286a98ea739 | 447 | |
jeroen3 | 0:2286a98ea739 | 448 | if(transmit == true) |
jeroen3 | 0:2286a98ea739 | 449 | nrf24l01_transmit(); |
jeroen3 | 0:2286a98ea739 | 450 | |
jeroen3 | 0:2286a98ea739 | 451 | return status; |
jeroen3 | 0:2286a98ea739 | 452 | } |
jeroen3 | 0:2286a98ea739 | 453 | |
jeroen3 | 0:2286a98ea739 | 454 | //executes the R_RX_PAYLOAD instruction |
jeroen3 | 0:2286a98ea739 | 455 | //unsigned char * data is the actual payload that has been received by the nrf24l01. |
jeroen3 | 0:2286a98ea739 | 456 | // The user must size data according to the payload width specified to the nrf24l01. |
jeroen3 | 0:2286a98ea739 | 457 | // This variable is filled by this function, so individual byte values need not be |
jeroen3 | 0:2286a98ea739 | 458 | // initialized by the user. |
jeroen3 | 0:2286a98ea739 | 459 | //unsigned int len is the length of the payload being clocked out of the nrf24l01 (this |
jeroen3 | 0:2286a98ea739 | 460 | // should be sized according to the payload length specified to the nrf24l01). |
jeroen3 | 0:2286a98ea739 | 461 | //returns the value of the STATUS register |
jeroen3 | 0:2286a98ea739 | 462 | unsigned char nrf24l01_read_rx_payload(unsigned char * data, unsigned int len) |
jeroen3 | 0:2286a98ea739 | 463 | { |
jeroen3 | 0:2286a98ea739 | 464 | unsigned char status; |
jeroen3 | 0:2286a98ea739 | 465 | |
jeroen3 | 0:2286a98ea739 | 466 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 467 | status = nrf24l01_execute_command(nrf24l01_R_RX_PAYLOAD, data, len, true); |
jeroen3 | 0:2286a98ea739 | 468 | nrf24l01_set_ce(); |
jeroen3 | 0:2286a98ea739 | 469 | |
jeroen3 | 0:2286a98ea739 | 470 | return status; |
jeroen3 | 0:2286a98ea739 | 471 | } |
jeroen3 | 0:2286a98ea739 | 472 | |
jeroen3 | 0:2286a98ea739 | 473 | //executes the FLUSH_TX SPI operation |
jeroen3 | 0:2286a98ea739 | 474 | //this funciton empties the contents of the TX FIFO |
jeroen3 | 0:2286a98ea739 | 475 | //returns the value of the STATUS register |
jeroen3 | 0:2286a98ea739 | 476 | unsigned char nrf24l01_flush_tx() |
jeroen3 | 0:2286a98ea739 | 477 | { |
jeroen3 | 0:2286a98ea739 | 478 | return nrf24l01_execute_command(nrf24l01_FLUSH_TX, NULL, 0, true); |
jeroen3 | 0:2286a98ea739 | 479 | } |
jeroen3 | 0:2286a98ea739 | 480 | |
jeroen3 | 0:2286a98ea739 | 481 | //executes the FLUSH_RX SPI operation |
jeroen3 | 0:2286a98ea739 | 482 | //this funciton empties the contents of the RX FIFO |
jeroen3 | 0:2286a98ea739 | 483 | //returns the value of the STATUS register |
jeroen3 | 0:2286a98ea739 | 484 | unsigned char nrf24l01_flush_rx() |
jeroen3 | 0:2286a98ea739 | 485 | { |
jeroen3 | 0:2286a98ea739 | 486 | return nrf24l01_execute_command(nrf24l01_FLUSH_RX, NULL, 0, true); |
jeroen3 | 0:2286a98ea739 | 487 | } |
jeroen3 | 0:2286a98ea739 | 488 | |
jeroen3 | 0:2286a98ea739 | 489 | //executes the REUSE_TX_PL SPI operation |
jeroen3 | 0:2286a98ea739 | 490 | //this funciton allows the user to constantly send a packet repeatedly when issued. |
jeroen3 | 0:2286a98ea739 | 491 | //returns the value of the STATUS register |
jeroen3 | 0:2286a98ea739 | 492 | unsigned char nrf24l01_reuse_tx_pl() |
jeroen3 | 0:2286a98ea739 | 493 | { |
jeroen3 | 0:2286a98ea739 | 494 | return nrf24l01_execute_command(nrf24l01_REUSE_TX_PL, NULL, 0, true); |
jeroen3 | 0:2286a98ea739 | 495 | } |
jeroen3 | 0:2286a98ea739 | 496 | |
jeroen3 | 0:2286a98ea739 | 497 | //executes the FLUSH_TX SPI operation |
jeroen3 | 0:2286a98ea739 | 498 | //this funciton does nothing |
jeroen3 | 0:2286a98ea739 | 499 | //returns the value of the STATUS register |
jeroen3 | 0:2286a98ea739 | 500 | unsigned char nrf24l01_nop() |
jeroen3 | 0:2286a98ea739 | 501 | { |
jeroen3 | 0:2286a98ea739 | 502 | return nrf24l01_execute_command(nrf24l01_NOP, NULL, 0, true); |
jeroen3 | 0:2286a98ea739 | 503 | } |
jeroen3 | 0:2286a98ea739 | 504 | |
jeroen3 | 0:2286a98ea739 | 505 | //transmits the current tx payload |
jeroen3 | 0:2286a98ea739 | 506 | void nrf24l01_transmit() |
jeroen3 | 0:2286a98ea739 | 507 | { |
jeroen3 | 0:2286a98ea739 | 508 | nrf24l01_set_ce(); |
jeroen3 | 0:2286a98ea739 | 509 | delay_us(10); |
jeroen3 | 0:2286a98ea739 | 510 | nrf24l01_clear_ce(); |
jeroen3 | 0:2286a98ea739 | 511 | } |
jeroen3 | 0:2286a98ea739 | 512 | |
jeroen3 | 0:2286a98ea739 | 513 | //clears the pin on the host microcontroller that is attached to the 24l01's CE pin |
jeroen3 | 0:2286a98ea739 | 514 | void nrf24l01_clear_ce() |
jeroen3 | 0:2286a98ea739 | 515 | { |
jeroen3 | 0:2286a98ea739 | 516 | nRF_CE = 0; |
jeroen3 | 0:2286a98ea739 | 517 | //nrf24l01_CE_IOREGISTER &= ~nrf24l01_CE_PINMASK; |
jeroen3 | 0:2286a98ea739 | 518 | } |
jeroen3 | 0:2286a98ea739 | 519 | |
jeroen3 | 0:2286a98ea739 | 520 | //sets the pin on the host microcontroller that is attached to the 24l01's CE pin |
jeroen3 | 0:2286a98ea739 | 521 | void nrf24l01_set_ce() |
jeroen3 | 0:2286a98ea739 | 522 | { |
jeroen3 | 0:2286a98ea739 | 523 | nRF_CE = 1; |
jeroen3 | 0:2286a98ea739 | 524 | //nrf24l01_CE_IOREGISTER |= nrf24l01_CE_PINMASK; |
jeroen3 | 0:2286a98ea739 | 525 | } |
jeroen3 | 0:2286a98ea739 | 526 | |
jeroen3 | 0:2286a98ea739 | 527 | //returns true if CE is high, false if not |
jeroen3 | 0:2286a98ea739 | 528 | bool nrf24l01_ce_pin_active() |
jeroen3 | 0:2286a98ea739 | 529 | { |
jeroen3 | 0:2286a98ea739 | 530 | return nRF_CE.read(); |
jeroen3 | 0:2286a98ea739 | 531 | /* |
jeroen3 | 0:2286a98ea739 | 532 | if((nrf24l01_CE_IOREGISTER & nrf24l01_CE_PINMASK) != 0) |
jeroen3 | 0:2286a98ea739 | 533 | return true; |
jeroen3 | 0:2286a98ea739 | 534 | else |
jeroen3 | 0:2286a98ea739 | 535 | return false; |
jeroen3 | 0:2286a98ea739 | 536 | */ |
jeroen3 | 0:2286a98ea739 | 537 | } |
jeroen3 | 0:2286a98ea739 | 538 | |
jeroen3 | 0:2286a98ea739 | 539 | //sets the pin on the host microcontroller that is attached to the 24l01's CSN pin |
jeroen3 | 0:2286a98ea739 | 540 | void nrf24l01_clear_csn() |
jeroen3 | 0:2286a98ea739 | 541 | { |
jeroen3 | 0:2286a98ea739 | 542 | nRF_CSN = 0; |
jeroen3 | 0:2286a98ea739 | 543 | //nrf24l01_CSN_IOREGISTER &= ~nrf24l01_CSN_PINMASK; |
jeroen3 | 0:2286a98ea739 | 544 | } |
jeroen3 | 0:2286a98ea739 | 545 | |
jeroen3 | 0:2286a98ea739 | 546 | //clears the pin on the host microcontroller that is attached to the 24l01's CSN pin |
jeroen3 | 0:2286a98ea739 | 547 | void nrf24l01_set_csn() |
jeroen3 | 0:2286a98ea739 | 548 | { |
jeroen3 | 0:2286a98ea739 | 549 | nRF_CSN = 1; |
jeroen3 | 0:2286a98ea739 | 550 | //nrf24l01_CSN_IOREGISTER |= nrf24l01_CSN_PINMASK; |
jeroen3 | 0:2286a98ea739 | 551 | } |
jeroen3 | 0:2286a98ea739 | 552 | |
jeroen3 | 0:2286a98ea739 | 553 | //returns true if CSN is high, false if not |
jeroen3 | 0:2286a98ea739 | 554 | bool nrf24l01_csn_pin_active() |
jeroen3 | 0:2286a98ea739 | 555 | { |
jeroen3 | 0:2286a98ea739 | 556 | return nRF_CSN.read(); |
jeroen3 | 0:2286a98ea739 | 557 | /* |
jeroen3 | 0:2286a98ea739 | 558 | if((nrf24l01_CSN_IOREGISTER & nrf24l01_CSN_PINMASK) != 0) |
jeroen3 | 0:2286a98ea739 | 559 | return true; |
jeroen3 | 0:2286a98ea739 | 560 | else |
jeroen3 | 0:2286a98ea739 | 561 | return false; |
jeroen3 | 0:2286a98ea739 | 562 | */ |
jeroen3 | 0:2286a98ea739 | 563 | } |
jeroen3 | 0:2286a98ea739 | 564 | |
jeroen3 | 0:2286a98ea739 | 565 | //sets the TX address in the TX_ADDR register |
jeroen3 | 0:2286a98ea739 | 566 | //unsigned char * address is the actual address to be used. It should be sized |
jeroen3 | 0:2286a98ea739 | 567 | // according to the tx_addr length specified to the nrf24l01. |
jeroen3 | 0:2286a98ea739 | 568 | //unsigned int len is the length of the address. Its value should be specified |
jeroen3 | 0:2286a98ea739 | 569 | // according to the tx_addr length specified to the nrf24l01. |
jeroen3 | 0:2286a98ea739 | 570 | void nrf24l01_set_tx_addr(unsigned char * address, unsigned int len) |
jeroen3 | 0:2286a98ea739 | 571 | { |
jeroen3 | 0:2286a98ea739 | 572 | nrf24l01_write_register(nrf24l01_TX_ADDR, address, len); |
jeroen3 | 0:2286a98ea739 | 573 | } |
jeroen3 | 0:2286a98ea739 | 574 | |
jeroen3 | 0:2286a98ea739 | 575 | //sets the RX address in the RX_ADDR register that is offset by rxpipenum |
jeroen3 | 0:2286a98ea739 | 576 | //unsigned char * address is the actual address to be used. It should be sized |
jeroen3 | 0:2286a98ea739 | 577 | // according to the rx_addr length that is being filled. |
jeroen3 | 0:2286a98ea739 | 578 | //unsigned int len is the length of the address. Its value should be specified |
jeroen3 | 0:2286a98ea739 | 579 | // according to the rx_addr length specified to the nrf24l01. |
jeroen3 | 0:2286a98ea739 | 580 | //unsigned char rxpipenum is the pipe number (zero to five) whose address is being |
jeroen3 | 0:2286a98ea739 | 581 | // specified. If an invalid address (greater than five) is supplied, the function |
jeroen3 | 0:2286a98ea739 | 582 | // does nothing. |
jeroen3 | 0:2286a98ea739 | 583 | void nrf24l01_set_rx_addr(unsigned char * address, unsigned int len, unsigned char rxpipenum) |
jeroen3 | 0:2286a98ea739 | 584 | { |
jeroen3 | 0:2286a98ea739 | 585 | if(rxpipenum > 5) |
jeroen3 | 0:2286a98ea739 | 586 | return; |
jeroen3 | 0:2286a98ea739 | 587 | |
jeroen3 | 0:2286a98ea739 | 588 | nrf24l01_write_register(nrf24l01_RX_ADDR_P0 + rxpipenum, address, len); |
jeroen3 | 0:2286a98ea739 | 589 | } |
jeroen3 | 0:2286a98ea739 | 590 | |
jeroen3 | 0:2286a98ea739 | 591 | //sets the RX payload width on the pipe offset by rxpipenum |
jeroen3 | 0:2286a98ea739 | 592 | //unsigned char payloadwidth is the length of the payload for the pipe referenced in |
jeroen3 | 0:2286a98ea739 | 593 | // rxpipenum. It must be less than or equal to 32. If an invalid payload width is |
jeroen3 | 0:2286a98ea739 | 594 | // specified, the function does nothing. |
jeroen3 | 0:2286a98ea739 | 595 | //unsigned char rxpipenum is the pipe number (zero to five) whose address is being |
jeroen3 | 0:2286a98ea739 | 596 | // specified. If an invalid address (greater than five) is supplied, the function |
jeroen3 | 0:2286a98ea739 | 597 | // does nothing. |
jeroen3 | 0:2286a98ea739 | 598 | void nrf24l01_set_rx_pw(unsigned char payloadwidth, unsigned char rxpipenum) |
jeroen3 | 0:2286a98ea739 | 599 | { |
jeroen3 | 0:2286a98ea739 | 600 | if((rxpipenum > 5) || (payloadwidth > 32)) |
jeroen3 | 0:2286a98ea739 | 601 | return; |
jeroen3 | 0:2286a98ea739 | 602 | |
jeroen3 | 0:2286a98ea739 | 603 | nrf24l01_write_register(nrf24l01_RX_PW_P0 + rxpipenum, &payloadwidth, 1); |
jeroen3 | 0:2286a98ea739 | 604 | } |
jeroen3 | 0:2286a98ea739 | 605 | |
jeroen3 | 0:2286a98ea739 | 606 | //gets the RX payload width on the pipe offset by rxpipenum |
jeroen3 | 0:2286a98ea739 | 607 | //unsigned char rxpipenum is the pipe number (zero to five) whose address is being |
jeroen3 | 0:2286a98ea739 | 608 | // specified. If an invalid address (greater than five) is supplied, the function |
jeroen3 | 0:2286a98ea739 | 609 | // does nothing. |
jeroen3 | 0:2286a98ea739 | 610 | unsigned char nrf24l01_get_rx_pw(unsigned char rxpipenum) |
jeroen3 | 0:2286a98ea739 | 611 | { |
jeroen3 | 0:2286a98ea739 | 612 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 613 | |
jeroen3 | 0:2286a98ea739 | 614 | if((rxpipenum > 5)) |
jeroen3 | 0:2286a98ea739 | 615 | return 0; |
jeroen3 | 0:2286a98ea739 | 616 | |
jeroen3 | 0:2286a98ea739 | 617 | nrf24l01_read_register(nrf24l01_RX_PW_P0 + rxpipenum, &data, 1); |
jeroen3 | 0:2286a98ea739 | 618 | |
jeroen3 | 0:2286a98ea739 | 619 | return data; |
jeroen3 | 0:2286a98ea739 | 620 | } |
jeroen3 | 0:2286a98ea739 | 621 | |
jeroen3 | 0:2286a98ea739 | 622 | //returns the value of the CONFIG register |
jeroen3 | 0:2286a98ea739 | 623 | unsigned char nrf24l01_get_config() |
jeroen3 | 0:2286a98ea739 | 624 | { |
jeroen3 | 0:2286a98ea739 | 625 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 626 | |
jeroen3 | 0:2286a98ea739 | 627 | nrf24l01_read_register(nrf24l01_CONFIG, &data, 1); |
jeroen3 | 0:2286a98ea739 | 628 | |
jeroen3 | 0:2286a98ea739 | 629 | return data; |
jeroen3 | 0:2286a98ea739 | 630 | } |
jeroen3 | 0:2286a98ea739 | 631 | |
jeroen3 | 0:2286a98ea739 | 632 | //sets the value of the CONFIG register |
jeroen3 | 0:2286a98ea739 | 633 | void nrf24l01_set_config(unsigned char config) |
jeroen3 | 0:2286a98ea739 | 634 | { |
jeroen3 | 0:2286a98ea739 | 635 | nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); |
jeroen3 | 0:2286a98ea739 | 636 | } |
jeroen3 | 0:2286a98ea739 | 637 | |
jeroen3 | 0:2286a98ea739 | 638 | //returns the current RF channel in RF_CH register |
jeroen3 | 0:2286a98ea739 | 639 | unsigned char nrf24l01_get_rf_ch() |
jeroen3 | 0:2286a98ea739 | 640 | { |
jeroen3 | 0:2286a98ea739 | 641 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 642 | |
jeroen3 | 0:2286a98ea739 | 643 | nrf24l01_read_register(nrf24l01_RF_CH, &data, 1); |
jeroen3 | 0:2286a98ea739 | 644 | |
jeroen3 | 0:2286a98ea739 | 645 | return data; |
jeroen3 | 0:2286a98ea739 | 646 | } |
jeroen3 | 0:2286a98ea739 | 647 | |
jeroen3 | 0:2286a98ea739 | 648 | //unsigned char channel is the channel to be changed to. |
jeroen3 | 0:2286a98ea739 | 649 | void nrf24l01_set_rf_ch(unsigned char channel) |
jeroen3 | 0:2286a98ea739 | 650 | { |
jeroen3 | 0:2286a98ea739 | 651 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 652 | |
jeroen3 | 0:2286a98ea739 | 653 | data = channel & ~nrf24l01_RF_CH_RESERVED; |
jeroen3 | 0:2286a98ea739 | 654 | |
jeroen3 | 0:2286a98ea739 | 655 | nrf24l01_write_register(nrf24l01_RF_CH, &data, 1); |
jeroen3 | 0:2286a98ea739 | 656 | } |
jeroen3 | 0:2286a98ea739 | 657 | |
jeroen3 | 0:2286a98ea739 | 658 | //returns the value of the OBSERVE_TX register |
jeroen3 | 0:2286a98ea739 | 659 | unsigned char nrf24l01_get_observe_tx() |
jeroen3 | 0:2286a98ea739 | 660 | { |
jeroen3 | 0:2286a98ea739 | 661 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 662 | |
jeroen3 | 0:2286a98ea739 | 663 | nrf24l01_read_register(nrf24l01_OBSERVE_TX, &data, 1); |
jeroen3 | 0:2286a98ea739 | 664 | |
jeroen3 | 0:2286a98ea739 | 665 | return data; |
jeroen3 | 0:2286a98ea739 | 666 | } |
jeroen3 | 0:2286a98ea739 | 667 | |
jeroen3 | 0:2286a98ea739 | 668 | //returns the current PLOS_CNT value in OBSERVE_TX register |
jeroen3 | 0:2286a98ea739 | 669 | unsigned char nrf24l01_get_plos_cnt() |
jeroen3 | 0:2286a98ea739 | 670 | { |
jeroen3 | 0:2286a98ea739 | 671 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 672 | |
jeroen3 | 0:2286a98ea739 | 673 | nrf24l01_read_register(nrf24l01_OBSERVE_TX, &data, 1); |
jeroen3 | 0:2286a98ea739 | 674 | |
jeroen3 | 0:2286a98ea739 | 675 | return ((data & nrf24l01_OBSERVE_TX_PLOS_CNT) >> 4); |
jeroen3 | 0:2286a98ea739 | 676 | } |
jeroen3 | 0:2286a98ea739 | 677 | |
jeroen3 | 0:2286a98ea739 | 678 | //clears the PLOS_CNT field of the OBSERVE_TX register |
jeroen3 | 0:2286a98ea739 | 679 | //this function makes a read of the current value of RF_CH and |
jeroen3 | 0:2286a98ea739 | 680 | // simply writes it back to the register, clearing PLOS_CNT |
jeroen3 | 0:2286a98ea739 | 681 | void nrf24l01_clear_plos_cnt() |
jeroen3 | 0:2286a98ea739 | 682 | { |
jeroen3 | 0:2286a98ea739 | 683 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 684 | |
jeroen3 | 0:2286a98ea739 | 685 | nrf24l01_read_register(nrf24l01_RF_CH, &data, 1); |
jeroen3 | 0:2286a98ea739 | 686 | nrf24l01_write_register(nrf24l01_RF_CH, &data, 1); |
jeroen3 | 0:2286a98ea739 | 687 | } |
jeroen3 | 0:2286a98ea739 | 688 | |
jeroen3 | 0:2286a98ea739 | 689 | //clears the PLOS_CNT field of the OBSERVE_TX register |
jeroen3 | 0:2286a98ea739 | 690 | //this function allows the user to set the RF_CH register by using |
jeroen3 | 0:2286a98ea739 | 691 | // the argument in the function during the PLOS_CNT clearing process |
jeroen3 | 0:2286a98ea739 | 692 | void nrf24l01_clear_plos_cnt_param(unsigned char rf_ch) |
jeroen3 | 0:2286a98ea739 | 693 | { |
jeroen3 | 0:2286a98ea739 | 694 | nrf24l01_write_register(nrf24l01_RF_CH, &rf_ch, 1); |
jeroen3 | 0:2286a98ea739 | 695 | } |
jeroen3 | 0:2286a98ea739 | 696 | |
jeroen3 | 0:2286a98ea739 | 697 | //returns the current ARC_CNT value in OBSERVE_TX register |
jeroen3 | 0:2286a98ea739 | 698 | unsigned char nrf24l01_get_arc_cnt() |
jeroen3 | 0:2286a98ea739 | 699 | { |
jeroen3 | 0:2286a98ea739 | 700 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 701 | |
jeroen3 | 0:2286a98ea739 | 702 | nrf24l01_read_register(nrf24l01_OBSERVE_TX, &data, 1); |
jeroen3 | 0:2286a98ea739 | 703 | |
jeroen3 | 0:2286a98ea739 | 704 | return (data & nrf24l01_OBSERVE_TX_ARC_CNT); |
jeroen3 | 0:2286a98ea739 | 705 | } |
jeroen3 | 0:2286a98ea739 | 706 | |
jeroen3 | 0:2286a98ea739 | 707 | //returns true if auto-ack is enabled on the pipe that is offset by rxpipenum |
jeroen3 | 0:2286a98ea739 | 708 | //unsigned char rxpipenum is the pipe number (zero to five) whose address is being |
jeroen3 | 0:2286a98ea739 | 709 | // specified. If an invalid address (greater than five) is supplied, the function |
jeroen3 | 0:2286a98ea739 | 710 | // returns false. |
jeroen3 | 0:2286a98ea739 | 711 | bool nrf24l01_aa_enabled(unsigned char rxpipenum) |
jeroen3 | 0:2286a98ea739 | 712 | { |
jeroen3 | 0:2286a98ea739 | 713 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 714 | |
jeroen3 | 0:2286a98ea739 | 715 | if(rxpipenum > 5) |
jeroen3 | 0:2286a98ea739 | 716 | return false; |
jeroen3 | 0:2286a98ea739 | 717 | |
jeroen3 | 0:2286a98ea739 | 718 | nrf24l01_read_register(nrf24l01_EN_AA, &data, 1); |
jeroen3 | 0:2286a98ea739 | 719 | |
jeroen3 | 0:2286a98ea739 | 720 | return (data & (0x01 << rxpipenum)); |
jeroen3 | 0:2286a98ea739 | 721 | } |
jeroen3 | 0:2286a98ea739 | 722 | |
jeroen3 | 0:2286a98ea739 | 723 | //enables auto-ack is enabled on the pipe that is offset by rxpipenum |
jeroen3 | 0:2286a98ea739 | 724 | //unsigned char rxpipenum is the pipe number (zero to five) whose address is being |
jeroen3 | 0:2286a98ea739 | 725 | // does nothing. |
jeroen3 | 0:2286a98ea739 | 726 | void nrf24l01_aa_enable(unsigned char rxpipenum) |
jeroen3 | 0:2286a98ea739 | 727 | { |
jeroen3 | 0:2286a98ea739 | 728 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 729 | |
jeroen3 | 0:2286a98ea739 | 730 | if(rxpipenum > 5) |
jeroen3 | 0:2286a98ea739 | 731 | return; |
jeroen3 | 0:2286a98ea739 | 732 | |
jeroen3 | 0:2286a98ea739 | 733 | nrf24l01_read_register(nrf24l01_EN_AA, &data, 1); |
jeroen3 | 0:2286a98ea739 | 734 | |
jeroen3 | 0:2286a98ea739 | 735 | if((data & (0x01 << rxpipenum)) != 0) |
jeroen3 | 0:2286a98ea739 | 736 | return; |
jeroen3 | 0:2286a98ea739 | 737 | |
jeroen3 | 0:2286a98ea739 | 738 | data |= 0x01 << rxpipenum; |
jeroen3 | 0:2286a98ea739 | 739 | |
jeroen3 | 0:2286a98ea739 | 740 | nrf24l01_write_register(nrf24l01_EN_AA, &data, 1); |
jeroen3 | 0:2286a98ea739 | 741 | } |
jeroen3 | 0:2286a98ea739 | 742 | |
jeroen3 | 0:2286a98ea739 | 743 | //disables auto-ack is enabled on the pipe that is offset by rxpipenum |
jeroen3 | 0:2286a98ea739 | 744 | //unsigned char rxpipenum is the pipe number (zero to five) whose address is being |
jeroen3 | 0:2286a98ea739 | 745 | // does nothing. |
jeroen3 | 0:2286a98ea739 | 746 | void nrf24l01_aa_disable(unsigned char rxpipenum) |
jeroen3 | 0:2286a98ea739 | 747 | { |
jeroen3 | 0:2286a98ea739 | 748 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 749 | |
jeroen3 | 0:2286a98ea739 | 750 | if(rxpipenum > 5) |
jeroen3 | 0:2286a98ea739 | 751 | return; |
jeroen3 | 0:2286a98ea739 | 752 | |
jeroen3 | 0:2286a98ea739 | 753 | nrf24l01_read_register(nrf24l01_EN_AA, &data, 1); |
jeroen3 | 0:2286a98ea739 | 754 | |
jeroen3 | 0:2286a98ea739 | 755 | if((data & (0x01 << rxpipenum)) == 0) |
jeroen3 | 0:2286a98ea739 | 756 | return; |
jeroen3 | 0:2286a98ea739 | 757 | |
jeroen3 | 0:2286a98ea739 | 758 | data &= ~(0x01 << rxpipenum); |
jeroen3 | 0:2286a98ea739 | 759 | |
jeroen3 | 0:2286a98ea739 | 760 | nrf24l01_write_register(nrf24l01_EN_AA, &data, 1); |
jeroen3 | 0:2286a98ea739 | 761 | } |
jeroen3 | 0:2286a98ea739 | 762 | |
jeroen3 | 0:2286a98ea739 | 763 | //returns true if the pipe is enabled that is offset by rxpipenum |
jeroen3 | 0:2286a98ea739 | 764 | //unsigned char rxpipenum is the pipe number (zero to five) whose address is being |
jeroen3 | 0:2286a98ea739 | 765 | // specified. If an invalid address (greater than five) is supplied, the function |
jeroen3 | 0:2286a98ea739 | 766 | // returns false. |
jeroen3 | 0:2286a98ea739 | 767 | bool nrf24l01_rx_pipe_enabled(unsigned char rxpipenum) |
jeroen3 | 0:2286a98ea739 | 768 | { |
jeroen3 | 0:2286a98ea739 | 769 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 770 | |
jeroen3 | 0:2286a98ea739 | 771 | if((rxpipenum > 5)) |
jeroen3 | 0:2286a98ea739 | 772 | return false; |
jeroen3 | 0:2286a98ea739 | 773 | |
jeroen3 | 0:2286a98ea739 | 774 | nrf24l01_read_register(nrf24l01_EN_RXADDR, &data, 1); |
jeroen3 | 0:2286a98ea739 | 775 | |
jeroen3 | 0:2286a98ea739 | 776 | return (data & (0x01 << rxpipenum)); |
jeroen3 | 0:2286a98ea739 | 777 | } |
jeroen3 | 0:2286a98ea739 | 778 | |
jeroen3 | 0:2286a98ea739 | 779 | //enables the pipe that is offset by rxpipenum |
jeroen3 | 0:2286a98ea739 | 780 | //unsigned char rxpipenum is the pipe number (zero to five) whose address is being |
jeroen3 | 0:2286a98ea739 | 781 | // specified. If an invalid address (greater than five) is supplied, the function |
jeroen3 | 0:2286a98ea739 | 782 | // does nothing. |
jeroen3 | 0:2286a98ea739 | 783 | void nrf24l01_rx_pipe_enable(unsigned char rxpipenum) |
jeroen3 | 0:2286a98ea739 | 784 | { |
jeroen3 | 0:2286a98ea739 | 785 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 786 | |
jeroen3 | 0:2286a98ea739 | 787 | if(rxpipenum > 5) |
jeroen3 | 0:2286a98ea739 | 788 | return; |
jeroen3 | 0:2286a98ea739 | 789 | |
jeroen3 | 0:2286a98ea739 | 790 | nrf24l01_read_register(nrf24l01_EN_RXADDR, &data, 1); |
jeroen3 | 0:2286a98ea739 | 791 | |
jeroen3 | 0:2286a98ea739 | 792 | if((data & (0x01 << rxpipenum)) != 0) |
jeroen3 | 0:2286a98ea739 | 793 | return; |
jeroen3 | 0:2286a98ea739 | 794 | |
jeroen3 | 0:2286a98ea739 | 795 | data |= 0x01 << rxpipenum; |
jeroen3 | 0:2286a98ea739 | 796 | |
jeroen3 | 0:2286a98ea739 | 797 | nrf24l01_write_register(nrf24l01_EN_RXADDR, &data, 1); |
jeroen3 | 0:2286a98ea739 | 798 | } |
jeroen3 | 0:2286a98ea739 | 799 | |
jeroen3 | 0:2286a98ea739 | 800 | //disables the pipe that is offset by rxpipenum |
jeroen3 | 0:2286a98ea739 | 801 | //unsigned char rxpipenum is the pipe number (zero to five) whose address is being |
jeroen3 | 0:2286a98ea739 | 802 | // specified. If an invalid address (greater than five) is supplied, the function |
jeroen3 | 0:2286a98ea739 | 803 | // does nothing. |
jeroen3 | 0:2286a98ea739 | 804 | void nrf24l01_rx_pipe_disable(unsigned char rxpipenum) |
jeroen3 | 0:2286a98ea739 | 805 | { |
jeroen3 | 0:2286a98ea739 | 806 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 807 | |
jeroen3 | 0:2286a98ea739 | 808 | if(rxpipenum > 5) |
jeroen3 | 0:2286a98ea739 | 809 | return; |
jeroen3 | 0:2286a98ea739 | 810 | |
jeroen3 | 0:2286a98ea739 | 811 | nrf24l01_read_register(nrf24l01_EN_RXADDR, &data, 1); |
jeroen3 | 0:2286a98ea739 | 812 | |
jeroen3 | 0:2286a98ea739 | 813 | if((data & (0x01 << rxpipenum)) == 0) |
jeroen3 | 0:2286a98ea739 | 814 | return; |
jeroen3 | 0:2286a98ea739 | 815 | |
jeroen3 | 0:2286a98ea739 | 816 | data &= ~(0x01 << rxpipenum); |
jeroen3 | 0:2286a98ea739 | 817 | |
jeroen3 | 0:2286a98ea739 | 818 | nrf24l01_write_register(nrf24l01_EN_RXADDR, &data, 1); |
jeroen3 | 0:2286a98ea739 | 819 | } |
jeroen3 | 0:2286a98ea739 | 820 | |
jeroen3 | 0:2286a98ea739 | 821 | //returns the status of the CD register (true if carrier detect [CD] is |
jeroen3 | 0:2286a98ea739 | 822 | // active, false if not) |
jeroen3 | 0:2286a98ea739 | 823 | bool nrf24l01_cd_active() |
jeroen3 | 0:2286a98ea739 | 824 | { |
jeroen3 | 0:2286a98ea739 | 825 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 826 | |
jeroen3 | 0:2286a98ea739 | 827 | nrf24l01_read_register(nrf24l01_CD, &data, 1); |
jeroen3 | 0:2286a98ea739 | 828 | |
jeroen3 | 0:2286a98ea739 | 829 | return data; |
jeroen3 | 0:2286a98ea739 | 830 | } |
jeroen3 | 0:2286a98ea739 | 831 | |
jeroen3 | 0:2286a98ea739 | 832 | //returns the value of the FIFO_STATUS register |
jeroen3 | 0:2286a98ea739 | 833 | unsigned char nrf24l01_get_fifo_status() |
jeroen3 | 0:2286a98ea739 | 834 | { |
jeroen3 | 0:2286a98ea739 | 835 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 836 | |
jeroen3 | 0:2286a98ea739 | 837 | nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); |
jeroen3 | 0:2286a98ea739 | 838 | |
jeroen3 | 0:2286a98ea739 | 839 | return data; |
jeroen3 | 0:2286a98ea739 | 840 | } |
jeroen3 | 0:2286a98ea739 | 841 | |
jeroen3 | 0:2286a98ea739 | 842 | //return the value of the status register |
jeroen3 | 0:2286a98ea739 | 843 | unsigned char nrf24l01_get_status() |
jeroen3 | 0:2286a98ea739 | 844 | { |
jeroen3 | 0:2286a98ea739 | 845 | return nrf24l01_nop(); |
jeroen3 | 0:2286a98ea739 | 846 | } |
jeroen3 | 0:2286a98ea739 | 847 | |
jeroen3 | 0:2286a98ea739 | 848 | //returns true if TX_REUSE bit in FIFO_STATUS register is set, false otherwise |
jeroen3 | 0:2286a98ea739 | 849 | bool nrf24l01_fifo_tx_reuse() |
jeroen3 | 0:2286a98ea739 | 850 | { |
jeroen3 | 0:2286a98ea739 | 851 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 852 | |
jeroen3 | 0:2286a98ea739 | 853 | nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); |
jeroen3 | 0:2286a98ea739 | 854 | |
jeroen3 | 0:2286a98ea739 | 855 | return (bool)(data & nrf24l01_FIFO_STATUS_TX_REUSE); |
jeroen3 | 0:2286a98ea739 | 856 | } |
jeroen3 | 0:2286a98ea739 | 857 | |
jeroen3 | 0:2286a98ea739 | 858 | //returns true if TX_FULL bit in FIFO_STATUS register is set, false otherwise |
jeroen3 | 0:2286a98ea739 | 859 | bool nrf24l01_fifo_tx_full() |
jeroen3 | 0:2286a98ea739 | 860 | { |
jeroen3 | 0:2286a98ea739 | 861 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 862 | |
jeroen3 | 0:2286a98ea739 | 863 | nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); |
jeroen3 | 0:2286a98ea739 | 864 | |
jeroen3 | 0:2286a98ea739 | 865 | return (bool)(data & nrf24l01_FIFO_STATUS_TX_FULL); |
jeroen3 | 0:2286a98ea739 | 866 | } |
jeroen3 | 0:2286a98ea739 | 867 | |
jeroen3 | 0:2286a98ea739 | 868 | //returns true if TX_EMPTY bit in FIFO_STATUS register is set, false otherwise |
jeroen3 | 0:2286a98ea739 | 869 | bool nrf24l01_fifo_tx_empty() |
jeroen3 | 0:2286a98ea739 | 870 | { |
jeroen3 | 0:2286a98ea739 | 871 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 872 | |
jeroen3 | 0:2286a98ea739 | 873 | nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); |
jeroen3 | 0:2286a98ea739 | 874 | |
jeroen3 | 0:2286a98ea739 | 875 | return (bool)(data & nrf24l01_FIFO_STATUS_TX_EMPTY); |
jeroen3 | 0:2286a98ea739 | 876 | } |
jeroen3 | 0:2286a98ea739 | 877 | |
jeroen3 | 0:2286a98ea739 | 878 | //returns true if RX_FULL bit in FIFO_STATUS register is set, false otherwise |
jeroen3 | 0:2286a98ea739 | 879 | bool nrf24l01_fifo_rx_full() |
jeroen3 | 0:2286a98ea739 | 880 | { |
jeroen3 | 0:2286a98ea739 | 881 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 882 | |
jeroen3 | 0:2286a98ea739 | 883 | nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); |
jeroen3 | 0:2286a98ea739 | 884 | |
jeroen3 | 0:2286a98ea739 | 885 | return (bool)(data & nrf24l01_FIFO_STATUS_RX_FULL); |
jeroen3 | 0:2286a98ea739 | 886 | } |
jeroen3 | 0:2286a98ea739 | 887 | |
jeroen3 | 0:2286a98ea739 | 888 | //returns true if RX_EMPTYE bit in FIFO_STATUS register is set, false otherwise |
jeroen3 | 0:2286a98ea739 | 889 | bool nrf24l01_fifo_rx_empty() |
jeroen3 | 0:2286a98ea739 | 890 | { |
jeroen3 | 0:2286a98ea739 | 891 | unsigned char data; |
jeroen3 | 0:2286a98ea739 | 892 | |
jeroen3 | 0:2286a98ea739 | 893 | nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); |
jeroen3 | 0:2286a98ea739 | 894 | |
jeroen3 | 0:2286a98ea739 | 895 | return (bool)(data & nrf24l01_FIFO_STATUS_RX_EMPTY); |
jeroen3 | 0:2286a98ea739 | 896 | } |
jeroen3 | 0:2286a98ea739 | 897 | |
jeroen3 | 0:2286a98ea739 | 898 | //returns true if IRQ pin is low, false otherwise |
jeroen3 | 0:2286a98ea739 | 899 | bool nrf24l01_irq_pin_active() |
jeroen3 | 0:2286a98ea739 | 900 | { |
jeroen3 | 0:2286a98ea739 | 901 | return !nRF_IRQ.read(); |
jeroen3 | 0:2286a98ea739 | 902 | /* |
jeroen3 | 0:2286a98ea739 | 903 | if((nrf24l01_IRQ_IOREGISTER & nrf24l01_IRQ_PINMASK) != 0) |
jeroen3 | 0:2286a98ea739 | 904 | return false; |
jeroen3 | 0:2286a98ea739 | 905 | else |
jeroen3 | 0:2286a98ea739 | 906 | return true; |
jeroen3 | 0:2286a98ea739 | 907 | */ |
jeroen3 | 0:2286a98ea739 | 908 | } |
jeroen3 | 0:2286a98ea739 | 909 | |
jeroen3 | 0:2286a98ea739 | 910 | //returns true if RX_DR interrupt is active, false otherwise |
jeroen3 | 0:2286a98ea739 | 911 | bool nrf24l01_irq_rx_dr_active() |
jeroen3 | 0:2286a98ea739 | 912 | { |
jeroen3 | 0:2286a98ea739 | 913 | return (nrf24l01_get_status() & nrf24l01_STATUS_RX_DR); |
jeroen3 | 0:2286a98ea739 | 914 | } |
jeroen3 | 0:2286a98ea739 | 915 | |
jeroen3 | 0:2286a98ea739 | 916 | //returns true if TX_DS interrupt is active, false otherwise |
jeroen3 | 0:2286a98ea739 | 917 | bool nrf24l01_irq_tx_ds_active() |
jeroen3 | 0:2286a98ea739 | 918 | { |
jeroen3 | 0:2286a98ea739 | 919 | return (nrf24l01_get_status() & nrf24l01_STATUS_TX_DS); |
jeroen3 | 0:2286a98ea739 | 920 | } |
jeroen3 | 0:2286a98ea739 | 921 | |
jeroen3 | 0:2286a98ea739 | 922 | //returns true if MAX_RT interrupt is active, false otherwise |
jeroen3 | 0:2286a98ea739 | 923 | bool nrf24l01_irq_max_rt_active() |
jeroen3 | 0:2286a98ea739 | 924 | { |
jeroen3 | 0:2286a98ea739 | 925 | return (nrf24l01_get_status() & nrf24l01_STATUS_MAX_RT); |
jeroen3 | 0:2286a98ea739 | 926 | } |
jeroen3 | 0:2286a98ea739 | 927 | |
jeroen3 | 0:2286a98ea739 | 928 | //clear all interrupts in the status register |
jeroen3 | 0:2286a98ea739 | 929 | void nrf24l01_irq_clear_all() |
jeroen3 | 0:2286a98ea739 | 930 | { |
jeroen3 | 0:2286a98ea739 | 931 | unsigned char data = nrf24l01_STATUS_RX_DR | nrf24l01_STATUS_TX_DS | nrf24l01_STATUS_MAX_RT; |
jeroen3 | 0:2286a98ea739 | 932 | |
jeroen3 | 0:2286a98ea739 | 933 | nrf24l01_write_register(nrf24l01_STATUS, &data, 1); |
jeroen3 | 0:2286a98ea739 | 934 | } |
jeroen3 | 0:2286a98ea739 | 935 | |
jeroen3 | 0:2286a98ea739 | 936 | //clears only the RX_DR interrupt |
jeroen3 | 0:2286a98ea739 | 937 | void nrf24l01_irq_clear_rx_dr() |
jeroen3 | 0:2286a98ea739 | 938 | { |
jeroen3 | 0:2286a98ea739 | 939 | unsigned char data = nrf24l01_STATUS_RX_DR; |
jeroen3 | 0:2286a98ea739 | 940 | |
jeroen3 | 0:2286a98ea739 | 941 | nrf24l01_write_register(nrf24l01_STATUS, &data, 1); |
jeroen3 | 0:2286a98ea739 | 942 | } |
jeroen3 | 0:2286a98ea739 | 943 | |
jeroen3 | 0:2286a98ea739 | 944 | //clears only the TX_DS interrupt |
jeroen3 | 0:2286a98ea739 | 945 | void nrf24l01_irq_clear_tx_ds() |
jeroen3 | 0:2286a98ea739 | 946 | { |
jeroen3 | 0:2286a98ea739 | 947 | unsigned char data = nrf24l01_STATUS_TX_DS; |
jeroen3 | 0:2286a98ea739 | 948 | |
jeroen3 | 0:2286a98ea739 | 949 | nrf24l01_write_register(nrf24l01_STATUS, &data, 1); |
jeroen3 | 0:2286a98ea739 | 950 | } |
jeroen3 | 0:2286a98ea739 | 951 | |
jeroen3 | 0:2286a98ea739 | 952 | //clears only the MAX_RT interrupt |
jeroen3 | 0:2286a98ea739 | 953 | void nrf24l01_irq_clear_max_rt() |
jeroen3 | 0:2286a98ea739 | 954 | { |
jeroen3 | 0:2286a98ea739 | 955 | unsigned char data = nrf24l01_STATUS_MAX_RT; |
jeroen3 | 0:2286a98ea739 | 956 | |
jeroen3 | 0:2286a98ea739 | 957 | nrf24l01_write_register(nrf24l01_STATUS, &data, 1); |
jeroen3 | 0:2286a98ea739 | 958 | } |
jeroen3 | 0:2286a98ea739 | 959 | |
jeroen3 | 0:2286a98ea739 | 960 | //returns the current pipe in the 24L01's STATUS register |
jeroen3 | 0:2286a98ea739 | 961 | unsigned char nrf24l01_get_rx_pipe() |
jeroen3 | 0:2286a98ea739 | 962 | { |
jeroen3 | 0:2286a98ea739 | 963 | return nrf24l01_get_rx_pipe_from_status(nrf24l01_get_status()); |
jeroen3 | 0:2286a98ea739 | 964 | } |
jeroen3 | 0:2286a98ea739 | 965 | |
jeroen3 | 0:2286a98ea739 | 966 | unsigned char nrf24l01_get_rx_pipe_from_status(unsigned char status) |
jeroen3 | 0:2286a98ea739 | 967 | { |
jeroen3 | 0:2286a98ea739 | 968 | return ((status & 0xE) >> 1); |
jeroen3 | 0:2286a98ea739 | 969 | } |
jeroen3 | 0:2286a98ea739 | 970 | |
jeroen3 | 0:2286a98ea739 | 971 | //flush both fifos and clear interrupts |
jeroen3 | 0:2286a98ea739 | 972 | void nrf24l01_clear_flush() |
jeroen3 | 0:2286a98ea739 | 973 | { |
jeroen3 | 0:2286a98ea739 | 974 | nrf24l01_flush_rx(); |
jeroen3 | 0:2286a98ea739 | 975 | nrf24l01_flush_tx(); |
jeroen3 | 0:2286a98ea739 | 976 | nrf24l01_irq_clear_all(); |
jeroen3 | 0:2286a98ea739 | 977 | } |
jeroen3 | 0:2286a98ea739 | 978 | |
jeroen3 | 0:2286a98ea739 | 979 | //unsigned char * data must be at least 35 bytes long |
jeroen3 | 0:2286a98ea739 | 980 | void nrf24l01_get_all_registers(unsigned char * data) |
jeroen3 | 0:2286a98ea739 | 981 | { |
jeroen3 | 0:2286a98ea739 | 982 | unsigned int outer; |
jeroen3 | 0:2286a98ea739 | 983 | unsigned int inner; |
jeroen3 | 0:2286a98ea739 | 984 | unsigned int dataloc = 0; |
jeroen3 | 0:2286a98ea739 | 985 | unsigned char buffer[5]; |
jeroen3 | 0:2286a98ea739 | 986 | |
jeroen3 | 0:2286a98ea739 | 987 | for(outer = 0; outer <= 0x17; outer++) |
jeroen3 | 0:2286a98ea739 | 988 | { |
jeroen3 | 0:2286a98ea739 | 989 | nrf24l01_read_register(outer, buffer, 5); |
jeroen3 | 0:2286a98ea739 | 990 | |
jeroen3 | 0:2286a98ea739 | 991 | for(inner = 0; inner < 5; inner++) |
jeroen3 | 0:2286a98ea739 | 992 | { |
jeroen3 | 0:2286a98ea739 | 993 | if(inner >= 1 && (outer != 0x0A && outer != 0x0B && outer != 0x10)) |
jeroen3 | 0:2286a98ea739 | 994 | break; |
jeroen3 | 0:2286a98ea739 | 995 | |
jeroen3 | 0:2286a98ea739 | 996 | data[dataloc] = buffer[inner]; |
jeroen3 | 0:2286a98ea739 | 997 | dataloc++; |
jeroen3 | 0:2286a98ea739 | 998 | } |
jeroen3 | 0:2286a98ea739 | 999 | } |
jeroen3 | 0:2286a98ea739 | 1000 | } |
jeroen3 | 0:2286a98ea739 | 1001 | |
jeroen3 | 0:2286a98ea739 | 1002 | //low-level spi send function for library use |
jeroen3 | 0:2286a98ea739 | 1003 | //the user should not call this function directly, but rather use one of the 8 SPI data instructions |
jeroen3 | 0:2286a98ea739 | 1004 | unsigned char nrf24l01_execute_command(unsigned char instruction, unsigned char * data, unsigned int len, bool copydata) |
jeroen3 | 0:2286a98ea739 | 1005 | { |
jeroen3 | 0:2286a98ea739 | 1006 | unsigned char status; |
jeroen3 | 0:2286a98ea739 | 1007 | |
jeroen3 | 0:2286a98ea739 | 1008 | nrf24l01_clear_csn(); |
jeroen3 | 0:2286a98ea739 | 1009 | |
jeroen3 | 0:2286a98ea739 | 1010 | status = instruction; |
jeroen3 | 0:2286a98ea739 | 1011 | nrf24l01_spi_send_read(&status, 1, true); |
jeroen3 | 0:2286a98ea739 | 1012 | nrf24l01_spi_send_read(data, len, copydata); |
jeroen3 | 0:2286a98ea739 | 1013 | |
jeroen3 | 0:2286a98ea739 | 1014 | nrf24l01_set_csn(); |
jeroen3 | 0:2286a98ea739 | 1015 | |
jeroen3 | 0:2286a98ea739 | 1016 | return status; |
jeroen3 | 0:2286a98ea739 | 1017 | } |
jeroen3 | 0:2286a98ea739 | 1018 | |
jeroen3 | 0:2286a98ea739 | 1019 | //low-level spi send function for library use |
jeroen3 | 0:2286a98ea739 | 1020 | //the user should not call this function directly, but rather use one of the 8 SPI data instructions |
jeroen3 | 0:2286a98ea739 | 1021 | void nrf24l01_spi_send_read(unsigned char * data, unsigned int len, bool copydata) |
jeroen3 | 0:2286a98ea739 | 1022 | { |
jeroen3 | 0:2286a98ea739 | 1023 | unsigned int count; |
jeroen3 | 0:2286a98ea739 | 1024 | unsigned char tempbyte; |
jeroen3 | 0:2286a98ea739 | 1025 | |
jeroen3 | 0:2286a98ea739 | 1026 | for(count = 0; count < len; count++) |
jeroen3 | 0:2286a98ea739 | 1027 | { |
jeroen3 | 0:2286a98ea739 | 1028 | if(copydata != false) |
jeroen3 | 0:2286a98ea739 | 1029 | data[count] = spi_send_read_byte(data[count]); |
jeroen3 | 0:2286a98ea739 | 1030 | else |
jeroen3 | 0:2286a98ea739 | 1031 | { |
jeroen3 | 0:2286a98ea739 | 1032 | tempbyte = data[count]; |
jeroen3 | 0:2286a98ea739 | 1033 | spi_send_read_byte(tempbyte); |
jeroen3 | 0:2286a98ea739 | 1034 | } |
jeroen3 | 0:2286a98ea739 | 1035 | } |
jeroen3 | 0:2286a98ea739 | 1036 | } |
jeroen3 | 0:2286a98ea739 | 1037 |