Encapsulates access to the Cypress CY14B101P nvSRAM module.

CY14B101P.cpp

Committer:
jeffcraighead
Date:
2011-07-11
Revision:
0:eec14545c442
Child:
1:0f4063d68380

File content as of revision 0:eec14545c442:

#include "CY14B101P.h"

Serial pc_(USBTX,USBRX);
//Constructor - specify mbed pins for SPI connection to memory and the SPI clock rate
NVSRAM::NVSRAM(PinName mosi, PinName miso, PinName sclk, PinName csel, int spifrequency, int spibits, int spimode) : spi_(mosi, miso, sclk), chipSel_(csel) {

    //chipSel_(csel);

    spi_.format(spibits,spimode);
    spi_.frequency(spifrequency);
    spifreq = spifrequency;
    chipSel_=1;
}

void NVSRAM::init(){
    writeStatusRegister(0x00);
}

void NVSRAM::writeBytes(char *bytes, unsigned int address, int length){
    chipSel_ = 0;
    spi_.write(WREN);
    chipSel_ = 1;
    
    chipSel_ = 0;
    
    spi_.write(WRITE);
   
    spi_.write( (char)(0x00010000 & address)>>16 );
    spi_.write( (char)(0x0000FF00 & address)>>8 );
    spi_.write( (char)(0x000000FF & address) );

    for(int i=0; i<length; i++) spi_.write(bytes[i]);

    chipSel_ = 1;
}

void NVSRAM::readBytes(char *bytes, unsigned int address, int length){
    chipSel_ = 0;

    spi_.write(READ);
    
    spi_.write( (char)(0x00010000 & address)>>16 );
    spi_.write( (char)(0x0000FF00 & address)>>8 );
    spi_.write( (char)(0x000000FF & address) );

    for(int i=0; i<length; i++) bytes[i] = spi_.write(0x00);

    chipSel_ = 1;
}

void NVSRAM::setRTC(int century, int year, int month, int dayofmonth, int dayofweek, int hour, int minute, int second){
    //RTC SPI frequency must be no greater than 25MHz, so just use half of the SRAM frequency since that has a max of 40MHz
    spi_.frequency(spifreq/2);
    chipSel_=0;
    spi_.write(WREN);
    chipSel_=1;
    
    
    //Set the SPI frequency back to the requested rate for NVRAM access.
    spi_.frequency(spifreq);
}

int NVSRAM::readRTC(){
    //RTC SPI frequency must be no greater than 25MHz, so just use half of the SRAM frequency since that has a max of 40MHz
    spi_.frequency(spifreq/2);
    
    
    
    //Set the SPI frequency back to the requested rate for NVRAM access.
    spi_.frequency(spifreq);


    return 0;
}

void NVSRAM::nvStore(){
    chipSel_=0;
    spi_.write(WREN);
    chipSel_=1;
    chipSel_=0;
    spi_.write(STORE);
    chipSel_=1;
}

void NVSRAM::nvRecall(){
    chipSel_=0;
    spi_.write(WREN);
    chipSel_=1;
    chipSel_=0;
    spi_.write(RECALL);
    chipSel_=1;
}

void NVSRAM::enableAutoStore(bool enable){
    chipSel_=0;
    spi_.write(WREN);
    chipSel_=1;
    chipSel_=0;
    if(enable) spi_.write(ASENB);
    else spi_.write(ASDISB);
    chipSel_=1;
}

void NVSRAM::writeStatusRegister(char status){
    chipSel_=0;
    spi_.write(WREN);
    chipSel_=1;
    chipSel_=0;
    spi_.write(WRSR);
    spi_.write(status);
    chipSel_=1;
}

char NVSRAM::readStatusRegister(){
    chipSel_ = 0;
    spi_.write(RDSR);
    char out = spi_.write(0x00);
    chipSel_ = 1;
    
    return out;
}