Jinbuhm Kim / Mbed 2 deprecated W5500_Driver

Wiznet W5500 driver and TCP/UDP loopback

Dependencies:   mbed

Ethernet/wizchip_conf.c@0:2513c6696bdc, 2013-12-13 (annotated)

Committer:
jbkim
Date:
Fri Dec 13 07:35:58 2013 +0000
Revision:
0:2513c6696bdc
Wiznet W5500 library and TCP/UDP loopback program for mbed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jbkim 0:2513c6696bdc 1 /* Wiznet W5500 Library
jbkim 0:2513c6696bdc 2 * Copyright (c) 2013, WIZnet Co., LTD.
jbkim 0:2513c6696bdc 3 *
jbkim 0:2513c6696bdc 4 * Licensed under the Apache License, Version 2.0 (the "License");
jbkim 0:2513c6696bdc 5 * you may not use this file except in compliance with the License.
jbkim 0:2513c6696bdc 6 * You may obtain a copy of the License at
jbkim 0:2513c6696bdc 7 *
jbkim 0:2513c6696bdc 8 * http://www.apache.org/licenses/LICENSE-2.0
jbkim 0:2513c6696bdc 9 *
jbkim 0:2513c6696bdc 10 * Unless required by applicable law or agreed to in writing, software
jbkim 0:2513c6696bdc 11 * distributed under the License is distributed on an "AS IS" BASIS,
jbkim 0:2513c6696bdc 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
jbkim 0:2513c6696bdc 13 * See the License for the specific language governing permissions and
jbkim 0:2513c6696bdc 14 * limitations under the License.
jbkim 0:2513c6696bdc 15 */
jbkim 0:2513c6696bdc 16
jbkim 0:2513c6696bdc 17 #include "wizchip_conf.h"
jbkim 0:2513c6696bdc 18 /**
jbkim 0:2513c6696bdc 19 * @brief Default function to enable interrupt.
jbkim 0:2513c6696bdc 20 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
jbkim 0:2513c6696bdc 21 * null function is called.
jbkim 0:2513c6696bdc 22 */
jbkim 0:2513c6696bdc 23 void wizchip_cris_enter(void) {};
jbkim 0:2513c6696bdc 24 /**
jbkim 0:2513c6696bdc 25 * @brief Default function to disable interrupt.
jbkim 0:2513c6696bdc 26 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
jbkim 0:2513c6696bdc 27 * null function is called.
jbkim 0:2513c6696bdc 28 */
jbkim 0:2513c6696bdc 29 void wizchip_cris_exit(void) {};
jbkim 0:2513c6696bdc 30 /**
jbkim 0:2513c6696bdc 31 * @brief Default function to select chip.
jbkim 0:2513c6696bdc 32 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
jbkim 0:2513c6696bdc 33 * null function is called.
jbkim 0:2513c6696bdc 34 */
jbkim 0:2513c6696bdc 35 void wizchip_cs_select(void) {};
jbkim 0:2513c6696bdc 36 /**
jbkim 0:2513c6696bdc 37 * @brief Default function to deselect chip.
jbkim 0:2513c6696bdc 38 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
jbkim 0:2513c6696bdc 39 * null function is called.
jbkim 0:2513c6696bdc 40 */
jbkim 0:2513c6696bdc 41 void wizchip_cs_deselect(void) {};
jbkim 0:2513c6696bdc 42 /**
jbkim 0:2513c6696bdc 43 * @brief Default function to read in SPI interface.
jbkim 0:2513c6696bdc 44 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
jbkim 0:2513c6696bdc 45 * null function is called.
jbkim 0:2513c6696bdc 46 */
jbkim 0:2513c6696bdc 47 uint8_t wizchip_spi_readbyte(void) {return 0;};
jbkim 0:2513c6696bdc 48 /**
jbkim 0:2513c6696bdc 49 * @brief Default function to write in SPI interface.
jbkim 0:2513c6696bdc 50 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
jbkim 0:2513c6696bdc 51 * null function is called.
jbkim 0:2513c6696bdc 52 */
jbkim 0:2513c6696bdc 53 void wizchip_spi_writebyte(uint8_t wb) {};
jbkim 0:2513c6696bdc 54
jbkim 0:2513c6696bdc 55 /**
jbkim 0:2513c6696bdc 56 * @\ref _WIZCHIP instance
jbkim 0:2513c6696bdc 57 */
jbkim 0:2513c6696bdc 58 _WIZCHIP WIZCHIP =
jbkim 0:2513c6696bdc 59 {
jbkim 0:2513c6696bdc 60 .CRIS._enter = wizchip_cris_enter,
jbkim 0:2513c6696bdc 61 .CRIS._exit = wizchip_cris_exit,
jbkim 0:2513c6696bdc 62 .CS._select = wizchip_cs_select,
jbkim 0:2513c6696bdc 63 .CS._deselect = wizchip_cs_deselect,
jbkim 0:2513c6696bdc 64 .IF.SPI._read_byte = wizchip_spi_readbyte,
jbkim 0:2513c6696bdc 65 .IF.SPI._write_byte = wizchip_spi_writebyte
jbkim 0:2513c6696bdc 66 };
jbkim 0:2513c6696bdc 67
jbkim 0:2513c6696bdc 68 static uint8_t _DNS_[4]; // DNS server ip address
jbkim 0:2513c6696bdc 69 static dhcp_mode _DHCP_; // DHCP mode
jbkim 0:2513c6696bdc 70
jbkim 0:2513c6696bdc 71 void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
jbkim 0:2513c6696bdc 72 {
jbkim 0:2513c6696bdc 73 if(!cris_en || !cris_ex)
jbkim 0:2513c6696bdc 74 {
jbkim 0:2513c6696bdc 75 WIZCHIP.CRIS._enter = wizchip_cris_enter;
jbkim 0:2513c6696bdc 76 WIZCHIP.CRIS._exit = wizchip_cris_exit;
jbkim 0:2513c6696bdc 77 }
jbkim 0:2513c6696bdc 78 else
jbkim 0:2513c6696bdc 79 {
jbkim 0:2513c6696bdc 80 WIZCHIP.CRIS._enter = cris_en;
jbkim 0:2513c6696bdc 81 WIZCHIP.CRIS._exit = cris_ex;
jbkim 0:2513c6696bdc 82 }
jbkim 0:2513c6696bdc 83 }
jbkim 0:2513c6696bdc 84
jbkim 0:2513c6696bdc 85 void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
jbkim 0:2513c6696bdc 86 {
jbkim 0:2513c6696bdc 87 if(!cs_sel || !cs_desel)
jbkim 0:2513c6696bdc 88 {
jbkim 0:2513c6696bdc 89 WIZCHIP.CS._select = wizchip_cs_select;
jbkim 0:2513c6696bdc 90 WIZCHIP.CS._deselect = wizchip_cs_deselect;
jbkim 0:2513c6696bdc 91 }
jbkim 0:2513c6696bdc 92 else
jbkim 0:2513c6696bdc 93 {
jbkim 0:2513c6696bdc 94 WIZCHIP.CS._select = cs_sel;
jbkim 0:2513c6696bdc 95 WIZCHIP.CS._deselect = cs_desel;
jbkim 0:2513c6696bdc 96 }
jbkim 0:2513c6696bdc 97 }
jbkim 0:2513c6696bdc 98
jbkim 0:2513c6696bdc 99
jbkim 0:2513c6696bdc 100 void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb))
jbkim 0:2513c6696bdc 101 {
jbkim 0:2513c6696bdc 102
jbkim 0:2513c6696bdc 103 if(!spi_rb || !spi_wb)
jbkim 0:2513c6696bdc 104 {
jbkim 0:2513c6696bdc 105 WIZCHIP.IF.SPI._read_byte = wizchip_spi_readbyte;
jbkim 0:2513c6696bdc 106 WIZCHIP.IF.SPI._write_byte = wizchip_spi_writebyte;
jbkim 0:2513c6696bdc 107 }
jbkim 0:2513c6696bdc 108 else
jbkim 0:2513c6696bdc 109 {
jbkim 0:2513c6696bdc 110 WIZCHIP.IF.SPI._read_byte = spi_rb;
jbkim 0:2513c6696bdc 111 WIZCHIP.IF.SPI._write_byte = spi_wb;
jbkim 0:2513c6696bdc 112 }
jbkim 0:2513c6696bdc 113 }
jbkim 0:2513c6696bdc 114
jbkim 0:2513c6696bdc 115 int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
jbkim 0:2513c6696bdc 116 {
jbkim 0:2513c6696bdc 117 uint8_t tmp = 0;
jbkim 0:2513c6696bdc 118 uint8_t* ptmp[2] = {0,0};
jbkim 0:2513c6696bdc 119
jbkim 0:2513c6696bdc 120 switch(cwtype)
jbkim 0:2513c6696bdc 121 {
jbkim 0:2513c6696bdc 122 case CW_RESET_WIZCHIP:
jbkim 0:2513c6696bdc 123 wizchip_sw_reset();
jbkim 0:2513c6696bdc 124 break;
jbkim 0:2513c6696bdc 125 case CW_INIT_WIZCHIP:
jbkim 0:2513c6696bdc 126 if(arg != 0)
jbkim 0:2513c6696bdc 127 {
jbkim 0:2513c6696bdc 128 ptmp[0] = (uint8_t*)arg;
jbkim 0:2513c6696bdc 129 ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
jbkim 0:2513c6696bdc 130 }
jbkim 0:2513c6696bdc 131 return wizchip_init(ptmp[0], ptmp[1]);
jbkim 0:2513c6696bdc 132 case CW_CLR_INTERRUPT:
jbkim 0:2513c6696bdc 133 wizchip_clrinterrupt(*((intr_kind*)arg));
jbkim 0:2513c6696bdc 134 break;
jbkim 0:2513c6696bdc 135 case CW_GET_INTERRUPT:
jbkim 0:2513c6696bdc 136 *((intr_kind*)arg) = wizchip_getinterrupt();
jbkim 0:2513c6696bdc 137 break;
jbkim 0:2513c6696bdc 138 case CW_SET_INTRMASK:
jbkim 0:2513c6696bdc 139 wizchip_setinterruptmask(*((intr_kind*)arg));
jbkim 0:2513c6696bdc 140 break;
jbkim 0:2513c6696bdc 141 case CW_GET_INTRMASK:
jbkim 0:2513c6696bdc 142 *((intr_kind*)arg) = wizchip_getinterruptmask();
jbkim 0:2513c6696bdc 143 break;
jbkim 0:2513c6696bdc 144 case CW_SET_INTRTIME:
jbkim 0:2513c6696bdc 145 setINTLEVEL(*(uint16_t*)arg);
jbkim 0:2513c6696bdc 146 break;
jbkim 0:2513c6696bdc 147 case CW_GET_INTRTIME:
jbkim 0:2513c6696bdc 148 *(uint16_t*)arg = getINTLEVEL();
jbkim 0:2513c6696bdc 149 break;
jbkim 0:2513c6696bdc 150 case CW_RESET_PHY:
jbkim 0:2513c6696bdc 151 wizphy_reset();
jbkim 0:2513c6696bdc 152 break;
jbkim 0:2513c6696bdc 153 case CW_SET_PHYCONF:
jbkim 0:2513c6696bdc 154 wizphy_setphyconf((wiz_PhyConf*)arg);
jbkim 0:2513c6696bdc 155 break;
jbkim 0:2513c6696bdc 156 case CW_GET_PHYCONF:
jbkim 0:2513c6696bdc 157 wizphy_getphyconf((wiz_PhyConf*)arg);
jbkim 0:2513c6696bdc 158 break;
jbkim 0:2513c6696bdc 159 case CW_GET_PHYSTATUS:
jbkim 0:2513c6696bdc 160 break;
jbkim 0:2513c6696bdc 161 case CW_SET_PHYPOWMODE:
jbkim 0:2513c6696bdc 162 return wizphy_setphypmode(*(uint8_t*)arg);
jbkim 0:2513c6696bdc 163 case CW_GET_PHYPOWMODE:
jbkim 0:2513c6696bdc 164 tmp = wizphy_getphypmode();
jbkim 0:2513c6696bdc 165 if((int8_t)tmp == -1) return -1;
jbkim 0:2513c6696bdc 166 *(uint8_t*)arg = tmp;
jbkim 0:2513c6696bdc 167 break;
jbkim 0:2513c6696bdc 168 case CW_GET_PHYLINK:
jbkim 0:2513c6696bdc 169 tmp = wizphy_getphylink();
jbkim 0:2513c6696bdc 170 if((int8_t)tmp == -1) return -1;
jbkim 0:2513c6696bdc 171 *(uint8_t*)arg = tmp;
jbkim 0:2513c6696bdc 172 break;
jbkim 0:2513c6696bdc 173 default:
jbkim 0:2513c6696bdc 174 return -1;
jbkim 0:2513c6696bdc 175 }
jbkim 0:2513c6696bdc 176 return 0;
jbkim 0:2513c6696bdc 177 }
jbkim 0:2513c6696bdc 178
jbkim 0:2513c6696bdc 179
jbkim 0:2513c6696bdc 180 int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
jbkim 0:2513c6696bdc 181 {
jbkim 0:2513c6696bdc 182
jbkim 0:2513c6696bdc 183 switch(cntype)
jbkim 0:2513c6696bdc 184 {
jbkim 0:2513c6696bdc 185 case CN_SET_NETINFO:
jbkim 0:2513c6696bdc 186 wizchip_setnetinfo((wiz_NetInfo*)arg);
jbkim 0:2513c6696bdc 187 break;
jbkim 0:2513c6696bdc 188 case CN_GET_NETINFO:
jbkim 0:2513c6696bdc 189 wizchip_getnetinfo((wiz_NetInfo*)arg);
jbkim 0:2513c6696bdc 190 break;
jbkim 0:2513c6696bdc 191 case CN_SET_NETMODE:
jbkim 0:2513c6696bdc 192 return wizchip_setnetmode(*(netmode_type*)arg);
jbkim 0:2513c6696bdc 193 case CN_GET_NETMODE:
jbkim 0:2513c6696bdc 194 *(netmode_type*)arg = wizchip_getnetmode();
jbkim 0:2513c6696bdc 195 break;
jbkim 0:2513c6696bdc 196 case CN_SET_TIMEOUT:
jbkim 0:2513c6696bdc 197 wizchip_settimeout((wiz_NetTimeout*)arg);
jbkim 0:2513c6696bdc 198 break;
jbkim 0:2513c6696bdc 199 case CN_GET_TIMEOUT:
jbkim 0:2513c6696bdc 200 wizchip_gettimeout((wiz_NetTimeout*)arg);
jbkim 0:2513c6696bdc 201 break;
jbkim 0:2513c6696bdc 202 default:
jbkim 0:2513c6696bdc 203 return -1;
jbkim 0:2513c6696bdc 204 }
jbkim 0:2513c6696bdc 205 return 0;
jbkim 0:2513c6696bdc 206 }
jbkim 0:2513c6696bdc 207
jbkim 0:2513c6696bdc 208 void wizchip_sw_reset(void)
jbkim 0:2513c6696bdc 209 {
jbkim 0:2513c6696bdc 210 uint8_t gw[4], sn[4], sip[4];
jbkim 0:2513c6696bdc 211 uint8_t mac[6];
jbkim 0:2513c6696bdc 212
jbkim 0:2513c6696bdc 213 getSHAR(mac);
jbkim 0:2513c6696bdc 214 getGAR(gw); getSUBR(sn); getSIPR(sip);
jbkim 0:2513c6696bdc 215 setMR(MR_RST);
jbkim 0:2513c6696bdc 216 getMR(); // for delay
jbkim 0:2513c6696bdc 217 setSHAR(mac);
jbkim 0:2513c6696bdc 218 setGAR(gw);
jbkim 0:2513c6696bdc 219 setSUBR(sn);
jbkim 0:2513c6696bdc 220 setSIPR(sip);
jbkim 0:2513c6696bdc 221 }
jbkim 0:2513c6696bdc 222
jbkim 0:2513c6696bdc 223 int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
jbkim 0:2513c6696bdc 224 {
jbkim 0:2513c6696bdc 225 int8_t i;
jbkim 0:2513c6696bdc 226 int8_t tmp = 0;
jbkim 0:2513c6696bdc 227
jbkim 0:2513c6696bdc 228 wizchip_sw_reset();
jbkim 0:2513c6696bdc 229 if(txsize)
jbkim 0:2513c6696bdc 230 {
jbkim 0:2513c6696bdc 231 tmp = 0;
jbkim 0:2513c6696bdc 232 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
jbkim 0:2513c6696bdc 233 tmp += txsize[i];
jbkim 0:2513c6696bdc 234 if(tmp > 16) return -1;
jbkim 0:2513c6696bdc 235 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
jbkim 0:2513c6696bdc 236 setSn_TXBUF_SIZE(i, txsize[i]);
jbkim 0:2513c6696bdc 237 }
jbkim 0:2513c6696bdc 238 if(rxsize)
jbkim 0:2513c6696bdc 239 {
jbkim 0:2513c6696bdc 240 tmp = 0;
jbkim 0:2513c6696bdc 241 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
jbkim 0:2513c6696bdc 242 tmp += rxsize[i];
jbkim 0:2513c6696bdc 243 if(tmp > 16) return -1;
jbkim 0:2513c6696bdc 244 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
jbkim 0:2513c6696bdc 245 setSn_RXBUF_SIZE(i, rxsize[i]);
jbkim 0:2513c6696bdc 246 }
jbkim 0:2513c6696bdc 247 return 0;
jbkim 0:2513c6696bdc 248 }
jbkim 0:2513c6696bdc 249
jbkim 0:2513c6696bdc 250 void wizchip_clrinterrupt(intr_kind intr)
jbkim 0:2513c6696bdc 251 {
jbkim 0:2513c6696bdc 252 uint8_t ir = (uint8_t)intr;
jbkim 0:2513c6696bdc 253 uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
jbkim 0:2513c6696bdc 254
jbkim 0:2513c6696bdc 255 setIR(ir);
jbkim 0:2513c6696bdc 256 setSIR(sir);
jbkim 0:2513c6696bdc 257 }
jbkim 0:2513c6696bdc 258
jbkim 0:2513c6696bdc 259 intr_kind wizchip_getinterrupt(void)
jbkim 0:2513c6696bdc 260 {
jbkim 0:2513c6696bdc 261 uint8_t ir = 0;
jbkim 0:2513c6696bdc 262 uint8_t sir = 0;
jbkim 0:2513c6696bdc 263 uint16_t ret = 0;
jbkim 0:2513c6696bdc 264
jbkim 0:2513c6696bdc 265 ir = getIR();
jbkim 0:2513c6696bdc 266 sir = getSIR();
jbkim 0:2513c6696bdc 267
jbkim 0:2513c6696bdc 268 ret = sir;
jbkim 0:2513c6696bdc 269 ret = (ret << 8) + ir;
jbkim 0:2513c6696bdc 270 return (intr_kind)ret;
jbkim 0:2513c6696bdc 271 }
jbkim 0:2513c6696bdc 272
jbkim 0:2513c6696bdc 273 void wizchip_setinterruptmask(intr_kind intr)
jbkim 0:2513c6696bdc 274 {
jbkim 0:2513c6696bdc 275 uint8_t imr = (uint8_t)intr;
jbkim 0:2513c6696bdc 276 uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
jbkim 0:2513c6696bdc 277
jbkim 0:2513c6696bdc 278 setIMR(imr);
jbkim 0:2513c6696bdc 279 setSIMR(simr);
jbkim 0:2513c6696bdc 280 }
jbkim 0:2513c6696bdc 281
jbkim 0:2513c6696bdc 282 intr_kind wizchip_getinterruptmask(void)
jbkim 0:2513c6696bdc 283 {
jbkim 0:2513c6696bdc 284 uint8_t imr = 0;
jbkim 0:2513c6696bdc 285 uint8_t simr = 0;
jbkim 0:2513c6696bdc 286 uint16_t ret = 0;
jbkim 0:2513c6696bdc 287
jbkim 0:2513c6696bdc 288 imr = getIMR();
jbkim 0:2513c6696bdc 289 simr = getSIMR();
jbkim 0:2513c6696bdc 290
jbkim 0:2513c6696bdc 291 ret = simr;
jbkim 0:2513c6696bdc 292 ret = (ret << 8) + imr;
jbkim 0:2513c6696bdc 293 return (intr_kind)ret;
jbkim 0:2513c6696bdc 294 }
jbkim 0:2513c6696bdc 295
jbkim 0:2513c6696bdc 296 int8_t wizphy_getphylink(void)
jbkim 0:2513c6696bdc 297 {
jbkim 0:2513c6696bdc 298 int8_t tmp;
jbkim 0:2513c6696bdc 299
jbkim 0:2513c6696bdc 300 if(getPHYCFGR() & PHYCFGR_LNK_ON)
jbkim 0:2513c6696bdc 301 tmp = PHY_LINK_ON;
jbkim 0:2513c6696bdc 302 else
jbkim 0:2513c6696bdc 303 tmp = PHY_LINK_OFF;
jbkim 0:2513c6696bdc 304 return tmp;
jbkim 0:2513c6696bdc 305 }
jbkim 0:2513c6696bdc 306
jbkim 0:2513c6696bdc 307
jbkim 0:2513c6696bdc 308 int8_t wizphy_getphypmode(void)
jbkim 0:2513c6696bdc 309 {
jbkim 0:2513c6696bdc 310 int8_t tmp = 0;
jbkim 0:2513c6696bdc 311
jbkim 0:2513c6696bdc 312 if(getPHYCFGR() & PHYCFGR_OPMDC_PDOWN)
jbkim 0:2513c6696bdc 313 tmp = PHY_POWER_DOWN;
jbkim 0:2513c6696bdc 314 else
jbkim 0:2513c6696bdc 315 tmp = PHY_POWER_NORM;
jbkim 0:2513c6696bdc 316
jbkim 0:2513c6696bdc 317 return tmp;
jbkim 0:2513c6696bdc 318 }
jbkim 0:2513c6696bdc 319
jbkim 0:2513c6696bdc 320 void wizphy_reset(void)
jbkim 0:2513c6696bdc 321 {
jbkim 0:2513c6696bdc 322 uint8_t tmp = getPHYCFGR();
jbkim 0:2513c6696bdc 323
jbkim 0:2513c6696bdc 324 tmp &= PHYCFGR_RST;
jbkim 0:2513c6696bdc 325 setPHYCFGR(tmp);
jbkim 0:2513c6696bdc 326 tmp = getPHYCFGR();
jbkim 0:2513c6696bdc 327 tmp |= ~PHYCFGR_RST;
jbkim 0:2513c6696bdc 328 setPHYCFGR(tmp);
jbkim 0:2513c6696bdc 329 }
jbkim 0:2513c6696bdc 330
jbkim 0:2513c6696bdc 331 void wizphy_setphyconf(wiz_PhyConf* phyconf)
jbkim 0:2513c6696bdc 332 {
jbkim 0:2513c6696bdc 333 uint8_t tmp = 0;
jbkim 0:2513c6696bdc 334
jbkim 0:2513c6696bdc 335 if(phyconf->by == PHY_CONFBY_SW)
jbkim 0:2513c6696bdc 336 tmp |= PHYCFGR_OPMD;
jbkim 0:2513c6696bdc 337 else
jbkim 0:2513c6696bdc 338 tmp &= ~PHYCFGR_OPMD;
jbkim 0:2513c6696bdc 339 if(phyconf->mode == PHY_MODE_AUTONEGO)
jbkim 0:2513c6696bdc 340 tmp |= PHYCFGR_OPMDC_ALLA;
jbkim 0:2513c6696bdc 341 else
jbkim 0:2513c6696bdc 342 {
jbkim 0:2513c6696bdc 343 if(phyconf->duplex == PHY_DUPLEX_FULL)
jbkim 0:2513c6696bdc 344 {
jbkim 0:2513c6696bdc 345 if(phyconf->speed == PHY_SPEED_100)
jbkim 0:2513c6696bdc 346 tmp |= PHYCFGR_OPMDC_100F;
jbkim 0:2513c6696bdc 347 else
jbkim 0:2513c6696bdc 348 tmp |= PHYCFGR_OPMDC_10F;
jbkim 0:2513c6696bdc 349 }
jbkim 0:2513c6696bdc 350 else
jbkim 0:2513c6696bdc 351 {
jbkim 0:2513c6696bdc 352 if(phyconf->speed == PHY_SPEED_100)
jbkim 0:2513c6696bdc 353 tmp |= PHYCFGR_OPMDC_100H;
jbkim 0:2513c6696bdc 354 else
jbkim 0:2513c6696bdc 355 tmp |= PHYCFGR_OPMDC_10H;
jbkim 0:2513c6696bdc 356 }
jbkim 0:2513c6696bdc 357 }
jbkim 0:2513c6696bdc 358 setPHYCFGR(tmp);
jbkim 0:2513c6696bdc 359 wizphy_reset();
jbkim 0:2513c6696bdc 360 }
jbkim 0:2513c6696bdc 361
jbkim 0:2513c6696bdc 362 void wizphy_getphyconf(wiz_PhyConf* phyconf)
jbkim 0:2513c6696bdc 363 {
jbkim 0:2513c6696bdc 364 uint8_t tmp = 0;
jbkim 0:2513c6696bdc 365
jbkim 0:2513c6696bdc 366 tmp = getPHYCFGR();
jbkim 0:2513c6696bdc 367 phyconf->by = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW;
jbkim 0:2513c6696bdc 368 switch(tmp & PHYCFGR_OPMDC_ALLA)
jbkim 0:2513c6696bdc 369 {
jbkim 0:2513c6696bdc 370 case PHYCFGR_OPMDC_ALLA:
jbkim 0:2513c6696bdc 371 case PHYCFGR_OPMDC_100FA:
jbkim 0:2513c6696bdc 372 phyconf->mode = PHY_MODE_AUTONEGO;
jbkim 0:2513c6696bdc 373 break;
jbkim 0:2513c6696bdc 374 default:
jbkim 0:2513c6696bdc 375 phyconf->mode = PHY_MODE_MANUAL;
jbkim 0:2513c6696bdc 376 break;
jbkim 0:2513c6696bdc 377 }
jbkim 0:2513c6696bdc 378 switch(tmp & PHYCFGR_OPMDC_ALLA)
jbkim 0:2513c6696bdc 379 {
jbkim 0:2513c6696bdc 380 case PHYCFGR_OPMDC_100FA:
jbkim 0:2513c6696bdc 381 case PHYCFGR_OPMDC_100F:
jbkim 0:2513c6696bdc 382 case PHYCFGR_OPMDC_100H:
jbkim 0:2513c6696bdc 383 phyconf->speed = PHY_SPEED_100;
jbkim 0:2513c6696bdc 384 break;
jbkim 0:2513c6696bdc 385 default:
jbkim 0:2513c6696bdc 386 phyconf->speed = PHY_SPEED_10;
jbkim 0:2513c6696bdc 387 break;
jbkim 0:2513c6696bdc 388 }
jbkim 0:2513c6696bdc 389 switch(tmp & PHYCFGR_OPMDC_ALLA)
jbkim 0:2513c6696bdc 390 {
jbkim 0:2513c6696bdc 391 case PHYCFGR_OPMDC_100FA:
jbkim 0:2513c6696bdc 392 case PHYCFGR_OPMDC_100F:
jbkim 0:2513c6696bdc 393 case PHYCFGR_OPMDC_10F:
jbkim 0:2513c6696bdc 394 phyconf->duplex = PHY_DUPLEX_FULL;
jbkim 0:2513c6696bdc 395 break;
jbkim 0:2513c6696bdc 396 default:
jbkim 0:2513c6696bdc 397 phyconf->duplex = PHY_DUPLEX_HALF;
jbkim 0:2513c6696bdc 398 break;
jbkim 0:2513c6696bdc 399 }
jbkim 0:2513c6696bdc 400 }
jbkim 0:2513c6696bdc 401
jbkim 0:2513c6696bdc 402 void wizphy_getphystat(wiz_PhyConf* phyconf)
jbkim 0:2513c6696bdc 403 {
jbkim 0:2513c6696bdc 404 uint8_t tmp = getPHYCFGR();
jbkim 0:2513c6696bdc 405
jbkim 0:2513c6696bdc 406 phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
jbkim 0:2513c6696bdc 407 phyconf->speed = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10;
jbkim 0:2513c6696bdc 408 }
jbkim 0:2513c6696bdc 409
jbkim 0:2513c6696bdc 410 int8_t wizphy_setphypmode(uint8_t pmode)
jbkim 0:2513c6696bdc 411 {
jbkim 0:2513c6696bdc 412 uint8_t tmp = 0;
jbkim 0:2513c6696bdc 413
jbkim 0:2513c6696bdc 414 tmp = getPHYCFGR();
jbkim 0:2513c6696bdc 415 if((tmp & PHYCFGR_OPMD)== 0) return -1;
jbkim 0:2513c6696bdc 416 tmp &= ~PHYCFGR_OPMDC_ALLA;
jbkim 0:2513c6696bdc 417 if( pmode == PHY_POWER_DOWN)
jbkim 0:2513c6696bdc 418 tmp |= PHYCFGR_OPMDC_PDOWN;
jbkim 0:2513c6696bdc 419 else
jbkim 0:2513c6696bdc 420 tmp |= PHYCFGR_OPMDC_ALLA;
jbkim 0:2513c6696bdc 421 setPHYCFGR(tmp);
jbkim 0:2513c6696bdc 422 wizphy_reset();
jbkim 0:2513c6696bdc 423 tmp = getPHYCFGR();
jbkim 0:2513c6696bdc 424 if( pmode == PHY_POWER_DOWN)
jbkim 0:2513c6696bdc 425 {
jbkim 0:2513c6696bdc 426 if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
jbkim 0:2513c6696bdc 427 }
jbkim 0:2513c6696bdc 428 else
jbkim 0:2513c6696bdc 429 {
jbkim 0:2513c6696bdc 430 if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
jbkim 0:2513c6696bdc 431 }
jbkim 0:2513c6696bdc 432 return -1;
jbkim 0:2513c6696bdc 433 }
jbkim 0:2513c6696bdc 434
jbkim 0:2513c6696bdc 435
jbkim 0:2513c6696bdc 436 void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
jbkim 0:2513c6696bdc 437 {
jbkim 0:2513c6696bdc 438 setSHAR(pnetinfo->mac);
jbkim 0:2513c6696bdc 439 setGAR(pnetinfo->gw);
jbkim 0:2513c6696bdc 440 setSUBR(pnetinfo->sn);
jbkim 0:2513c6696bdc 441 setSIPR(pnetinfo->ip);
jbkim 0:2513c6696bdc 442 _DNS_[0] = pnetinfo->dns[0];
jbkim 0:2513c6696bdc 443 _DNS_[1] = pnetinfo->dns[1];
jbkim 0:2513c6696bdc 444 _DNS_[2] = pnetinfo->dns[2];
jbkim 0:2513c6696bdc 445 _DNS_[3] = pnetinfo->dns[3];
jbkim 0:2513c6696bdc 446 _DHCP_ = pnetinfo->dhcp;
jbkim 0:2513c6696bdc 447 }
jbkim 0:2513c6696bdc 448
jbkim 0:2513c6696bdc 449 void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
jbkim 0:2513c6696bdc 450 {
jbkim 0:2513c6696bdc 451 getSHAR(pnetinfo->mac);
jbkim 0:2513c6696bdc 452 getGAR(pnetinfo->gw);
jbkim 0:2513c6696bdc 453 getSUBR(pnetinfo->sn);
jbkim 0:2513c6696bdc 454 getSIPR(pnetinfo->ip);
jbkim 0:2513c6696bdc 455 pnetinfo->dns[0]= _DNS_[0];
jbkim 0:2513c6696bdc 456 pnetinfo->dns[1]= _DNS_[1];
jbkim 0:2513c6696bdc 457 pnetinfo->dns[2]= _DNS_[2];
jbkim 0:2513c6696bdc 458 pnetinfo->dns[3]= _DNS_[3];
jbkim 0:2513c6696bdc 459 pnetinfo->dhcp = _DHCP_;
jbkim 0:2513c6696bdc 460 }
jbkim 0:2513c6696bdc 461
jbkim 0:2513c6696bdc 462 int8_t wizchip_setnetmode(netmode_type netmode)
jbkim 0:2513c6696bdc 463 {
jbkim 0:2513c6696bdc 464 uint8_t tmp = 0;
jbkim 0:2513c6696bdc 465
jbkim 0:2513c6696bdc 466 if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1;
jbkim 0:2513c6696bdc 467
jbkim 0:2513c6696bdc 468 tmp = getMR();
jbkim 0:2513c6696bdc 469 tmp |= (uint8_t)netmode;
jbkim 0:2513c6696bdc 470 setMR(tmp);
jbkim 0:2513c6696bdc 471 return 0;
jbkim 0:2513c6696bdc 472 }
jbkim 0:2513c6696bdc 473
jbkim 0:2513c6696bdc 474 netmode_type wizchip_getnetmode(void)
jbkim 0:2513c6696bdc 475 {
jbkim 0:2513c6696bdc 476 return (netmode_type) getMR();
jbkim 0:2513c6696bdc 477 }
jbkim 0:2513c6696bdc 478
jbkim 0:2513c6696bdc 479 void wizchip_settimeout(wiz_NetTimeout* nettime)
jbkim 0:2513c6696bdc 480 {
jbkim 0:2513c6696bdc 481 setRCR(nettime->retry_cnt);
jbkim 0:2513c6696bdc 482 setRTR(nettime->time_100us);
jbkim 0:2513c6696bdc 483 }
jbkim 0:2513c6696bdc 484
jbkim 0:2513c6696bdc 485 void wizchip_gettimeout(wiz_NetTimeout* nettime)
jbkim 0:2513c6696bdc 486 {
jbkim 0:2513c6696bdc 487 nettime->retry_cnt = getRCR();
jbkim 0:2513c6696bdc 488 nettime->time_100us = getRTR();
jbkim 0:2513c6696bdc 489 }