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Dependencies:   mbed TextLCD

MCP23017.h@22:c024b20a0e2d, 2018-06-13 (annotated)

Committer:
jasminealice
Date:
Wed Jun 13 09:06:55 2018 +0000
Revision:
22:c024b20a0e2d
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jasminealice 22:c024b20a0e2d 1 /* MCP23017 - drive the Microchip MCP23017 16-bit Port Extender using I2C
jasminealice 22:c024b20a0e2d 2 * Copyright (c) 2010 Wim Huiskamp, Romilly Cocking (original version for SPI)
jasminealice 22:c024b20a0e2d 3 *
jasminealice 22:c024b20a0e2d 4 * Changed by Jacco van Splunter:
jasminealice 22:c024b20a0e2d 5 * The _read and _write functions are moved from protected -> public
jasminealice 22:c024b20a0e2d 6 *
jasminealice 22:c024b20a0e2d 7 * Released under the MIT License: http://mbed.org/license/mit
jasminealice 22:c024b20a0e2d 8 *
jasminealice 22:c024b20a0e2d 9 * version 0.2 Initial Release
jasminealice 22:c024b20a0e2d 10 * version 0.3 Cleaned up
jasminealice 22:c024b20a0e2d 11 * version 0.4 Fixed problem with _read method
jasminealice 22:c024b20a0e2d 12 * version 0.5 Added support for 'Banked' access to registers
jasminealice 22:c024b20a0e2d 13 */
jasminealice 22:c024b20a0e2d 14 #include "mbed.h"
jasminealice 22:c024b20a0e2d 15
jasminealice 22:c024b20a0e2d 16 #ifndef MCP23017_H
jasminealice 22:c024b20a0e2d 17 #define MCP23017_H
jasminealice 22:c024b20a0e2d 18
jasminealice 22:c024b20a0e2d 19 // All register addresses assume IOCON.BANK = 0 (POR default)
jasminealice 22:c024b20a0e2d 20 #define IODIRA 0x00
jasminealice 22:c024b20a0e2d 21 #define IODIRB 0x01
jasminealice 22:c024b20a0e2d 22 #define IPOLA 0x02
jasminealice 22:c024b20a0e2d 23 #define IPOLB 0x03
jasminealice 22:c024b20a0e2d 24 #define GPINTENA 0x04
jasminealice 22:c024b20a0e2d 25 #define GPINTENB 0x05
jasminealice 22:c024b20a0e2d 26 #define DEFVALA 0x06
jasminealice 22:c024b20a0e2d 27 #define DEFVALB 0x07
jasminealice 22:c024b20a0e2d 28 #define INTCONA 0x08
jasminealice 22:c024b20a0e2d 29 #define INTCONB 0x09
jasminealice 22:c024b20a0e2d 30 #define IOCONA 0x0A
jasminealice 22:c024b20a0e2d 31 #define IOCONB 0x0B
jasminealice 22:c024b20a0e2d 32 #define GPPUA 0x0C
jasminealice 22:c024b20a0e2d 33 #define GPPUB 0x0D
jasminealice 22:c024b20a0e2d 34 #define INTFA 0x0E
jasminealice 22:c024b20a0e2d 35 #define INTFB 0x0F
jasminealice 22:c024b20a0e2d 36 #define INTCAPA 0x10
jasminealice 22:c024b20a0e2d 37 #define INTCAPB 0x11
jasminealice 22:c024b20a0e2d 38 #define GPIOA 0x12
jasminealice 22:c024b20a0e2d 39 #define GPIOB 0x13
jasminealice 22:c024b20a0e2d 40 #define OLATA 0x14
jasminealice 22:c024b20a0e2d 41 #define OLATB 0x15
jasminealice 22:c024b20a0e2d 42
jasminealice 22:c024b20a0e2d 43 // The following register addresses assume IOCON.BANK = 1
jasminealice 22:c024b20a0e2d 44 #define IODIRA_BNK 0x00
jasminealice 22:c024b20a0e2d 45 #define IPOLA_BNK 0x01
jasminealice 22:c024b20a0e2d 46 #define GPINTENA_BNK 0x02
jasminealice 22:c024b20a0e2d 47 #define DEFVALA_BNK 0x03
jasminealice 22:c024b20a0e2d 48 #define INTCONA_BNK 0x04
jasminealice 22:c024b20a0e2d 49 #define IOCONA_BNK 0x05
jasminealice 22:c024b20a0e2d 50 #define GPPUA_BNK 0x06
jasminealice 22:c024b20a0e2d 51 #define INTFA_BNK 0x07
jasminealice 22:c024b20a0e2d 52 #define INTCAPA_BNK 0x08
jasminealice 22:c024b20a0e2d 53 #define GPIOA_BNK 0x09
jasminealice 22:c024b20a0e2d 54 #define OLATA_BNK 0x0A
jasminealice 22:c024b20a0e2d 55
jasminealice 22:c024b20a0e2d 56 #define IODIRB_BNK 0x10
jasminealice 22:c024b20a0e2d 57 #define IPOLB_BNK 0x11
jasminealice 22:c024b20a0e2d 58 #define GPINTENB_BNK 0x12
jasminealice 22:c024b20a0e2d 59 #define DEFVALB_BNK 0x13
jasminealice 22:c024b20a0e2d 60 #define INTCONB_BNK 0x14
jasminealice 22:c024b20a0e2d 61 #define IOCONB_BNK 0x15
jasminealice 22:c024b20a0e2d 62 #define GPPUB_BNK 0x16
jasminealice 22:c024b20a0e2d 63 #define INTFB_BNK 0x17
jasminealice 22:c024b20a0e2d 64 #define INTCAPB_BNK 0x18
jasminealice 22:c024b20a0e2d 65 #define GPIOB_BNK 0x19
jasminealice 22:c024b20a0e2d 66 #define OLATB_BNK 0x1A
jasminealice 22:c024b20a0e2d 67
jasminealice 22:c024b20a0e2d 68 // This array allows structured access to Port_A and Port_B registers for both bankModes
jasminealice 22:c024b20a0e2d 69 const int IODIR_AB[2][2] = {{IODIRA, IODIRB}, {IODIRA_BNK, IODIRB_BNK}};
jasminealice 22:c024b20a0e2d 70 const int IPOL_AB[2][2] = {{IPOLA, IPOLB}, {IPOLA_BNK, IPOLB_BNK}};
jasminealice 22:c024b20a0e2d 71 const int GPINTEN_AB[2][2] = {{GPINTENA, GPINTENB}, {GPINTENA_BNK, GPINTENB_BNK}};
jasminealice 22:c024b20a0e2d 72 const int DEFVAL_AB[2][2] = {{DEFVALA, DEFVALB}, {DEFVALA_BNK, DEFVALB_BNK}};
jasminealice 22:c024b20a0e2d 73 const int INTCON_AB[2][2] = {{INTCONA, INTCONB}, {INTCONA_BNK, INTCONB_BNK}};
jasminealice 22:c024b20a0e2d 74 const int IOCON_AB[2][2] = {{IOCONA, IOCONB}, {IOCONA_BNK, IOCONB_BNK}};
jasminealice 22:c024b20a0e2d 75 const int GPPU_AB[2][2] = {{GPPUA, GPPUB}, {GPPUA_BNK, GPPUB_BNK}};
jasminealice 22:c024b20a0e2d 76 const int INTF_AB[2][2] = {{INTFA, INTFB}, {INTFA_BNK, INTFB_BNK}};
jasminealice 22:c024b20a0e2d 77 const int INTCAP_AB[2][2] = {{INTCAPA, INTCAPB}, {INTCAPA_BNK, INTCAPB_BNK}};
jasminealice 22:c024b20a0e2d 78 const int GPIO_AB[2][2] = {{GPIOA, GPIOB}, {GPIOA_BNK, GPIOB_BNK}};
jasminealice 22:c024b20a0e2d 79 const int OLAT_AB[2][2] = {{OLATA, OLATB}, {OLATA_BNK, OLATB_BNK}};
jasminealice 22:c024b20a0e2d 80
jasminealice 22:c024b20a0e2d 81
jasminealice 22:c024b20a0e2d 82 // Control settings
jasminealice 22:c024b20a0e2d 83 #define IOCON_BANK 0x80 // Banked registers for Port A and B
jasminealice 22:c024b20a0e2d 84 #define IOCON_BYTE_MODE 0x20 // Disables sequential operation, Address Ptr does not increment
jasminealice 22:c024b20a0e2d 85 // If Disabled and Bank = 0, operations toggle between Port A and B registers
jasminealice 22:c024b20a0e2d 86 // If Disabled and Bank = 1, operations do not increment registeraddress
jasminealice 22:c024b20a0e2d 87 #define IOCON_HAEN 0x08 // Hardware address enable
jasminealice 22:c024b20a0e2d 88
jasminealice 22:c024b20a0e2d 89 #define INTERRUPT_POLARITY_BIT 0x02
jasminealice 22:c024b20a0e2d 90 #define INTERRUPT_MIRROR_BIT 0x40
jasminealice 22:c024b20a0e2d 91
jasminealice 22:c024b20a0e2d 92 #define PORT_DIR_OUT 0x00
jasminealice 22:c024b20a0e2d 93 #define PORT_DIR_IN 0xFF
jasminealice 22:c024b20a0e2d 94
jasminealice 22:c024b20a0e2d 95 enum Polarity { ACTIVE_LOW , ACTIVE_HIGH };
jasminealice 22:c024b20a0e2d 96 enum Port { PORT_A=0, PORT_B=1 };
jasminealice 22:c024b20a0e2d 97 enum Bank { NOT_BNK=0, BNK=1 };
jasminealice 22:c024b20a0e2d 98
jasminealice 22:c024b20a0e2d 99 class MCP23017 {
jasminealice 22:c024b20a0e2d 100 public:
jasminealice 22:c024b20a0e2d 101 /** Create an MCP23017 object connected to the specified I2C object and using the specified deviceAddress
jasminealice 22:c024b20a0e2d 102 *
jasminealice 22:c024b20a0e2d 103 * @param I2C &i2c the I2C port to connect to
jasminealice 22:c024b20a0e2d 104 * @param char deviceAddress the address of the MCP23017
jasminealice 22:c024b20a0e2d 105 */
jasminealice 22:c024b20a0e2d 106 MCP23017(I2C &i2c, char deviceAddress);
jasminealice 22:c024b20a0e2d 107
jasminealice 22:c024b20a0e2d 108 /** Set I/O direction of specified MCP23017 Port
jasminealice 22:c024b20a0e2d 109 *
jasminealice 22:c024b20a0e2d 110 * @param Port Port address (Port_A or Port_B)
jasminealice 22:c024b20a0e2d 111 * @param char direction pin direction (0 = output, 1 = input)
jasminealice 22:c024b20a0e2d 112 */
jasminealice 22:c024b20a0e2d 113 void direction(Port port, char direction);
jasminealice 22:c024b20a0e2d 114
jasminealice 22:c024b20a0e2d 115 /** Set Pull-Up Resistors on specified MCP23017 Port
jasminealice 22:c024b20a0e2d 116 *
jasminealice 22:c024b20a0e2d 117 * @param Port Port address (Port_A or Port_B)
jasminealice 22:c024b20a0e2d 118 * @param char offOrOn per pin (0 = off, 1 = on)
jasminealice 22:c024b20a0e2d 119 */
jasminealice 22:c024b20a0e2d 120 void configurePullUps(Port port, char offOrOn);
jasminealice 22:c024b20a0e2d 121
jasminealice 22:c024b20a0e2d 122 void configureBanked(Bank bankmode);
jasminealice 22:c024b20a0e2d 123 void interruptEnable(Port port, char interruptsEnabledMask);
jasminealice 22:c024b20a0e2d 124 void interruptPolarity(Polarity polarity);
jasminealice 22:c024b20a0e2d 125 void mirrorInterrupts(bool mirror);
jasminealice 22:c024b20a0e2d 126 void defaultValue(Port port, char valuesToCompare);
jasminealice 22:c024b20a0e2d 127 void interruptControl(Port port, char interruptControlBits);
jasminealice 22:c024b20a0e2d 128
jasminealice 22:c024b20a0e2d 129 /** Read from specified MCP23017 Port
jasminealice 22:c024b20a0e2d 130 *
jasminealice 22:c024b20a0e2d 131 * @param Port Port address (Port_A or Port_B)
jasminealice 22:c024b20a0e2d 132 * @returns data from Port
jasminealice 22:c024b20a0e2d 133 */
jasminealice 22:c024b20a0e2d 134 char read(Port port);
jasminealice 22:c024b20a0e2d 135
jasminealice 22:c024b20a0e2d 136 /** Write to specified MCP23017 Port
jasminealice 22:c024b20a0e2d 137 *
jasminealice 22:c024b20a0e2d 138 * @param Port Port address (Port_A or Port_B)
jasminealice 22:c024b20a0e2d 139 * @param char byte data to write
jasminealice 22:c024b20a0e2d 140 */
jasminealice 22:c024b20a0e2d 141 void write(Port port, char byte);
jasminealice 22:c024b20a0e2d 142
jasminealice 22:c024b20a0e2d 143 /** Write to specified MCP23017 register
jasminealice 22:c024b20a0e2d 144 *
jasminealice 22:c024b20a0e2d 145 * @param char address the internal registeraddress of the MCP23017
jasminealice 22:c024b20a0e2d 146 */
jasminealice 22:c024b20a0e2d 147 void _write(char address, char byte);
jasminealice 22:c024b20a0e2d 148
jasminealice 22:c024b20a0e2d 149 /** Read from specified MCP23017 register
jasminealice 22:c024b20a0e2d 150 *
jasminealice 22:c024b20a0e2d 151 * @param char address the internal registeraddress of the MCP23017
jasminealice 22:c024b20a0e2d 152 * @returns data from register
jasminealice 22:c024b20a0e2d 153 */
jasminealice 22:c024b20a0e2d 154 char _read(char address);
jasminealice 22:c024b20a0e2d 155
jasminealice 22:c024b20a0e2d 156 protected:
jasminealice 22:c024b20a0e2d 157 I2C &_i2c;
jasminealice 22:c024b20a0e2d 158 char _readOpcode;
jasminealice 22:c024b20a0e2d 159 char _writeOpcode;
jasminealice 22:c024b20a0e2d 160 Bank _bankMode;
jasminealice 22:c024b20a0e2d 161
jasminealice 22:c024b20a0e2d 162 /** Init MCP23017
jasminealice 22:c024b20a0e2d 163 *
jasminealice 22:c024b20a0e2d 164 * @param
jasminealice 22:c024b20a0e2d 165 * @returns
jasminealice 22:c024b20a0e2d 166 */
jasminealice 22:c024b20a0e2d 167 void _init();
jasminealice 22:c024b20a0e2d 168 };
jasminealice 22:c024b20a0e2d 169
jasminealice 22:c024b20a0e2d 170 #endif