mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_cryp.c@133:d4dda5c437f0, 2014-03-24 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Mar 24 17:45:07 2014 +0000
- Revision:
- 133:d4dda5c437f0
- Child:
- 242:7074e42da0b2
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61
Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/
[STM32F4-Discovery (STM32F407VG)] initial port
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 133:d4dda5c437f0 | 1 | /** |
mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_cryp.c |
mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
mbed_official | 133:d4dda5c437f0 | 5 | * @version V1.0.0 |
mbed_official | 133:d4dda5c437f0 | 6 | * @date 18-February-2014 |
mbed_official | 133:d4dda5c437f0 | 7 | * @brief CRYP HAL module driver. |
mbed_official | 133:d4dda5c437f0 | 8 | * This file provides firmware functions to manage the following |
mbed_official | 133:d4dda5c437f0 | 9 | * functionalities of the Cryptography (CRYP) peripheral: |
mbed_official | 133:d4dda5c437f0 | 10 | * + Initialization and de-initialization functions |
mbed_official | 133:d4dda5c437f0 | 11 | * + AES processing functions |
mbed_official | 133:d4dda5c437f0 | 12 | * + DES processing functions |
mbed_official | 133:d4dda5c437f0 | 13 | * + TDES processing functions |
mbed_official | 133:d4dda5c437f0 | 14 | * + DMA callback functions |
mbed_official | 133:d4dda5c437f0 | 15 | * + CRYP IRQ handler management |
mbed_official | 133:d4dda5c437f0 | 16 | * + Peripheral State functions |
mbed_official | 133:d4dda5c437f0 | 17 | * |
mbed_official | 133:d4dda5c437f0 | 18 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 19 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 20 | ##### How to use this driver ##### |
mbed_official | 133:d4dda5c437f0 | 21 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 22 | [..] |
mbed_official | 133:d4dda5c437f0 | 23 | The CRYP HAL driver can be used as follows: |
mbed_official | 133:d4dda5c437f0 | 24 | |
mbed_official | 133:d4dda5c437f0 | 25 | (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit(): |
mbed_official | 133:d4dda5c437f0 | 26 | (##) Enable the CRYP interface clock using __CRYP_CLK_ENABLE() |
mbed_official | 133:d4dda5c437f0 | 27 | (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT()) |
mbed_official | 133:d4dda5c437f0 | 28 | (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority() |
mbed_official | 133:d4dda5c437f0 | 29 | (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ() |
mbed_official | 133:d4dda5c437f0 | 30 | (+++) In CRYP IRQ handler, call HAL_CRYP_IRQHandler() |
mbed_official | 133:d4dda5c437f0 | 31 | (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA()) |
mbed_official | 133:d4dda5c437f0 | 32 | (++) Enable the DMAx interface clock using |
mbed_official | 133:d4dda5c437f0 | 33 | (+++) __DMAx_CLK_ENABLE() |
mbed_official | 133:d4dda5c437f0 | 34 | (++) Configure and enable two DMA streams one for managing data transfer from |
mbed_official | 133:d4dda5c437f0 | 35 | memory to peripheral (input stream) and another stream for managing data |
mbed_official | 133:d4dda5c437f0 | 36 | transfer from peripheral to memory (output stream) |
mbed_official | 133:d4dda5c437f0 | 37 | (++) Associate the initilalized DMA handle to the CRYP DMA handle |
mbed_official | 133:d4dda5c437f0 | 38 | using __HAL_LINKDMA() |
mbed_official | 133:d4dda5c437f0 | 39 | (++) Configure the priority and enable the NVIC for the transfer complete |
mbed_official | 133:d4dda5c437f0 | 40 | interrupt on the two DMA Streams. The output stream should have higher |
mbed_official | 133:d4dda5c437f0 | 41 | priority than the input stream. |
mbed_official | 133:d4dda5c437f0 | 42 | (+++) HAL_NVIC_SetPriority() |
mbed_official | 133:d4dda5c437f0 | 43 | (+++) HAL_NVIC_EnableIRQ() |
mbed_official | 133:d4dda5c437f0 | 44 | |
mbed_official | 133:d4dda5c437f0 | 45 | (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly: |
mbed_official | 133:d4dda5c437f0 | 46 | (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit |
mbed_official | 133:d4dda5c437f0 | 47 | (##) The key size: 128, 192 and 256. This parameter is relevant only for AES |
mbed_official | 133:d4dda5c437f0 | 48 | (##) The encryption/decryption key. It's size depends on the algorithm |
mbed_official | 133:d4dda5c437f0 | 49 | used for encryption/decryption |
mbed_official | 133:d4dda5c437f0 | 50 | (##) The initialization vector (counter). It is not used ECB mode. |
mbed_official | 133:d4dda5c437f0 | 51 | |
mbed_official | 133:d4dda5c437f0 | 52 | (#)Three processing (encryption/decryption) functions are available: |
mbed_official | 133:d4dda5c437f0 | 53 | (##) Polling mode: encryption and decryption APIs are blocking functions |
mbed_official | 133:d4dda5c437f0 | 54 | i.e. they process the data and wait till the processing is finished |
mbed_official | 133:d4dda5c437f0 | 55 | e.g. HAL_CRYP_AESCBC_Encrypt() |
mbed_official | 133:d4dda5c437f0 | 56 | (##) Interrupt mode: encryption and decryption APIs are not blocking functions |
mbed_official | 133:d4dda5c437f0 | 57 | i.e. they process the data under interrupt |
mbed_official | 133:d4dda5c437f0 | 58 | e.g. HAL_CRYP_AESCBC_Encrypt_IT() |
mbed_official | 133:d4dda5c437f0 | 59 | (##) DMA mode: encryption and decryption APIs are not blocking functions |
mbed_official | 133:d4dda5c437f0 | 60 | i.e. the data transfer is ensured by DMA |
mbed_official | 133:d4dda5c437f0 | 61 | e.g. HAL_CRYP_AESCBC_Encrypt_DMA() |
mbed_official | 133:d4dda5c437f0 | 62 | |
mbed_official | 133:d4dda5c437f0 | 63 | (#)When the processing function is called at first time after HAL_CRYP_Init() |
mbed_official | 133:d4dda5c437f0 | 64 | the CRYP peripheral is initialized and processes the buffer in input. |
mbed_official | 133:d4dda5c437f0 | 65 | At second call, the processing function performs an append of the already |
mbed_official | 133:d4dda5c437f0 | 66 | processed buffer. |
mbed_official | 133:d4dda5c437f0 | 67 | When a new data block is to be processed, call HAL_CRYP_Init() then the |
mbed_official | 133:d4dda5c437f0 | 68 | processing function. |
mbed_official | 133:d4dda5c437f0 | 69 | |
mbed_official | 133:d4dda5c437f0 | 70 | (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral. |
mbed_official | 133:d4dda5c437f0 | 71 | |
mbed_official | 133:d4dda5c437f0 | 72 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 73 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 74 | * @attention |
mbed_official | 133:d4dda5c437f0 | 75 | * |
mbed_official | 133:d4dda5c437f0 | 76 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 133:d4dda5c437f0 | 77 | * |
mbed_official | 133:d4dda5c437f0 | 78 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 133:d4dda5c437f0 | 79 | * are permitted provided that the following conditions are met: |
mbed_official | 133:d4dda5c437f0 | 80 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 81 | * this list of conditions and the following disclaimer. |
mbed_official | 133:d4dda5c437f0 | 82 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 83 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 133:d4dda5c437f0 | 84 | * and/or other materials provided with the distribution. |
mbed_official | 133:d4dda5c437f0 | 85 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 133:d4dda5c437f0 | 86 | * may be used to endorse or promote products derived from this software |
mbed_official | 133:d4dda5c437f0 | 87 | * without specific prior written permission. |
mbed_official | 133:d4dda5c437f0 | 88 | * |
mbed_official | 133:d4dda5c437f0 | 89 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 133:d4dda5c437f0 | 90 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 133:d4dda5c437f0 | 91 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 133:d4dda5c437f0 | 92 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 133:d4dda5c437f0 | 93 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 133:d4dda5c437f0 | 94 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 133:d4dda5c437f0 | 95 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 133:d4dda5c437f0 | 96 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 133:d4dda5c437f0 | 97 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 133:d4dda5c437f0 | 98 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 133:d4dda5c437f0 | 99 | * |
mbed_official | 133:d4dda5c437f0 | 100 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 101 | */ |
mbed_official | 133:d4dda5c437f0 | 102 | |
mbed_official | 133:d4dda5c437f0 | 103 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 104 | #include "stm32f4xx_hal.h" |
mbed_official | 133:d4dda5c437f0 | 105 | |
mbed_official | 133:d4dda5c437f0 | 106 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 133:d4dda5c437f0 | 107 | * @{ |
mbed_official | 133:d4dda5c437f0 | 108 | */ |
mbed_official | 133:d4dda5c437f0 | 109 | |
mbed_official | 133:d4dda5c437f0 | 110 | /** @defgroup CRYP |
mbed_official | 133:d4dda5c437f0 | 111 | * @brief CRYP HAL module driver. |
mbed_official | 133:d4dda5c437f0 | 112 | * @{ |
mbed_official | 133:d4dda5c437f0 | 113 | */ |
mbed_official | 133:d4dda5c437f0 | 114 | |
mbed_official | 133:d4dda5c437f0 | 115 | #ifdef HAL_CRYP_MODULE_ENABLED |
mbed_official | 133:d4dda5c437f0 | 116 | |
mbed_official | 133:d4dda5c437f0 | 117 | #if defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F437xx) || defined(STM32F439xx) |
mbed_official | 133:d4dda5c437f0 | 118 | |
mbed_official | 133:d4dda5c437f0 | 119 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 120 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 121 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 122 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 123 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 124 | static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize); |
mbed_official | 133:d4dda5c437f0 | 125 | static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize); |
mbed_official | 133:d4dda5c437f0 | 126 | static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 127 | static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 128 | static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 129 | static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 130 | static void CRYP_DMAError(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 131 | static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr); |
mbed_official | 133:d4dda5c437f0 | 132 | static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction); |
mbed_official | 133:d4dda5c437f0 | 133 | static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction); |
mbed_official | 133:d4dda5c437f0 | 134 | static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction); |
mbed_official | 133:d4dda5c437f0 | 135 | static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction); |
mbed_official | 133:d4dda5c437f0 | 136 | |
mbed_official | 133:d4dda5c437f0 | 137 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 138 | |
mbed_official | 133:d4dda5c437f0 | 139 | /** @defgroup CRYP_Private_Functions |
mbed_official | 133:d4dda5c437f0 | 140 | * @{ |
mbed_official | 133:d4dda5c437f0 | 141 | */ |
mbed_official | 133:d4dda5c437f0 | 142 | |
mbed_official | 133:d4dda5c437f0 | 143 | /** @defgroup CRYP_Group1 Initialization and de-initialization functions |
mbed_official | 133:d4dda5c437f0 | 144 | * @brief Initialization and Configuration functions. |
mbed_official | 133:d4dda5c437f0 | 145 | * |
mbed_official | 133:d4dda5c437f0 | 146 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 147 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 148 | ##### Initialization and de-initialization functions ##### |
mbed_official | 133:d4dda5c437f0 | 149 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 150 | [..] This section provides functions allowing to: |
mbed_official | 133:d4dda5c437f0 | 151 | (+) Initialize the CRYP according to the specified parameters |
mbed_official | 133:d4dda5c437f0 | 152 | in the CRYP_InitTypeDef and creates the associated handle |
mbed_official | 133:d4dda5c437f0 | 153 | (+) DeInitialize the CRYP peripheral |
mbed_official | 133:d4dda5c437f0 | 154 | (+) Initialize the CRYP MSP |
mbed_official | 133:d4dda5c437f0 | 155 | (+) DeInitialize CRYP MSP |
mbed_official | 133:d4dda5c437f0 | 156 | |
mbed_official | 133:d4dda5c437f0 | 157 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 158 | * @{ |
mbed_official | 133:d4dda5c437f0 | 159 | */ |
mbed_official | 133:d4dda5c437f0 | 160 | |
mbed_official | 133:d4dda5c437f0 | 161 | /** |
mbed_official | 133:d4dda5c437f0 | 162 | * @brief Initializes the CRYP according to the specified |
mbed_official | 133:d4dda5c437f0 | 163 | * parameters in the CRYP_InitTypeDef and creates the associated handle. |
mbed_official | 133:d4dda5c437f0 | 164 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 165 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 166 | */ |
mbed_official | 133:d4dda5c437f0 | 167 | HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp) |
mbed_official | 133:d4dda5c437f0 | 168 | { |
mbed_official | 133:d4dda5c437f0 | 169 | /* Check the CRYP handle allocation */ |
mbed_official | 133:d4dda5c437f0 | 170 | if(hcryp == NULL) |
mbed_official | 133:d4dda5c437f0 | 171 | { |
mbed_official | 133:d4dda5c437f0 | 172 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 173 | } |
mbed_official | 133:d4dda5c437f0 | 174 | |
mbed_official | 133:d4dda5c437f0 | 175 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 176 | assert_param(IS_CRYP_KEYSIZE(hcryp->Init.KeySize)); |
mbed_official | 133:d4dda5c437f0 | 177 | assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType)); |
mbed_official | 133:d4dda5c437f0 | 178 | |
mbed_official | 133:d4dda5c437f0 | 179 | if(hcryp->State == HAL_CRYP_STATE_RESET) |
mbed_official | 133:d4dda5c437f0 | 180 | { |
mbed_official | 133:d4dda5c437f0 | 181 | /* Init the low level hardware */ |
mbed_official | 133:d4dda5c437f0 | 182 | HAL_CRYP_MspInit(hcryp); |
mbed_official | 133:d4dda5c437f0 | 183 | } |
mbed_official | 133:d4dda5c437f0 | 184 | |
mbed_official | 133:d4dda5c437f0 | 185 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 186 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 187 | |
mbed_official | 133:d4dda5c437f0 | 188 | /* Set the key size and data type*/ |
mbed_official | 133:d4dda5c437f0 | 189 | CRYP->CR = (uint32_t) (hcryp->Init.KeySize | hcryp->Init.DataType); |
mbed_official | 133:d4dda5c437f0 | 190 | |
mbed_official | 133:d4dda5c437f0 | 191 | /* Reset CrypInCount and CrypOutCount */ |
mbed_official | 133:d4dda5c437f0 | 192 | hcryp->CrypInCount = 0; |
mbed_official | 133:d4dda5c437f0 | 193 | hcryp->CrypOutCount = 0; |
mbed_official | 133:d4dda5c437f0 | 194 | |
mbed_official | 133:d4dda5c437f0 | 195 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 196 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 197 | |
mbed_official | 133:d4dda5c437f0 | 198 | /* Set the default CRYP phase */ |
mbed_official | 133:d4dda5c437f0 | 199 | hcryp->Phase = HAL_CRYP_PHASE_READY; |
mbed_official | 133:d4dda5c437f0 | 200 | |
mbed_official | 133:d4dda5c437f0 | 201 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 202 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 203 | } |
mbed_official | 133:d4dda5c437f0 | 204 | |
mbed_official | 133:d4dda5c437f0 | 205 | /** |
mbed_official | 133:d4dda5c437f0 | 206 | * @brief DeInitializes the CRYP peripheral. |
mbed_official | 133:d4dda5c437f0 | 207 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 208 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 209 | */ |
mbed_official | 133:d4dda5c437f0 | 210 | HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp) |
mbed_official | 133:d4dda5c437f0 | 211 | { |
mbed_official | 133:d4dda5c437f0 | 212 | /* Check the CRYP handle allocation */ |
mbed_official | 133:d4dda5c437f0 | 213 | if(hcryp == NULL) |
mbed_official | 133:d4dda5c437f0 | 214 | { |
mbed_official | 133:d4dda5c437f0 | 215 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 216 | } |
mbed_official | 133:d4dda5c437f0 | 217 | |
mbed_official | 133:d4dda5c437f0 | 218 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 219 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 220 | |
mbed_official | 133:d4dda5c437f0 | 221 | /* Set the default CRYP phase */ |
mbed_official | 133:d4dda5c437f0 | 222 | hcryp->Phase = HAL_CRYP_PHASE_READY; |
mbed_official | 133:d4dda5c437f0 | 223 | |
mbed_official | 133:d4dda5c437f0 | 224 | /* Reset CrypInCount and CrypOutCount */ |
mbed_official | 133:d4dda5c437f0 | 225 | hcryp->CrypInCount = 0; |
mbed_official | 133:d4dda5c437f0 | 226 | hcryp->CrypOutCount = 0; |
mbed_official | 133:d4dda5c437f0 | 227 | |
mbed_official | 133:d4dda5c437f0 | 228 | /* Disable the CRYP Peripheral Clock */ |
mbed_official | 133:d4dda5c437f0 | 229 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 230 | |
mbed_official | 133:d4dda5c437f0 | 231 | /* DeInit the low level hardware: CLOCK, NVIC.*/ |
mbed_official | 133:d4dda5c437f0 | 232 | HAL_CRYP_MspDeInit(hcryp); |
mbed_official | 133:d4dda5c437f0 | 233 | |
mbed_official | 133:d4dda5c437f0 | 234 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 235 | hcryp->State = HAL_CRYP_STATE_RESET; |
mbed_official | 133:d4dda5c437f0 | 236 | |
mbed_official | 133:d4dda5c437f0 | 237 | /* Release Lock */ |
mbed_official | 133:d4dda5c437f0 | 238 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 239 | |
mbed_official | 133:d4dda5c437f0 | 240 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 241 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 242 | } |
mbed_official | 133:d4dda5c437f0 | 243 | |
mbed_official | 133:d4dda5c437f0 | 244 | /** |
mbed_official | 133:d4dda5c437f0 | 245 | * @brief Initializes the CRYP MSP. |
mbed_official | 133:d4dda5c437f0 | 246 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 247 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 248 | */ |
mbed_official | 133:d4dda5c437f0 | 249 | __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp) |
mbed_official | 133:d4dda5c437f0 | 250 | { |
mbed_official | 133:d4dda5c437f0 | 251 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 252 | the HAL_CRYP_MspInit could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 253 | */ |
mbed_official | 133:d4dda5c437f0 | 254 | } |
mbed_official | 133:d4dda5c437f0 | 255 | |
mbed_official | 133:d4dda5c437f0 | 256 | /** |
mbed_official | 133:d4dda5c437f0 | 257 | * @brief DeInitializes CRYP MSP. |
mbed_official | 133:d4dda5c437f0 | 258 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 259 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 260 | */ |
mbed_official | 133:d4dda5c437f0 | 261 | __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp) |
mbed_official | 133:d4dda5c437f0 | 262 | { |
mbed_official | 133:d4dda5c437f0 | 263 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 264 | the HAL_CRYP_MspDeInit could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 265 | */ |
mbed_official | 133:d4dda5c437f0 | 266 | } |
mbed_official | 133:d4dda5c437f0 | 267 | |
mbed_official | 133:d4dda5c437f0 | 268 | /** |
mbed_official | 133:d4dda5c437f0 | 269 | * @} |
mbed_official | 133:d4dda5c437f0 | 270 | */ |
mbed_official | 133:d4dda5c437f0 | 271 | |
mbed_official | 133:d4dda5c437f0 | 272 | /** @defgroup CRYP_Group2 AES processing functions |
mbed_official | 133:d4dda5c437f0 | 273 | * @brief processing functions. |
mbed_official | 133:d4dda5c437f0 | 274 | * |
mbed_official | 133:d4dda5c437f0 | 275 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 276 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 277 | ##### AES processing functions ##### |
mbed_official | 133:d4dda5c437f0 | 278 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 279 | [..] This section provides functions allowing to: |
mbed_official | 133:d4dda5c437f0 | 280 | (+) Encrypt plaintext using AES-128/192/256 using chaining modes |
mbed_official | 133:d4dda5c437f0 | 281 | (+) Decrypt cyphertext using AES-128/192/256 using chaining modes |
mbed_official | 133:d4dda5c437f0 | 282 | [..] Three processing functions are available: |
mbed_official | 133:d4dda5c437f0 | 283 | (+) Polling mode |
mbed_official | 133:d4dda5c437f0 | 284 | (+) Interrupt mode |
mbed_official | 133:d4dda5c437f0 | 285 | (+) DMA mode |
mbed_official | 133:d4dda5c437f0 | 286 | |
mbed_official | 133:d4dda5c437f0 | 287 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 288 | * @{ |
mbed_official | 133:d4dda5c437f0 | 289 | */ |
mbed_official | 133:d4dda5c437f0 | 290 | |
mbed_official | 133:d4dda5c437f0 | 291 | /** |
mbed_official | 133:d4dda5c437f0 | 292 | * @brief Initializes the CRYP peripheral in AES ECB encryption mode |
mbed_official | 133:d4dda5c437f0 | 293 | * then encrypt pPlainData. The cypher data are available in pCypherData |
mbed_official | 133:d4dda5c437f0 | 294 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 295 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 296 | * @param Size: Length of the plaintext buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 297 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 298 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 299 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 300 | */ |
mbed_official | 133:d4dda5c437f0 | 301 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 302 | { |
mbed_official | 133:d4dda5c437f0 | 303 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 304 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 305 | |
mbed_official | 133:d4dda5c437f0 | 306 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 307 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 308 | |
mbed_official | 133:d4dda5c437f0 | 309 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 310 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 311 | { |
mbed_official | 133:d4dda5c437f0 | 312 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 313 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 314 | |
mbed_official | 133:d4dda5c437f0 | 315 | /* Set the CRYP peripheral in AES ECB mode */ |
mbed_official | 133:d4dda5c437f0 | 316 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB); |
mbed_official | 133:d4dda5c437f0 | 317 | |
mbed_official | 133:d4dda5c437f0 | 318 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 319 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 320 | |
mbed_official | 133:d4dda5c437f0 | 321 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 322 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 323 | |
mbed_official | 133:d4dda5c437f0 | 324 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 325 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 326 | } |
mbed_official | 133:d4dda5c437f0 | 327 | |
mbed_official | 133:d4dda5c437f0 | 328 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 329 | if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 330 | { |
mbed_official | 133:d4dda5c437f0 | 331 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 332 | } |
mbed_official | 133:d4dda5c437f0 | 333 | |
mbed_official | 133:d4dda5c437f0 | 334 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 335 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 336 | |
mbed_official | 133:d4dda5c437f0 | 337 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 338 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 339 | |
mbed_official | 133:d4dda5c437f0 | 340 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 341 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 342 | } |
mbed_official | 133:d4dda5c437f0 | 343 | |
mbed_official | 133:d4dda5c437f0 | 344 | /** |
mbed_official | 133:d4dda5c437f0 | 345 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode |
mbed_official | 133:d4dda5c437f0 | 346 | * then encrypt pPlainData. The cypher data are available in pCypherData |
mbed_official | 133:d4dda5c437f0 | 347 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 348 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 349 | * @param Size: Length of the plaintext buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 350 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 351 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 352 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 353 | */ |
mbed_official | 133:d4dda5c437f0 | 354 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 355 | { |
mbed_official | 133:d4dda5c437f0 | 356 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 357 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 358 | |
mbed_official | 133:d4dda5c437f0 | 359 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 360 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 361 | |
mbed_official | 133:d4dda5c437f0 | 362 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 363 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 364 | { |
mbed_official | 133:d4dda5c437f0 | 365 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 366 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 367 | |
mbed_official | 133:d4dda5c437f0 | 368 | /* Set the CRYP peripheral in AES ECB mode */ |
mbed_official | 133:d4dda5c437f0 | 369 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC); |
mbed_official | 133:d4dda5c437f0 | 370 | |
mbed_official | 133:d4dda5c437f0 | 371 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 372 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 373 | |
mbed_official | 133:d4dda5c437f0 | 374 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 375 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 376 | |
mbed_official | 133:d4dda5c437f0 | 377 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 378 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 379 | |
mbed_official | 133:d4dda5c437f0 | 380 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 381 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 382 | } |
mbed_official | 133:d4dda5c437f0 | 383 | |
mbed_official | 133:d4dda5c437f0 | 384 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 385 | if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 386 | { |
mbed_official | 133:d4dda5c437f0 | 387 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 388 | } |
mbed_official | 133:d4dda5c437f0 | 389 | |
mbed_official | 133:d4dda5c437f0 | 390 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 391 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 392 | |
mbed_official | 133:d4dda5c437f0 | 393 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 394 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 395 | |
mbed_official | 133:d4dda5c437f0 | 396 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 397 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 398 | } |
mbed_official | 133:d4dda5c437f0 | 399 | |
mbed_official | 133:d4dda5c437f0 | 400 | /** |
mbed_official | 133:d4dda5c437f0 | 401 | * @brief Initializes the CRYP peripheral in AES CTR encryption mode |
mbed_official | 133:d4dda5c437f0 | 402 | * then encrypt pPlainData. The cypher data are available in pCypherData |
mbed_official | 133:d4dda5c437f0 | 403 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 404 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 405 | * @param Size: Length of the plaintext buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 406 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 407 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 408 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 409 | */ |
mbed_official | 133:d4dda5c437f0 | 410 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 411 | { |
mbed_official | 133:d4dda5c437f0 | 412 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 413 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 414 | |
mbed_official | 133:d4dda5c437f0 | 415 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 416 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 417 | |
mbed_official | 133:d4dda5c437f0 | 418 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 419 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 420 | { |
mbed_official | 133:d4dda5c437f0 | 421 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 422 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 423 | |
mbed_official | 133:d4dda5c437f0 | 424 | /* Set the CRYP peripheral in AES ECB mode */ |
mbed_official | 133:d4dda5c437f0 | 425 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR); |
mbed_official | 133:d4dda5c437f0 | 426 | |
mbed_official | 133:d4dda5c437f0 | 427 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 428 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 429 | |
mbed_official | 133:d4dda5c437f0 | 430 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 431 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 432 | |
mbed_official | 133:d4dda5c437f0 | 433 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 434 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 435 | |
mbed_official | 133:d4dda5c437f0 | 436 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 437 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 438 | } |
mbed_official | 133:d4dda5c437f0 | 439 | |
mbed_official | 133:d4dda5c437f0 | 440 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 441 | if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 442 | { |
mbed_official | 133:d4dda5c437f0 | 443 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 444 | } |
mbed_official | 133:d4dda5c437f0 | 445 | |
mbed_official | 133:d4dda5c437f0 | 446 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 447 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 448 | |
mbed_official | 133:d4dda5c437f0 | 449 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 450 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 451 | |
mbed_official | 133:d4dda5c437f0 | 452 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 453 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 454 | } |
mbed_official | 133:d4dda5c437f0 | 455 | |
mbed_official | 133:d4dda5c437f0 | 456 | |
mbed_official | 133:d4dda5c437f0 | 457 | |
mbed_official | 133:d4dda5c437f0 | 458 | /** |
mbed_official | 133:d4dda5c437f0 | 459 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode |
mbed_official | 133:d4dda5c437f0 | 460 | * then decrypted pCypherData. The cypher data are available in pPlainData |
mbed_official | 133:d4dda5c437f0 | 461 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 462 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 463 | * @param Size: Length of the plaintext buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 464 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 465 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 466 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 467 | */ |
mbed_official | 133:d4dda5c437f0 | 468 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 469 | { |
mbed_official | 133:d4dda5c437f0 | 470 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 471 | |
mbed_official | 133:d4dda5c437f0 | 472 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 473 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 474 | |
mbed_official | 133:d4dda5c437f0 | 475 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 476 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 477 | |
mbed_official | 133:d4dda5c437f0 | 478 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 479 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 480 | { |
mbed_official | 133:d4dda5c437f0 | 481 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 482 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 483 | |
mbed_official | 133:d4dda5c437f0 | 484 | /* Set the CRYP peripheral in AES Key mode */ |
mbed_official | 133:d4dda5c437f0 | 485 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 486 | |
mbed_official | 133:d4dda5c437f0 | 487 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 488 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 489 | |
mbed_official | 133:d4dda5c437f0 | 490 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 491 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 492 | |
mbed_official | 133:d4dda5c437f0 | 493 | while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 494 | { |
mbed_official | 133:d4dda5c437f0 | 495 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 496 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 497 | { |
mbed_official | 133:d4dda5c437f0 | 498 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 499 | { |
mbed_official | 133:d4dda5c437f0 | 500 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 501 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 502 | |
mbed_official | 133:d4dda5c437f0 | 503 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 504 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 505 | |
mbed_official | 133:d4dda5c437f0 | 506 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 507 | } |
mbed_official | 133:d4dda5c437f0 | 508 | } |
mbed_official | 133:d4dda5c437f0 | 509 | } |
mbed_official | 133:d4dda5c437f0 | 510 | |
mbed_official | 133:d4dda5c437f0 | 511 | /* Disable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 512 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 513 | |
mbed_official | 133:d4dda5c437f0 | 514 | /* Reset the ALGOMODE bits*/ |
mbed_official | 133:d4dda5c437f0 | 515 | CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE); |
mbed_official | 133:d4dda5c437f0 | 516 | |
mbed_official | 133:d4dda5c437f0 | 517 | /* Set the CRYP peripheral in AES ECB decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 518 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 519 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 520 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 521 | |
mbed_official | 133:d4dda5c437f0 | 522 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 523 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 524 | |
mbed_official | 133:d4dda5c437f0 | 525 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 526 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 527 | } |
mbed_official | 133:d4dda5c437f0 | 528 | |
mbed_official | 133:d4dda5c437f0 | 529 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 530 | if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 531 | { |
mbed_official | 133:d4dda5c437f0 | 532 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 533 | } |
mbed_official | 133:d4dda5c437f0 | 534 | |
mbed_official | 133:d4dda5c437f0 | 535 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 536 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 537 | |
mbed_official | 133:d4dda5c437f0 | 538 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 539 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 540 | |
mbed_official | 133:d4dda5c437f0 | 541 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 542 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 543 | } |
mbed_official | 133:d4dda5c437f0 | 544 | |
mbed_official | 133:d4dda5c437f0 | 545 | /** |
mbed_official | 133:d4dda5c437f0 | 546 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode |
mbed_official | 133:d4dda5c437f0 | 547 | * then decrypted pCypherData. The cypher data are available in pPlainData |
mbed_official | 133:d4dda5c437f0 | 548 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 549 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 550 | * @param Size: Length of the plaintext buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 551 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 552 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 553 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 554 | */ |
mbed_official | 133:d4dda5c437f0 | 555 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 556 | { |
mbed_official | 133:d4dda5c437f0 | 557 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 558 | |
mbed_official | 133:d4dda5c437f0 | 559 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 560 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 561 | |
mbed_official | 133:d4dda5c437f0 | 562 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 563 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 564 | |
mbed_official | 133:d4dda5c437f0 | 565 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 566 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 567 | { |
mbed_official | 133:d4dda5c437f0 | 568 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 569 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 570 | |
mbed_official | 133:d4dda5c437f0 | 571 | /* Set the CRYP peripheral in AES Key mode */ |
mbed_official | 133:d4dda5c437f0 | 572 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 573 | |
mbed_official | 133:d4dda5c437f0 | 574 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 575 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 576 | |
mbed_official | 133:d4dda5c437f0 | 577 | /* Get Timeout */ |
mbed_official | 133:d4dda5c437f0 | 578 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 579 | |
mbed_official | 133:d4dda5c437f0 | 580 | while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 581 | { |
mbed_official | 133:d4dda5c437f0 | 582 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 583 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 584 | { |
mbed_official | 133:d4dda5c437f0 | 585 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 586 | { |
mbed_official | 133:d4dda5c437f0 | 587 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 588 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 589 | |
mbed_official | 133:d4dda5c437f0 | 590 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 591 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 592 | |
mbed_official | 133:d4dda5c437f0 | 593 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 594 | } |
mbed_official | 133:d4dda5c437f0 | 595 | } |
mbed_official | 133:d4dda5c437f0 | 596 | } |
mbed_official | 133:d4dda5c437f0 | 597 | |
mbed_official | 133:d4dda5c437f0 | 598 | /* Reset the ALGOMODE bits*/ |
mbed_official | 133:d4dda5c437f0 | 599 | CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE); |
mbed_official | 133:d4dda5c437f0 | 600 | |
mbed_official | 133:d4dda5c437f0 | 601 | /* Set the CRYP peripheral in AES CBC decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 602 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 603 | |
mbed_official | 133:d4dda5c437f0 | 604 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 605 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 606 | |
mbed_official | 133:d4dda5c437f0 | 607 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 608 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 609 | |
mbed_official | 133:d4dda5c437f0 | 610 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 611 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 612 | |
mbed_official | 133:d4dda5c437f0 | 613 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 614 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 615 | } |
mbed_official | 133:d4dda5c437f0 | 616 | |
mbed_official | 133:d4dda5c437f0 | 617 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 618 | if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 619 | { |
mbed_official | 133:d4dda5c437f0 | 620 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 621 | } |
mbed_official | 133:d4dda5c437f0 | 622 | |
mbed_official | 133:d4dda5c437f0 | 623 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 624 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 625 | |
mbed_official | 133:d4dda5c437f0 | 626 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 627 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 628 | |
mbed_official | 133:d4dda5c437f0 | 629 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 630 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 631 | } |
mbed_official | 133:d4dda5c437f0 | 632 | |
mbed_official | 133:d4dda5c437f0 | 633 | /** |
mbed_official | 133:d4dda5c437f0 | 634 | * @brief Initializes the CRYP peripheral in AES CTR decryption mode |
mbed_official | 133:d4dda5c437f0 | 635 | * then decrypted pCypherData. The cypher data are available in pPlainData |
mbed_official | 133:d4dda5c437f0 | 636 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 637 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 638 | * @param Size: Length of the plaintext buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 639 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 640 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 641 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 642 | */ |
mbed_official | 133:d4dda5c437f0 | 643 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 644 | { |
mbed_official | 133:d4dda5c437f0 | 645 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 646 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 647 | |
mbed_official | 133:d4dda5c437f0 | 648 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 649 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 650 | { |
mbed_official | 133:d4dda5c437f0 | 651 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 652 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 653 | |
mbed_official | 133:d4dda5c437f0 | 654 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 655 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 656 | |
mbed_official | 133:d4dda5c437f0 | 657 | /* Set the CRYP peripheral in AES CTR mode */ |
mbed_official | 133:d4dda5c437f0 | 658 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 659 | |
mbed_official | 133:d4dda5c437f0 | 660 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 661 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 662 | |
mbed_official | 133:d4dda5c437f0 | 663 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 664 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 665 | |
mbed_official | 133:d4dda5c437f0 | 666 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 667 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 668 | |
mbed_official | 133:d4dda5c437f0 | 669 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 670 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 671 | } |
mbed_official | 133:d4dda5c437f0 | 672 | |
mbed_official | 133:d4dda5c437f0 | 673 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 674 | if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 675 | { |
mbed_official | 133:d4dda5c437f0 | 676 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 677 | } |
mbed_official | 133:d4dda5c437f0 | 678 | |
mbed_official | 133:d4dda5c437f0 | 679 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 680 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 681 | |
mbed_official | 133:d4dda5c437f0 | 682 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 683 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 684 | |
mbed_official | 133:d4dda5c437f0 | 685 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 686 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 687 | } |
mbed_official | 133:d4dda5c437f0 | 688 | |
mbed_official | 133:d4dda5c437f0 | 689 | /** |
mbed_official | 133:d4dda5c437f0 | 690 | * @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt. |
mbed_official | 133:d4dda5c437f0 | 691 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 692 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 693 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes |
mbed_official | 133:d4dda5c437f0 | 694 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 695 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 696 | */ |
mbed_official | 133:d4dda5c437f0 | 697 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 698 | { |
mbed_official | 133:d4dda5c437f0 | 699 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 700 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 701 | |
mbed_official | 133:d4dda5c437f0 | 702 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 703 | { |
mbed_official | 133:d4dda5c437f0 | 704 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 705 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 706 | |
mbed_official | 133:d4dda5c437f0 | 707 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 708 | hcryp->pCrypInBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 709 | hcryp->pCrypOutBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 710 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 711 | |
mbed_official | 133:d4dda5c437f0 | 712 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 713 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 714 | |
mbed_official | 133:d4dda5c437f0 | 715 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 716 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 717 | { |
mbed_official | 133:d4dda5c437f0 | 718 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 719 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 720 | |
mbed_official | 133:d4dda5c437f0 | 721 | /* Set the CRYP peripheral in AES ECB mode */ |
mbed_official | 133:d4dda5c437f0 | 722 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB); |
mbed_official | 133:d4dda5c437f0 | 723 | |
mbed_official | 133:d4dda5c437f0 | 724 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 725 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 726 | |
mbed_official | 133:d4dda5c437f0 | 727 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 728 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 729 | } |
mbed_official | 133:d4dda5c437f0 | 730 | |
mbed_official | 133:d4dda5c437f0 | 731 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 732 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 733 | |
mbed_official | 133:d4dda5c437f0 | 734 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 735 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 736 | |
mbed_official | 133:d4dda5c437f0 | 737 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 738 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 739 | } |
mbed_official | 133:d4dda5c437f0 | 740 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 741 | { |
mbed_official | 133:d4dda5c437f0 | 742 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 743 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 744 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 745 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 746 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 747 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 748 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 749 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 750 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 751 | hcryp->pCrypInBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 752 | hcryp->CrypInCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 753 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 754 | { |
mbed_official | 133:d4dda5c437f0 | 755 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 756 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 757 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 758 | } |
mbed_official | 133:d4dda5c437f0 | 759 | } |
mbed_official | 133:d4dda5c437f0 | 760 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 761 | { |
mbed_official | 133:d4dda5c437f0 | 762 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 763 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 764 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 765 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 766 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 767 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 768 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 769 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 770 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 771 | hcryp->pCrypOutBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 772 | hcryp->CrypOutCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 773 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 774 | { |
mbed_official | 133:d4dda5c437f0 | 775 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 776 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 777 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 778 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 779 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 780 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 781 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 782 | } |
mbed_official | 133:d4dda5c437f0 | 783 | } |
mbed_official | 133:d4dda5c437f0 | 784 | |
mbed_official | 133:d4dda5c437f0 | 785 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 786 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 787 | } |
mbed_official | 133:d4dda5c437f0 | 788 | |
mbed_official | 133:d4dda5c437f0 | 789 | /** |
mbed_official | 133:d4dda5c437f0 | 790 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt. |
mbed_official | 133:d4dda5c437f0 | 791 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 792 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 793 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes |
mbed_official | 133:d4dda5c437f0 | 794 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 795 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 796 | */ |
mbed_official | 133:d4dda5c437f0 | 797 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 798 | { |
mbed_official | 133:d4dda5c437f0 | 799 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 800 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 801 | |
mbed_official | 133:d4dda5c437f0 | 802 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 803 | { |
mbed_official | 133:d4dda5c437f0 | 804 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 805 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 806 | |
mbed_official | 133:d4dda5c437f0 | 807 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 808 | hcryp->pCrypInBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 809 | hcryp->pCrypOutBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 810 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 811 | |
mbed_official | 133:d4dda5c437f0 | 812 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 813 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 814 | |
mbed_official | 133:d4dda5c437f0 | 815 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 816 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 817 | { |
mbed_official | 133:d4dda5c437f0 | 818 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 819 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 820 | |
mbed_official | 133:d4dda5c437f0 | 821 | /* Set the CRYP peripheral in AES CBC mode */ |
mbed_official | 133:d4dda5c437f0 | 822 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC); |
mbed_official | 133:d4dda5c437f0 | 823 | |
mbed_official | 133:d4dda5c437f0 | 824 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 825 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 826 | |
mbed_official | 133:d4dda5c437f0 | 827 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 828 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 829 | |
mbed_official | 133:d4dda5c437f0 | 830 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 831 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 832 | } |
mbed_official | 133:d4dda5c437f0 | 833 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 834 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 835 | |
mbed_official | 133:d4dda5c437f0 | 836 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 837 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 838 | |
mbed_official | 133:d4dda5c437f0 | 839 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 840 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 841 | } |
mbed_official | 133:d4dda5c437f0 | 842 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 843 | { |
mbed_official | 133:d4dda5c437f0 | 844 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 845 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 846 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 847 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 848 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 849 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 850 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 851 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 852 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 853 | hcryp->pCrypInBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 854 | hcryp->CrypInCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 855 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 856 | { |
mbed_official | 133:d4dda5c437f0 | 857 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 858 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 859 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 860 | } |
mbed_official | 133:d4dda5c437f0 | 861 | } |
mbed_official | 133:d4dda5c437f0 | 862 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 863 | { |
mbed_official | 133:d4dda5c437f0 | 864 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 865 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 866 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 867 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 868 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 869 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 870 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 871 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 872 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 873 | hcryp->pCrypOutBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 874 | hcryp->CrypOutCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 875 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 876 | { |
mbed_official | 133:d4dda5c437f0 | 877 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 878 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 879 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 880 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 881 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 882 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 883 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 884 | } |
mbed_official | 133:d4dda5c437f0 | 885 | } |
mbed_official | 133:d4dda5c437f0 | 886 | |
mbed_official | 133:d4dda5c437f0 | 887 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 888 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 889 | } |
mbed_official | 133:d4dda5c437f0 | 890 | |
mbed_official | 133:d4dda5c437f0 | 891 | /** |
mbed_official | 133:d4dda5c437f0 | 892 | * @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt. |
mbed_official | 133:d4dda5c437f0 | 893 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 894 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 895 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes |
mbed_official | 133:d4dda5c437f0 | 896 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 897 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 898 | */ |
mbed_official | 133:d4dda5c437f0 | 899 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 900 | { |
mbed_official | 133:d4dda5c437f0 | 901 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 902 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 903 | |
mbed_official | 133:d4dda5c437f0 | 904 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 905 | { |
mbed_official | 133:d4dda5c437f0 | 906 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 907 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 908 | |
mbed_official | 133:d4dda5c437f0 | 909 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 910 | hcryp->pCrypInBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 911 | hcryp->pCrypOutBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 912 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 913 | |
mbed_official | 133:d4dda5c437f0 | 914 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 915 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 916 | |
mbed_official | 133:d4dda5c437f0 | 917 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 918 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 919 | { |
mbed_official | 133:d4dda5c437f0 | 920 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 921 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 922 | |
mbed_official | 133:d4dda5c437f0 | 923 | /* Set the CRYP peripheral in AES CTR mode */ |
mbed_official | 133:d4dda5c437f0 | 924 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR); |
mbed_official | 133:d4dda5c437f0 | 925 | |
mbed_official | 133:d4dda5c437f0 | 926 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 927 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 928 | |
mbed_official | 133:d4dda5c437f0 | 929 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 930 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 931 | |
mbed_official | 133:d4dda5c437f0 | 932 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 933 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 934 | } |
mbed_official | 133:d4dda5c437f0 | 935 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 936 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 937 | |
mbed_official | 133:d4dda5c437f0 | 938 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 939 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 940 | |
mbed_official | 133:d4dda5c437f0 | 941 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 942 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 943 | } |
mbed_official | 133:d4dda5c437f0 | 944 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 945 | { |
mbed_official | 133:d4dda5c437f0 | 946 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 947 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 948 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 949 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 950 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 951 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 952 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 953 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 954 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 955 | hcryp->pCrypInBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 956 | hcryp->CrypInCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 957 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 958 | { |
mbed_official | 133:d4dda5c437f0 | 959 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 960 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 961 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 962 | } |
mbed_official | 133:d4dda5c437f0 | 963 | } |
mbed_official | 133:d4dda5c437f0 | 964 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 965 | { |
mbed_official | 133:d4dda5c437f0 | 966 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 967 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 968 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 969 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 970 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 971 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 972 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 973 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 974 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 975 | hcryp->pCrypOutBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 976 | hcryp->CrypOutCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 977 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 978 | { |
mbed_official | 133:d4dda5c437f0 | 979 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 980 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 981 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 982 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 983 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 984 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 985 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 986 | } |
mbed_official | 133:d4dda5c437f0 | 987 | } |
mbed_official | 133:d4dda5c437f0 | 988 | |
mbed_official | 133:d4dda5c437f0 | 989 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 990 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 991 | } |
mbed_official | 133:d4dda5c437f0 | 992 | |
mbed_official | 133:d4dda5c437f0 | 993 | |
mbed_official | 133:d4dda5c437f0 | 994 | /** |
mbed_official | 133:d4dda5c437f0 | 995 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt. |
mbed_official | 133:d4dda5c437f0 | 996 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 997 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 998 | * @param Size: Length of the plaintext buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 999 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1000 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1001 | */ |
mbed_official | 133:d4dda5c437f0 | 1002 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 1003 | { |
mbed_official | 133:d4dda5c437f0 | 1004 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 1005 | |
mbed_official | 133:d4dda5c437f0 | 1006 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1007 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 1008 | |
mbed_official | 133:d4dda5c437f0 | 1009 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1010 | { |
mbed_official | 133:d4dda5c437f0 | 1011 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1012 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1013 | |
mbed_official | 133:d4dda5c437f0 | 1014 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1015 | hcryp->pCrypInBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 1016 | hcryp->pCrypOutBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 1017 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1018 | |
mbed_official | 133:d4dda5c437f0 | 1019 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1020 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1021 | |
mbed_official | 133:d4dda5c437f0 | 1022 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1023 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1024 | { |
mbed_official | 133:d4dda5c437f0 | 1025 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 1026 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1027 | |
mbed_official | 133:d4dda5c437f0 | 1028 | /* Set the CRYP peripheral in AES Key mode */ |
mbed_official | 133:d4dda5c437f0 | 1029 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1030 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1031 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1032 | |
mbed_official | 133:d4dda5c437f0 | 1033 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1034 | timeout = HAL_GetTick() + 1; |
mbed_official | 133:d4dda5c437f0 | 1035 | |
mbed_official | 133:d4dda5c437f0 | 1036 | while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 1037 | { |
mbed_official | 133:d4dda5c437f0 | 1038 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1039 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1040 | { |
mbed_official | 133:d4dda5c437f0 | 1041 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1042 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1043 | |
mbed_official | 133:d4dda5c437f0 | 1044 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1045 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1046 | |
mbed_official | 133:d4dda5c437f0 | 1047 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1048 | } |
mbed_official | 133:d4dda5c437f0 | 1049 | } |
mbed_official | 133:d4dda5c437f0 | 1050 | |
mbed_official | 133:d4dda5c437f0 | 1051 | /* Reset the ALGOMODE bits*/ |
mbed_official | 133:d4dda5c437f0 | 1052 | CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE); |
mbed_official | 133:d4dda5c437f0 | 1053 | |
mbed_official | 133:d4dda5c437f0 | 1054 | /* Set the CRYP peripheral in AES ECB decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 1055 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1056 | |
mbed_official | 133:d4dda5c437f0 | 1057 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1058 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 1059 | |
mbed_official | 133:d4dda5c437f0 | 1060 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1061 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1062 | } |
mbed_official | 133:d4dda5c437f0 | 1063 | |
mbed_official | 133:d4dda5c437f0 | 1064 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 1065 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 1066 | |
mbed_official | 133:d4dda5c437f0 | 1067 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1068 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1069 | |
mbed_official | 133:d4dda5c437f0 | 1070 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1071 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1072 | } |
mbed_official | 133:d4dda5c437f0 | 1073 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 1074 | { |
mbed_official | 133:d4dda5c437f0 | 1075 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 1076 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1077 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1078 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1079 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1080 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1081 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1082 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1083 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1084 | hcryp->pCrypInBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 1085 | hcryp->CrypInCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 1086 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 1087 | { |
mbed_official | 133:d4dda5c437f0 | 1088 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 1089 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1090 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1091 | } |
mbed_official | 133:d4dda5c437f0 | 1092 | } |
mbed_official | 133:d4dda5c437f0 | 1093 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 1094 | { |
mbed_official | 133:d4dda5c437f0 | 1095 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 1096 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1097 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1098 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1099 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1100 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1101 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1102 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1103 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1104 | hcryp->pCrypOutBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 1105 | hcryp->CrypOutCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 1106 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 1107 | { |
mbed_official | 133:d4dda5c437f0 | 1108 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 1109 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1110 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1111 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1112 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1113 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1114 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1115 | } |
mbed_official | 133:d4dda5c437f0 | 1116 | } |
mbed_official | 133:d4dda5c437f0 | 1117 | |
mbed_official | 133:d4dda5c437f0 | 1118 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1119 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1120 | } |
mbed_official | 133:d4dda5c437f0 | 1121 | |
mbed_official | 133:d4dda5c437f0 | 1122 | /** |
mbed_official | 133:d4dda5c437f0 | 1123 | * @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT. |
mbed_official | 133:d4dda5c437f0 | 1124 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1125 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1126 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 133:d4dda5c437f0 | 1127 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1128 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1129 | */ |
mbed_official | 133:d4dda5c437f0 | 1130 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 1131 | { |
mbed_official | 133:d4dda5c437f0 | 1132 | |
mbed_official | 133:d4dda5c437f0 | 1133 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 1134 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1135 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 1136 | |
mbed_official | 133:d4dda5c437f0 | 1137 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1138 | { |
mbed_official | 133:d4dda5c437f0 | 1139 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1140 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1141 | |
mbed_official | 133:d4dda5c437f0 | 1142 | /* Get the buffer addresses and sizes */ |
mbed_official | 133:d4dda5c437f0 | 1143 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1144 | hcryp->pCrypInBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 1145 | hcryp->pCrypOutBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 1146 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1147 | |
mbed_official | 133:d4dda5c437f0 | 1148 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1149 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1150 | |
mbed_official | 133:d4dda5c437f0 | 1151 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1152 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1153 | { |
mbed_official | 133:d4dda5c437f0 | 1154 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 1155 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1156 | |
mbed_official | 133:d4dda5c437f0 | 1157 | /* Set the CRYP peripheral in AES Key mode */ |
mbed_official | 133:d4dda5c437f0 | 1158 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1159 | |
mbed_official | 133:d4dda5c437f0 | 1160 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1161 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1162 | |
mbed_official | 133:d4dda5c437f0 | 1163 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1164 | timeout = HAL_GetTick() + 1; |
mbed_official | 133:d4dda5c437f0 | 1165 | |
mbed_official | 133:d4dda5c437f0 | 1166 | while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 1167 | { |
mbed_official | 133:d4dda5c437f0 | 1168 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1169 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1170 | { |
mbed_official | 133:d4dda5c437f0 | 1171 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1172 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1173 | |
mbed_official | 133:d4dda5c437f0 | 1174 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1175 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1176 | |
mbed_official | 133:d4dda5c437f0 | 1177 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1178 | } |
mbed_official | 133:d4dda5c437f0 | 1179 | } |
mbed_official | 133:d4dda5c437f0 | 1180 | |
mbed_official | 133:d4dda5c437f0 | 1181 | /* Reset the ALGOMODE bits*/ |
mbed_official | 133:d4dda5c437f0 | 1182 | CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE); |
mbed_official | 133:d4dda5c437f0 | 1183 | |
mbed_official | 133:d4dda5c437f0 | 1184 | /* Set the CRYP peripheral in AES CBC decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 1185 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1186 | |
mbed_official | 133:d4dda5c437f0 | 1187 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 1188 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 1189 | |
mbed_official | 133:d4dda5c437f0 | 1190 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1191 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 1192 | |
mbed_official | 133:d4dda5c437f0 | 1193 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1194 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1195 | |
mbed_official | 133:d4dda5c437f0 | 1196 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1197 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1198 | } |
mbed_official | 133:d4dda5c437f0 | 1199 | |
mbed_official | 133:d4dda5c437f0 | 1200 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 1201 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 1202 | |
mbed_official | 133:d4dda5c437f0 | 1203 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1204 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1205 | |
mbed_official | 133:d4dda5c437f0 | 1206 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1207 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1208 | } |
mbed_official | 133:d4dda5c437f0 | 1209 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 1210 | { |
mbed_official | 133:d4dda5c437f0 | 1211 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 1212 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1213 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1214 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1215 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1216 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1217 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1218 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1219 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1220 | hcryp->pCrypInBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 1221 | hcryp->CrypInCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 1222 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 1223 | { |
mbed_official | 133:d4dda5c437f0 | 1224 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 1225 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1226 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1227 | } |
mbed_official | 133:d4dda5c437f0 | 1228 | } |
mbed_official | 133:d4dda5c437f0 | 1229 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 1230 | { |
mbed_official | 133:d4dda5c437f0 | 1231 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 1232 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1233 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1234 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1235 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1236 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1237 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1238 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1239 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1240 | hcryp->pCrypOutBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 1241 | hcryp->CrypOutCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 1242 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 1243 | { |
mbed_official | 133:d4dda5c437f0 | 1244 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 1245 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1246 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1247 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1248 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1249 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1250 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1251 | } |
mbed_official | 133:d4dda5c437f0 | 1252 | } |
mbed_official | 133:d4dda5c437f0 | 1253 | |
mbed_official | 133:d4dda5c437f0 | 1254 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1255 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1256 | } |
mbed_official | 133:d4dda5c437f0 | 1257 | |
mbed_official | 133:d4dda5c437f0 | 1258 | /** |
mbed_official | 133:d4dda5c437f0 | 1259 | * @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt. |
mbed_official | 133:d4dda5c437f0 | 1260 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1261 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1262 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 133:d4dda5c437f0 | 1263 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1264 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1265 | */ |
mbed_official | 133:d4dda5c437f0 | 1266 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 1267 | { |
mbed_official | 133:d4dda5c437f0 | 1268 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1269 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 1270 | |
mbed_official | 133:d4dda5c437f0 | 1271 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1272 | { |
mbed_official | 133:d4dda5c437f0 | 1273 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1274 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1275 | |
mbed_official | 133:d4dda5c437f0 | 1276 | /* Get the buffer addresses and sizes */ |
mbed_official | 133:d4dda5c437f0 | 1277 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1278 | hcryp->pCrypInBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 1279 | hcryp->pCrypOutBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 1280 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1281 | |
mbed_official | 133:d4dda5c437f0 | 1282 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1283 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1284 | |
mbed_official | 133:d4dda5c437f0 | 1285 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1286 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1287 | { |
mbed_official | 133:d4dda5c437f0 | 1288 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 1289 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1290 | |
mbed_official | 133:d4dda5c437f0 | 1291 | /* Set the CRYP peripheral in AES CTR mode */ |
mbed_official | 133:d4dda5c437f0 | 1292 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1293 | |
mbed_official | 133:d4dda5c437f0 | 1294 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 1295 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 1296 | |
mbed_official | 133:d4dda5c437f0 | 1297 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1298 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 1299 | |
mbed_official | 133:d4dda5c437f0 | 1300 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1301 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1302 | } |
mbed_official | 133:d4dda5c437f0 | 1303 | |
mbed_official | 133:d4dda5c437f0 | 1304 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 1305 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 1306 | |
mbed_official | 133:d4dda5c437f0 | 1307 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1308 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1309 | |
mbed_official | 133:d4dda5c437f0 | 1310 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1311 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1312 | } |
mbed_official | 133:d4dda5c437f0 | 1313 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 1314 | { |
mbed_official | 133:d4dda5c437f0 | 1315 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 1316 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1317 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1318 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1319 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1320 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1321 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1322 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1323 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1324 | hcryp->pCrypInBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 1325 | hcryp->CrypInCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 1326 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 1327 | { |
mbed_official | 133:d4dda5c437f0 | 1328 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 1329 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1330 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1331 | } |
mbed_official | 133:d4dda5c437f0 | 1332 | } |
mbed_official | 133:d4dda5c437f0 | 1333 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 1334 | { |
mbed_official | 133:d4dda5c437f0 | 1335 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 1336 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1337 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1338 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1339 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1340 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1341 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1342 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1343 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1344 | hcryp->pCrypOutBuffPtr += 16; |
mbed_official | 133:d4dda5c437f0 | 1345 | hcryp->CrypOutCount -= 16; |
mbed_official | 133:d4dda5c437f0 | 1346 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 1347 | { |
mbed_official | 133:d4dda5c437f0 | 1348 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 1349 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1350 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1351 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1352 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1353 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1354 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1355 | } |
mbed_official | 133:d4dda5c437f0 | 1356 | } |
mbed_official | 133:d4dda5c437f0 | 1357 | |
mbed_official | 133:d4dda5c437f0 | 1358 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1359 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1360 | } |
mbed_official | 133:d4dda5c437f0 | 1361 | |
mbed_official | 133:d4dda5c437f0 | 1362 | /** |
mbed_official | 133:d4dda5c437f0 | 1363 | * @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 1364 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1365 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1366 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes |
mbed_official | 133:d4dda5c437f0 | 1367 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1368 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1369 | */ |
mbed_official | 133:d4dda5c437f0 | 1370 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 1371 | { |
mbed_official | 133:d4dda5c437f0 | 1372 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1373 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 1374 | |
mbed_official | 133:d4dda5c437f0 | 1375 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 1376 | { |
mbed_official | 133:d4dda5c437f0 | 1377 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1378 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1379 | |
mbed_official | 133:d4dda5c437f0 | 1380 | inputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 1381 | outputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 1382 | |
mbed_official | 133:d4dda5c437f0 | 1383 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1384 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1385 | |
mbed_official | 133:d4dda5c437f0 | 1386 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1387 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1388 | { |
mbed_official | 133:d4dda5c437f0 | 1389 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 1390 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1391 | |
mbed_official | 133:d4dda5c437f0 | 1392 | /* Set the CRYP peripheral in AES ECB mode */ |
mbed_official | 133:d4dda5c437f0 | 1393 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB); |
mbed_official | 133:d4dda5c437f0 | 1394 | |
mbed_official | 133:d4dda5c437f0 | 1395 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1396 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 1397 | |
mbed_official | 133:d4dda5c437f0 | 1398 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1399 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1400 | } |
mbed_official | 133:d4dda5c437f0 | 1401 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 1402 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 1403 | |
mbed_official | 133:d4dda5c437f0 | 1404 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1405 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1406 | |
mbed_official | 133:d4dda5c437f0 | 1407 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1408 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1409 | } |
mbed_official | 133:d4dda5c437f0 | 1410 | else |
mbed_official | 133:d4dda5c437f0 | 1411 | { |
mbed_official | 133:d4dda5c437f0 | 1412 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1413 | } |
mbed_official | 133:d4dda5c437f0 | 1414 | } |
mbed_official | 133:d4dda5c437f0 | 1415 | |
mbed_official | 133:d4dda5c437f0 | 1416 | /** |
mbed_official | 133:d4dda5c437f0 | 1417 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 1418 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1419 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1420 | * @param Size: Length of the plaintext buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 1421 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1422 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1423 | */ |
mbed_official | 133:d4dda5c437f0 | 1424 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 1425 | { |
mbed_official | 133:d4dda5c437f0 | 1426 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1427 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 1428 | |
mbed_official | 133:d4dda5c437f0 | 1429 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 1430 | { |
mbed_official | 133:d4dda5c437f0 | 1431 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1432 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1433 | |
mbed_official | 133:d4dda5c437f0 | 1434 | inputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 1435 | outputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 1436 | |
mbed_official | 133:d4dda5c437f0 | 1437 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1438 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1439 | |
mbed_official | 133:d4dda5c437f0 | 1440 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1441 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1442 | { |
mbed_official | 133:d4dda5c437f0 | 1443 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 1444 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1445 | |
mbed_official | 133:d4dda5c437f0 | 1446 | /* Set the CRYP peripheral in AES ECB mode */ |
mbed_official | 133:d4dda5c437f0 | 1447 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC); |
mbed_official | 133:d4dda5c437f0 | 1448 | |
mbed_official | 133:d4dda5c437f0 | 1449 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 1450 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 1451 | |
mbed_official | 133:d4dda5c437f0 | 1452 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1453 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 1454 | |
mbed_official | 133:d4dda5c437f0 | 1455 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1456 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1457 | } |
mbed_official | 133:d4dda5c437f0 | 1458 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 1459 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 1460 | |
mbed_official | 133:d4dda5c437f0 | 1461 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1462 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1463 | |
mbed_official | 133:d4dda5c437f0 | 1464 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1465 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1466 | } |
mbed_official | 133:d4dda5c437f0 | 1467 | else |
mbed_official | 133:d4dda5c437f0 | 1468 | { |
mbed_official | 133:d4dda5c437f0 | 1469 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1470 | } |
mbed_official | 133:d4dda5c437f0 | 1471 | } |
mbed_official | 133:d4dda5c437f0 | 1472 | |
mbed_official | 133:d4dda5c437f0 | 1473 | /** |
mbed_official | 133:d4dda5c437f0 | 1474 | * @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 1475 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1476 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1477 | * @param Size: Length of the plaintext buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 1478 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1479 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1480 | */ |
mbed_official | 133:d4dda5c437f0 | 1481 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 1482 | { |
mbed_official | 133:d4dda5c437f0 | 1483 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1484 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 1485 | |
mbed_official | 133:d4dda5c437f0 | 1486 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 1487 | { |
mbed_official | 133:d4dda5c437f0 | 1488 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1489 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1490 | |
mbed_official | 133:d4dda5c437f0 | 1491 | inputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 1492 | outputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 1493 | |
mbed_official | 133:d4dda5c437f0 | 1494 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1495 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1496 | |
mbed_official | 133:d4dda5c437f0 | 1497 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1498 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1499 | { |
mbed_official | 133:d4dda5c437f0 | 1500 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 1501 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1502 | |
mbed_official | 133:d4dda5c437f0 | 1503 | /* Set the CRYP peripheral in AES ECB mode */ |
mbed_official | 133:d4dda5c437f0 | 1504 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR); |
mbed_official | 133:d4dda5c437f0 | 1505 | |
mbed_official | 133:d4dda5c437f0 | 1506 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 1507 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 1508 | |
mbed_official | 133:d4dda5c437f0 | 1509 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1510 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 1511 | |
mbed_official | 133:d4dda5c437f0 | 1512 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1513 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1514 | } |
mbed_official | 133:d4dda5c437f0 | 1515 | |
mbed_official | 133:d4dda5c437f0 | 1516 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 1517 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 1518 | |
mbed_official | 133:d4dda5c437f0 | 1519 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1520 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1521 | |
mbed_official | 133:d4dda5c437f0 | 1522 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1523 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1524 | } |
mbed_official | 133:d4dda5c437f0 | 1525 | else |
mbed_official | 133:d4dda5c437f0 | 1526 | { |
mbed_official | 133:d4dda5c437f0 | 1527 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1528 | } |
mbed_official | 133:d4dda5c437f0 | 1529 | } |
mbed_official | 133:d4dda5c437f0 | 1530 | |
mbed_official | 133:d4dda5c437f0 | 1531 | /** |
mbed_official | 133:d4dda5c437f0 | 1532 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 1533 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1534 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1535 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes |
mbed_official | 133:d4dda5c437f0 | 1536 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1537 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1538 | */ |
mbed_official | 133:d4dda5c437f0 | 1539 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 1540 | { |
mbed_official | 133:d4dda5c437f0 | 1541 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 1542 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1543 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 1544 | |
mbed_official | 133:d4dda5c437f0 | 1545 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 1546 | { |
mbed_official | 133:d4dda5c437f0 | 1547 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1548 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1549 | |
mbed_official | 133:d4dda5c437f0 | 1550 | inputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 1551 | outputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 1552 | |
mbed_official | 133:d4dda5c437f0 | 1553 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1554 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1555 | |
mbed_official | 133:d4dda5c437f0 | 1556 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1557 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1558 | { |
mbed_official | 133:d4dda5c437f0 | 1559 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 1560 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1561 | |
mbed_official | 133:d4dda5c437f0 | 1562 | /* Set the CRYP peripheral in AES Key mode */ |
mbed_official | 133:d4dda5c437f0 | 1563 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1564 | |
mbed_official | 133:d4dda5c437f0 | 1565 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1566 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1567 | |
mbed_official | 133:d4dda5c437f0 | 1568 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1569 | timeout = HAL_GetTick() + 1; |
mbed_official | 133:d4dda5c437f0 | 1570 | |
mbed_official | 133:d4dda5c437f0 | 1571 | while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 1572 | { |
mbed_official | 133:d4dda5c437f0 | 1573 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1574 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1575 | { |
mbed_official | 133:d4dda5c437f0 | 1576 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1577 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1578 | |
mbed_official | 133:d4dda5c437f0 | 1579 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1580 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1581 | |
mbed_official | 133:d4dda5c437f0 | 1582 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1583 | } |
mbed_official | 133:d4dda5c437f0 | 1584 | } |
mbed_official | 133:d4dda5c437f0 | 1585 | |
mbed_official | 133:d4dda5c437f0 | 1586 | /* Reset the ALGOMODE bits*/ |
mbed_official | 133:d4dda5c437f0 | 1587 | CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE); |
mbed_official | 133:d4dda5c437f0 | 1588 | |
mbed_official | 133:d4dda5c437f0 | 1589 | /* Set the CRYP peripheral in AES ECB decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 1590 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1591 | |
mbed_official | 133:d4dda5c437f0 | 1592 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1593 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 1594 | |
mbed_official | 133:d4dda5c437f0 | 1595 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1596 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1597 | } |
mbed_official | 133:d4dda5c437f0 | 1598 | |
mbed_official | 133:d4dda5c437f0 | 1599 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 1600 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 1601 | |
mbed_official | 133:d4dda5c437f0 | 1602 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1603 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1604 | |
mbed_official | 133:d4dda5c437f0 | 1605 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1606 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1607 | } |
mbed_official | 133:d4dda5c437f0 | 1608 | else |
mbed_official | 133:d4dda5c437f0 | 1609 | { |
mbed_official | 133:d4dda5c437f0 | 1610 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1611 | } |
mbed_official | 133:d4dda5c437f0 | 1612 | } |
mbed_official | 133:d4dda5c437f0 | 1613 | |
mbed_official | 133:d4dda5c437f0 | 1614 | /** |
mbed_official | 133:d4dda5c437f0 | 1615 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 1616 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1617 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1618 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes |
mbed_official | 133:d4dda5c437f0 | 1619 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1620 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1621 | */ |
mbed_official | 133:d4dda5c437f0 | 1622 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 1623 | { |
mbed_official | 133:d4dda5c437f0 | 1624 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 1625 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1626 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 1627 | |
mbed_official | 133:d4dda5c437f0 | 1628 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 1629 | { |
mbed_official | 133:d4dda5c437f0 | 1630 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1631 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1632 | |
mbed_official | 133:d4dda5c437f0 | 1633 | inputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 1634 | outputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 1635 | |
mbed_official | 133:d4dda5c437f0 | 1636 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1637 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1638 | |
mbed_official | 133:d4dda5c437f0 | 1639 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1640 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1641 | { |
mbed_official | 133:d4dda5c437f0 | 1642 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 1643 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1644 | |
mbed_official | 133:d4dda5c437f0 | 1645 | /* Set the CRYP peripheral in AES Key mode */ |
mbed_official | 133:d4dda5c437f0 | 1646 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1647 | |
mbed_official | 133:d4dda5c437f0 | 1648 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1649 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1650 | |
mbed_official | 133:d4dda5c437f0 | 1651 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1652 | timeout = HAL_GetTick() + 1; |
mbed_official | 133:d4dda5c437f0 | 1653 | |
mbed_official | 133:d4dda5c437f0 | 1654 | while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 1655 | { |
mbed_official | 133:d4dda5c437f0 | 1656 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1657 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1658 | { |
mbed_official | 133:d4dda5c437f0 | 1659 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1660 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1661 | |
mbed_official | 133:d4dda5c437f0 | 1662 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1663 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1664 | |
mbed_official | 133:d4dda5c437f0 | 1665 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1666 | } |
mbed_official | 133:d4dda5c437f0 | 1667 | } |
mbed_official | 133:d4dda5c437f0 | 1668 | |
mbed_official | 133:d4dda5c437f0 | 1669 | /* Reset the ALGOMODE bits*/ |
mbed_official | 133:d4dda5c437f0 | 1670 | CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE); |
mbed_official | 133:d4dda5c437f0 | 1671 | |
mbed_official | 133:d4dda5c437f0 | 1672 | /* Set the CRYP peripheral in AES CBC decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 1673 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1674 | |
mbed_official | 133:d4dda5c437f0 | 1675 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 1676 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 1677 | |
mbed_official | 133:d4dda5c437f0 | 1678 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1679 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 1680 | |
mbed_official | 133:d4dda5c437f0 | 1681 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1682 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1683 | } |
mbed_official | 133:d4dda5c437f0 | 1684 | |
mbed_official | 133:d4dda5c437f0 | 1685 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 1686 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 1687 | |
mbed_official | 133:d4dda5c437f0 | 1688 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1689 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1690 | |
mbed_official | 133:d4dda5c437f0 | 1691 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1692 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1693 | } |
mbed_official | 133:d4dda5c437f0 | 1694 | else |
mbed_official | 133:d4dda5c437f0 | 1695 | { |
mbed_official | 133:d4dda5c437f0 | 1696 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1697 | } |
mbed_official | 133:d4dda5c437f0 | 1698 | } |
mbed_official | 133:d4dda5c437f0 | 1699 | |
mbed_official | 133:d4dda5c437f0 | 1700 | /** |
mbed_official | 133:d4dda5c437f0 | 1701 | * @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 1702 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1703 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1704 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 133:d4dda5c437f0 | 1705 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1706 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1707 | */ |
mbed_official | 133:d4dda5c437f0 | 1708 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 1709 | { |
mbed_official | 133:d4dda5c437f0 | 1710 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1711 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 1712 | |
mbed_official | 133:d4dda5c437f0 | 1713 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 1714 | { |
mbed_official | 133:d4dda5c437f0 | 1715 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1716 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1717 | |
mbed_official | 133:d4dda5c437f0 | 1718 | inputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 1719 | outputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 1720 | |
mbed_official | 133:d4dda5c437f0 | 1721 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1722 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1723 | |
mbed_official | 133:d4dda5c437f0 | 1724 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1725 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1726 | { |
mbed_official | 133:d4dda5c437f0 | 1727 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 1728 | CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1729 | |
mbed_official | 133:d4dda5c437f0 | 1730 | /* Set the CRYP peripheral in AES CTR mode */ |
mbed_official | 133:d4dda5c437f0 | 1731 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1732 | |
mbed_official | 133:d4dda5c437f0 | 1733 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 1734 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 133:d4dda5c437f0 | 1735 | |
mbed_official | 133:d4dda5c437f0 | 1736 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1737 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 1738 | |
mbed_official | 133:d4dda5c437f0 | 1739 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1740 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1741 | } |
mbed_official | 133:d4dda5c437f0 | 1742 | |
mbed_official | 133:d4dda5c437f0 | 1743 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 1744 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 1745 | |
mbed_official | 133:d4dda5c437f0 | 1746 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1747 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1748 | |
mbed_official | 133:d4dda5c437f0 | 1749 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1750 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1751 | } |
mbed_official | 133:d4dda5c437f0 | 1752 | else |
mbed_official | 133:d4dda5c437f0 | 1753 | { |
mbed_official | 133:d4dda5c437f0 | 1754 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1755 | } |
mbed_official | 133:d4dda5c437f0 | 1756 | } |
mbed_official | 133:d4dda5c437f0 | 1757 | |
mbed_official | 133:d4dda5c437f0 | 1758 | |
mbed_official | 133:d4dda5c437f0 | 1759 | /** |
mbed_official | 133:d4dda5c437f0 | 1760 | * @} |
mbed_official | 133:d4dda5c437f0 | 1761 | */ |
mbed_official | 133:d4dda5c437f0 | 1762 | /** @defgroup CRYP_Group3 DES processing functions |
mbed_official | 133:d4dda5c437f0 | 1763 | * @brief processing functions. |
mbed_official | 133:d4dda5c437f0 | 1764 | * |
mbed_official | 133:d4dda5c437f0 | 1765 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 1766 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 1767 | ##### DES processing functions ##### |
mbed_official | 133:d4dda5c437f0 | 1768 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 1769 | [..] This section provides functions allowing to: |
mbed_official | 133:d4dda5c437f0 | 1770 | (+) Encrypt plaintext using DES using ECB or CBC chaining modes |
mbed_official | 133:d4dda5c437f0 | 1771 | (+) Decrypt cyphertext using using ECB or CBC chaining modes |
mbed_official | 133:d4dda5c437f0 | 1772 | [..] Three processing functions are available: |
mbed_official | 133:d4dda5c437f0 | 1773 | (+) polling mode |
mbed_official | 133:d4dda5c437f0 | 1774 | (+) interrupt mode |
mbed_official | 133:d4dda5c437f0 | 1775 | (+) DMA mode |
mbed_official | 133:d4dda5c437f0 | 1776 | |
mbed_official | 133:d4dda5c437f0 | 1777 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 1778 | * @{ |
mbed_official | 133:d4dda5c437f0 | 1779 | */ |
mbed_official | 133:d4dda5c437f0 | 1780 | |
mbed_official | 133:d4dda5c437f0 | 1781 | /** |
mbed_official | 133:d4dda5c437f0 | 1782 | * @brief Initializes the CRYP peripheral in DES ECB encryption mode. |
mbed_official | 133:d4dda5c437f0 | 1783 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1784 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1785 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 1786 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1787 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 1788 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1789 | */ |
mbed_official | 133:d4dda5c437f0 | 1790 | HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 1791 | { |
mbed_official | 133:d4dda5c437f0 | 1792 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1793 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1794 | |
mbed_official | 133:d4dda5c437f0 | 1795 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1796 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1797 | |
mbed_official | 133:d4dda5c437f0 | 1798 | /* Set CRYP peripheral in DES ECB encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 1799 | CRYP_SetDESECBMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 1800 | |
mbed_official | 133:d4dda5c437f0 | 1801 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1802 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1803 | |
mbed_official | 133:d4dda5c437f0 | 1804 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 1805 | if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1806 | { |
mbed_official | 133:d4dda5c437f0 | 1807 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1808 | } |
mbed_official | 133:d4dda5c437f0 | 1809 | |
mbed_official | 133:d4dda5c437f0 | 1810 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1811 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1812 | |
mbed_official | 133:d4dda5c437f0 | 1813 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1814 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1815 | |
mbed_official | 133:d4dda5c437f0 | 1816 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1817 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1818 | } |
mbed_official | 133:d4dda5c437f0 | 1819 | |
mbed_official | 133:d4dda5c437f0 | 1820 | /** |
mbed_official | 133:d4dda5c437f0 | 1821 | * @brief Initializes the CRYP peripheral in DES ECB decryption mode. |
mbed_official | 133:d4dda5c437f0 | 1822 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1823 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1824 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 1825 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1826 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 1827 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1828 | */ |
mbed_official | 133:d4dda5c437f0 | 1829 | HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 1830 | { |
mbed_official | 133:d4dda5c437f0 | 1831 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1832 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1833 | |
mbed_official | 133:d4dda5c437f0 | 1834 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1835 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1836 | |
mbed_official | 133:d4dda5c437f0 | 1837 | /* Set CRYP peripheral in DES ECB decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 1838 | CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1839 | |
mbed_official | 133:d4dda5c437f0 | 1840 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1841 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1842 | |
mbed_official | 133:d4dda5c437f0 | 1843 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 1844 | if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1845 | { |
mbed_official | 133:d4dda5c437f0 | 1846 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1847 | } |
mbed_official | 133:d4dda5c437f0 | 1848 | |
mbed_official | 133:d4dda5c437f0 | 1849 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1850 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1851 | |
mbed_official | 133:d4dda5c437f0 | 1852 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1853 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1854 | |
mbed_official | 133:d4dda5c437f0 | 1855 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1856 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1857 | } |
mbed_official | 133:d4dda5c437f0 | 1858 | |
mbed_official | 133:d4dda5c437f0 | 1859 | /** |
mbed_official | 133:d4dda5c437f0 | 1860 | * @brief Initializes the CRYP peripheral in DES CBC encryption mode. |
mbed_official | 133:d4dda5c437f0 | 1861 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1862 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1863 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 1864 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1865 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 1866 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1867 | */ |
mbed_official | 133:d4dda5c437f0 | 1868 | HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 1869 | { |
mbed_official | 133:d4dda5c437f0 | 1870 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1871 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1872 | |
mbed_official | 133:d4dda5c437f0 | 1873 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1874 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1875 | |
mbed_official | 133:d4dda5c437f0 | 1876 | /* Set CRYP peripheral in DES CBC encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 1877 | CRYP_SetDESCBCMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 1878 | |
mbed_official | 133:d4dda5c437f0 | 1879 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1880 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1881 | |
mbed_official | 133:d4dda5c437f0 | 1882 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 1883 | if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1884 | { |
mbed_official | 133:d4dda5c437f0 | 1885 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1886 | } |
mbed_official | 133:d4dda5c437f0 | 1887 | |
mbed_official | 133:d4dda5c437f0 | 1888 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1889 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1890 | |
mbed_official | 133:d4dda5c437f0 | 1891 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1892 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1893 | |
mbed_official | 133:d4dda5c437f0 | 1894 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1895 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1896 | } |
mbed_official | 133:d4dda5c437f0 | 1897 | |
mbed_official | 133:d4dda5c437f0 | 1898 | /** |
mbed_official | 133:d4dda5c437f0 | 1899 | * @brief Initializes the CRYP peripheral in DES ECB decryption mode. |
mbed_official | 133:d4dda5c437f0 | 1900 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1901 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1902 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 1903 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1904 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 1905 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1906 | */ |
mbed_official | 133:d4dda5c437f0 | 1907 | HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 1908 | { |
mbed_official | 133:d4dda5c437f0 | 1909 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1910 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1911 | |
mbed_official | 133:d4dda5c437f0 | 1912 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1913 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1914 | |
mbed_official | 133:d4dda5c437f0 | 1915 | /* Set CRYP peripheral in DES CBC decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 1916 | CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 1917 | |
mbed_official | 133:d4dda5c437f0 | 1918 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1919 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1920 | |
mbed_official | 133:d4dda5c437f0 | 1921 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 1922 | if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1923 | { |
mbed_official | 133:d4dda5c437f0 | 1924 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1925 | } |
mbed_official | 133:d4dda5c437f0 | 1926 | |
mbed_official | 133:d4dda5c437f0 | 1927 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1928 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1929 | |
mbed_official | 133:d4dda5c437f0 | 1930 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1931 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1932 | |
mbed_official | 133:d4dda5c437f0 | 1933 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1934 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1935 | } |
mbed_official | 133:d4dda5c437f0 | 1936 | |
mbed_official | 133:d4dda5c437f0 | 1937 | /** |
mbed_official | 133:d4dda5c437f0 | 1938 | * @brief Initializes the CRYP peripheral in DES ECB encryption mode using IT. |
mbed_official | 133:d4dda5c437f0 | 1939 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 1940 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 1941 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 1942 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 1943 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1944 | */ |
mbed_official | 133:d4dda5c437f0 | 1945 | HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 1946 | { |
mbed_official | 133:d4dda5c437f0 | 1947 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1948 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 1949 | |
mbed_official | 133:d4dda5c437f0 | 1950 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1951 | { |
mbed_official | 133:d4dda5c437f0 | 1952 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1953 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1954 | |
mbed_official | 133:d4dda5c437f0 | 1955 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1956 | hcryp->pCrypInBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 1957 | hcryp->pCrypOutBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 1958 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1959 | |
mbed_official | 133:d4dda5c437f0 | 1960 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 1961 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1962 | |
mbed_official | 133:d4dda5c437f0 | 1963 | /* Set CRYP peripheral in DES ECB encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 1964 | CRYP_SetDESECBMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 1965 | |
mbed_official | 133:d4dda5c437f0 | 1966 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 1967 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 1968 | |
mbed_official | 133:d4dda5c437f0 | 1969 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 1970 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 1971 | |
mbed_official | 133:d4dda5c437f0 | 1972 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1973 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1974 | } |
mbed_official | 133:d4dda5c437f0 | 1975 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 1976 | { |
mbed_official | 133:d4dda5c437f0 | 1977 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 1978 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1979 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1980 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1981 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 1982 | |
mbed_official | 133:d4dda5c437f0 | 1983 | hcryp->pCrypInBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 1984 | hcryp->CrypInCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 1985 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 1986 | { |
mbed_official | 133:d4dda5c437f0 | 1987 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 1988 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1989 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 1990 | } |
mbed_official | 133:d4dda5c437f0 | 1991 | } |
mbed_official | 133:d4dda5c437f0 | 1992 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 1993 | { |
mbed_official | 133:d4dda5c437f0 | 1994 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 1995 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 1996 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1997 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1998 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 1999 | |
mbed_official | 133:d4dda5c437f0 | 2000 | hcryp->pCrypOutBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2001 | hcryp->CrypOutCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2002 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2003 | { |
mbed_official | 133:d4dda5c437f0 | 2004 | /* Disable IT */ |
mbed_official | 133:d4dda5c437f0 | 2005 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2006 | /* Disable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2007 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 2008 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2009 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2010 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2011 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2012 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2013 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2014 | } |
mbed_official | 133:d4dda5c437f0 | 2015 | } |
mbed_official | 133:d4dda5c437f0 | 2016 | |
mbed_official | 133:d4dda5c437f0 | 2017 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2018 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2019 | } |
mbed_official | 133:d4dda5c437f0 | 2020 | |
mbed_official | 133:d4dda5c437f0 | 2021 | /** |
mbed_official | 133:d4dda5c437f0 | 2022 | * @brief Initializes the CRYP peripheral in DES CBC encryption mode using interrupt. |
mbed_official | 133:d4dda5c437f0 | 2023 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2024 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2025 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2026 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2027 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2028 | */ |
mbed_official | 133:d4dda5c437f0 | 2029 | HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 2030 | { |
mbed_official | 133:d4dda5c437f0 | 2031 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2032 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2033 | |
mbed_official | 133:d4dda5c437f0 | 2034 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 2035 | { |
mbed_official | 133:d4dda5c437f0 | 2036 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2037 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2038 | |
mbed_official | 133:d4dda5c437f0 | 2039 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2040 | hcryp->pCrypInBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2041 | hcryp->pCrypOutBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2042 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2043 | |
mbed_official | 133:d4dda5c437f0 | 2044 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2045 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2046 | |
mbed_official | 133:d4dda5c437f0 | 2047 | /* Set CRYP peripheral in DES CBC encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2048 | CRYP_SetDESCBCMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 2049 | |
mbed_official | 133:d4dda5c437f0 | 2050 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 2051 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2052 | |
mbed_official | 133:d4dda5c437f0 | 2053 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2054 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2055 | |
mbed_official | 133:d4dda5c437f0 | 2056 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2057 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2058 | } |
mbed_official | 133:d4dda5c437f0 | 2059 | |
mbed_official | 133:d4dda5c437f0 | 2060 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 2061 | { |
mbed_official | 133:d4dda5c437f0 | 2062 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2063 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2064 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2065 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2066 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2067 | |
mbed_official | 133:d4dda5c437f0 | 2068 | hcryp->pCrypInBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2069 | hcryp->CrypInCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2070 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2071 | { |
mbed_official | 133:d4dda5c437f0 | 2072 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 2073 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2074 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2075 | } |
mbed_official | 133:d4dda5c437f0 | 2076 | } |
mbed_official | 133:d4dda5c437f0 | 2077 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 2078 | { |
mbed_official | 133:d4dda5c437f0 | 2079 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2080 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2081 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2082 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2083 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2084 | |
mbed_official | 133:d4dda5c437f0 | 2085 | hcryp->pCrypOutBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2086 | hcryp->CrypOutCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2087 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2088 | { |
mbed_official | 133:d4dda5c437f0 | 2089 | /* Disable IT */ |
mbed_official | 133:d4dda5c437f0 | 2090 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2091 | /* Disable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2092 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 2093 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2094 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2095 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2096 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2097 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2098 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2099 | } |
mbed_official | 133:d4dda5c437f0 | 2100 | } |
mbed_official | 133:d4dda5c437f0 | 2101 | |
mbed_official | 133:d4dda5c437f0 | 2102 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2103 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2104 | } |
mbed_official | 133:d4dda5c437f0 | 2105 | |
mbed_official | 133:d4dda5c437f0 | 2106 | /** |
mbed_official | 133:d4dda5c437f0 | 2107 | * @brief Initializes the CRYP peripheral in DES ECB decryption mode using IT. |
mbed_official | 133:d4dda5c437f0 | 2108 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2109 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2110 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2111 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2112 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2113 | */ |
mbed_official | 133:d4dda5c437f0 | 2114 | HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 2115 | { |
mbed_official | 133:d4dda5c437f0 | 2116 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2117 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2118 | |
mbed_official | 133:d4dda5c437f0 | 2119 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 2120 | { |
mbed_official | 133:d4dda5c437f0 | 2121 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2122 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2123 | |
mbed_official | 133:d4dda5c437f0 | 2124 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2125 | hcryp->pCrypInBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2126 | hcryp->pCrypOutBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2127 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2128 | |
mbed_official | 133:d4dda5c437f0 | 2129 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2130 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2131 | |
mbed_official | 133:d4dda5c437f0 | 2132 | /* Set CRYP peripheral in DES ECB decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2133 | CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 2134 | |
mbed_official | 133:d4dda5c437f0 | 2135 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 2136 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2137 | |
mbed_official | 133:d4dda5c437f0 | 2138 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2139 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2140 | |
mbed_official | 133:d4dda5c437f0 | 2141 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2142 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2143 | } |
mbed_official | 133:d4dda5c437f0 | 2144 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 2145 | { |
mbed_official | 133:d4dda5c437f0 | 2146 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2147 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2148 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2149 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2150 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2151 | |
mbed_official | 133:d4dda5c437f0 | 2152 | hcryp->pCrypInBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2153 | hcryp->CrypInCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2154 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2155 | { |
mbed_official | 133:d4dda5c437f0 | 2156 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 2157 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2158 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2159 | } |
mbed_official | 133:d4dda5c437f0 | 2160 | } |
mbed_official | 133:d4dda5c437f0 | 2161 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 2162 | { |
mbed_official | 133:d4dda5c437f0 | 2163 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2164 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2165 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2166 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2167 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2168 | |
mbed_official | 133:d4dda5c437f0 | 2169 | hcryp->pCrypOutBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2170 | hcryp->CrypOutCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2171 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2172 | { |
mbed_official | 133:d4dda5c437f0 | 2173 | /* Disable IT */ |
mbed_official | 133:d4dda5c437f0 | 2174 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2175 | /* Disable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2176 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 2177 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2178 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2179 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2180 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2181 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2182 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2183 | } |
mbed_official | 133:d4dda5c437f0 | 2184 | } |
mbed_official | 133:d4dda5c437f0 | 2185 | |
mbed_official | 133:d4dda5c437f0 | 2186 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2187 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2188 | } |
mbed_official | 133:d4dda5c437f0 | 2189 | |
mbed_official | 133:d4dda5c437f0 | 2190 | /** |
mbed_official | 133:d4dda5c437f0 | 2191 | * @brief Initializes the CRYP peripheral in DES ECB decryption mode using interrupt. |
mbed_official | 133:d4dda5c437f0 | 2192 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2193 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2194 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2195 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2196 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2197 | */ |
mbed_official | 133:d4dda5c437f0 | 2198 | HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 2199 | { |
mbed_official | 133:d4dda5c437f0 | 2200 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2201 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2202 | |
mbed_official | 133:d4dda5c437f0 | 2203 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 2204 | { |
mbed_official | 133:d4dda5c437f0 | 2205 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2206 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2207 | |
mbed_official | 133:d4dda5c437f0 | 2208 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2209 | hcryp->pCrypInBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2210 | hcryp->pCrypOutBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2211 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2212 | |
mbed_official | 133:d4dda5c437f0 | 2213 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2214 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2215 | |
mbed_official | 133:d4dda5c437f0 | 2216 | /* Set CRYP peripheral in DES CBC decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2217 | CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 2218 | |
mbed_official | 133:d4dda5c437f0 | 2219 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 2220 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2221 | |
mbed_official | 133:d4dda5c437f0 | 2222 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2223 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2224 | |
mbed_official | 133:d4dda5c437f0 | 2225 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2226 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2227 | } |
mbed_official | 133:d4dda5c437f0 | 2228 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 2229 | { |
mbed_official | 133:d4dda5c437f0 | 2230 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2231 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2232 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2233 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2234 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2235 | |
mbed_official | 133:d4dda5c437f0 | 2236 | hcryp->pCrypInBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2237 | hcryp->CrypInCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2238 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2239 | { |
mbed_official | 133:d4dda5c437f0 | 2240 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 2241 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2242 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2243 | } |
mbed_official | 133:d4dda5c437f0 | 2244 | } |
mbed_official | 133:d4dda5c437f0 | 2245 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 2246 | { |
mbed_official | 133:d4dda5c437f0 | 2247 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2248 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2249 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2250 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2251 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2252 | |
mbed_official | 133:d4dda5c437f0 | 2253 | hcryp->pCrypOutBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2254 | hcryp->CrypOutCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2255 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2256 | { |
mbed_official | 133:d4dda5c437f0 | 2257 | /* Disable IT */ |
mbed_official | 133:d4dda5c437f0 | 2258 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2259 | /* Disable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2260 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 2261 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2262 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2263 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2264 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2265 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2266 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2267 | } |
mbed_official | 133:d4dda5c437f0 | 2268 | } |
mbed_official | 133:d4dda5c437f0 | 2269 | |
mbed_official | 133:d4dda5c437f0 | 2270 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2271 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2272 | } |
mbed_official | 133:d4dda5c437f0 | 2273 | |
mbed_official | 133:d4dda5c437f0 | 2274 | /** |
mbed_official | 133:d4dda5c437f0 | 2275 | * @brief Initializes the CRYP peripheral in DES ECB encryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 2276 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2277 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2278 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2279 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2280 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2281 | */ |
mbed_official | 133:d4dda5c437f0 | 2282 | HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 2283 | { |
mbed_official | 133:d4dda5c437f0 | 2284 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2285 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2286 | |
mbed_official | 133:d4dda5c437f0 | 2287 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 2288 | { |
mbed_official | 133:d4dda5c437f0 | 2289 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2290 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2291 | |
mbed_official | 133:d4dda5c437f0 | 2292 | inputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2293 | outputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2294 | |
mbed_official | 133:d4dda5c437f0 | 2295 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2296 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2297 | |
mbed_official | 133:d4dda5c437f0 | 2298 | /* Set CRYP peripheral in DES ECB encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2299 | CRYP_SetDESECBMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 2300 | |
mbed_official | 133:d4dda5c437f0 | 2301 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 2302 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 2303 | |
mbed_official | 133:d4dda5c437f0 | 2304 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2305 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2306 | |
mbed_official | 133:d4dda5c437f0 | 2307 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2308 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2309 | } |
mbed_official | 133:d4dda5c437f0 | 2310 | else |
mbed_official | 133:d4dda5c437f0 | 2311 | { |
mbed_official | 133:d4dda5c437f0 | 2312 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 2313 | } |
mbed_official | 133:d4dda5c437f0 | 2314 | } |
mbed_official | 133:d4dda5c437f0 | 2315 | |
mbed_official | 133:d4dda5c437f0 | 2316 | /** |
mbed_official | 133:d4dda5c437f0 | 2317 | * @brief Initializes the CRYP peripheral in DES CBC encryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 2318 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2319 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2320 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2321 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2322 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2323 | */ |
mbed_official | 133:d4dda5c437f0 | 2324 | HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 2325 | { |
mbed_official | 133:d4dda5c437f0 | 2326 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2327 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2328 | |
mbed_official | 133:d4dda5c437f0 | 2329 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 2330 | { |
mbed_official | 133:d4dda5c437f0 | 2331 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2332 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2333 | |
mbed_official | 133:d4dda5c437f0 | 2334 | inputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2335 | outputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2336 | |
mbed_official | 133:d4dda5c437f0 | 2337 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2338 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2339 | |
mbed_official | 133:d4dda5c437f0 | 2340 | /* Set CRYP peripheral in DES CBC encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2341 | CRYP_SetDESCBCMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 2342 | |
mbed_official | 133:d4dda5c437f0 | 2343 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 2344 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 2345 | |
mbed_official | 133:d4dda5c437f0 | 2346 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2347 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2348 | |
mbed_official | 133:d4dda5c437f0 | 2349 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2350 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2351 | } |
mbed_official | 133:d4dda5c437f0 | 2352 | else |
mbed_official | 133:d4dda5c437f0 | 2353 | { |
mbed_official | 133:d4dda5c437f0 | 2354 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 2355 | } |
mbed_official | 133:d4dda5c437f0 | 2356 | } |
mbed_official | 133:d4dda5c437f0 | 2357 | |
mbed_official | 133:d4dda5c437f0 | 2358 | /** |
mbed_official | 133:d4dda5c437f0 | 2359 | * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 2360 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2361 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2362 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2363 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2364 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2365 | */ |
mbed_official | 133:d4dda5c437f0 | 2366 | HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 2367 | { |
mbed_official | 133:d4dda5c437f0 | 2368 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2369 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2370 | |
mbed_official | 133:d4dda5c437f0 | 2371 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 2372 | { |
mbed_official | 133:d4dda5c437f0 | 2373 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2374 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2375 | |
mbed_official | 133:d4dda5c437f0 | 2376 | inputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2377 | outputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2378 | |
mbed_official | 133:d4dda5c437f0 | 2379 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2380 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2381 | |
mbed_official | 133:d4dda5c437f0 | 2382 | /* Set CRYP peripheral in DES ECB decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2383 | CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 2384 | |
mbed_official | 133:d4dda5c437f0 | 2385 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 2386 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 2387 | |
mbed_official | 133:d4dda5c437f0 | 2388 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2389 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2390 | |
mbed_official | 133:d4dda5c437f0 | 2391 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2392 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2393 | } |
mbed_official | 133:d4dda5c437f0 | 2394 | else |
mbed_official | 133:d4dda5c437f0 | 2395 | { |
mbed_official | 133:d4dda5c437f0 | 2396 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 2397 | } |
mbed_official | 133:d4dda5c437f0 | 2398 | } |
mbed_official | 133:d4dda5c437f0 | 2399 | |
mbed_official | 133:d4dda5c437f0 | 2400 | /** |
mbed_official | 133:d4dda5c437f0 | 2401 | * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 2402 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2403 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2404 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2405 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2406 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2407 | */ |
mbed_official | 133:d4dda5c437f0 | 2408 | HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 2409 | { |
mbed_official | 133:d4dda5c437f0 | 2410 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2411 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2412 | |
mbed_official | 133:d4dda5c437f0 | 2413 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 2414 | { |
mbed_official | 133:d4dda5c437f0 | 2415 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2416 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2417 | |
mbed_official | 133:d4dda5c437f0 | 2418 | inputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2419 | outputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2420 | |
mbed_official | 133:d4dda5c437f0 | 2421 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2422 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2423 | |
mbed_official | 133:d4dda5c437f0 | 2424 | /* Set CRYP peripheral in DES CBC decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2425 | CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 2426 | |
mbed_official | 133:d4dda5c437f0 | 2427 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 2428 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 2429 | |
mbed_official | 133:d4dda5c437f0 | 2430 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2431 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2432 | |
mbed_official | 133:d4dda5c437f0 | 2433 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2434 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2435 | } |
mbed_official | 133:d4dda5c437f0 | 2436 | else |
mbed_official | 133:d4dda5c437f0 | 2437 | { |
mbed_official | 133:d4dda5c437f0 | 2438 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 2439 | } |
mbed_official | 133:d4dda5c437f0 | 2440 | } |
mbed_official | 133:d4dda5c437f0 | 2441 | |
mbed_official | 133:d4dda5c437f0 | 2442 | /** |
mbed_official | 133:d4dda5c437f0 | 2443 | * @} |
mbed_official | 133:d4dda5c437f0 | 2444 | */ |
mbed_official | 133:d4dda5c437f0 | 2445 | |
mbed_official | 133:d4dda5c437f0 | 2446 | /** @defgroup CRYP_Group4 TDES processing functions |
mbed_official | 133:d4dda5c437f0 | 2447 | * @brief processing functions. |
mbed_official | 133:d4dda5c437f0 | 2448 | * |
mbed_official | 133:d4dda5c437f0 | 2449 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 2450 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 2451 | ##### TDES processing functions ##### |
mbed_official | 133:d4dda5c437f0 | 2452 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 2453 | [..] This section provides functions allowing to: |
mbed_official | 133:d4dda5c437f0 | 2454 | (+) Encrypt plaintext using TDES using ECB or CBC chaining modes |
mbed_official | 133:d4dda5c437f0 | 2455 | (+) Decrypt cyphertext using TDES using ECB or CBC chaining modes |
mbed_official | 133:d4dda5c437f0 | 2456 | [..] Three processing functions are available: |
mbed_official | 133:d4dda5c437f0 | 2457 | (+) polling mode |
mbed_official | 133:d4dda5c437f0 | 2458 | (+) interrupt mode |
mbed_official | 133:d4dda5c437f0 | 2459 | (+) DMA mode |
mbed_official | 133:d4dda5c437f0 | 2460 | |
mbed_official | 133:d4dda5c437f0 | 2461 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 2462 | * @{ |
mbed_official | 133:d4dda5c437f0 | 2463 | */ |
mbed_official | 133:d4dda5c437f0 | 2464 | |
mbed_official | 133:d4dda5c437f0 | 2465 | /** |
mbed_official | 133:d4dda5c437f0 | 2466 | * @brief Initializes the CRYP peripheral in TDES ECB encryption mode |
mbed_official | 133:d4dda5c437f0 | 2467 | * then encrypt pPlainData. The cypher data are available in pCypherData |
mbed_official | 133:d4dda5c437f0 | 2468 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2469 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2470 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2471 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2472 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 2473 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2474 | */ |
mbed_official | 133:d4dda5c437f0 | 2475 | HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 2476 | { |
mbed_official | 133:d4dda5c437f0 | 2477 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2478 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2479 | |
mbed_official | 133:d4dda5c437f0 | 2480 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2481 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2482 | |
mbed_official | 133:d4dda5c437f0 | 2483 | /* Set CRYP peripheral in TDES ECB encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2484 | CRYP_SetTDESECBMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 2485 | |
mbed_official | 133:d4dda5c437f0 | 2486 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2487 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2488 | |
mbed_official | 133:d4dda5c437f0 | 2489 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 2490 | if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2491 | { |
mbed_official | 133:d4dda5c437f0 | 2492 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2493 | } |
mbed_official | 133:d4dda5c437f0 | 2494 | |
mbed_official | 133:d4dda5c437f0 | 2495 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2496 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2497 | |
mbed_official | 133:d4dda5c437f0 | 2498 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2499 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2500 | |
mbed_official | 133:d4dda5c437f0 | 2501 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2502 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2503 | } |
mbed_official | 133:d4dda5c437f0 | 2504 | |
mbed_official | 133:d4dda5c437f0 | 2505 | /** |
mbed_official | 133:d4dda5c437f0 | 2506 | * @brief Initializes the CRYP peripheral in TDES ECB decryption mode |
mbed_official | 133:d4dda5c437f0 | 2507 | * then decrypted pCypherData. The cypher data are available in pPlainData |
mbed_official | 133:d4dda5c437f0 | 2508 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2509 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2510 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2511 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2512 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 2513 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2514 | */ |
mbed_official | 133:d4dda5c437f0 | 2515 | HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 2516 | { |
mbed_official | 133:d4dda5c437f0 | 2517 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2518 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2519 | |
mbed_official | 133:d4dda5c437f0 | 2520 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2521 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2522 | |
mbed_official | 133:d4dda5c437f0 | 2523 | /* Set CRYP peripheral in TDES ECB decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2524 | CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 2525 | |
mbed_official | 133:d4dda5c437f0 | 2526 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2527 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2528 | |
mbed_official | 133:d4dda5c437f0 | 2529 | /* Write Cypher Data and Get Plain Data */ |
mbed_official | 133:d4dda5c437f0 | 2530 | if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2531 | { |
mbed_official | 133:d4dda5c437f0 | 2532 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2533 | } |
mbed_official | 133:d4dda5c437f0 | 2534 | |
mbed_official | 133:d4dda5c437f0 | 2535 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2536 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2537 | |
mbed_official | 133:d4dda5c437f0 | 2538 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2539 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2540 | |
mbed_official | 133:d4dda5c437f0 | 2541 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2542 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2543 | } |
mbed_official | 133:d4dda5c437f0 | 2544 | |
mbed_official | 133:d4dda5c437f0 | 2545 | /** |
mbed_official | 133:d4dda5c437f0 | 2546 | * @brief Initializes the CRYP peripheral in TDES CBC encryption mode |
mbed_official | 133:d4dda5c437f0 | 2547 | * then encrypt pPlainData. The cypher data are available in pCypherData |
mbed_official | 133:d4dda5c437f0 | 2548 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2549 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2550 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2551 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2552 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 2553 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2554 | */ |
mbed_official | 133:d4dda5c437f0 | 2555 | HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 2556 | { |
mbed_official | 133:d4dda5c437f0 | 2557 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2558 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2559 | |
mbed_official | 133:d4dda5c437f0 | 2560 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2561 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2562 | |
mbed_official | 133:d4dda5c437f0 | 2563 | /* Set CRYP peripheral in TDES CBC encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2564 | CRYP_SetTDESCBCMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 2565 | |
mbed_official | 133:d4dda5c437f0 | 2566 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2567 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2568 | |
mbed_official | 133:d4dda5c437f0 | 2569 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 133:d4dda5c437f0 | 2570 | if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2571 | { |
mbed_official | 133:d4dda5c437f0 | 2572 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2573 | } |
mbed_official | 133:d4dda5c437f0 | 2574 | |
mbed_official | 133:d4dda5c437f0 | 2575 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2576 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2577 | |
mbed_official | 133:d4dda5c437f0 | 2578 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2579 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2580 | |
mbed_official | 133:d4dda5c437f0 | 2581 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2582 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2583 | } |
mbed_official | 133:d4dda5c437f0 | 2584 | |
mbed_official | 133:d4dda5c437f0 | 2585 | /** |
mbed_official | 133:d4dda5c437f0 | 2586 | * @brief Initializes the CRYP peripheral in TDES CBC decryption mode |
mbed_official | 133:d4dda5c437f0 | 2587 | * then decrypted pCypherData. The cypher data are available in pPlainData |
mbed_official | 133:d4dda5c437f0 | 2588 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2589 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2590 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2591 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2592 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 2593 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2594 | */ |
mbed_official | 133:d4dda5c437f0 | 2595 | HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 2596 | { |
mbed_official | 133:d4dda5c437f0 | 2597 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2598 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2599 | |
mbed_official | 133:d4dda5c437f0 | 2600 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2601 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2602 | |
mbed_official | 133:d4dda5c437f0 | 2603 | /* Set CRYP peripheral in TDES CBC decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2604 | CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 2605 | |
mbed_official | 133:d4dda5c437f0 | 2606 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2607 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2608 | |
mbed_official | 133:d4dda5c437f0 | 2609 | /* Write Cypher Data and Get Plain Data */ |
mbed_official | 133:d4dda5c437f0 | 2610 | if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2611 | { |
mbed_official | 133:d4dda5c437f0 | 2612 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2613 | } |
mbed_official | 133:d4dda5c437f0 | 2614 | |
mbed_official | 133:d4dda5c437f0 | 2615 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2616 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2617 | |
mbed_official | 133:d4dda5c437f0 | 2618 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2619 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2620 | |
mbed_official | 133:d4dda5c437f0 | 2621 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2622 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2623 | } |
mbed_official | 133:d4dda5c437f0 | 2624 | |
mbed_official | 133:d4dda5c437f0 | 2625 | /** |
mbed_official | 133:d4dda5c437f0 | 2626 | * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using interrupt. |
mbed_official | 133:d4dda5c437f0 | 2627 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2628 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2629 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2630 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2631 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2632 | */ |
mbed_official | 133:d4dda5c437f0 | 2633 | HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 2634 | { |
mbed_official | 133:d4dda5c437f0 | 2635 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2636 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2637 | |
mbed_official | 133:d4dda5c437f0 | 2638 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 2639 | { |
mbed_official | 133:d4dda5c437f0 | 2640 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2641 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2642 | |
mbed_official | 133:d4dda5c437f0 | 2643 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2644 | hcryp->pCrypInBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2645 | hcryp->pCrypOutBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2646 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2647 | |
mbed_official | 133:d4dda5c437f0 | 2648 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2649 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2650 | |
mbed_official | 133:d4dda5c437f0 | 2651 | /* Set CRYP peripheral in TDES ECB encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2652 | CRYP_SetTDESECBMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 2653 | |
mbed_official | 133:d4dda5c437f0 | 2654 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 2655 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2656 | |
mbed_official | 133:d4dda5c437f0 | 2657 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2658 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2659 | |
mbed_official | 133:d4dda5c437f0 | 2660 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2661 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2662 | } |
mbed_official | 133:d4dda5c437f0 | 2663 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 2664 | { |
mbed_official | 133:d4dda5c437f0 | 2665 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2666 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2667 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2668 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2669 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2670 | |
mbed_official | 133:d4dda5c437f0 | 2671 | hcryp->pCrypInBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2672 | hcryp->CrypInCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2673 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2674 | { |
mbed_official | 133:d4dda5c437f0 | 2675 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 2676 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2677 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2678 | } |
mbed_official | 133:d4dda5c437f0 | 2679 | } |
mbed_official | 133:d4dda5c437f0 | 2680 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 2681 | { |
mbed_official | 133:d4dda5c437f0 | 2682 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2683 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2684 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2685 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2686 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2687 | |
mbed_official | 133:d4dda5c437f0 | 2688 | hcryp->pCrypOutBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2689 | hcryp->CrypOutCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2690 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2691 | { |
mbed_official | 133:d4dda5c437f0 | 2692 | /* Disable IT */ |
mbed_official | 133:d4dda5c437f0 | 2693 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2694 | /* Disable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2695 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 2696 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2697 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2698 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2699 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2700 | /* Call the Output data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2701 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2702 | } |
mbed_official | 133:d4dda5c437f0 | 2703 | } |
mbed_official | 133:d4dda5c437f0 | 2704 | |
mbed_official | 133:d4dda5c437f0 | 2705 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2706 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2707 | } |
mbed_official | 133:d4dda5c437f0 | 2708 | |
mbed_official | 133:d4dda5c437f0 | 2709 | /** |
mbed_official | 133:d4dda5c437f0 | 2710 | * @brief Initializes the CRYP peripheral in TDES CBC encryption mode. |
mbed_official | 133:d4dda5c437f0 | 2711 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2712 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2713 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2714 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2715 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2716 | */ |
mbed_official | 133:d4dda5c437f0 | 2717 | HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 2718 | { |
mbed_official | 133:d4dda5c437f0 | 2719 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2720 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2721 | |
mbed_official | 133:d4dda5c437f0 | 2722 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 2723 | { |
mbed_official | 133:d4dda5c437f0 | 2724 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2725 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2726 | |
mbed_official | 133:d4dda5c437f0 | 2727 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2728 | hcryp->pCrypInBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2729 | hcryp->pCrypOutBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2730 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2731 | |
mbed_official | 133:d4dda5c437f0 | 2732 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2733 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2734 | |
mbed_official | 133:d4dda5c437f0 | 2735 | /* Set CRYP peripheral in TDES CBC encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2736 | CRYP_SetTDESCBCMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 2737 | |
mbed_official | 133:d4dda5c437f0 | 2738 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 2739 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2740 | |
mbed_official | 133:d4dda5c437f0 | 2741 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2742 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2743 | |
mbed_official | 133:d4dda5c437f0 | 2744 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2745 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2746 | } |
mbed_official | 133:d4dda5c437f0 | 2747 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 2748 | { |
mbed_official | 133:d4dda5c437f0 | 2749 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2750 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2751 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2752 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2753 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2754 | |
mbed_official | 133:d4dda5c437f0 | 2755 | hcryp->pCrypInBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2756 | hcryp->CrypInCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2757 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2758 | { |
mbed_official | 133:d4dda5c437f0 | 2759 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 2760 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2761 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2762 | } |
mbed_official | 133:d4dda5c437f0 | 2763 | } |
mbed_official | 133:d4dda5c437f0 | 2764 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 2765 | { |
mbed_official | 133:d4dda5c437f0 | 2766 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2767 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2768 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2769 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2770 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2771 | |
mbed_official | 133:d4dda5c437f0 | 2772 | hcryp->pCrypOutBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2773 | hcryp->CrypOutCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2774 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2775 | { |
mbed_official | 133:d4dda5c437f0 | 2776 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2777 | /* Disable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2778 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 2779 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2780 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2781 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2782 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2783 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2784 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2785 | } |
mbed_official | 133:d4dda5c437f0 | 2786 | } |
mbed_official | 133:d4dda5c437f0 | 2787 | |
mbed_official | 133:d4dda5c437f0 | 2788 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2789 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2790 | } |
mbed_official | 133:d4dda5c437f0 | 2791 | |
mbed_official | 133:d4dda5c437f0 | 2792 | /** |
mbed_official | 133:d4dda5c437f0 | 2793 | * @brief Initializes the CRYP peripheral in TDES ECB decryption mode. |
mbed_official | 133:d4dda5c437f0 | 2794 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2795 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2796 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2797 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2798 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2799 | */ |
mbed_official | 133:d4dda5c437f0 | 2800 | HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 2801 | { |
mbed_official | 133:d4dda5c437f0 | 2802 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2803 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2804 | |
mbed_official | 133:d4dda5c437f0 | 2805 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 2806 | { |
mbed_official | 133:d4dda5c437f0 | 2807 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2808 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2809 | |
mbed_official | 133:d4dda5c437f0 | 2810 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2811 | hcryp->pCrypInBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2812 | hcryp->pCrypOutBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2813 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2814 | |
mbed_official | 133:d4dda5c437f0 | 2815 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2816 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2817 | |
mbed_official | 133:d4dda5c437f0 | 2818 | /* Set CRYP peripheral in TDES ECB decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2819 | CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 2820 | |
mbed_official | 133:d4dda5c437f0 | 2821 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 2822 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2823 | |
mbed_official | 133:d4dda5c437f0 | 2824 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2825 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2826 | |
mbed_official | 133:d4dda5c437f0 | 2827 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2828 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2829 | } |
mbed_official | 133:d4dda5c437f0 | 2830 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 2831 | { |
mbed_official | 133:d4dda5c437f0 | 2832 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2833 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2834 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2835 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2836 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2837 | |
mbed_official | 133:d4dda5c437f0 | 2838 | hcryp->pCrypInBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2839 | hcryp->CrypInCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2840 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2841 | { |
mbed_official | 133:d4dda5c437f0 | 2842 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 2843 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2844 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2845 | } |
mbed_official | 133:d4dda5c437f0 | 2846 | } |
mbed_official | 133:d4dda5c437f0 | 2847 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 2848 | { |
mbed_official | 133:d4dda5c437f0 | 2849 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2850 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2851 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2852 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2853 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2854 | |
mbed_official | 133:d4dda5c437f0 | 2855 | hcryp->pCrypOutBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2856 | hcryp->CrypOutCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2857 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2858 | { |
mbed_official | 133:d4dda5c437f0 | 2859 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2860 | /* Disable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2861 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 2862 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2863 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2864 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2865 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2866 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2867 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2868 | } |
mbed_official | 133:d4dda5c437f0 | 2869 | } |
mbed_official | 133:d4dda5c437f0 | 2870 | |
mbed_official | 133:d4dda5c437f0 | 2871 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2872 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2873 | } |
mbed_official | 133:d4dda5c437f0 | 2874 | |
mbed_official | 133:d4dda5c437f0 | 2875 | /** |
mbed_official | 133:d4dda5c437f0 | 2876 | * @brief Initializes the CRYP peripheral in TDES CBC decryption mode. |
mbed_official | 133:d4dda5c437f0 | 2877 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2878 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2879 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2880 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2881 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2882 | */ |
mbed_official | 133:d4dda5c437f0 | 2883 | HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 2884 | { |
mbed_official | 133:d4dda5c437f0 | 2885 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2886 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2887 | |
mbed_official | 133:d4dda5c437f0 | 2888 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 2889 | { |
mbed_official | 133:d4dda5c437f0 | 2890 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2891 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2892 | |
mbed_official | 133:d4dda5c437f0 | 2893 | hcryp->CrypInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2894 | hcryp->pCrypInBuffPtr = pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2895 | hcryp->pCrypOutBuffPtr = pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2896 | hcryp->CrypOutCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2897 | |
mbed_official | 133:d4dda5c437f0 | 2898 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2899 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2900 | |
mbed_official | 133:d4dda5c437f0 | 2901 | /* Set CRYP peripheral in TDES CBC decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2902 | CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 2903 | |
mbed_official | 133:d4dda5c437f0 | 2904 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 2905 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2906 | |
mbed_official | 133:d4dda5c437f0 | 2907 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2908 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 2909 | |
mbed_official | 133:d4dda5c437f0 | 2910 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2911 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2912 | } |
mbed_official | 133:d4dda5c437f0 | 2913 | else if(__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 133:d4dda5c437f0 | 2914 | { |
mbed_official | 133:d4dda5c437f0 | 2915 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2916 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2917 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2918 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2919 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 2920 | |
mbed_official | 133:d4dda5c437f0 | 2921 | hcryp->pCrypInBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2922 | hcryp->CrypInCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2923 | if(hcryp->CrypInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2924 | { |
mbed_official | 133:d4dda5c437f0 | 2925 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 133:d4dda5c437f0 | 2926 | /* Call the Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2927 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2928 | } |
mbed_official | 133:d4dda5c437f0 | 2929 | } |
mbed_official | 133:d4dda5c437f0 | 2930 | else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 133:d4dda5c437f0 | 2931 | { |
mbed_official | 133:d4dda5c437f0 | 2932 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 2933 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 2934 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2935 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 2936 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 2937 | |
mbed_official | 133:d4dda5c437f0 | 2938 | hcryp->pCrypOutBuffPtr += 8; |
mbed_official | 133:d4dda5c437f0 | 2939 | hcryp->CrypOutCount -= 8; |
mbed_official | 133:d4dda5c437f0 | 2940 | if(hcryp->CrypOutCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2941 | { |
mbed_official | 133:d4dda5c437f0 | 2942 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 133:d4dda5c437f0 | 2943 | /* Disable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 2944 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 2945 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2946 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2947 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2948 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2949 | /* Call Input transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2950 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2951 | } |
mbed_official | 133:d4dda5c437f0 | 2952 | } |
mbed_official | 133:d4dda5c437f0 | 2953 | |
mbed_official | 133:d4dda5c437f0 | 2954 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2955 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2956 | } |
mbed_official | 133:d4dda5c437f0 | 2957 | |
mbed_official | 133:d4dda5c437f0 | 2958 | /** |
mbed_official | 133:d4dda5c437f0 | 2959 | * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 2960 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 2961 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 2962 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 2963 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 2964 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2965 | */ |
mbed_official | 133:d4dda5c437f0 | 2966 | HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 2967 | { |
mbed_official | 133:d4dda5c437f0 | 2968 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 2969 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 2970 | |
mbed_official | 133:d4dda5c437f0 | 2971 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 2972 | { |
mbed_official | 133:d4dda5c437f0 | 2973 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2974 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2975 | |
mbed_official | 133:d4dda5c437f0 | 2976 | inputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 2977 | outputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 2978 | |
mbed_official | 133:d4dda5c437f0 | 2979 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 2980 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2981 | |
mbed_official | 133:d4dda5c437f0 | 2982 | /* Set CRYP peripheral in TDES ECB encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 2983 | CRYP_SetTDESECBMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 2984 | |
mbed_official | 133:d4dda5c437f0 | 2985 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 2986 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 2987 | |
mbed_official | 133:d4dda5c437f0 | 2988 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2989 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 2990 | |
mbed_official | 133:d4dda5c437f0 | 2991 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 2992 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2993 | } |
mbed_official | 133:d4dda5c437f0 | 2994 | else |
mbed_official | 133:d4dda5c437f0 | 2995 | { |
mbed_official | 133:d4dda5c437f0 | 2996 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 2997 | } |
mbed_official | 133:d4dda5c437f0 | 2998 | } |
mbed_official | 133:d4dda5c437f0 | 2999 | |
mbed_official | 133:d4dda5c437f0 | 3000 | /** |
mbed_official | 133:d4dda5c437f0 | 3001 | * @brief Initializes the CRYP peripheral in TDES CBC encryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 3002 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3003 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 3004 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 3005 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 3006 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 3007 | */ |
mbed_official | 133:d4dda5c437f0 | 3008 | HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 133:d4dda5c437f0 | 3009 | { |
mbed_official | 133:d4dda5c437f0 | 3010 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 3011 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 3012 | |
mbed_official | 133:d4dda5c437f0 | 3013 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 3014 | { |
mbed_official | 133:d4dda5c437f0 | 3015 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 3016 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3017 | |
mbed_official | 133:d4dda5c437f0 | 3018 | inputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 3019 | outputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 3020 | |
mbed_official | 133:d4dda5c437f0 | 3021 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 3022 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 3023 | |
mbed_official | 133:d4dda5c437f0 | 3024 | /* Set CRYP peripheral in TDES CBC encryption mode */ |
mbed_official | 133:d4dda5c437f0 | 3025 | CRYP_SetTDESCBCMode(hcryp, 0); |
mbed_official | 133:d4dda5c437f0 | 3026 | |
mbed_official | 133:d4dda5c437f0 | 3027 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 3028 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 3029 | |
mbed_official | 133:d4dda5c437f0 | 3030 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 3031 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3032 | |
mbed_official | 133:d4dda5c437f0 | 3033 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 3034 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3035 | } |
mbed_official | 133:d4dda5c437f0 | 3036 | else |
mbed_official | 133:d4dda5c437f0 | 3037 | { |
mbed_official | 133:d4dda5c437f0 | 3038 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3039 | } |
mbed_official | 133:d4dda5c437f0 | 3040 | } |
mbed_official | 133:d4dda5c437f0 | 3041 | |
mbed_official | 133:d4dda5c437f0 | 3042 | /** |
mbed_official | 133:d4dda5c437f0 | 3043 | * @brief Initializes the CRYP peripheral in TDES ECB decryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 3044 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3045 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 3046 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 3047 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 3048 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 3049 | */ |
mbed_official | 133:d4dda5c437f0 | 3050 | HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 3051 | { |
mbed_official | 133:d4dda5c437f0 | 3052 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 3053 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 3054 | |
mbed_official | 133:d4dda5c437f0 | 3055 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 3056 | { |
mbed_official | 133:d4dda5c437f0 | 3057 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 3058 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3059 | |
mbed_official | 133:d4dda5c437f0 | 3060 | inputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 3061 | outputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 3062 | |
mbed_official | 133:d4dda5c437f0 | 3063 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 3064 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 3065 | |
mbed_official | 133:d4dda5c437f0 | 3066 | /* Set CRYP peripheral in TDES ECB decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 3067 | CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 3068 | |
mbed_official | 133:d4dda5c437f0 | 3069 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 3070 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 3071 | |
mbed_official | 133:d4dda5c437f0 | 3072 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 3073 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3074 | |
mbed_official | 133:d4dda5c437f0 | 3075 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 3076 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3077 | } |
mbed_official | 133:d4dda5c437f0 | 3078 | else |
mbed_official | 133:d4dda5c437f0 | 3079 | { |
mbed_official | 133:d4dda5c437f0 | 3080 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3081 | } |
mbed_official | 133:d4dda5c437f0 | 3082 | } |
mbed_official | 133:d4dda5c437f0 | 3083 | |
mbed_official | 133:d4dda5c437f0 | 3084 | /** |
mbed_official | 133:d4dda5c437f0 | 3085 | * @brief Initializes the CRYP peripheral in TDES CBC decryption mode using DMA. |
mbed_official | 133:d4dda5c437f0 | 3086 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3087 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 133:d4dda5c437f0 | 3088 | * @param Size: Length of the plaintext buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 3089 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 133:d4dda5c437f0 | 3090 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 3091 | */ |
mbed_official | 133:d4dda5c437f0 | 3092 | HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 133:d4dda5c437f0 | 3093 | { |
mbed_official | 133:d4dda5c437f0 | 3094 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 3095 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 3096 | |
mbed_official | 133:d4dda5c437f0 | 3097 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 133:d4dda5c437f0 | 3098 | { |
mbed_official | 133:d4dda5c437f0 | 3099 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 3100 | __HAL_LOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3101 | |
mbed_official | 133:d4dda5c437f0 | 3102 | inputaddr = (uint32_t)pCypherData; |
mbed_official | 133:d4dda5c437f0 | 3103 | outputaddr = (uint32_t)pPlainData; |
mbed_official | 133:d4dda5c437f0 | 3104 | |
mbed_official | 133:d4dda5c437f0 | 3105 | /* Change the CRYP state */ |
mbed_official | 133:d4dda5c437f0 | 3106 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 3107 | |
mbed_official | 133:d4dda5c437f0 | 3108 | /* Set CRYP peripheral in TDES CBC decryption mode */ |
mbed_official | 133:d4dda5c437f0 | 3109 | CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR); |
mbed_official | 133:d4dda5c437f0 | 3110 | |
mbed_official | 133:d4dda5c437f0 | 3111 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 3112 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 133:d4dda5c437f0 | 3113 | |
mbed_official | 133:d4dda5c437f0 | 3114 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 3115 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3116 | |
mbed_official | 133:d4dda5c437f0 | 3117 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 3118 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3119 | } |
mbed_official | 133:d4dda5c437f0 | 3120 | else |
mbed_official | 133:d4dda5c437f0 | 3121 | { |
mbed_official | 133:d4dda5c437f0 | 3122 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3123 | } |
mbed_official | 133:d4dda5c437f0 | 3124 | } |
mbed_official | 133:d4dda5c437f0 | 3125 | |
mbed_official | 133:d4dda5c437f0 | 3126 | /** |
mbed_official | 133:d4dda5c437f0 | 3127 | * @} |
mbed_official | 133:d4dda5c437f0 | 3128 | */ |
mbed_official | 133:d4dda5c437f0 | 3129 | |
mbed_official | 133:d4dda5c437f0 | 3130 | /** @defgroup CRYP_Group5 DMA callback functions |
mbed_official | 133:d4dda5c437f0 | 3131 | * @brief DMA callback functions. |
mbed_official | 133:d4dda5c437f0 | 3132 | * |
mbed_official | 133:d4dda5c437f0 | 3133 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 3134 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 3135 | ##### DMA callback functions ##### |
mbed_official | 133:d4dda5c437f0 | 3136 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 3137 | [..] This section provides DMA callback functions: |
mbed_official | 133:d4dda5c437f0 | 3138 | (+) DMA Input data transfer complete |
mbed_official | 133:d4dda5c437f0 | 3139 | (+) DMA Output data transfer complete |
mbed_official | 133:d4dda5c437f0 | 3140 | (+) DMA error |
mbed_official | 133:d4dda5c437f0 | 3141 | |
mbed_official | 133:d4dda5c437f0 | 3142 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 3143 | * @{ |
mbed_official | 133:d4dda5c437f0 | 3144 | */ |
mbed_official | 133:d4dda5c437f0 | 3145 | |
mbed_official | 133:d4dda5c437f0 | 3146 | /** |
mbed_official | 133:d4dda5c437f0 | 3147 | * @brief Input FIFO transfer completed callbacks. |
mbed_official | 133:d4dda5c437f0 | 3148 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3149 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3150 | */ |
mbed_official | 133:d4dda5c437f0 | 3151 | __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp) |
mbed_official | 133:d4dda5c437f0 | 3152 | { |
mbed_official | 133:d4dda5c437f0 | 3153 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 3154 | the HAL_CRYP_InCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 3155 | */ |
mbed_official | 133:d4dda5c437f0 | 3156 | } |
mbed_official | 133:d4dda5c437f0 | 3157 | |
mbed_official | 133:d4dda5c437f0 | 3158 | /** |
mbed_official | 133:d4dda5c437f0 | 3159 | * @brief Output FIFO transfer completed callbacks. |
mbed_official | 133:d4dda5c437f0 | 3160 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3161 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3162 | */ |
mbed_official | 133:d4dda5c437f0 | 3163 | __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp) |
mbed_official | 133:d4dda5c437f0 | 3164 | { |
mbed_official | 133:d4dda5c437f0 | 3165 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 3166 | the HAL_CRYP_OutCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 3167 | */ |
mbed_official | 133:d4dda5c437f0 | 3168 | } |
mbed_official | 133:d4dda5c437f0 | 3169 | |
mbed_official | 133:d4dda5c437f0 | 3170 | /** |
mbed_official | 133:d4dda5c437f0 | 3171 | * @brief CRYP error callbacks. |
mbed_official | 133:d4dda5c437f0 | 3172 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3173 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3174 | */ |
mbed_official | 133:d4dda5c437f0 | 3175 | __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp) |
mbed_official | 133:d4dda5c437f0 | 3176 | { |
mbed_official | 133:d4dda5c437f0 | 3177 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 3178 | the HAL_CRYP_ErrorCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 3179 | */ |
mbed_official | 133:d4dda5c437f0 | 3180 | } |
mbed_official | 133:d4dda5c437f0 | 3181 | |
mbed_official | 133:d4dda5c437f0 | 3182 | /** |
mbed_official | 133:d4dda5c437f0 | 3183 | * @} |
mbed_official | 133:d4dda5c437f0 | 3184 | */ |
mbed_official | 133:d4dda5c437f0 | 3185 | |
mbed_official | 133:d4dda5c437f0 | 3186 | /** @defgroup CRYP_Group6 CRYP IRQ handler management |
mbed_official | 133:d4dda5c437f0 | 3187 | * @brief CRYP IRQ handler. |
mbed_official | 133:d4dda5c437f0 | 3188 | * |
mbed_official | 133:d4dda5c437f0 | 3189 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 3190 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 3191 | ##### CRYP IRQ handler management ##### |
mbed_official | 133:d4dda5c437f0 | 3192 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 3193 | [..] This section provides CRYP IRQ handler function. |
mbed_official | 133:d4dda5c437f0 | 3194 | |
mbed_official | 133:d4dda5c437f0 | 3195 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 3196 | * @{ |
mbed_official | 133:d4dda5c437f0 | 3197 | */ |
mbed_official | 133:d4dda5c437f0 | 3198 | |
mbed_official | 133:d4dda5c437f0 | 3199 | /** |
mbed_official | 133:d4dda5c437f0 | 3200 | * @brief This function handles CRYP interrupt request. |
mbed_official | 133:d4dda5c437f0 | 3201 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3202 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3203 | */ |
mbed_official | 133:d4dda5c437f0 | 3204 | void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp) |
mbed_official | 133:d4dda5c437f0 | 3205 | { |
mbed_official | 133:d4dda5c437f0 | 3206 | switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION) |
mbed_official | 133:d4dda5c437f0 | 3207 | { |
mbed_official | 133:d4dda5c437f0 | 3208 | case CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT: |
mbed_official | 133:d4dda5c437f0 | 3209 | HAL_CRYP_TDESECB_Encrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3210 | break; |
mbed_official | 133:d4dda5c437f0 | 3211 | |
mbed_official | 133:d4dda5c437f0 | 3212 | case CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT: |
mbed_official | 133:d4dda5c437f0 | 3213 | HAL_CRYP_TDESECB_Decrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3214 | break; |
mbed_official | 133:d4dda5c437f0 | 3215 | |
mbed_official | 133:d4dda5c437f0 | 3216 | case CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT: |
mbed_official | 133:d4dda5c437f0 | 3217 | HAL_CRYP_TDESCBC_Encrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3218 | break; |
mbed_official | 133:d4dda5c437f0 | 3219 | |
mbed_official | 133:d4dda5c437f0 | 3220 | case CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT: |
mbed_official | 133:d4dda5c437f0 | 3221 | HAL_CRYP_TDESCBC_Decrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3222 | break; |
mbed_official | 133:d4dda5c437f0 | 3223 | |
mbed_official | 133:d4dda5c437f0 | 3224 | case CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT: |
mbed_official | 133:d4dda5c437f0 | 3225 | HAL_CRYP_DESECB_Encrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3226 | break; |
mbed_official | 133:d4dda5c437f0 | 3227 | |
mbed_official | 133:d4dda5c437f0 | 3228 | case CRYP_CR_ALGOMODE_DES_ECB_DECRYPT: |
mbed_official | 133:d4dda5c437f0 | 3229 | HAL_CRYP_DESECB_Decrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3230 | break; |
mbed_official | 133:d4dda5c437f0 | 3231 | |
mbed_official | 133:d4dda5c437f0 | 3232 | case CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT: |
mbed_official | 133:d4dda5c437f0 | 3233 | HAL_CRYP_DESCBC_Encrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3234 | break; |
mbed_official | 133:d4dda5c437f0 | 3235 | |
mbed_official | 133:d4dda5c437f0 | 3236 | case CRYP_CR_ALGOMODE_DES_CBC_DECRYPT: |
mbed_official | 133:d4dda5c437f0 | 3237 | HAL_CRYP_DESCBC_Decrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3238 | break; |
mbed_official | 133:d4dda5c437f0 | 3239 | |
mbed_official | 133:d4dda5c437f0 | 3240 | case CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT: |
mbed_official | 133:d4dda5c437f0 | 3241 | HAL_CRYP_AESECB_Encrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3242 | break; |
mbed_official | 133:d4dda5c437f0 | 3243 | |
mbed_official | 133:d4dda5c437f0 | 3244 | case CRYP_CR_ALGOMODE_AES_ECB_DECRYPT: |
mbed_official | 133:d4dda5c437f0 | 3245 | HAL_CRYP_AESECB_Decrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3246 | break; |
mbed_official | 133:d4dda5c437f0 | 3247 | |
mbed_official | 133:d4dda5c437f0 | 3248 | case CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT: |
mbed_official | 133:d4dda5c437f0 | 3249 | HAL_CRYP_AESCBC_Encrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3250 | break; |
mbed_official | 133:d4dda5c437f0 | 3251 | |
mbed_official | 133:d4dda5c437f0 | 3252 | case CRYP_CR_ALGOMODE_AES_CBC_DECRYPT: |
mbed_official | 133:d4dda5c437f0 | 3253 | HAL_CRYP_AESCBC_Decrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3254 | break; |
mbed_official | 133:d4dda5c437f0 | 3255 | |
mbed_official | 133:d4dda5c437f0 | 3256 | case CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT: |
mbed_official | 133:d4dda5c437f0 | 3257 | HAL_CRYP_AESCTR_Encrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3258 | break; |
mbed_official | 133:d4dda5c437f0 | 3259 | |
mbed_official | 133:d4dda5c437f0 | 3260 | case CRYP_CR_ALGOMODE_AES_CTR_DECRYPT: |
mbed_official | 133:d4dda5c437f0 | 3261 | HAL_CRYP_AESCTR_Decrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 3262 | break; |
mbed_official | 133:d4dda5c437f0 | 3263 | |
mbed_official | 133:d4dda5c437f0 | 3264 | default: |
mbed_official | 133:d4dda5c437f0 | 3265 | break; |
mbed_official | 133:d4dda5c437f0 | 3266 | } |
mbed_official | 133:d4dda5c437f0 | 3267 | } |
mbed_official | 133:d4dda5c437f0 | 3268 | |
mbed_official | 133:d4dda5c437f0 | 3269 | /** |
mbed_official | 133:d4dda5c437f0 | 3270 | * @} |
mbed_official | 133:d4dda5c437f0 | 3271 | */ |
mbed_official | 133:d4dda5c437f0 | 3272 | |
mbed_official | 133:d4dda5c437f0 | 3273 | /** @defgroup CRYP_Group7 Peripheral State functions |
mbed_official | 133:d4dda5c437f0 | 3274 | * @brief Peripheral State functions. |
mbed_official | 133:d4dda5c437f0 | 3275 | * |
mbed_official | 133:d4dda5c437f0 | 3276 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 3277 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 3278 | ##### Peripheral State functions ##### |
mbed_official | 133:d4dda5c437f0 | 3279 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 3280 | [..] |
mbed_official | 133:d4dda5c437f0 | 3281 | This subsection permits to get in run-time the status of the peripheral. |
mbed_official | 133:d4dda5c437f0 | 3282 | |
mbed_official | 133:d4dda5c437f0 | 3283 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 3284 | * @{ |
mbed_official | 133:d4dda5c437f0 | 3285 | */ |
mbed_official | 133:d4dda5c437f0 | 3286 | |
mbed_official | 133:d4dda5c437f0 | 3287 | /** |
mbed_official | 133:d4dda5c437f0 | 3288 | * @brief Returns the CRYP state. |
mbed_official | 133:d4dda5c437f0 | 3289 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3290 | * @retval HAL state |
mbed_official | 133:d4dda5c437f0 | 3291 | */ |
mbed_official | 133:d4dda5c437f0 | 3292 | HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp) |
mbed_official | 133:d4dda5c437f0 | 3293 | { |
mbed_official | 133:d4dda5c437f0 | 3294 | return hcryp->State; |
mbed_official | 133:d4dda5c437f0 | 3295 | } |
mbed_official | 133:d4dda5c437f0 | 3296 | |
mbed_official | 133:d4dda5c437f0 | 3297 | /** |
mbed_official | 133:d4dda5c437f0 | 3298 | * @} |
mbed_official | 133:d4dda5c437f0 | 3299 | */ |
mbed_official | 133:d4dda5c437f0 | 3300 | |
mbed_official | 133:d4dda5c437f0 | 3301 | /** |
mbed_official | 133:d4dda5c437f0 | 3302 | * @brief DMA CRYP Input Data process complete callback. |
mbed_official | 133:d4dda5c437f0 | 3303 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 3304 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3305 | */ |
mbed_official | 133:d4dda5c437f0 | 3306 | static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 3307 | { |
mbed_official | 133:d4dda5c437f0 | 3308 | CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 3309 | |
mbed_official | 133:d4dda5c437f0 | 3310 | /* Disable the DMA transfer for input FIFO request by resetting the DIEN bit |
mbed_official | 133:d4dda5c437f0 | 3311 | in the DMACR register */ |
mbed_official | 133:d4dda5c437f0 | 3312 | CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN); |
mbed_official | 133:d4dda5c437f0 | 3313 | |
mbed_official | 133:d4dda5c437f0 | 3314 | /* Call input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 3315 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3316 | } |
mbed_official | 133:d4dda5c437f0 | 3317 | |
mbed_official | 133:d4dda5c437f0 | 3318 | /** |
mbed_official | 133:d4dda5c437f0 | 3319 | * @brief DMA CRYP Output Data process complete callback. |
mbed_official | 133:d4dda5c437f0 | 3320 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 3321 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3322 | */ |
mbed_official | 133:d4dda5c437f0 | 3323 | static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 3324 | { |
mbed_official | 133:d4dda5c437f0 | 3325 | CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 3326 | |
mbed_official | 133:d4dda5c437f0 | 3327 | /* Disable the DMA transfer for output FIFO request by resetting the DOEN bit |
mbed_official | 133:d4dda5c437f0 | 3328 | in the DMACR register */ |
mbed_official | 133:d4dda5c437f0 | 3329 | CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN); |
mbed_official | 133:d4dda5c437f0 | 3330 | |
mbed_official | 133:d4dda5c437f0 | 3331 | /* Disable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 3332 | __HAL_CRYP_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 3333 | |
mbed_official | 133:d4dda5c437f0 | 3334 | /* Change the CRYP state to ready */ |
mbed_official | 133:d4dda5c437f0 | 3335 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3336 | |
mbed_official | 133:d4dda5c437f0 | 3337 | /* Call output data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 3338 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3339 | } |
mbed_official | 133:d4dda5c437f0 | 3340 | |
mbed_official | 133:d4dda5c437f0 | 3341 | /** |
mbed_official | 133:d4dda5c437f0 | 3342 | * @brief DMA CRYP communication error callback. |
mbed_official | 133:d4dda5c437f0 | 3343 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 3344 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3345 | */ |
mbed_official | 133:d4dda5c437f0 | 3346 | static void CRYP_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 3347 | { |
mbed_official | 133:d4dda5c437f0 | 3348 | CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 3349 | hcryp->State= HAL_CRYP_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3350 | HAL_CRYP_ErrorCallback(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3351 | } |
mbed_official | 133:d4dda5c437f0 | 3352 | |
mbed_official | 133:d4dda5c437f0 | 3353 | /** |
mbed_official | 133:d4dda5c437f0 | 3354 | * @brief Writes the Key in Key registers. |
mbed_official | 133:d4dda5c437f0 | 3355 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3356 | * @param Key: Pointer to Key buffer |
mbed_official | 133:d4dda5c437f0 | 3357 | * @param KeySize: Size of Key |
mbed_official | 133:d4dda5c437f0 | 3358 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3359 | */ |
mbed_official | 133:d4dda5c437f0 | 3360 | static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize) |
mbed_official | 133:d4dda5c437f0 | 3361 | { |
mbed_official | 133:d4dda5c437f0 | 3362 | uint32_t keyaddr = (uint32_t)Key; |
mbed_official | 133:d4dda5c437f0 | 3363 | |
mbed_official | 133:d4dda5c437f0 | 3364 | switch(KeySize) |
mbed_official | 133:d4dda5c437f0 | 3365 | { |
mbed_official | 133:d4dda5c437f0 | 3366 | case CRYP_KEYSIZE_256B: |
mbed_official | 133:d4dda5c437f0 | 3367 | /* Key Initialisation */ |
mbed_official | 133:d4dda5c437f0 | 3368 | CRYP->K0LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3369 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3370 | CRYP->K0RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3371 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3372 | CRYP->K1LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3373 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3374 | CRYP->K1RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3375 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3376 | CRYP->K2LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3377 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3378 | CRYP->K2RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3379 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3380 | CRYP->K3LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3381 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3382 | CRYP->K3RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3383 | break; |
mbed_official | 133:d4dda5c437f0 | 3384 | case CRYP_KEYSIZE_192B: |
mbed_official | 133:d4dda5c437f0 | 3385 | CRYP->K1LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3386 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3387 | CRYP->K1RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3388 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3389 | CRYP->K2LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3390 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3391 | CRYP->K2RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3392 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3393 | CRYP->K3LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3394 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3395 | CRYP->K3RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3396 | break; |
mbed_official | 133:d4dda5c437f0 | 3397 | case CRYP_KEYSIZE_128B: |
mbed_official | 133:d4dda5c437f0 | 3398 | CRYP->K2LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3399 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3400 | CRYP->K2RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3401 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3402 | CRYP->K3LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3403 | keyaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3404 | CRYP->K3RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 133:d4dda5c437f0 | 3405 | break; |
mbed_official | 133:d4dda5c437f0 | 3406 | default: |
mbed_official | 133:d4dda5c437f0 | 3407 | break; |
mbed_official | 133:d4dda5c437f0 | 3408 | } |
mbed_official | 133:d4dda5c437f0 | 3409 | } |
mbed_official | 133:d4dda5c437f0 | 3410 | |
mbed_official | 133:d4dda5c437f0 | 3411 | /** |
mbed_official | 133:d4dda5c437f0 | 3412 | * @brief Writes the InitVector/InitCounter in IV registers. |
mbed_official | 133:d4dda5c437f0 | 3413 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3414 | * @param InitVector: Pointer to InitVector/InitCounter buffer |
mbed_official | 133:d4dda5c437f0 | 3415 | * @param IVSize: Size of the InitVector/InitCounter |
mbed_official | 133:d4dda5c437f0 | 3416 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3417 | */ |
mbed_official | 133:d4dda5c437f0 | 3418 | static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize) |
mbed_official | 133:d4dda5c437f0 | 3419 | { |
mbed_official | 133:d4dda5c437f0 | 3420 | uint32_t ivaddr = (uint32_t)InitVector; |
mbed_official | 133:d4dda5c437f0 | 3421 | |
mbed_official | 133:d4dda5c437f0 | 3422 | switch(IVSize) |
mbed_official | 133:d4dda5c437f0 | 3423 | { |
mbed_official | 133:d4dda5c437f0 | 3424 | case CRYP_KEYSIZE_128B: |
mbed_official | 133:d4dda5c437f0 | 3425 | CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 133:d4dda5c437f0 | 3426 | ivaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3427 | CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 133:d4dda5c437f0 | 3428 | ivaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3429 | CRYP->IV1LR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 133:d4dda5c437f0 | 3430 | ivaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3431 | CRYP->IV1RR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 133:d4dda5c437f0 | 3432 | break; |
mbed_official | 133:d4dda5c437f0 | 3433 | /* Whatever key size 192 or 256, Init vector is written in IV0LR and IV0RR */ |
mbed_official | 133:d4dda5c437f0 | 3434 | case CRYP_KEYSIZE_192B: |
mbed_official | 133:d4dda5c437f0 | 3435 | CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 133:d4dda5c437f0 | 3436 | ivaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3437 | CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 133:d4dda5c437f0 | 3438 | break; |
mbed_official | 133:d4dda5c437f0 | 3439 | case CRYP_KEYSIZE_256B: |
mbed_official | 133:d4dda5c437f0 | 3440 | CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 133:d4dda5c437f0 | 3441 | ivaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3442 | CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 133:d4dda5c437f0 | 3443 | break; |
mbed_official | 133:d4dda5c437f0 | 3444 | default: |
mbed_official | 133:d4dda5c437f0 | 3445 | break; |
mbed_official | 133:d4dda5c437f0 | 3446 | } |
mbed_official | 133:d4dda5c437f0 | 3447 | } |
mbed_official | 133:d4dda5c437f0 | 3448 | |
mbed_official | 133:d4dda5c437f0 | 3449 | /** |
mbed_official | 133:d4dda5c437f0 | 3450 | * @brief Process Data: Writes Input data in polling mode and read the output data |
mbed_official | 133:d4dda5c437f0 | 3451 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3452 | * @param Input: Pointer to the Input buffer |
mbed_official | 133:d4dda5c437f0 | 3453 | * @param Ilength: Length of the Input buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 3454 | * @param Output: Pointer to the returned buffer |
mbed_official | 133:d4dda5c437f0 | 3455 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3456 | */ |
mbed_official | 133:d4dda5c437f0 | 3457 | static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 3458 | { |
mbed_official | 133:d4dda5c437f0 | 3459 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 3460 | |
mbed_official | 133:d4dda5c437f0 | 3461 | uint32_t i = 0; |
mbed_official | 133:d4dda5c437f0 | 3462 | uint32_t inputaddr = (uint32_t)Input; |
mbed_official | 133:d4dda5c437f0 | 3463 | uint32_t outputaddr = (uint32_t)Output; |
mbed_official | 133:d4dda5c437f0 | 3464 | |
mbed_official | 133:d4dda5c437f0 | 3465 | for(i=0; (i < Ilength); i+=16) |
mbed_official | 133:d4dda5c437f0 | 3466 | { |
mbed_official | 133:d4dda5c437f0 | 3467 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 3468 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 3469 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3470 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 3471 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3472 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 3473 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3474 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 3475 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3476 | |
mbed_official | 133:d4dda5c437f0 | 3477 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 3478 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 3479 | |
mbed_official | 133:d4dda5c437f0 | 3480 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE)) |
mbed_official | 133:d4dda5c437f0 | 3481 | { |
mbed_official | 133:d4dda5c437f0 | 3482 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 3483 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 3484 | { |
mbed_official | 133:d4dda5c437f0 | 3485 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 3486 | { |
mbed_official | 133:d4dda5c437f0 | 3487 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 3488 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3489 | |
mbed_official | 133:d4dda5c437f0 | 3490 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 3491 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3492 | |
mbed_official | 133:d4dda5c437f0 | 3493 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3494 | } |
mbed_official | 133:d4dda5c437f0 | 3495 | } |
mbed_official | 133:d4dda5c437f0 | 3496 | } |
mbed_official | 133:d4dda5c437f0 | 3497 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 3498 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 3499 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3500 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 3501 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3502 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 3503 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3504 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 3505 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3506 | } |
mbed_official | 133:d4dda5c437f0 | 3507 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 3508 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3509 | } |
mbed_official | 133:d4dda5c437f0 | 3510 | |
mbed_official | 133:d4dda5c437f0 | 3511 | /** |
mbed_official | 133:d4dda5c437f0 | 3512 | * @brief Process Data: Write Input data in polling mode. |
mbed_official | 133:d4dda5c437f0 | 3513 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3514 | * @param Input: Pointer to the Input buffer |
mbed_official | 133:d4dda5c437f0 | 3515 | * @param Ilength: Length of the Input buffer, must be a multiple of 8 |
mbed_official | 133:d4dda5c437f0 | 3516 | * @param Output: Pointer to the returned buffer |
mbed_official | 133:d4dda5c437f0 | 3517 | * @param Timeout: Specify Timeout value |
mbed_official | 133:d4dda5c437f0 | 3518 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3519 | */ |
mbed_official | 133:d4dda5c437f0 | 3520 | static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 3521 | { |
mbed_official | 133:d4dda5c437f0 | 3522 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 3523 | |
mbed_official | 133:d4dda5c437f0 | 3524 | uint32_t i = 0; |
mbed_official | 133:d4dda5c437f0 | 3525 | uint32_t inputaddr = (uint32_t)Input; |
mbed_official | 133:d4dda5c437f0 | 3526 | uint32_t outputaddr = (uint32_t)Output; |
mbed_official | 133:d4dda5c437f0 | 3527 | |
mbed_official | 133:d4dda5c437f0 | 3528 | for(i=0; (i < Ilength); i+=8) |
mbed_official | 133:d4dda5c437f0 | 3529 | { |
mbed_official | 133:d4dda5c437f0 | 3530 | /* Write the Input block in the IN FIFO */ |
mbed_official | 133:d4dda5c437f0 | 3531 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 3532 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3533 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 133:d4dda5c437f0 | 3534 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3535 | |
mbed_official | 133:d4dda5c437f0 | 3536 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 3537 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 3538 | |
mbed_official | 133:d4dda5c437f0 | 3539 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE)) |
mbed_official | 133:d4dda5c437f0 | 3540 | { |
mbed_official | 133:d4dda5c437f0 | 3541 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 3542 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 3543 | { |
mbed_official | 133:d4dda5c437f0 | 3544 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 3545 | { |
mbed_official | 133:d4dda5c437f0 | 3546 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 3547 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3548 | |
mbed_official | 133:d4dda5c437f0 | 3549 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 3550 | __HAL_UNLOCK(hcryp); |
mbed_official | 133:d4dda5c437f0 | 3551 | |
mbed_official | 133:d4dda5c437f0 | 3552 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3553 | } |
mbed_official | 133:d4dda5c437f0 | 3554 | } |
mbed_official | 133:d4dda5c437f0 | 3555 | } |
mbed_official | 133:d4dda5c437f0 | 3556 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 3557 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 3558 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3559 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 133:d4dda5c437f0 | 3560 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 3561 | } |
mbed_official | 133:d4dda5c437f0 | 3562 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 3563 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3564 | } |
mbed_official | 133:d4dda5c437f0 | 3565 | |
mbed_official | 133:d4dda5c437f0 | 3566 | /** |
mbed_official | 133:d4dda5c437f0 | 3567 | * @brief Set the DMA configuration and start the DMA transfer |
mbed_official | 133:d4dda5c437f0 | 3568 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3569 | * @param inputaddr: address of the Input buffer |
mbed_official | 133:d4dda5c437f0 | 3570 | * @param Size: Size of the Input buffer, must be a multiple of 16. |
mbed_official | 133:d4dda5c437f0 | 3571 | * @param outputaddr: address of the Output buffer |
mbed_official | 133:d4dda5c437f0 | 3572 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3573 | */ |
mbed_official | 133:d4dda5c437f0 | 3574 | static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr) |
mbed_official | 133:d4dda5c437f0 | 3575 | { |
mbed_official | 133:d4dda5c437f0 | 3576 | /* Set the CRYP DMA transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 3577 | hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt; |
mbed_official | 133:d4dda5c437f0 | 3578 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 3579 | hcryp->hdmain->XferErrorCallback = CRYP_DMAError; |
mbed_official | 133:d4dda5c437f0 | 3580 | |
mbed_official | 133:d4dda5c437f0 | 3581 | /* Set the CRYP DMA transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 3582 | hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt; |
mbed_official | 133:d4dda5c437f0 | 3583 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 3584 | hcryp->hdmaout->XferErrorCallback = CRYP_DMAError; |
mbed_official | 133:d4dda5c437f0 | 3585 | |
mbed_official | 133:d4dda5c437f0 | 3586 | /* Enable CRYP */ |
mbed_official | 133:d4dda5c437f0 | 3587 | __HAL_CRYP_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 3588 | |
mbed_official | 133:d4dda5c437f0 | 3589 | /* Enable the DMA In DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 3590 | HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&CRYP->DR, Size/4); |
mbed_official | 133:d4dda5c437f0 | 3591 | |
mbed_official | 133:d4dda5c437f0 | 3592 | /* Enable In DMA request */ |
mbed_official | 133:d4dda5c437f0 | 3593 | CRYP->DMACR = (CRYP_DMACR_DIEN); |
mbed_official | 133:d4dda5c437f0 | 3594 | |
mbed_official | 133:d4dda5c437f0 | 3595 | /* Enable the DMA Out DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 3596 | HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&CRYP->DOUT, outputaddr, Size/4); |
mbed_official | 133:d4dda5c437f0 | 3597 | |
mbed_official | 133:d4dda5c437f0 | 3598 | /* Enable Out DMA request */ |
mbed_official | 133:d4dda5c437f0 | 3599 | CRYP->DMACR |= CRYP_DMACR_DOEN; |
mbed_official | 133:d4dda5c437f0 | 3600 | |
mbed_official | 133:d4dda5c437f0 | 3601 | } |
mbed_official | 133:d4dda5c437f0 | 3602 | |
mbed_official | 133:d4dda5c437f0 | 3603 | /** |
mbed_official | 133:d4dda5c437f0 | 3604 | * @brief Sets the CRYP peripheral in DES ECB mode. |
mbed_official | 133:d4dda5c437f0 | 3605 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3606 | * @param Direction: Encryption or decryption |
mbed_official | 133:d4dda5c437f0 | 3607 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3608 | */ |
mbed_official | 133:d4dda5c437f0 | 3609 | static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction) |
mbed_official | 133:d4dda5c437f0 | 3610 | { |
mbed_official | 133:d4dda5c437f0 | 3611 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 3612 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 3613 | { |
mbed_official | 133:d4dda5c437f0 | 3614 | /* Set the CRYP peripheral in AES ECB mode */ |
mbed_official | 133:d4dda5c437f0 | 3615 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_DES_ECB | Direction); |
mbed_official | 133:d4dda5c437f0 | 3616 | |
mbed_official | 133:d4dda5c437f0 | 3617 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 3618 | CRYP->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey)); |
mbed_official | 133:d4dda5c437f0 | 3619 | CRYP->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4)); |
mbed_official | 133:d4dda5c437f0 | 3620 | |
mbed_official | 133:d4dda5c437f0 | 3621 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 3622 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 3623 | |
mbed_official | 133:d4dda5c437f0 | 3624 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 3625 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 3626 | } |
mbed_official | 133:d4dda5c437f0 | 3627 | } |
mbed_official | 133:d4dda5c437f0 | 3628 | |
mbed_official | 133:d4dda5c437f0 | 3629 | /** |
mbed_official | 133:d4dda5c437f0 | 3630 | * @brief Sets the CRYP peripheral in DES CBC mode. |
mbed_official | 133:d4dda5c437f0 | 3631 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3632 | * @param Direction: Encryption or decryption |
mbed_official | 133:d4dda5c437f0 | 3633 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3634 | */ |
mbed_official | 133:d4dda5c437f0 | 3635 | static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction) |
mbed_official | 133:d4dda5c437f0 | 3636 | { |
mbed_official | 133:d4dda5c437f0 | 3637 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 3638 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 3639 | { |
mbed_official | 133:d4dda5c437f0 | 3640 | /* Set the CRYP peripheral in AES ECB mode */ |
mbed_official | 133:d4dda5c437f0 | 3641 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_DES_CBC | Direction); |
mbed_official | 133:d4dda5c437f0 | 3642 | |
mbed_official | 133:d4dda5c437f0 | 3643 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 3644 | CRYP->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey)); |
mbed_official | 133:d4dda5c437f0 | 3645 | CRYP->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4)); |
mbed_official | 133:d4dda5c437f0 | 3646 | |
mbed_official | 133:d4dda5c437f0 | 3647 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 3648 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B); |
mbed_official | 133:d4dda5c437f0 | 3649 | |
mbed_official | 133:d4dda5c437f0 | 3650 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 3651 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 3652 | |
mbed_official | 133:d4dda5c437f0 | 3653 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 3654 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 3655 | } |
mbed_official | 133:d4dda5c437f0 | 3656 | } |
mbed_official | 133:d4dda5c437f0 | 3657 | |
mbed_official | 133:d4dda5c437f0 | 3658 | /** |
mbed_official | 133:d4dda5c437f0 | 3659 | * @brief Sets the CRYP peripheral in TDES ECB mode. |
mbed_official | 133:d4dda5c437f0 | 3660 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3661 | * @param Direction: Encryption or decryption |
mbed_official | 133:d4dda5c437f0 | 3662 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3663 | */ |
mbed_official | 133:d4dda5c437f0 | 3664 | static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction) |
mbed_official | 133:d4dda5c437f0 | 3665 | { |
mbed_official | 133:d4dda5c437f0 | 3666 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 3667 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 3668 | { |
mbed_official | 133:d4dda5c437f0 | 3669 | /* Set the CRYP peripheral in AES ECB mode */ |
mbed_official | 133:d4dda5c437f0 | 3670 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_TDES_ECB | Direction); |
mbed_official | 133:d4dda5c437f0 | 3671 | |
mbed_official | 133:d4dda5c437f0 | 3672 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 3673 | CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B); |
mbed_official | 133:d4dda5c437f0 | 3674 | |
mbed_official | 133:d4dda5c437f0 | 3675 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 3676 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 3677 | |
mbed_official | 133:d4dda5c437f0 | 3678 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 3679 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 3680 | } |
mbed_official | 133:d4dda5c437f0 | 3681 | } |
mbed_official | 133:d4dda5c437f0 | 3682 | |
mbed_official | 133:d4dda5c437f0 | 3683 | /** |
mbed_official | 133:d4dda5c437f0 | 3684 | * @brief Sets the CRYP peripheral in TDES CBC mode |
mbed_official | 133:d4dda5c437f0 | 3685 | * @param hcryp: CRYP handle |
mbed_official | 133:d4dda5c437f0 | 3686 | * @param Direction: Encryption or decryption |
mbed_official | 133:d4dda5c437f0 | 3687 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3688 | */ |
mbed_official | 133:d4dda5c437f0 | 3689 | static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction) |
mbed_official | 133:d4dda5c437f0 | 3690 | { |
mbed_official | 133:d4dda5c437f0 | 3691 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 3692 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 3693 | { |
mbed_official | 133:d4dda5c437f0 | 3694 | /* Set the CRYP peripheral in AES CBC mode */ |
mbed_official | 133:d4dda5c437f0 | 3695 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_TDES_CBC | Direction); |
mbed_official | 133:d4dda5c437f0 | 3696 | |
mbed_official | 133:d4dda5c437f0 | 3697 | /* Set the key */ |
mbed_official | 133:d4dda5c437f0 | 3698 | CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B); |
mbed_official | 133:d4dda5c437f0 | 3699 | |
mbed_official | 133:d4dda5c437f0 | 3700 | /* Set the Initialization Vector */ |
mbed_official | 133:d4dda5c437f0 | 3701 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B); |
mbed_official | 133:d4dda5c437f0 | 3702 | |
mbed_official | 133:d4dda5c437f0 | 3703 | /* Flush FIFO */ |
mbed_official | 133:d4dda5c437f0 | 3704 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 133:d4dda5c437f0 | 3705 | |
mbed_official | 133:d4dda5c437f0 | 3706 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 3707 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 3708 | } |
mbed_official | 133:d4dda5c437f0 | 3709 | } |
mbed_official | 133:d4dda5c437f0 | 3710 | |
mbed_official | 133:d4dda5c437f0 | 3711 | /** |
mbed_official | 133:d4dda5c437f0 | 3712 | * @} |
mbed_official | 133:d4dda5c437f0 | 3713 | */ |
mbed_official | 133:d4dda5c437f0 | 3714 | |
mbed_official | 133:d4dda5c437f0 | 3715 | #endif /* STM32F415xx || STM32F417xx || STM32F437xx || STM32F439xx */ |
mbed_official | 133:d4dda5c437f0 | 3716 | |
mbed_official | 133:d4dda5c437f0 | 3717 | #endif /* HAL_CRYP_MODULE_ENABLED */ |
mbed_official | 133:d4dda5c437f0 | 3718 | /** |
mbed_official | 133:d4dda5c437f0 | 3719 | * @} |
mbed_official | 133:d4dda5c437f0 | 3720 | */ |
mbed_official | 133:d4dda5c437f0 | 3721 | |
mbed_official | 133:d4dda5c437f0 | 3722 | /** |
mbed_official | 133:d4dda5c437f0 | 3723 | * @} |
mbed_official | 133:d4dda5c437f0 | 3724 | */ |
mbed_official | 133:d4dda5c437f0 | 3725 | |
mbed_official | 133:d4dda5c437f0 | 3726 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |