mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/hal/TARGET_NXP/TARGET_LPC11UXX/analogin_api.c@19:398f4c622e1b, 2013-08-19 (annotated)
- Committer:
- bogdanm
- Date:
- Mon Aug 19 18:17:02 2013 +0300
- Revision:
- 19:398f4c622e1b
- Parent:
- 13:0645d8841f51
- Child:
- 227:7bd0639b8911
Sync with official mbed library release 66
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 10:3bc89ef62ce7 | 1 | /* mbed Microcontroller Library |
emilmont | 10:3bc89ef62ce7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
emilmont | 10:3bc89ef62ce7 | 3 | * |
emilmont | 10:3bc89ef62ce7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
emilmont | 10:3bc89ef62ce7 | 5 | * you may not use this file except in compliance with the License. |
emilmont | 10:3bc89ef62ce7 | 6 | * You may obtain a copy of the License at |
emilmont | 10:3bc89ef62ce7 | 7 | * |
emilmont | 10:3bc89ef62ce7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
emilmont | 10:3bc89ef62ce7 | 9 | * |
emilmont | 10:3bc89ef62ce7 | 10 | * Unless required by applicable law or agreed to in writing, software |
emilmont | 10:3bc89ef62ce7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
emilmont | 10:3bc89ef62ce7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
emilmont | 10:3bc89ef62ce7 | 13 | * See the License for the specific language governing permissions and |
emilmont | 10:3bc89ef62ce7 | 14 | * limitations under the License. |
emilmont | 10:3bc89ef62ce7 | 15 | */ |
emilmont | 10:3bc89ef62ce7 | 16 | #include "analogin_api.h" |
emilmont | 10:3bc89ef62ce7 | 17 | #include "cmsis.h" |
emilmont | 10:3bc89ef62ce7 | 18 | #include "pinmap.h" |
emilmont | 10:3bc89ef62ce7 | 19 | #include "error.h" |
emilmont | 10:3bc89ef62ce7 | 20 | |
emilmont | 10:3bc89ef62ce7 | 21 | #define ANALOGIN_MEDIAN_FILTER 1 |
emilmont | 10:3bc89ef62ce7 | 22 | |
emilmont | 10:3bc89ef62ce7 | 23 | #define ADC_10BIT_RANGE 0x3FF |
emilmont | 10:3bc89ef62ce7 | 24 | #define ADC_12BIT_RANGE 0xFFF |
emilmont | 10:3bc89ef62ce7 | 25 | |
emilmont | 10:3bc89ef62ce7 | 26 | static inline int div_round_up(int x, int y) { |
emilmont | 10:3bc89ef62ce7 | 27 | return (x + (y - 1)) / y; |
emilmont | 10:3bc89ef62ce7 | 28 | } |
emilmont | 10:3bc89ef62ce7 | 29 | |
emilmont | 10:3bc89ef62ce7 | 30 | static const PinMap PinMap_ADC[] = { |
emilmont | 10:3bc89ef62ce7 | 31 | {P0_11, ADC0_0, 0x02}, |
emilmont | 10:3bc89ef62ce7 | 32 | {P0_12, ADC0_1, 0x02}, |
emilmont | 10:3bc89ef62ce7 | 33 | {P0_13, ADC0_2, 0x02}, |
emilmont | 10:3bc89ef62ce7 | 34 | {P0_14, ADC0_3, 0x02}, |
emilmont | 10:3bc89ef62ce7 | 35 | {P0_15, ADC0_4, 0x02}, |
emilmont | 10:3bc89ef62ce7 | 36 | {P0_16, ADC0_5, 0x01}, |
emilmont | 10:3bc89ef62ce7 | 37 | {P0_22, ADC0_6, 0x01}, |
emilmont | 10:3bc89ef62ce7 | 38 | {P0_23, ADC0_7, 0x01}, |
emilmont | 10:3bc89ef62ce7 | 39 | {NC , NC , 0 } |
emilmont | 10:3bc89ef62ce7 | 40 | }; |
emilmont | 10:3bc89ef62ce7 | 41 | |
emilmont | 10:3bc89ef62ce7 | 42 | #define LPC_IOCON0_BASE (LPC_IOCON_BASE) |
emilmont | 10:3bc89ef62ce7 | 43 | #define LPC_IOCON1_BASE (LPC_IOCON_BASE + 0x60) |
emilmont | 10:3bc89ef62ce7 | 44 | |
emilmont | 10:3bc89ef62ce7 | 45 | #define ADC_RANGE ADC_10BIT_RANGE |
emilmont | 10:3bc89ef62ce7 | 46 | |
emilmont | 10:3bc89ef62ce7 | 47 | void analogin_init(analogin_t *obj, PinName pin) { |
emilmont | 10:3bc89ef62ce7 | 48 | obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); |
bogdanm | 19:398f4c622e1b | 49 | if (obj->adc == (ADCName)NC) { |
emilmont | 10:3bc89ef62ce7 | 50 | error("ADC pin mapping failed"); |
emilmont | 10:3bc89ef62ce7 | 51 | } |
emilmont | 10:3bc89ef62ce7 | 52 | |
emilmont | 10:3bc89ef62ce7 | 53 | // Power up ADC |
emilmont | 10:3bc89ef62ce7 | 54 | LPC_SYSCON->PDRUNCFG &= ~ (1 << 4); |
emilmont | 10:3bc89ef62ce7 | 55 | LPC_SYSCON->SYSAHBCLKCTRL |= ((uint32_t)1 << 13); |
emilmont | 10:3bc89ef62ce7 | 56 | |
emilmont | 10:3bc89ef62ce7 | 57 | uint32_t pin_number = (uint32_t)pin; |
emilmont | 10:3bc89ef62ce7 | 58 | __IO uint32_t *reg = (pin_number < 32) ? (__IO uint32_t*)(LPC_IOCON0_BASE + 4 * pin_number) : (__IO uint32_t*)(LPC_IOCON1_BASE + 4 * (pin_number - 32)); |
emilmont | 10:3bc89ef62ce7 | 59 | |
emilmont | 10:3bc89ef62ce7 | 60 | // set pin to ADC mode |
emilmont | 10:3bc89ef62ce7 | 61 | *reg &= ~(1 << 7); // set ADMODE = 0 (analog mode) |
emilmont | 10:3bc89ef62ce7 | 62 | |
emilmont | 10:3bc89ef62ce7 | 63 | uint32_t PCLK = SystemCoreClock; |
emilmont | 10:3bc89ef62ce7 | 64 | uint32_t MAX_ADC_CLK = 4500000; |
emilmont | 10:3bc89ef62ce7 | 65 | uint32_t clkdiv = div_round_up(PCLK, MAX_ADC_CLK) - 1; |
emilmont | 10:3bc89ef62ce7 | 66 | |
emilmont | 10:3bc89ef62ce7 | 67 | LPC_ADC->CR = (0 << 0) // no channels selected |
emilmont | 10:3bc89ef62ce7 | 68 | | (clkdiv << 8) // max of 4.5MHz |
emilmont | 10:3bc89ef62ce7 | 69 | | (0 << 16) // BURST = 0, software controlled |
emilmont | 10:3bc89ef62ce7 | 70 | | ( 0 << 17 ); // CLKS = 0, not applicable |
emilmont | 10:3bc89ef62ce7 | 71 | |
emilmont | 10:3bc89ef62ce7 | 72 | pinmap_pinout(pin, PinMap_ADC); |
emilmont | 10:3bc89ef62ce7 | 73 | } |
emilmont | 10:3bc89ef62ce7 | 74 | |
emilmont | 10:3bc89ef62ce7 | 75 | static inline uint32_t adc_read(analogin_t *obj) { |
emilmont | 10:3bc89ef62ce7 | 76 | // Select the appropriate channel and start conversion |
emilmont | 10:3bc89ef62ce7 | 77 | LPC_ADC->CR &= ~0xFF; |
emilmont | 10:3bc89ef62ce7 | 78 | LPC_ADC->CR |= 1 << (int)obj->adc; |
emilmont | 10:3bc89ef62ce7 | 79 | LPC_ADC->CR |= 1 << 24; |
emilmont | 10:3bc89ef62ce7 | 80 | |
emilmont | 10:3bc89ef62ce7 | 81 | // Repeatedly get the sample data until DONE bit |
emilmont | 10:3bc89ef62ce7 | 82 | unsigned int data; |
emilmont | 10:3bc89ef62ce7 | 83 | do { |
emilmont | 10:3bc89ef62ce7 | 84 | data = LPC_ADC->GDR; |
emilmont | 10:3bc89ef62ce7 | 85 | } while ((data & ((unsigned int)1 << 31)) == 0); |
emilmont | 10:3bc89ef62ce7 | 86 | |
emilmont | 10:3bc89ef62ce7 | 87 | // Stop conversion |
emilmont | 10:3bc89ef62ce7 | 88 | LPC_ADC->CR &= ~(1 << 24); |
emilmont | 10:3bc89ef62ce7 | 89 | |
emilmont | 10:3bc89ef62ce7 | 90 | return (data >> 6) & ADC_RANGE; // 10 bit |
emilmont | 10:3bc89ef62ce7 | 91 | } |
emilmont | 10:3bc89ef62ce7 | 92 | |
emilmont | 10:3bc89ef62ce7 | 93 | static inline void order(uint32_t *a, uint32_t *b) { |
emilmont | 10:3bc89ef62ce7 | 94 | if (*a > *b) { |
emilmont | 10:3bc89ef62ce7 | 95 | uint32_t t = *a; |
emilmont | 10:3bc89ef62ce7 | 96 | *a = *b; |
emilmont | 10:3bc89ef62ce7 | 97 | *b = t; |
emilmont | 10:3bc89ef62ce7 | 98 | } |
emilmont | 10:3bc89ef62ce7 | 99 | } |
emilmont | 10:3bc89ef62ce7 | 100 | |
emilmont | 10:3bc89ef62ce7 | 101 | static inline uint32_t adc_read_u32(analogin_t *obj) { |
emilmont | 10:3bc89ef62ce7 | 102 | uint32_t value; |
emilmont | 10:3bc89ef62ce7 | 103 | #if ANALOGIN_MEDIAN_FILTER |
emilmont | 10:3bc89ef62ce7 | 104 | uint32_t v1 = adc_read(obj); |
emilmont | 10:3bc89ef62ce7 | 105 | uint32_t v2 = adc_read(obj); |
emilmont | 10:3bc89ef62ce7 | 106 | uint32_t v3 = adc_read(obj); |
emilmont | 10:3bc89ef62ce7 | 107 | order(&v1, &v2); |
emilmont | 10:3bc89ef62ce7 | 108 | order(&v2, &v3); |
emilmont | 10:3bc89ef62ce7 | 109 | order(&v1, &v2); |
emilmont | 10:3bc89ef62ce7 | 110 | value = v2; |
emilmont | 10:3bc89ef62ce7 | 111 | #else |
emilmont | 10:3bc89ef62ce7 | 112 | value = adc_read(obj); |
emilmont | 10:3bc89ef62ce7 | 113 | #endif |
emilmont | 10:3bc89ef62ce7 | 114 | return value; |
emilmont | 10:3bc89ef62ce7 | 115 | } |
emilmont | 10:3bc89ef62ce7 | 116 | |
emilmont | 10:3bc89ef62ce7 | 117 | uint16_t analogin_read_u16(analogin_t *obj) { |
emilmont | 10:3bc89ef62ce7 | 118 | uint32_t value = adc_read_u32(obj); |
emilmont | 10:3bc89ef62ce7 | 119 | |
emilmont | 10:3bc89ef62ce7 | 120 | return (value << 6) | ((value >> 4) & 0x003F); // 10 bit |
emilmont | 10:3bc89ef62ce7 | 121 | } |
emilmont | 10:3bc89ef62ce7 | 122 | |
emilmont | 10:3bc89ef62ce7 | 123 | float analogin_read(analogin_t *obj) { |
emilmont | 10:3bc89ef62ce7 | 124 | uint32_t value = adc_read_u32(obj); |
emilmont | 10:3bc89ef62ce7 | 125 | return (float)value * (1.0f / (float)ADC_RANGE); |
emilmont | 10:3bc89ef62ce7 | 126 | } |