mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_dac.h
- Committer:
- mbed_official
- Date:
- 2014-06-24
- Revision:
- 237:f3da66175598
File content as of revision 237:f3da66175598:
/** ****************************************************************************** * @file stm32f3xx_hal_dac.h * @author MCD Application Team * @version V1.0.1 * @date 18-June-2014 * @brief Header file of DAC HAL module. ****************************************************************************** * @attention * * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. Neither the name of STMicroelectronics nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F3xx_HAL_DAC_H #define __STM32F3xx_HAL_DAC_H #ifdef __cplusplus extern "C" { #endif /* Includes ------------------------------------------------------------------*/ #include "stm32f3xx_hal_def.h" /** @addtogroup STM32F3xx_HAL_Driver * @{ */ /** @addtogroup DAC * @{ */ /* Exported types ------------------------------------------------------------*/ /** * @brief HAL State structures definition */ typedef enum { HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */ HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */ HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */ HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */ HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */ }HAL_DAC_StateTypeDef; /** * @brief DAC Configuration regular Channel structure definition */ typedef struct { uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. This parameter can be a value of @ref DACEx_trigger_selection */ uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. This parameter can be a value of @ref DAC_output_buffer */ }DAC_ChannelConfTypeDef; /** * @brief DAC handle Structure definition */ typedef struct __DAC_HandleTypeDef { DAC_TypeDef *Instance; /*!< Register base address */ __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ HAL_LockTypeDef Lock; /*!< DAC locking object */ DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ __IO uint32_t ErrorCode; /*!< DAC Error code */ }DAC_HandleTypeDef; /* Exported constants --------------------------------------------------------*/ /** @defgroup DAC_Error_Code * @{ */ #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */ #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DMA underrun error */ #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DMA underrun error */ #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */ /** * @} */ /** @defgroup DAC_wave_generation * @{ */ #define DAC_WAVEGENERATION_NONE ((uint32_t)0x00000000) #define DAC_WAVEGENERATION_NOISE ((uint32_t)DAC_CR_WAVE1_0) #define DAC_WAVEGENERATION_TRIANGLE ((uint32_t)DAC_CR_WAVE1_1) #define IS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WAVEGENERATION_NONE) || \ ((WAVE) == DAC_WAVEGENERATION_NOISE) || \ ((WAVE) == DAC_WAVEGENERATION_TRIANGLE)) /** * @} */ /** @defgroup DAC_lfsrunmask_triangleamplitude * @{ */ #define DAC_LFSRUNMASK_BIT0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ #define DAC_LFSRUNMASK_BITS1_0 ((uint32_t)DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS2_0 ((uint32_t)DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS3_0 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0)/*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS4_0 ((uint32_t)DAC_CR_MAMP1_2) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS5_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS6_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS7_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS8_0 ((uint32_t)DAC_CR_MAMP1_3) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS9_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS10_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS11_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ #define DAC_TRIANGLEAMPLITUDE_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */ #define DAC_TRIANGLEAMPLITUDE_3 ((uint32_t)DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */ #define DAC_TRIANGLEAMPLITUDE_7 ((uint32_t)DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 7 */ #define DAC_TRIANGLEAMPLITUDE_15 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */ #define DAC_TRIANGLEAMPLITUDE_31 ((uint32_t)DAC_CR_MAMP1_2) /*!< Select max triangle amplitude of 31 */ #define DAC_TRIANGLEAMPLITUDE_63 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */ #define DAC_TRIANGLEAMPLITUDE_127 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 127 */ #define DAC_TRIANGLEAMPLITUDE_255 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */ #define DAC_TRIANGLEAMPLITUDE_511 ((uint32_t)DAC_CR_MAMP1_3) /*!< Select max triangle amplitude of 511 */ #define DAC_TRIANGLEAMPLITUDE_1023 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */ #define DAC_TRIANGLEAMPLITUDE_2047 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 2047 */ #define DAC_TRIANGLEAMPLITUDE_4095 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */ #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_4095)) /** * @} */ /** @defgroup DAC_output_buffer * @{ */ #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000) #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1) #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) /** * @} */ /** @defgroup DAC_data_alignement * @{ */ #define DAC_ALIGN_12B_R ((uint32_t)0x00000000) #define DAC_ALIGN_12B_L ((uint32_t)0x00000004) #define DAC_ALIGN_8B_R ((uint32_t)0x00000008) #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ ((ALIGN) == DAC_ALIGN_12B_L) || \ ((ALIGN) == DAC_ALIGN_8B_R)) /** * @} */ /** @defgroup DAC_wave_generation * @{ */ #define DAC_WAVE_NOISE ((uint32_t)DAC_CR_WAVE1_0) #define DAC_WAVE_TRIANGLE ((uint32_t)DAC_CR_WAVE1_1) #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NOISE) || \ ((WAVE) == DAC_WAVE_TRIANGLE)) /** * @} */ /** @defgroup DAC_data * @{ */ #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) /** * @} */ /** @defgroup DAC_flags_definition * @{ */ #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) #define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR1) || \ ((FLAG) == DAC_FLAG_DMAUDR2)) /** * @} */ /** @defgroup DAC_interrupts_definition * @{ */ #define DAC_IT_DMAUDR1 ((uint32_t)DAC_CR_DMAUDRIE1) #define DAC_IT_DMAUDR2 ((uint32_t)DAC_CR_DMAUDRIE2) #define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR1) || \ ((IT) == DAC_IT_DMAUDR2)) /** * @} */ /* Exported macros -----------------------------------------------------------*/ /** @brief Reset DAC handle state * @param __HANDLE__: DAC handle. * @retval None */ #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) /* Enable the DAC peripheral */ #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) /* Disable the DAC peripheral */ #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) /* Set DHR12R1 alignment */ #define __HAL_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008) + (__ALIGNEMENT__)) /* Set DHR12R2 alignment */ #define __HAL_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014) + (__ALIGNEMENT__)) /* Set DHR12RD alignment */ #define __HAL_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020) + (__ALIGNEMENT__)) /* Enable the DAC interrupt */ #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) /* Disable the DAC interrupt */ #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) /* Get the selected DAC's flag status */ #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) /* Clear the DAC's flag */ #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) /* Include DAC HAL Extension module */ #include "stm32f3xx_hal_dac_ex.h" /* Exported functions --------------------------------------------------------*/ /* Initialization and de-initialization functions *****************************/ HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); /* IO operation functions *****************************************************/ HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t channel); HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t channel); HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t channel, uint32_t* pData, uint32_t Length, uint32_t alignment); HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t channel); uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t channel); /* Peripheral Control functions ***********************************************/ HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t channel); HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t channel, uint32_t alignment, uint32_t data); /* Peripheral State and Error functions ***************************************/ HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); /** * @} */ /** * @} */ #ifdef __cplusplus } #endif #endif /*__STM32F3xx_HAL_DAC_H */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/