Janek Mann
mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_i2s_ex.c@237:f3da66175598, 2014-06-24 (annotated)
- Committer:
- mbed_official
- Date:
- Tue Jun 24 14:45:08 2014 +0100
- Revision:
- 237:f3da66175598
Synchronized with git revision 8ef659bca81f12dfc896b5a7af7c2abbd1a1b8b7
Full URL: https://github.com/mbedmicro/mbed/commit/8ef659bca81f12dfc896b5a7af7c2abbd1a1b8b7/
[NUCLEO_F334R8] Add platform files
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 237:f3da66175598 | 1 | /** |
| mbed_official | 237:f3da66175598 | 2 | ****************************************************************************** |
| mbed_official | 237:f3da66175598 | 3 | * @file stm32f3xx_hal_i2s_ex.c |
| mbed_official | 237:f3da66175598 | 4 | * @author MCD Application Team |
| mbed_official | 237:f3da66175598 | 5 | * @version V1.0.1 |
| mbed_official | 237:f3da66175598 | 6 | * @date 18-June-2014 |
| mbed_official | 237:f3da66175598 | 7 | * @brief I2S Extension HAL module driver. |
| mbed_official | 237:f3da66175598 | 8 | * This file provides firmware functions to manage the following |
| mbed_official | 237:f3da66175598 | 9 | * functionalities of I2S extension peripheral: |
| mbed_official | 237:f3da66175598 | 10 | * + Extension features Functions |
| mbed_official | 237:f3da66175598 | 11 | * |
| mbed_official | 237:f3da66175598 | 12 | @verbatim |
| mbed_official | 237:f3da66175598 | 13 | ============================================================================== |
| mbed_official | 237:f3da66175598 | 14 | ##### I2S Extension features ##### |
| mbed_official | 237:f3da66175598 | 15 | ============================================================================== |
| mbed_official | 237:f3da66175598 | 16 | [..] |
| mbed_official | 237:f3da66175598 | 17 | (#) In I2S full duplex mode, each SPI peripheral is able to manage sending and receiving |
| mbed_official | 237:f3da66175598 | 18 | data simultaneously using two data lines. Each SPI peripheral has an extended block |
| mbed_official | 237:f3da66175598 | 19 | called I2Sxext ie. I2S2ext for SPI2 and I2S3ext for SPI3). |
| mbed_official | 237:f3da66175598 | 20 | (#) The extension block is not a full SPI IP, it is used only as I2S slave to |
| mbed_official | 237:f3da66175598 | 21 | implement full duplex mode. The extension block uses the same clock sources |
| mbed_official | 237:f3da66175598 | 22 | as its master (refer to the following Figure). |
| mbed_official | 237:f3da66175598 | 23 | |
| mbed_official | 237:f3da66175598 | 24 | +-----------------------+ |
| mbed_official | 237:f3da66175598 | 25 | I2Sx_SCK | | |
| mbed_official | 237:f3da66175598 | 26 | ----------+-->| I2Sx |------------------->I2Sx_SD(in/out) |
| mbed_official | 237:f3da66175598 | 27 | +--|-->| | |
| mbed_official | 237:f3da66175598 | 28 | | | +-----------------------+ |
| mbed_official | 237:f3da66175598 | 29 | | | |
| mbed_official | 237:f3da66175598 | 30 | I2S_WS | | |
| mbed_official | 237:f3da66175598 | 31 | ------>| | |
| mbed_official | 237:f3da66175598 | 32 | | | +-----------------------+ |
| mbed_official | 237:f3da66175598 | 33 | | +-->| | |
| mbed_official | 237:f3da66175598 | 34 | | | I2Sx_ext |------------------->I2Sx_extSD(in/out) |
| mbed_official | 237:f3da66175598 | 35 | +----->| | |
| mbed_official | 237:f3da66175598 | 36 | +-----------------------+ |
| mbed_official | 237:f3da66175598 | 37 | |
| mbed_official | 237:f3da66175598 | 38 | (#) Both I2Sx and I2Sx_ext can be configured as transmitters or receivers. |
| mbed_official | 237:f3da66175598 | 39 | |
| mbed_official | 237:f3da66175598 | 40 | -@- Only I2Sx can deliver SCK and WS to I2Sx_ext in full duplex mode, where |
| mbed_official | 237:f3da66175598 | 41 | I2Sx can be I2S2 or I2S3. |
| mbed_official | 237:f3da66175598 | 42 | |
| mbed_official | 237:f3da66175598 | 43 | =============================================================================== |
| mbed_official | 237:f3da66175598 | 44 | ##### How to use this driver ##### |
| mbed_official | 237:f3da66175598 | 45 | =============================================================================== |
| mbed_official | 237:f3da66175598 | 46 | [..] |
| mbed_official | 237:f3da66175598 | 47 | Three mode of operations are available within this driver : |
| mbed_official | 237:f3da66175598 | 48 | |
| mbed_official | 237:f3da66175598 | 49 | *** Polling mode IO operation *** |
| mbed_official | 237:f3da66175598 | 50 | ================================= |
| mbed_official | 237:f3da66175598 | 51 | [..] |
| mbed_official | 237:f3da66175598 | 52 | (+) Send and receive in the same time an amount of data in blocking mode using HAL_I2S_TransmitReceive() |
| mbed_official | 237:f3da66175598 | 53 | |
| mbed_official | 237:f3da66175598 | 54 | *** Interrupt mode IO operation *** |
| mbed_official | 237:f3da66175598 | 55 | =================================== |
| mbed_official | 237:f3da66175598 | 56 | [..] |
| mbed_official | 237:f3da66175598 | 57 | (+) Send and receive in the same time an amount of data in non blocking mode using HAL_I2S_TransmitReceive_IT() |
| mbed_official | 237:f3da66175598 | 58 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
| mbed_official | 237:f3da66175598 | 59 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
| mbed_official | 237:f3da66175598 | 60 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
| mbed_official | 237:f3da66175598 | 61 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
| mbed_official | 237:f3da66175598 | 62 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
| mbed_official | 237:f3da66175598 | 63 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
| mbed_official | 237:f3da66175598 | 64 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
| mbed_official | 237:f3da66175598 | 65 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
| mbed_official | 237:f3da66175598 | 66 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
| mbed_official | 237:f3da66175598 | 67 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
| mbed_official | 237:f3da66175598 | 68 | |
| mbed_official | 237:f3da66175598 | 69 | *** DMA mode IO operation *** |
| mbed_official | 237:f3da66175598 | 70 | ============================== |
| mbed_official | 237:f3da66175598 | 71 | [..] |
| mbed_official | 237:f3da66175598 | 72 | (+) Send and receive an amount of data in non blocking mode (DMA) using HAL_I2S_TransmitReceive_DMA() |
| mbed_official | 237:f3da66175598 | 73 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
| mbed_official | 237:f3da66175598 | 74 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
| mbed_official | 237:f3da66175598 | 75 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
| mbed_official | 237:f3da66175598 | 76 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
| mbed_official | 237:f3da66175598 | 77 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
| mbed_official | 237:f3da66175598 | 78 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
| mbed_official | 237:f3da66175598 | 79 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
| mbed_official | 237:f3da66175598 | 80 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
| mbed_official | 237:f3da66175598 | 81 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
| mbed_official | 237:f3da66175598 | 82 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
| mbed_official | 237:f3da66175598 | 83 | (+) Pause the DMA Transfer using HAL_I2S_DMAPause() |
| mbed_official | 237:f3da66175598 | 84 | (+) Resume the DMA Transfer using HAL_I2S_DMAResume() |
| mbed_official | 237:f3da66175598 | 85 | (+) Stop the DMA Transfer using HAL_I2S_DMAStop() |
| mbed_official | 237:f3da66175598 | 86 | |
| mbed_official | 237:f3da66175598 | 87 | @endverbatim |
| mbed_official | 237:f3da66175598 | 88 | ****************************************************************************** |
| mbed_official | 237:f3da66175598 | 89 | * @attention |
| mbed_official | 237:f3da66175598 | 90 | * |
| mbed_official | 237:f3da66175598 | 91 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 237:f3da66175598 | 92 | * |
| mbed_official | 237:f3da66175598 | 93 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 237:f3da66175598 | 94 | * are permitted provided that the following conditions are met: |
| mbed_official | 237:f3da66175598 | 95 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 237:f3da66175598 | 96 | * this list of conditions and the following disclaimer. |
| mbed_official | 237:f3da66175598 | 97 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 237:f3da66175598 | 98 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 237:f3da66175598 | 99 | * and/or other materials provided with the distribution. |
| mbed_official | 237:f3da66175598 | 100 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 237:f3da66175598 | 101 | * may be used to endorse or promote products derived from this software |
| mbed_official | 237:f3da66175598 | 102 | * without specific prior written permission. |
| mbed_official | 237:f3da66175598 | 103 | * |
| mbed_official | 237:f3da66175598 | 104 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 237:f3da66175598 | 105 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 237:f3da66175598 | 106 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 237:f3da66175598 | 107 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 237:f3da66175598 | 108 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 237:f3da66175598 | 109 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 237:f3da66175598 | 110 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 237:f3da66175598 | 111 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 237:f3da66175598 | 112 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 237:f3da66175598 | 113 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 237:f3da66175598 | 114 | * |
| mbed_official | 237:f3da66175598 | 115 | ****************************************************************************** |
| mbed_official | 237:f3da66175598 | 116 | */ |
| mbed_official | 237:f3da66175598 | 117 | |
| mbed_official | 237:f3da66175598 | 118 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 119 | #include "stm32f3xx_hal.h" |
| mbed_official | 237:f3da66175598 | 120 | |
| mbed_official | 237:f3da66175598 | 121 | /** @addtogroup STM32F3xx_HAL_Driver |
| mbed_official | 237:f3da66175598 | 122 | * @{ |
| mbed_official | 237:f3da66175598 | 123 | */ |
| mbed_official | 237:f3da66175598 | 124 | |
| mbed_official | 237:f3da66175598 | 125 | /** @addtogroup I2S |
| mbed_official | 237:f3da66175598 | 126 | * @brief I2S HAL module driver |
| mbed_official | 237:f3da66175598 | 127 | * @{ |
| mbed_official | 237:f3da66175598 | 128 | */ |
| mbed_official | 237:f3da66175598 | 129 | |
| mbed_official | 237:f3da66175598 | 130 | #ifdef HAL_I2S_MODULE_ENABLED |
| mbed_official | 237:f3da66175598 | 131 | |
| mbed_official | 237:f3da66175598 | 132 | #if defined(STM32F301x8) || \ |
| mbed_official | 237:f3da66175598 | 133 | defined(STM32F302x8) || defined(STM32F302xC) || \ |
| mbed_official | 237:f3da66175598 | 134 | defined(STM32F303xC) || defined(STM32F373xC) || \ |
| mbed_official | 237:f3da66175598 | 135 | defined(STM32F318xx) || defined(STM32F358xx) || defined(STM32F378xx) |
| mbed_official | 237:f3da66175598 | 136 | |
| mbed_official | 237:f3da66175598 | 137 | #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx) |
| mbed_official | 237:f3da66175598 | 138 | |
| mbed_official | 237:f3da66175598 | 139 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 140 | typedef enum |
| mbed_official | 237:f3da66175598 | 141 | { |
| mbed_official | 237:f3da66175598 | 142 | I2S_USE_I2S = 0x00, /*!< I2Sx should be used */ |
| mbed_official | 237:f3da66175598 | 143 | I2S_USE_I2SEXT = 0x01 /*!< I2Sx_ext should be used */ |
| mbed_official | 237:f3da66175598 | 144 | }I2S_UseTypeDef; |
| mbed_official | 237:f3da66175598 | 145 | |
| mbed_official | 237:f3da66175598 | 146 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 147 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 148 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 149 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 150 | static void I2S_TxRxDMACplt(DMA_HandleTypeDef *hdma); |
| mbed_official | 237:f3da66175598 | 151 | static void I2S_TxRxDMAError(DMA_HandleTypeDef *hdma); |
| mbed_official | 237:f3da66175598 | 152 | static void I2S_FullDuplexTx_IT(I2S_HandleTypeDef *hi2s, I2S_UseTypeDef i2sUsed); |
| mbed_official | 237:f3da66175598 | 153 | static void I2S_FullDuplexRx_IT(I2S_HandleTypeDef *hi2s, I2S_UseTypeDef i2sUsed); |
| mbed_official | 237:f3da66175598 | 154 | static HAL_StatusTypeDef I2S_FullDuplexWaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, |
| mbed_official | 237:f3da66175598 | 155 | uint32_t State, uint32_t Timeout, I2S_UseTypeDef i2sUsed); |
| mbed_official | 237:f3da66175598 | 156 | #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ |
| mbed_official | 237:f3da66175598 | 157 | |
| mbed_official | 237:f3da66175598 | 158 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 159 | |
| mbed_official | 237:f3da66175598 | 160 | /** @addtogroup I2S_Private_Functions |
| mbed_official | 237:f3da66175598 | 161 | * @{ |
| mbed_official | 237:f3da66175598 | 162 | */ |
| mbed_official | 237:f3da66175598 | 163 | |
| mbed_official | 237:f3da66175598 | 164 | /** @addtogroup I2S_Group1 Initialization and de-initialization functions |
| mbed_official | 237:f3da66175598 | 165 | * @brief Initialization and Configuration functions |
| mbed_official | 237:f3da66175598 | 166 | * |
| mbed_official | 237:f3da66175598 | 167 | @verbatim |
| mbed_official | 237:f3da66175598 | 168 | =============================================================================== |
| mbed_official | 237:f3da66175598 | 169 | ##### Initialization/de-initialization functions ##### |
| mbed_official | 237:f3da66175598 | 170 | =============================================================================== |
| mbed_official | 237:f3da66175598 | 171 | [..] This subsection provides a set of functions allowing to initialize and |
| mbed_official | 237:f3da66175598 | 172 | de-initialiaze the I2Sx peripheral in simplex mode: |
| mbed_official | 237:f3da66175598 | 173 | |
| mbed_official | 237:f3da66175598 | 174 | (+) User must Implement HAL_I2S_MspInit() function in which he configures |
| mbed_official | 237:f3da66175598 | 175 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
| mbed_official | 237:f3da66175598 | 176 | |
| mbed_official | 237:f3da66175598 | 177 | (+) Call the function HAL_I2S_Init() to configure the selected device with |
| mbed_official | 237:f3da66175598 | 178 | the selected configuration: |
| mbed_official | 237:f3da66175598 | 179 | (++) Mode |
| mbed_official | 237:f3da66175598 | 180 | (++) Standard |
| mbed_official | 237:f3da66175598 | 181 | (++) Data Format |
| mbed_official | 237:f3da66175598 | 182 | (++) MCLK Output |
| mbed_official | 237:f3da66175598 | 183 | (++) Audio frequency |
| mbed_official | 237:f3da66175598 | 184 | (++) Polarity |
| mbed_official | 237:f3da66175598 | 185 | |
| mbed_official | 237:f3da66175598 | 186 | (+) Call the function HAL_I2S_DeInit() to restore the default configuration |
| mbed_official | 237:f3da66175598 | 187 | of the selected I2Sx periperal. |
| mbed_official | 237:f3da66175598 | 188 | @endverbatim |
| mbed_official | 237:f3da66175598 | 189 | * @{ |
| mbed_official | 237:f3da66175598 | 190 | */ |
| mbed_official | 237:f3da66175598 | 191 | |
| mbed_official | 237:f3da66175598 | 192 | /** |
| mbed_official | 237:f3da66175598 | 193 | * @brief Initializes the I2S according to the specified parameters |
| mbed_official | 237:f3da66175598 | 194 | * in the I2S_InitTypeDef and create the associated handle. |
| mbed_official | 237:f3da66175598 | 195 | * @param hi2s: I2S handle |
| mbed_official | 237:f3da66175598 | 196 | * @retval HAL status |
| mbed_official | 237:f3da66175598 | 197 | */ |
| mbed_official | 237:f3da66175598 | 198 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) |
| mbed_official | 237:f3da66175598 | 199 | { |
| mbed_official | 237:f3da66175598 | 200 | uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1; |
| mbed_official | 237:f3da66175598 | 201 | uint32_t tmp = 0, i2sclk = 0; |
| mbed_official | 237:f3da66175598 | 202 | #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx) |
| mbed_official | 237:f3da66175598 | 203 | RCC_PeriphCLKInitTypeDef rccperiphclkinit; |
| mbed_official | 237:f3da66175598 | 204 | #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ |
| mbed_official | 237:f3da66175598 | 205 | |
| mbed_official | 237:f3da66175598 | 206 | /* Check the I2S handle allocation */ |
| mbed_official | 237:f3da66175598 | 207 | if(hi2s == NULL) |
| mbed_official | 237:f3da66175598 | 208 | { |
| mbed_official | 237:f3da66175598 | 209 | return HAL_ERROR; |
| mbed_official | 237:f3da66175598 | 210 | } |
| mbed_official | 237:f3da66175598 | 211 | |
| mbed_official | 237:f3da66175598 | 212 | /* Check the parameters */ |
| mbed_official | 237:f3da66175598 | 213 | assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance)); |
| mbed_official | 237:f3da66175598 | 214 | assert_param(IS_I2S_MODE(hi2s->Init.Mode)); |
| mbed_official | 237:f3da66175598 | 215 | assert_param(IS_I2S_STANDARD(hi2s->Init.Standard)); |
| mbed_official | 237:f3da66175598 | 216 | assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat)); |
| mbed_official | 237:f3da66175598 | 217 | assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput)); |
| mbed_official | 237:f3da66175598 | 218 | assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq)); |
| mbed_official | 237:f3da66175598 | 219 | assert_param(IS_I2S_CPOL(hi2s->Init.CPOL)); |
| mbed_official | 237:f3da66175598 | 220 | assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource)); |
| mbed_official | 237:f3da66175598 | 221 | assert_param(IS_I2S_FULLDUPLEX_MODE(hi2s->Init.FullDuplexMode)); |
| mbed_official | 237:f3da66175598 | 222 | |
| mbed_official | 237:f3da66175598 | 223 | hi2s->State = HAL_I2S_STATE_BUSY; |
| mbed_official | 237:f3da66175598 | 224 | |
| mbed_official | 237:f3da66175598 | 225 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ |
| mbed_official | 237:f3da66175598 | 226 | HAL_I2S_MspInit(hi2s); |
| mbed_official | 237:f3da66175598 | 227 | |
| mbed_official | 237:f3da66175598 | 228 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/ |
| mbed_official | 237:f3da66175598 | 229 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
| mbed_official | 237:f3da66175598 | 230 | hi2s->Instance->I2SCFGR &= ~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \ |
| mbed_official | 237:f3da66175598 | 231 | SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \ |
| mbed_official | 237:f3da66175598 | 232 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD); |
| mbed_official | 237:f3da66175598 | 233 | hi2s->Instance->I2SPR = 0x0002; |
| mbed_official | 237:f3da66175598 | 234 | |
| mbed_official | 237:f3da66175598 | 235 | /* Get the I2SCFGR register value */ |
| mbed_official | 237:f3da66175598 | 236 | tmpreg = hi2s->Instance->I2SCFGR; |
| mbed_official | 237:f3da66175598 | 237 | |
| mbed_official | 237:f3da66175598 | 238 | /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ |
| mbed_official | 237:f3da66175598 | 239 | if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT) |
| mbed_official | 237:f3da66175598 | 240 | { |
| mbed_official | 237:f3da66175598 | 241 | i2sodd = (uint16_t)0; |
| mbed_official | 237:f3da66175598 | 242 | i2sdiv = (uint16_t)2; |
| mbed_official | 237:f3da66175598 | 243 | } |
| mbed_official | 237:f3da66175598 | 244 | /* If the requested audio frequency is not the default, compute the prescaler */ |
| mbed_official | 237:f3da66175598 | 245 | else |
| mbed_official | 237:f3da66175598 | 246 | { |
| mbed_official | 237:f3da66175598 | 247 | /* Check the frame length (For the Prescaler computing) *******************/ |
| mbed_official | 237:f3da66175598 | 248 | if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B) |
| mbed_official | 237:f3da66175598 | 249 | { |
| mbed_official | 237:f3da66175598 | 250 | /* Packet length is 16 bits */ |
| mbed_official | 237:f3da66175598 | 251 | packetlength = 1; |
| mbed_official | 237:f3da66175598 | 252 | } |
| mbed_official | 237:f3da66175598 | 253 | else |
| mbed_official | 237:f3da66175598 | 254 | { |
| mbed_official | 237:f3da66175598 | 255 | /* Packet length is 32 bits */ |
| mbed_official | 237:f3da66175598 | 256 | packetlength = 2; |
| mbed_official | 237:f3da66175598 | 257 | } |
| mbed_official | 237:f3da66175598 | 258 | |
| mbed_official | 237:f3da66175598 | 259 | /* Get I2S source Clock frequency ****************************************/ |
| mbed_official | 237:f3da66175598 | 260 | #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx) |
| mbed_official | 237:f3da66175598 | 261 | rccperiphclkinit.PeriphClockSelection = RCC_PERIPHCLK_I2S; |
| mbed_official | 237:f3da66175598 | 262 | |
| mbed_official | 237:f3da66175598 | 263 | /* If an external I2S clock has to be used, the specific define should be set |
| mbed_official | 237:f3da66175598 | 264 | in the project configuration or in the stm32f3xx_conf.h file */ |
| mbed_official | 237:f3da66175598 | 265 | if(hi2s->Init.ClockSource == I2S_CLOCK_EXTERNAL) |
| mbed_official | 237:f3da66175598 | 266 | { |
| mbed_official | 237:f3da66175598 | 267 | /* Set external clock as I2S clock source */ |
| mbed_official | 237:f3da66175598 | 268 | rccperiphclkinit.I2sClockSelection = RCC_I2SCLKSOURCE_EXT; |
| mbed_official | 237:f3da66175598 | 269 | HAL_RCCEx_PeriphCLKConfig(&rccperiphclkinit); |
| mbed_official | 237:f3da66175598 | 270 | |
| mbed_official | 237:f3da66175598 | 271 | /* Set the I2S clock to the external clock value */ |
| mbed_official | 237:f3da66175598 | 272 | i2sclk = EXTERNAL_CLOCK_VALUE; |
| mbed_official | 237:f3da66175598 | 273 | } |
| mbed_official | 237:f3da66175598 | 274 | else |
| mbed_official | 237:f3da66175598 | 275 | { |
| mbed_official | 237:f3da66175598 | 276 | /* Set SYSCLK as I2S clock source */ |
| mbed_official | 237:f3da66175598 | 277 | rccperiphclkinit.I2sClockSelection = RCC_I2SCLKSOURCE_SYSCLK; |
| mbed_official | 237:f3da66175598 | 278 | HAL_RCCEx_PeriphCLKConfig(&rccperiphclkinit); |
| mbed_official | 237:f3da66175598 | 279 | |
| mbed_official | 237:f3da66175598 | 280 | /* Get the I2S source clock value */ |
| mbed_official | 237:f3da66175598 | 281 | i2sclk = HAL_RCC_GetSysClockFreq(); |
| mbed_official | 237:f3da66175598 | 282 | } |
| mbed_official | 237:f3da66175598 | 283 | #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ |
| mbed_official | 237:f3da66175598 | 284 | |
| mbed_official | 237:f3da66175598 | 285 | #if defined (STM32F373xC) || defined (STM32F378xx) |
| mbed_official | 237:f3da66175598 | 286 | if(hi2s->Instance == SPI1) |
| mbed_official | 237:f3da66175598 | 287 | { |
| mbed_official | 237:f3da66175598 | 288 | i2sclk = HAL_RCC_GetPCLK2Freq(); |
| mbed_official | 237:f3da66175598 | 289 | } |
| mbed_official | 237:f3da66175598 | 290 | else if((hi2s->Instance == SPI2) || (hi2s->Instance == SPI3)) |
| mbed_official | 237:f3da66175598 | 291 | { |
| mbed_official | 237:f3da66175598 | 292 | i2sclk = HAL_RCC_GetPCLK1Freq(); |
| mbed_official | 237:f3da66175598 | 293 | } |
| mbed_official | 237:f3da66175598 | 294 | #endif /* STM32F373xC || STM32F378xx */ |
| mbed_official | 237:f3da66175598 | 295 | |
| mbed_official | 237:f3da66175598 | 296 | /* Compute the Real divider depending on the MCLK output state, with a floating point */ |
| mbed_official | 237:f3da66175598 | 297 | if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE) |
| mbed_official | 237:f3da66175598 | 298 | { |
| mbed_official | 237:f3da66175598 | 299 | /* MCLK output is enabled */ |
| mbed_official | 237:f3da66175598 | 300 | tmp = (uint16_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5); |
| mbed_official | 237:f3da66175598 | 301 | } |
| mbed_official | 237:f3da66175598 | 302 | else |
| mbed_official | 237:f3da66175598 | 303 | { |
| mbed_official | 237:f3da66175598 | 304 | /* MCLK output is disabled */ |
| mbed_official | 237:f3da66175598 | 305 | tmp = (uint16_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5); |
| mbed_official | 237:f3da66175598 | 306 | } |
| mbed_official | 237:f3da66175598 | 307 | |
| mbed_official | 237:f3da66175598 | 308 | /* Remove the flatting point */ |
| mbed_official | 237:f3da66175598 | 309 | tmp = tmp / 10; |
| mbed_official | 237:f3da66175598 | 310 | |
| mbed_official | 237:f3da66175598 | 311 | /* Check the parity of the divider */ |
| mbed_official | 237:f3da66175598 | 312 | i2sodd = (uint16_t)(tmp & (uint16_t)0x0001); |
| mbed_official | 237:f3da66175598 | 313 | |
| mbed_official | 237:f3da66175598 | 314 | /* Compute the i2sdiv prescaler */ |
| mbed_official | 237:f3da66175598 | 315 | i2sdiv = (uint16_t)((tmp - i2sodd) / 2); |
| mbed_official | 237:f3da66175598 | 316 | |
| mbed_official | 237:f3da66175598 | 317 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
| mbed_official | 237:f3da66175598 | 318 | i2sodd = (uint16_t) (i2sodd << 8); |
| mbed_official | 237:f3da66175598 | 319 | } |
| mbed_official | 237:f3da66175598 | 320 | |
| mbed_official | 237:f3da66175598 | 321 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
| mbed_official | 237:f3da66175598 | 322 | if((i2sdiv < 2) || (i2sdiv > 0xFF)) |
| mbed_official | 237:f3da66175598 | 323 | { |
| mbed_official | 237:f3da66175598 | 324 | /* Set the default values */ |
| mbed_official | 237:f3da66175598 | 325 | i2sdiv = 2; |
| mbed_official | 237:f3da66175598 | 326 | i2sodd = 0; |
| mbed_official | 237:f3da66175598 | 327 | } |
| mbed_official | 237:f3da66175598 | 328 | |
| mbed_official | 237:f3da66175598 | 329 | /* Write to SPIx I2SPR register the computed value */ |
| mbed_official | 237:f3da66175598 | 330 | hi2s->Instance->I2SPR = (uint16_t)((uint16_t)i2sdiv | (uint16_t)(i2sodd | (uint16_t)hi2s->Init.MCLKOutput)); |
| mbed_official | 237:f3da66175598 | 331 | |
| mbed_official | 237:f3da66175598 | 332 | /* Configure the I2S with the I2S_InitStruct values */ |
| mbed_official | 237:f3da66175598 | 333 | tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(hi2s->Init.Mode | \ |
| mbed_official | 237:f3da66175598 | 334 | (uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \ |
| mbed_official | 237:f3da66175598 | 335 | (uint16_t)hi2s->Init.CPOL)))); |
| mbed_official | 237:f3da66175598 | 336 | |
| mbed_official | 237:f3da66175598 | 337 | /* Write to SPIx I2SCFGR */ |
| mbed_official | 237:f3da66175598 | 338 | hi2s->Instance->I2SCFGR = tmpreg; |
| mbed_official | 237:f3da66175598 | 339 | |
| mbed_official | 237:f3da66175598 | 340 | #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx) |
| mbed_official | 237:f3da66175598 | 341 | if (hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE) |
| mbed_official | 237:f3da66175598 | 342 | { |
| mbed_official | 237:f3da66175598 | 343 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
| mbed_official | 237:f3da66175598 | 344 | I2SxEXT(hi2s->Instance)->I2SCFGR &= ~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \ |
| mbed_official | 237:f3da66175598 | 345 | SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \ |
| mbed_official | 237:f3da66175598 | 346 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD); |
| mbed_official | 237:f3da66175598 | 347 | I2SxEXT(hi2s->Instance)->I2SPR = 0x0002; |
| mbed_official | 237:f3da66175598 | 348 | |
| mbed_official | 237:f3da66175598 | 349 | /* Get the I2SCFGR register value */ |
| mbed_official | 237:f3da66175598 | 350 | tmpreg = I2SxEXT(hi2s->Instance)->I2SCFGR; |
| mbed_official | 237:f3da66175598 | 351 | |
| mbed_official | 237:f3da66175598 | 352 | /* Get the mode to be configured for the extended I2S */ |
| mbed_official | 237:f3da66175598 | 353 | if((hi2s->Init.Mode == I2S_MODE_MASTER_TX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_TX)) |
| mbed_official | 237:f3da66175598 | 354 | { |
| mbed_official | 237:f3da66175598 | 355 | tmp = I2S_MODE_SLAVE_RX; |
| mbed_official | 237:f3da66175598 | 356 | } |
| mbed_official | 237:f3da66175598 | 357 | else |
| mbed_official | 237:f3da66175598 | 358 | { |
| mbed_official | 237:f3da66175598 | 359 | if((hi2s->Init.Mode == I2S_MODE_MASTER_RX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_RX)) |
| mbed_official | 237:f3da66175598 | 360 | { |
| mbed_official | 237:f3da66175598 | 361 | tmp = I2S_MODE_SLAVE_TX; |
| mbed_official | 237:f3da66175598 | 362 | } |
| mbed_official | 237:f3da66175598 | 363 | } |
| mbed_official | 237:f3da66175598 | 364 | |
| mbed_official | 237:f3da66175598 | 365 | /* Configure the I2S Slave with the I2S Master parameter values */ |
| mbed_official | 237:f3da66175598 | 366 | tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(tmp | \ |
| mbed_official | 237:f3da66175598 | 367 | (uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \ |
| mbed_official | 237:f3da66175598 | 368 | (uint16_t)hi2s->Init.CPOL)))); |
| mbed_official | 237:f3da66175598 | 369 | |
| mbed_official | 237:f3da66175598 | 370 | /* Write to SPIx I2SCFGR */ |
| mbed_official | 237:f3da66175598 | 371 | I2SxEXT(hi2s->Instance)->I2SCFGR = tmpreg; |
| mbed_official | 237:f3da66175598 | 372 | } |
| mbed_official | 237:f3da66175598 | 373 | #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ |
| mbed_official | 237:f3da66175598 | 374 | |
| mbed_official | 237:f3da66175598 | 375 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 237:f3da66175598 | 376 | hi2s->State= HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 377 | |
| mbed_official | 237:f3da66175598 | 378 | return HAL_OK; |
| mbed_official | 237:f3da66175598 | 379 | } |
| mbed_official | 237:f3da66175598 | 380 | |
| mbed_official | 237:f3da66175598 | 381 | #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx) |
| mbed_official | 237:f3da66175598 | 382 | /** |
| mbed_official | 237:f3da66175598 | 383 | * @brief This function handles I2S/I2Sext interrupt requests in full-duplex mode. |
| mbed_official | 237:f3da66175598 | 384 | * @param hi2s: I2S handle |
| mbed_official | 237:f3da66175598 | 385 | * @retval HAL status |
| mbed_official | 237:f3da66175598 | 386 | */ |
| mbed_official | 237:f3da66175598 | 387 | void HAL_I2S_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s) |
| mbed_official | 237:f3da66175598 | 388 | { |
| mbed_official | 237:f3da66175598 | 389 | __IO uint32_t i2ssr = hi2s->Instance->SR ; |
| mbed_official | 237:f3da66175598 | 390 | __IO uint32_t i2sextsr = I2SxEXT(hi2s->Instance)->SR; |
| mbed_official | 237:f3da66175598 | 391 | |
| mbed_official | 237:f3da66175598 | 392 | /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */ |
| mbed_official | 237:f3da66175598 | 393 | if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX)) |
| mbed_official | 237:f3da66175598 | 394 | { |
| mbed_official | 237:f3da66175598 | 395 | /* I2S in mode Transmitter -------------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 396 | if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET)) |
| mbed_official | 237:f3da66175598 | 397 | { |
| mbed_official | 237:f3da66175598 | 398 | /* When the I2S mode is configured as I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX, |
| mbed_official | 237:f3da66175598 | 399 | the I2S TXE interrupt will be generated to manage the full-duplex transmit phase. */ |
| mbed_official | 237:f3da66175598 | 400 | I2S_FullDuplexTx_IT(hi2s, I2S_USE_I2S); |
| mbed_official | 237:f3da66175598 | 401 | } |
| mbed_official | 237:f3da66175598 | 402 | |
| mbed_official | 237:f3da66175598 | 403 | /* I2Sext in mode Receiver -----------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 404 | if(((i2sextsr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET)) |
| mbed_official | 237:f3da66175598 | 405 | { |
| mbed_official | 237:f3da66175598 | 406 | /* When the I2S mode is configured as I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX, |
| mbed_official | 237:f3da66175598 | 407 | the I2Sext RXNE interrupt will be generated to manage the full-duplex receive phase. */ |
| mbed_official | 237:f3da66175598 | 408 | I2S_FullDuplexRx_IT(hi2s, I2S_USE_I2SEXT); |
| mbed_official | 237:f3da66175598 | 409 | } |
| mbed_official | 237:f3da66175598 | 410 | |
| mbed_official | 237:f3da66175598 | 411 | /* I2Sext Overrun error interrupt occured --------------------------------*/ |
| mbed_official | 237:f3da66175598 | 412 | if(((i2sextsr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) |
| mbed_official | 237:f3da66175598 | 413 | { |
| mbed_official | 237:f3da66175598 | 414 | /* Disable RXNE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 415 | __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 416 | |
| mbed_official | 237:f3da66175598 | 417 | /* Disable TXE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 418 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 419 | |
| mbed_official | 237:f3da66175598 | 420 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 421 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 422 | |
| mbed_official | 237:f3da66175598 | 423 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 424 | hi2s->ErrorCode |= HAL_I2S_ERROR_OVR; |
| mbed_official | 237:f3da66175598 | 425 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 426 | } |
| mbed_official | 237:f3da66175598 | 427 | |
| mbed_official | 237:f3da66175598 | 428 | /* I2S Underrun error interrupt occured ----------------------------------*/ |
| mbed_official | 237:f3da66175598 | 429 | if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) |
| mbed_official | 237:f3da66175598 | 430 | { |
| mbed_official | 237:f3da66175598 | 431 | /* Disable TXE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 432 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 433 | |
| mbed_official | 237:f3da66175598 | 434 | /* Disable RXNE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 435 | __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 436 | |
| mbed_official | 237:f3da66175598 | 437 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 438 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 439 | |
| mbed_official | 237:f3da66175598 | 440 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 441 | hi2s->ErrorCode |= HAL_I2S_ERROR_UDR; |
| mbed_official | 237:f3da66175598 | 442 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 443 | } |
| mbed_official | 237:f3da66175598 | 444 | } |
| mbed_official | 237:f3da66175598 | 445 | /* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */ |
| mbed_official | 237:f3da66175598 | 446 | else |
| mbed_official | 237:f3da66175598 | 447 | { |
| mbed_official | 237:f3da66175598 | 448 | /* I2Sext in mode Transmitter ----------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 449 | if(((i2sextsr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET)) |
| mbed_official | 237:f3da66175598 | 450 | { |
| mbed_official | 237:f3da66175598 | 451 | /* When the I2S mode is configured as I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX, |
| mbed_official | 237:f3da66175598 | 452 | the I2Sext TXE interrupt will be generated to manage the full-duplex transmit phase. */ |
| mbed_official | 237:f3da66175598 | 453 | I2S_FullDuplexTx_IT(hi2s, I2S_USE_I2SEXT); |
| mbed_official | 237:f3da66175598 | 454 | } |
| mbed_official | 237:f3da66175598 | 455 | |
| mbed_official | 237:f3da66175598 | 456 | /* I2S in mode Receiver --------------------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 457 | if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET)) |
| mbed_official | 237:f3da66175598 | 458 | { |
| mbed_official | 237:f3da66175598 | 459 | /* When the I2S mode is configured as I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX, |
| mbed_official | 237:f3da66175598 | 460 | the I2S RXNE interrupt will be generated to manage the full-duplex receive phase. */ |
| mbed_official | 237:f3da66175598 | 461 | I2S_FullDuplexRx_IT(hi2s, I2S_USE_I2S); |
| mbed_official | 237:f3da66175598 | 462 | } |
| mbed_official | 237:f3da66175598 | 463 | |
| mbed_official | 237:f3da66175598 | 464 | /* I2S Overrun error interrupt occured -------------------------------------*/ |
| mbed_official | 237:f3da66175598 | 465 | if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) |
| mbed_official | 237:f3da66175598 | 466 | { |
| mbed_official | 237:f3da66175598 | 467 | /* Disable RXNE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 468 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 469 | |
| mbed_official | 237:f3da66175598 | 470 | /* Disable TXE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 471 | __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 472 | |
| mbed_official | 237:f3da66175598 | 473 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 474 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 475 | |
| mbed_official | 237:f3da66175598 | 476 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 477 | hi2s->ErrorCode |= HAL_I2S_ERROR_OVR; |
| mbed_official | 237:f3da66175598 | 478 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 479 | } |
| mbed_official | 237:f3da66175598 | 480 | |
| mbed_official | 237:f3da66175598 | 481 | /* I2Sext Underrun error interrupt occured -------------------------------*/ |
| mbed_official | 237:f3da66175598 | 482 | if(((i2sextsr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) |
| mbed_official | 237:f3da66175598 | 483 | { |
| mbed_official | 237:f3da66175598 | 484 | /* Disable TXE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 485 | __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 486 | |
| mbed_official | 237:f3da66175598 | 487 | /* Disable RXNE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 488 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 489 | |
| mbed_official | 237:f3da66175598 | 490 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 491 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 492 | |
| mbed_official | 237:f3da66175598 | 493 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 494 | hi2s->ErrorCode |= HAL_I2S_ERROR_UDR; |
| mbed_official | 237:f3da66175598 | 495 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 496 | } |
| mbed_official | 237:f3da66175598 | 497 | } |
| mbed_official | 237:f3da66175598 | 498 | } |
| mbed_official | 237:f3da66175598 | 499 | |
| mbed_official | 237:f3da66175598 | 500 | /** |
| mbed_official | 237:f3da66175598 | 501 | * @brief Tx and Rx Transfer completed callbacks |
| mbed_official | 237:f3da66175598 | 502 | * @param hi2s: I2S handle |
| mbed_official | 237:f3da66175598 | 503 | * @retval None |
| mbed_official | 237:f3da66175598 | 504 | */ |
| mbed_official | 237:f3da66175598 | 505 | __weak void HAL_I2S_TxRxCpltCallback(I2S_HandleTypeDef *hi2s) |
| mbed_official | 237:f3da66175598 | 506 | { |
| mbed_official | 237:f3da66175598 | 507 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 237:f3da66175598 | 508 | the HAL_I2S_TxRxCpltCallback could be implenetd in the user file |
| mbed_official | 237:f3da66175598 | 509 | */ |
| mbed_official | 237:f3da66175598 | 510 | } |
| mbed_official | 237:f3da66175598 | 511 | #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ |
| mbed_official | 237:f3da66175598 | 512 | |
| mbed_official | 237:f3da66175598 | 513 | /** |
| mbed_official | 237:f3da66175598 | 514 | * @} |
| mbed_official | 237:f3da66175598 | 515 | */ |
| mbed_official | 237:f3da66175598 | 516 | |
| mbed_official | 237:f3da66175598 | 517 | /** @addtogroup HAL_I2S_Group2 Peripheral State functions |
| mbed_official | 237:f3da66175598 | 518 | * @brief Peripheral State functions |
| mbed_official | 237:f3da66175598 | 519 | * |
| mbed_official | 237:f3da66175598 | 520 | * |
| mbed_official | 237:f3da66175598 | 521 | @verbatim |
| mbed_official | 237:f3da66175598 | 522 | =============================================================================== |
| mbed_official | 237:f3da66175598 | 523 | ##### Peripheral State functions ##### |
| mbed_official | 237:f3da66175598 | 524 | =============================================================================== |
| mbed_official | 237:f3da66175598 | 525 | [..] |
| mbed_official | 237:f3da66175598 | 526 | This subsection permit to get in run-time the status of the peripheral |
| mbed_official | 237:f3da66175598 | 527 | and the data flow. |
| mbed_official | 237:f3da66175598 | 528 | |
| mbed_official | 237:f3da66175598 | 529 | @endverbatim |
| mbed_official | 237:f3da66175598 | 530 | * @{ |
| mbed_official | 237:f3da66175598 | 531 | */ |
| mbed_official | 237:f3da66175598 | 532 | /** |
| mbed_official | 237:f3da66175598 | 533 | * @brief Pauses the audio stream playing from the Media. |
| mbed_official | 237:f3da66175598 | 534 | * @param hi2s : I2S handle |
| mbed_official | 237:f3da66175598 | 535 | * @retval None |
| mbed_official | 237:f3da66175598 | 536 | */ |
| mbed_official | 237:f3da66175598 | 537 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s) |
| mbed_official | 237:f3da66175598 | 538 | { |
| mbed_official | 237:f3da66175598 | 539 | /* Process Locked */ |
| mbed_official | 237:f3da66175598 | 540 | __HAL_LOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 541 | |
| mbed_official | 237:f3da66175598 | 542 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
| mbed_official | 237:f3da66175598 | 543 | { |
| mbed_official | 237:f3da66175598 | 544 | /* Pause the audio file playing by disabling the I2S DMA request */ |
| mbed_official | 237:f3da66175598 | 545 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
| mbed_official | 237:f3da66175598 | 546 | } |
| mbed_official | 237:f3da66175598 | 547 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
| mbed_official | 237:f3da66175598 | 548 | { |
| mbed_official | 237:f3da66175598 | 549 | /* Pause the audio file playing by disabling the I2S DMA request */ |
| mbed_official | 237:f3da66175598 | 550 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
| mbed_official | 237:f3da66175598 | 551 | } |
| mbed_official | 237:f3da66175598 | 552 | #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx) |
| mbed_official | 237:f3da66175598 | 553 | else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) |
| mbed_official | 237:f3da66175598 | 554 | { |
| mbed_official | 237:f3da66175598 | 555 | /* Pause the audio file playing by disabling the I2S DMA request */ |
| mbed_official | 237:f3da66175598 | 556 | hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
| mbed_official | 237:f3da66175598 | 557 | I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
| mbed_official | 237:f3da66175598 | 558 | } |
| mbed_official | 237:f3da66175598 | 559 | #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ |
| mbed_official | 237:f3da66175598 | 560 | |
| mbed_official | 237:f3da66175598 | 561 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 562 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 563 | |
| mbed_official | 237:f3da66175598 | 564 | return HAL_OK; |
| mbed_official | 237:f3da66175598 | 565 | } |
| mbed_official | 237:f3da66175598 | 566 | |
| mbed_official | 237:f3da66175598 | 567 | /** |
| mbed_official | 237:f3da66175598 | 568 | * @brief Resumes the audio stream playing from the Media. |
| mbed_official | 237:f3da66175598 | 569 | * @param hi2s : I2S handle |
| mbed_official | 237:f3da66175598 | 570 | * @retval None |
| mbed_official | 237:f3da66175598 | 571 | */ |
| mbed_official | 237:f3da66175598 | 572 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s) |
| mbed_official | 237:f3da66175598 | 573 | { |
| mbed_official | 237:f3da66175598 | 574 | /* Process Locked */ |
| mbed_official | 237:f3da66175598 | 575 | __HAL_LOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 576 | |
| mbed_official | 237:f3da66175598 | 577 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
| mbed_official | 237:f3da66175598 | 578 | { |
| mbed_official | 237:f3da66175598 | 579 | /* Enable the I2S DMA request */ |
| mbed_official | 237:f3da66175598 | 580 | hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN; |
| mbed_official | 237:f3da66175598 | 581 | } |
| mbed_official | 237:f3da66175598 | 582 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
| mbed_official | 237:f3da66175598 | 583 | { |
| mbed_official | 237:f3da66175598 | 584 | /* Enable the I2S DMA request */ |
| mbed_official | 237:f3da66175598 | 585 | hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN; |
| mbed_official | 237:f3da66175598 | 586 | } |
| mbed_official | 237:f3da66175598 | 587 | #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx) |
| mbed_official | 237:f3da66175598 | 588 | else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) |
| mbed_official | 237:f3da66175598 | 589 | { |
| mbed_official | 237:f3da66175598 | 590 | /* Pause the audio file playing by disabling the I2S DMA request */ |
| mbed_official | 237:f3da66175598 | 591 | hi2s->Instance->CR2 |= (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN); |
| mbed_official | 237:f3da66175598 | 592 | I2SxEXT(hi2s->Instance)->CR2 |= (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN); |
| mbed_official | 237:f3da66175598 | 593 | |
| mbed_official | 237:f3da66175598 | 594 | /* If the I2Sext peripheral is still not enabled, enable it */ |
| mbed_official | 237:f3da66175598 | 595 | if ((I2SxEXT(hi2s->Instance)->I2SCFGR & SPI_I2SCFGR_I2SE) == 0) |
| mbed_official | 237:f3da66175598 | 596 | { |
| mbed_official | 237:f3da66175598 | 597 | /* Enable I2Sext peripheral */ |
| mbed_official | 237:f3da66175598 | 598 | __HAL_I2SEXT_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 599 | } |
| mbed_official | 237:f3da66175598 | 600 | } |
| mbed_official | 237:f3da66175598 | 601 | #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ |
| mbed_official | 237:f3da66175598 | 602 | |
| mbed_official | 237:f3da66175598 | 603 | /* If the I2S peripheral is still not enabled, enable it */ |
| mbed_official | 237:f3da66175598 | 604 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0) |
| mbed_official | 237:f3da66175598 | 605 | { |
| mbed_official | 237:f3da66175598 | 606 | /* Enable I2S peripheral */ |
| mbed_official | 237:f3da66175598 | 607 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 608 | } |
| mbed_official | 237:f3da66175598 | 609 | |
| mbed_official | 237:f3da66175598 | 610 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 611 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 612 | |
| mbed_official | 237:f3da66175598 | 613 | return HAL_OK; |
| mbed_official | 237:f3da66175598 | 614 | } |
| mbed_official | 237:f3da66175598 | 615 | |
| mbed_official | 237:f3da66175598 | 616 | /** |
| mbed_official | 237:f3da66175598 | 617 | * @brief Resumes the audio stream playing from the Media. |
| mbed_official | 237:f3da66175598 | 618 | * @param hi2s: I2S handle |
| mbed_official | 237:f3da66175598 | 619 | * @retval None |
| mbed_official | 237:f3da66175598 | 620 | */ |
| mbed_official | 237:f3da66175598 | 621 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) |
| mbed_official | 237:f3da66175598 | 622 | { |
| mbed_official | 237:f3da66175598 | 623 | /* Process Locked */ |
| mbed_official | 237:f3da66175598 | 624 | __HAL_LOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 625 | |
| mbed_official | 237:f3da66175598 | 626 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
| mbed_official | 237:f3da66175598 | 627 | { |
| mbed_official | 237:f3da66175598 | 628 | /* Disable the I2S DMA requests */ |
| mbed_official | 237:f3da66175598 | 629 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
| mbed_official | 237:f3da66175598 | 630 | |
| mbed_official | 237:f3da66175598 | 631 | /* Disable the I2S DMA Channel */ |
| mbed_official | 237:f3da66175598 | 632 | HAL_DMA_Abort(hi2s->hdmatx); |
| mbed_official | 237:f3da66175598 | 633 | } |
| mbed_official | 237:f3da66175598 | 634 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
| mbed_official | 237:f3da66175598 | 635 | { |
| mbed_official | 237:f3da66175598 | 636 | /* Disable the I2S DMA requests */ |
| mbed_official | 237:f3da66175598 | 637 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
| mbed_official | 237:f3da66175598 | 638 | |
| mbed_official | 237:f3da66175598 | 639 | /* Disable the I2S DMA Channel */ |
| mbed_official | 237:f3da66175598 | 640 | HAL_DMA_Abort(hi2s->hdmarx); |
| mbed_official | 237:f3da66175598 | 641 | } |
| mbed_official | 237:f3da66175598 | 642 | #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx) |
| mbed_official | 237:f3da66175598 | 643 | else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) |
| mbed_official | 237:f3da66175598 | 644 | { |
| mbed_official | 237:f3da66175598 | 645 | /* Disable the I2S DMA requests */ |
| mbed_official | 237:f3da66175598 | 646 | hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
| mbed_official | 237:f3da66175598 | 647 | I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
| mbed_official | 237:f3da66175598 | 648 | |
| mbed_official | 237:f3da66175598 | 649 | /* Disable the I2S DMA Channels */ |
| mbed_official | 237:f3da66175598 | 650 | HAL_DMA_Abort(hi2s->hdmatx); |
| mbed_official | 237:f3da66175598 | 651 | HAL_DMA_Abort(hi2s->hdmarx); |
| mbed_official | 237:f3da66175598 | 652 | |
| mbed_official | 237:f3da66175598 | 653 | /* Disable I2Sext peripheral */ |
| mbed_official | 237:f3da66175598 | 654 | __HAL_I2SEXT_DISABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 655 | } |
| mbed_official | 237:f3da66175598 | 656 | #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ |
| mbed_official | 237:f3da66175598 | 657 | |
| mbed_official | 237:f3da66175598 | 658 | /* Disable I2S peripheral */ |
| mbed_official | 237:f3da66175598 | 659 | __HAL_I2S_DISABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 660 | |
| mbed_official | 237:f3da66175598 | 661 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 662 | |
| mbed_official | 237:f3da66175598 | 663 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 664 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 665 | |
| mbed_official | 237:f3da66175598 | 666 | return HAL_OK; |
| mbed_official | 237:f3da66175598 | 667 | } |
| mbed_official | 237:f3da66175598 | 668 | |
| mbed_official | 237:f3da66175598 | 669 | /** |
| mbed_official | 237:f3da66175598 | 670 | * @} |
| mbed_official | 237:f3da66175598 | 671 | */ |
| mbed_official | 237:f3da66175598 | 672 | |
| mbed_official | 237:f3da66175598 | 673 | /** |
| mbed_official | 237:f3da66175598 | 674 | * @} |
| mbed_official | 237:f3da66175598 | 675 | */ |
| mbed_official | 237:f3da66175598 | 676 | |
| mbed_official | 237:f3da66175598 | 677 | /** @defgroup I2SEx |
| mbed_official | 237:f3da66175598 | 678 | * @brief I2S Extended HAL module driver |
| mbed_official | 237:f3da66175598 | 679 | * @{ |
| mbed_official | 237:f3da66175598 | 680 | */ |
| mbed_official | 237:f3da66175598 | 681 | |
| mbed_official | 237:f3da66175598 | 682 | /** @defgroup I2SEx_Private_Functions |
| mbed_official | 237:f3da66175598 | 683 | * @{ |
| mbed_official | 237:f3da66175598 | 684 | */ |
| mbed_official | 237:f3da66175598 | 685 | |
| mbed_official | 237:f3da66175598 | 686 | #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx) |
| mbed_official | 237:f3da66175598 | 687 | /** @defgroup I2SEx_Group1 Extension features functions |
| mbed_official | 237:f3da66175598 | 688 | * @brief Extension features functions |
| mbed_official | 237:f3da66175598 | 689 | * |
| mbed_official | 237:f3da66175598 | 690 | @verbatim |
| mbed_official | 237:f3da66175598 | 691 | =============================================================================== |
| mbed_official | 237:f3da66175598 | 692 | ##### Extension features Functions ##### |
| mbed_official | 237:f3da66175598 | 693 | =============================================================================== |
| mbed_official | 237:f3da66175598 | 694 | [..] |
| mbed_official | 237:f3da66175598 | 695 | This subsection provides a set of functions allowing to manage the I2S data |
| mbed_official | 237:f3da66175598 | 696 | transfers. |
| mbed_official | 237:f3da66175598 | 697 | |
| mbed_official | 237:f3da66175598 | 698 | (#) There is two mode of transfer: |
| mbed_official | 237:f3da66175598 | 699 | (++) Blocking mode: The communication is performed in the polling mode. |
| mbed_official | 237:f3da66175598 | 700 | The status of all data processing is returned by the same function |
| mbed_official | 237:f3da66175598 | 701 | after finishing transfer. |
| mbed_official | 237:f3da66175598 | 702 | (++) No-Blocking mode: The communication is performed using Interrupts |
| mbed_official | 237:f3da66175598 | 703 | or DMA. These functions return the status of the transfer startup. |
| mbed_official | 237:f3da66175598 | 704 | The end of the data processing will be indicated through the |
| mbed_official | 237:f3da66175598 | 705 | dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when |
| mbed_official | 237:f3da66175598 | 706 | using DMA mode. |
| mbed_official | 237:f3da66175598 | 707 | |
| mbed_official | 237:f3da66175598 | 708 | (#) Blocking mode functions are : |
| mbed_official | 237:f3da66175598 | 709 | (++) HAL_I2S_TransmitReceive() |
| mbed_official | 237:f3da66175598 | 710 | |
| mbed_official | 237:f3da66175598 | 711 | (#) No-Blocking mode functions with Interrupt are: |
| mbed_official | 237:f3da66175598 | 712 | (++) HAL_I2S_TransmitReceive_IT() |
| mbed_official | 237:f3da66175598 | 713 | (++) HAL_I2SFullDuplex_IRQHandler() |
| mbed_official | 237:f3da66175598 | 714 | |
| mbed_official | 237:f3da66175598 | 715 | (#) No-Blocking mode functions with DMA are: |
| mbed_official | 237:f3da66175598 | 716 | (++) HAL_I2S_TransmitReceive_DMA() |
| mbed_official | 237:f3da66175598 | 717 | |
| mbed_official | 237:f3da66175598 | 718 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
| mbed_official | 237:f3da66175598 | 719 | (++) HAL_I2S_TxRxCpltCallback() |
| mbed_official | 237:f3da66175598 | 720 | (++) HAL_I2S_TxRxErrorCallback() |
| mbed_official | 237:f3da66175598 | 721 | |
| mbed_official | 237:f3da66175598 | 722 | @endverbatim |
| mbed_official | 237:f3da66175598 | 723 | * @{ |
| mbed_official | 237:f3da66175598 | 724 | */ |
| mbed_official | 237:f3da66175598 | 725 | |
| mbed_official | 237:f3da66175598 | 726 | /** |
| mbed_official | 237:f3da66175598 | 727 | * @brief Full-Duplex Transmit/Receive data in blocking mode. |
| mbed_official | 237:f3da66175598 | 728 | * @param hi2s: I2S handle |
| mbed_official | 237:f3da66175598 | 729 | * @param pTxData: a 16-bit pointer to the Transmit data buffer. |
| mbed_official | 237:f3da66175598 | 730 | * @param pRxData: a 16-bit pointer to the Receive data buffer. |
| mbed_official | 237:f3da66175598 | 731 | * @param Size: number of data sample to be sent: |
| mbed_official | 237:f3da66175598 | 732 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 237:f3da66175598 | 733 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 237:f3da66175598 | 734 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 237:f3da66175598 | 735 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 237:f3da66175598 | 736 | * @param Timeout: Timeout duration |
| mbed_official | 237:f3da66175598 | 737 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 237:f3da66175598 | 738 | * between Master and Slave(example: audio streaming). |
| mbed_official | 237:f3da66175598 | 739 | * @retval HAL status |
| mbed_official | 237:f3da66175598 | 740 | */ |
| mbed_official | 237:f3da66175598 | 741 | HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size, uint32_t Timeout) |
| mbed_official | 237:f3da66175598 | 742 | { |
| mbed_official | 237:f3da66175598 | 743 | if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) |
| mbed_official | 237:f3da66175598 | 744 | { |
| mbed_official | 237:f3da66175598 | 745 | return HAL_ERROR; |
| mbed_official | 237:f3da66175598 | 746 | } |
| mbed_official | 237:f3da66175598 | 747 | |
| mbed_official | 237:f3da66175598 | 748 | /* Check the I2S State */ |
| mbed_official | 237:f3da66175598 | 749 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 237:f3da66175598 | 750 | { |
| mbed_official | 237:f3da66175598 | 751 | /* Check the Data format: When a 16-bit data frame or a 16-bit data frame extended |
| mbed_official | 237:f3da66175598 | 752 | is selected during the I2S configuration phase, the Size parameter means the number |
| mbed_official | 237:f3da66175598 | 753 | of 16-bit data length in the transaction and when a 24-bit data frame or a 32-bit data |
| mbed_official | 237:f3da66175598 | 754 | frame is selected the Size parameter means the number of 16-bit data length. */ |
| mbed_official | 237:f3da66175598 | 755 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 237:f3da66175598 | 756 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
| mbed_official | 237:f3da66175598 | 757 | { |
| mbed_official | 237:f3da66175598 | 758 | hi2s->TxXferSize = (Size << 1); |
| mbed_official | 237:f3da66175598 | 759 | hi2s->TxXferCount = (Size << 1); |
| mbed_official | 237:f3da66175598 | 760 | hi2s->RxXferSize = (Size << 1); |
| mbed_official | 237:f3da66175598 | 761 | hi2s->RxXferCount = (Size << 1); |
| mbed_official | 237:f3da66175598 | 762 | } |
| mbed_official | 237:f3da66175598 | 763 | else |
| mbed_official | 237:f3da66175598 | 764 | { |
| mbed_official | 237:f3da66175598 | 765 | hi2s->TxXferSize = Size; |
| mbed_official | 237:f3da66175598 | 766 | hi2s->TxXferCount = Size; |
| mbed_official | 237:f3da66175598 | 767 | hi2s->RxXferSize = Size; |
| mbed_official | 237:f3da66175598 | 768 | hi2s->RxXferCount = Size; |
| mbed_official | 237:f3da66175598 | 769 | } |
| mbed_official | 237:f3da66175598 | 770 | |
| mbed_official | 237:f3da66175598 | 771 | /* Process Locked */ |
| mbed_official | 237:f3da66175598 | 772 | __HAL_LOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 773 | |
| mbed_official | 237:f3da66175598 | 774 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 237:f3da66175598 | 775 | |
| mbed_official | 237:f3da66175598 | 776 | /* Set the I2S State busy TX/RX */ |
| mbed_official | 237:f3da66175598 | 777 | hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; |
| mbed_official | 237:f3da66175598 | 778 | |
| mbed_official | 237:f3da66175598 | 779 | /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */ |
| mbed_official | 237:f3da66175598 | 780 | if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX)) |
| mbed_official | 237:f3da66175598 | 781 | { |
| mbed_official | 237:f3da66175598 | 782 | /* Prepare the First Data before enabling the I2S */ |
| mbed_official | 237:f3da66175598 | 783 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) |
| mbed_official | 237:f3da66175598 | 784 | { |
| mbed_official | 237:f3da66175598 | 785 | hi2s->Instance->DR = (*pTxData++); |
| mbed_official | 237:f3da66175598 | 786 | hi2s->TxXferCount--; |
| mbed_official | 237:f3da66175598 | 787 | } |
| mbed_official | 237:f3da66175598 | 788 | |
| mbed_official | 237:f3da66175598 | 789 | /* Check if the I2S is already enabled: The I2S is kept enabled at the end of transaction |
| mbed_official | 237:f3da66175598 | 790 | to avoid the clock de-synchronization between Master and Slave. */ |
| mbed_official | 237:f3da66175598 | 791 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 237:f3da66175598 | 792 | { |
| mbed_official | 237:f3da66175598 | 793 | /* Enable I2Sext(receiver) before enabling I2Sx peripheral */ |
| mbed_official | 237:f3da66175598 | 794 | __HAL_I2SEXT_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 795 | |
| mbed_official | 237:f3da66175598 | 796 | /* Enable I2Sx peripheral */ |
| mbed_official | 237:f3da66175598 | 797 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 798 | } |
| mbed_official | 237:f3da66175598 | 799 | |
| mbed_official | 237:f3da66175598 | 800 | while(hi2s->RxXferCount > 0) |
| mbed_official | 237:f3da66175598 | 801 | { |
| mbed_official | 237:f3da66175598 | 802 | /* Wait until TXE flag is set */ |
| mbed_official | 237:f3da66175598 | 803 | if (I2S_FullDuplexWaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout, I2S_USE_I2S) != HAL_OK) |
| mbed_official | 237:f3da66175598 | 804 | { |
| mbed_official | 237:f3da66175598 | 805 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 806 | hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT; |
| mbed_official | 237:f3da66175598 | 807 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 808 | return HAL_TIMEOUT; |
| mbed_official | 237:f3da66175598 | 809 | } |
| mbed_official | 237:f3da66175598 | 810 | |
| mbed_official | 237:f3da66175598 | 811 | if (hi2s->TxXferCount > 0) |
| mbed_official | 237:f3da66175598 | 812 | { |
| mbed_official | 237:f3da66175598 | 813 | /* Check if an underrun occurs */ |
| mbed_official | 237:f3da66175598 | 814 | if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET) |
| mbed_official | 237:f3da66175598 | 815 | { |
| mbed_official | 237:f3da66175598 | 816 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 817 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 818 | |
| mbed_official | 237:f3da66175598 | 819 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 820 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 821 | |
| mbed_official | 237:f3da66175598 | 822 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 823 | hi2s->ErrorCode |= HAL_I2S_ERROR_UDR; |
| mbed_official | 237:f3da66175598 | 824 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 825 | |
| mbed_official | 237:f3da66175598 | 826 | return HAL_ERROR; |
| mbed_official | 237:f3da66175598 | 827 | } |
| mbed_official | 237:f3da66175598 | 828 | |
| mbed_official | 237:f3da66175598 | 829 | hi2s->Instance->DR = (*pTxData++); |
| mbed_official | 237:f3da66175598 | 830 | hi2s->TxXferCount--; |
| mbed_official | 237:f3da66175598 | 831 | } |
| mbed_official | 237:f3da66175598 | 832 | |
| mbed_official | 237:f3da66175598 | 833 | /* Wait until RXNE flag is set */ |
| mbed_official | 237:f3da66175598 | 834 | if (I2S_FullDuplexWaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout, I2S_USE_I2SEXT) != HAL_OK) |
| mbed_official | 237:f3da66175598 | 835 | { |
| mbed_official | 237:f3da66175598 | 836 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 837 | hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT; |
| mbed_official | 237:f3da66175598 | 838 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 839 | return HAL_TIMEOUT; |
| mbed_official | 237:f3da66175598 | 840 | } |
| mbed_official | 237:f3da66175598 | 841 | |
| mbed_official | 237:f3da66175598 | 842 | /* Check if an overrun occurs */ |
| mbed_official | 237:f3da66175598 | 843 | if(__HAL_I2SEXT_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET) |
| mbed_official | 237:f3da66175598 | 844 | { |
| mbed_official | 237:f3da66175598 | 845 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 846 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 847 | |
| mbed_official | 237:f3da66175598 | 848 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 849 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 850 | |
| mbed_official | 237:f3da66175598 | 851 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 852 | hi2s->ErrorCode |= HAL_I2S_ERROR_OVR; |
| mbed_official | 237:f3da66175598 | 853 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 854 | |
| mbed_official | 237:f3da66175598 | 855 | return HAL_ERROR; |
| mbed_official | 237:f3da66175598 | 856 | } |
| mbed_official | 237:f3da66175598 | 857 | |
| mbed_official | 237:f3da66175598 | 858 | (*pRxData++) = I2SxEXT(hi2s->Instance)->DR; |
| mbed_official | 237:f3da66175598 | 859 | hi2s->RxXferCount--; |
| mbed_official | 237:f3da66175598 | 860 | } |
| mbed_official | 237:f3da66175598 | 861 | } |
| mbed_official | 237:f3da66175598 | 862 | /* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */ |
| mbed_official | 237:f3da66175598 | 863 | else |
| mbed_official | 237:f3da66175598 | 864 | { |
| mbed_official | 237:f3da66175598 | 865 | /* Prepare the First Data before enabling the I2S */ |
| mbed_official | 237:f3da66175598 | 866 | I2SxEXT(hi2s->Instance)->DR = (*pTxData++); |
| mbed_official | 237:f3da66175598 | 867 | hi2s->TxXferCount--; |
| mbed_official | 237:f3da66175598 | 868 | |
| mbed_official | 237:f3da66175598 | 869 | /* Check if the I2S is already enabled */ |
| mbed_official | 237:f3da66175598 | 870 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 237:f3da66175598 | 871 | { |
| mbed_official | 237:f3da66175598 | 872 | /* Enable I2S peripheral before the I2Sext*/ |
| mbed_official | 237:f3da66175598 | 873 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 874 | |
| mbed_official | 237:f3da66175598 | 875 | /* Enable I2Sext(transmitter) after enabling I2Sx peripheral */ |
| mbed_official | 237:f3da66175598 | 876 | __HAL_I2SEXT_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 877 | } |
| mbed_official | 237:f3da66175598 | 878 | |
| mbed_official | 237:f3da66175598 | 879 | /* Check if Master Receiver mode is selected */ |
| mbed_official | 237:f3da66175598 | 880 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
| mbed_official | 237:f3da66175598 | 881 | { |
| mbed_official | 237:f3da66175598 | 882 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read |
| mbed_official | 237:f3da66175598 | 883 | access to the SPI_SR register. */ |
| mbed_official | 237:f3da66175598 | 884 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
| mbed_official | 237:f3da66175598 | 885 | } |
| mbed_official | 237:f3da66175598 | 886 | |
| mbed_official | 237:f3da66175598 | 887 | while(hi2s->RxXferCount > 0) |
| mbed_official | 237:f3da66175598 | 888 | { |
| mbed_official | 237:f3da66175598 | 889 | /* Wait until TXE flag is set */ |
| mbed_official | 237:f3da66175598 | 890 | if (I2S_FullDuplexWaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout, I2S_USE_I2SEXT) != HAL_OK) |
| mbed_official | 237:f3da66175598 | 891 | { |
| mbed_official | 237:f3da66175598 | 892 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 893 | hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT; |
| mbed_official | 237:f3da66175598 | 894 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 895 | return HAL_TIMEOUT; |
| mbed_official | 237:f3da66175598 | 896 | } |
| mbed_official | 237:f3da66175598 | 897 | |
| mbed_official | 237:f3da66175598 | 898 | if (hi2s->TxXferCount > 0) |
| mbed_official | 237:f3da66175598 | 899 | { |
| mbed_official | 237:f3da66175598 | 900 | /* Check if an underrun occurs */ |
| mbed_official | 237:f3da66175598 | 901 | if(__HAL_I2SEXT_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET) |
| mbed_official | 237:f3da66175598 | 902 | { |
| mbed_official | 237:f3da66175598 | 903 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 904 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 905 | |
| mbed_official | 237:f3da66175598 | 906 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 907 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 908 | |
| mbed_official | 237:f3da66175598 | 909 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 910 | hi2s->ErrorCode |= HAL_I2S_ERROR_UDR; |
| mbed_official | 237:f3da66175598 | 911 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 912 | |
| mbed_official | 237:f3da66175598 | 913 | return HAL_ERROR; |
| mbed_official | 237:f3da66175598 | 914 | } |
| mbed_official | 237:f3da66175598 | 915 | |
| mbed_official | 237:f3da66175598 | 916 | I2SxEXT(hi2s->Instance)->DR = (*pTxData++); |
| mbed_official | 237:f3da66175598 | 917 | hi2s->TxXferCount--; |
| mbed_official | 237:f3da66175598 | 918 | } |
| mbed_official | 237:f3da66175598 | 919 | |
| mbed_official | 237:f3da66175598 | 920 | /* Wait until RXNE flag is set */ |
| mbed_official | 237:f3da66175598 | 921 | if (I2S_FullDuplexWaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout, I2S_USE_I2S) != HAL_OK) |
| mbed_official | 237:f3da66175598 | 922 | { |
| mbed_official | 237:f3da66175598 | 923 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 924 | hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT; |
| mbed_official | 237:f3da66175598 | 925 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 926 | return HAL_TIMEOUT; |
| mbed_official | 237:f3da66175598 | 927 | } |
| mbed_official | 237:f3da66175598 | 928 | |
| mbed_official | 237:f3da66175598 | 929 | /* Check if an overrun occurs */ |
| mbed_official | 237:f3da66175598 | 930 | if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET) |
| mbed_official | 237:f3da66175598 | 931 | { |
| mbed_official | 237:f3da66175598 | 932 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 933 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 934 | |
| mbed_official | 237:f3da66175598 | 935 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 936 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 937 | |
| mbed_official | 237:f3da66175598 | 938 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 939 | hi2s->ErrorCode |= HAL_I2S_ERROR_OVR; |
| mbed_official | 237:f3da66175598 | 940 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 941 | |
| mbed_official | 237:f3da66175598 | 942 | return HAL_ERROR; |
| mbed_official | 237:f3da66175598 | 943 | } |
| mbed_official | 237:f3da66175598 | 944 | |
| mbed_official | 237:f3da66175598 | 945 | (*pRxData++) = hi2s->Instance->DR; |
| mbed_official | 237:f3da66175598 | 946 | hi2s->RxXferCount--; |
| mbed_official | 237:f3da66175598 | 947 | } |
| mbed_official | 237:f3da66175598 | 948 | } |
| mbed_official | 237:f3da66175598 | 949 | |
| mbed_official | 237:f3da66175598 | 950 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 951 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 952 | |
| mbed_official | 237:f3da66175598 | 953 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 954 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 955 | |
| mbed_official | 237:f3da66175598 | 956 | return HAL_OK; |
| mbed_official | 237:f3da66175598 | 957 | } |
| mbed_official | 237:f3da66175598 | 958 | else |
| mbed_official | 237:f3da66175598 | 959 | { |
| mbed_official | 237:f3da66175598 | 960 | return HAL_BUSY; |
| mbed_official | 237:f3da66175598 | 961 | } |
| mbed_official | 237:f3da66175598 | 962 | } |
| mbed_official | 237:f3da66175598 | 963 | |
| mbed_official | 237:f3da66175598 | 964 | /** |
| mbed_official | 237:f3da66175598 | 965 | * @brief Full-Duplex Transmit/Receive data in non-blocking mode using Interrupt |
| mbed_official | 237:f3da66175598 | 966 | * @param hi2s: I2S handle |
| mbed_official | 237:f3da66175598 | 967 | * @param pTxData: a 16-bit pointer to the Transmit data buffer. |
| mbed_official | 237:f3da66175598 | 968 | * @param pRxData: a 16-bit pointer to the Receive data buffer. |
| mbed_official | 237:f3da66175598 | 969 | * @param Size: number of data sample to be sent: |
| mbed_official | 237:f3da66175598 | 970 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 237:f3da66175598 | 971 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 237:f3da66175598 | 972 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 237:f3da66175598 | 973 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 237:f3da66175598 | 974 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 237:f3da66175598 | 975 | * between Master and Slave(example: audio streaming). |
| mbed_official | 237:f3da66175598 | 976 | * @retval HAL status |
| mbed_official | 237:f3da66175598 | 977 | */ |
| mbed_official | 237:f3da66175598 | 978 | HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size) |
| mbed_official | 237:f3da66175598 | 979 | { |
| mbed_official | 237:f3da66175598 | 980 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 237:f3da66175598 | 981 | { |
| mbed_official | 237:f3da66175598 | 982 | if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) |
| mbed_official | 237:f3da66175598 | 983 | { |
| mbed_official | 237:f3da66175598 | 984 | return HAL_ERROR; |
| mbed_official | 237:f3da66175598 | 985 | } |
| mbed_official | 237:f3da66175598 | 986 | |
| mbed_official | 237:f3da66175598 | 987 | hi2s->pTxBuffPtr = pTxData; |
| mbed_official | 237:f3da66175598 | 988 | hi2s->pRxBuffPtr = pRxData; |
| mbed_official | 237:f3da66175598 | 989 | |
| mbed_official | 237:f3da66175598 | 990 | /* Check the Data format: When a 16-bit data frame or a 16-bit data frame extended |
| mbed_official | 237:f3da66175598 | 991 | is selected during the I2S configuration phase, the Size parameter means the number |
| mbed_official | 237:f3da66175598 | 992 | of 16-bit data length in the transaction and when a 24-bit data frame or a 32-bit data |
| mbed_official | 237:f3da66175598 | 993 | frame is selected the Size parameter means the number of 16-bit data length. */ |
| mbed_official | 237:f3da66175598 | 994 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 237:f3da66175598 | 995 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
| mbed_official | 237:f3da66175598 | 996 | { |
| mbed_official | 237:f3da66175598 | 997 | hi2s->TxXferSize = (Size << 1); |
| mbed_official | 237:f3da66175598 | 998 | hi2s->TxXferCount = (Size << 1); |
| mbed_official | 237:f3da66175598 | 999 | hi2s->RxXferSize = (Size << 1); |
| mbed_official | 237:f3da66175598 | 1000 | hi2s->RxXferCount = (Size << 1); |
| mbed_official | 237:f3da66175598 | 1001 | } |
| mbed_official | 237:f3da66175598 | 1002 | else |
| mbed_official | 237:f3da66175598 | 1003 | { |
| mbed_official | 237:f3da66175598 | 1004 | hi2s->TxXferSize = Size; |
| mbed_official | 237:f3da66175598 | 1005 | hi2s->TxXferCount = Size; |
| mbed_official | 237:f3da66175598 | 1006 | hi2s->RxXferSize = Size; |
| mbed_official | 237:f3da66175598 | 1007 | hi2s->RxXferCount = Size; |
| mbed_official | 237:f3da66175598 | 1008 | } |
| mbed_official | 237:f3da66175598 | 1009 | |
| mbed_official | 237:f3da66175598 | 1010 | /* Process Locked */ |
| mbed_official | 237:f3da66175598 | 1011 | __HAL_LOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 1012 | |
| mbed_official | 237:f3da66175598 | 1013 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 237:f3da66175598 | 1014 | hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; |
| mbed_official | 237:f3da66175598 | 1015 | |
| mbed_official | 237:f3da66175598 | 1016 | /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */ |
| mbed_official | 237:f3da66175598 | 1017 | if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX)) |
| mbed_official | 237:f3da66175598 | 1018 | { |
| mbed_official | 237:f3da66175598 | 1019 | /* Enable I2Sext RXNE and ERR interrupts */ |
| mbed_official | 237:f3da66175598 | 1020 | __HAL_I2SEXT_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1021 | |
| mbed_official | 237:f3da66175598 | 1022 | /* Enable I2Sx TXE and ERR interrupts */ |
| mbed_official | 237:f3da66175598 | 1023 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1024 | |
| mbed_official | 237:f3da66175598 | 1025 | /* Check if the I2S is already enabled */ |
| mbed_official | 237:f3da66175598 | 1026 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 237:f3da66175598 | 1027 | { |
| mbed_official | 237:f3da66175598 | 1028 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) |
| mbed_official | 237:f3da66175598 | 1029 | { |
| mbed_official | 237:f3da66175598 | 1030 | /* Prepare the First Data before enabling the I2S */ |
| mbed_official | 237:f3da66175598 | 1031 | if(hi2s->TxXferCount != 0) |
| mbed_official | 237:f3da66175598 | 1032 | { |
| mbed_official | 237:f3da66175598 | 1033 | /* Transmit First data */ |
| mbed_official | 237:f3da66175598 | 1034 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
| mbed_official | 237:f3da66175598 | 1035 | hi2s->TxXferCount--; |
| mbed_official | 237:f3da66175598 | 1036 | |
| mbed_official | 237:f3da66175598 | 1037 | if(hi2s->TxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1038 | { |
| mbed_official | 237:f3da66175598 | 1039 | /* Disable TXE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 1040 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1041 | |
| mbed_official | 237:f3da66175598 | 1042 | if(hi2s->RxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1043 | { |
| mbed_official | 237:f3da66175598 | 1044 | /* Disable I2Sext RXNE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 1045 | __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE| I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1046 | |
| mbed_official | 237:f3da66175598 | 1047 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1048 | HAL_I2S_TxRxCpltCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 1049 | } |
| mbed_official | 237:f3da66175598 | 1050 | } |
| mbed_official | 237:f3da66175598 | 1051 | } |
| mbed_official | 237:f3da66175598 | 1052 | } |
| mbed_official | 237:f3da66175598 | 1053 | /* Enable I2Sext(receiver) before enabling I2Sx peripheral */ |
| mbed_official | 237:f3da66175598 | 1054 | __HAL_I2SEXT_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 1055 | |
| mbed_official | 237:f3da66175598 | 1056 | /* Enable I2Sx peripheral */ |
| mbed_official | 237:f3da66175598 | 1057 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 1058 | } |
| mbed_official | 237:f3da66175598 | 1059 | } |
| mbed_official | 237:f3da66175598 | 1060 | /* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */ |
| mbed_official | 237:f3da66175598 | 1061 | else |
| mbed_official | 237:f3da66175598 | 1062 | { |
| mbed_official | 237:f3da66175598 | 1063 | /* Enable I2Sext TXE and ERR interrupts */ |
| mbed_official | 237:f3da66175598 | 1064 | __HAL_I2SEXT_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1065 | |
| mbed_official | 237:f3da66175598 | 1066 | /* Enable I2Sext RXNE and ERR interrupts */ |
| mbed_official | 237:f3da66175598 | 1067 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1068 | |
| mbed_official | 237:f3da66175598 | 1069 | /* Check if the I2S is already enabled */ |
| mbed_official | 237:f3da66175598 | 1070 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 237:f3da66175598 | 1071 | { |
| mbed_official | 237:f3da66175598 | 1072 | /* Prepare the First Data before enabling the I2S */ |
| mbed_official | 237:f3da66175598 | 1073 | if(hi2s->TxXferCount != 0) |
| mbed_official | 237:f3da66175598 | 1074 | { |
| mbed_official | 237:f3da66175598 | 1075 | /* Transmit First data */ |
| mbed_official | 237:f3da66175598 | 1076 | I2SxEXT(hi2s->Instance)->DR = (*hi2s->pTxBuffPtr++); |
| mbed_official | 237:f3da66175598 | 1077 | hi2s->TxXferCount--; |
| mbed_official | 237:f3da66175598 | 1078 | |
| mbed_official | 237:f3da66175598 | 1079 | if(hi2s->TxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1080 | { |
| mbed_official | 237:f3da66175598 | 1081 | /* Disable I2Sext TXE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 1082 | __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1083 | |
| mbed_official | 237:f3da66175598 | 1084 | if(hi2s->RxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1085 | { |
| mbed_official | 237:f3da66175598 | 1086 | /* Disable RXNE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 1087 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE| I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1088 | |
| mbed_official | 237:f3da66175598 | 1089 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1090 | HAL_I2S_TxRxCpltCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 1091 | } |
| mbed_official | 237:f3da66175598 | 1092 | } |
| mbed_official | 237:f3da66175598 | 1093 | } |
| mbed_official | 237:f3da66175598 | 1094 | /* Enable I2Sext(transmitter) after enabling I2Sx peripheral */ |
| mbed_official | 237:f3da66175598 | 1095 | __HAL_I2SEXT_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 1096 | |
| mbed_official | 237:f3da66175598 | 1097 | /* Enable I2S peripheral */ |
| mbed_official | 237:f3da66175598 | 1098 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 1099 | } |
| mbed_official | 237:f3da66175598 | 1100 | } |
| mbed_official | 237:f3da66175598 | 1101 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 1102 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 1103 | |
| mbed_official | 237:f3da66175598 | 1104 | return HAL_OK; |
| mbed_official | 237:f3da66175598 | 1105 | } |
| mbed_official | 237:f3da66175598 | 1106 | else |
| mbed_official | 237:f3da66175598 | 1107 | { |
| mbed_official | 237:f3da66175598 | 1108 | return HAL_BUSY; |
| mbed_official | 237:f3da66175598 | 1109 | } |
| mbed_official | 237:f3da66175598 | 1110 | } |
| mbed_official | 237:f3da66175598 | 1111 | |
| mbed_official | 237:f3da66175598 | 1112 | /** |
| mbed_official | 237:f3da66175598 | 1113 | * @brief Full-Duplex Transmit/Receive data in non-blocking mode using DMA |
| mbed_official | 237:f3da66175598 | 1114 | * @param hi2s: I2S handle |
| mbed_official | 237:f3da66175598 | 1115 | * @param pTxData: a 16-bit pointer to the Transmit data buffer. |
| mbed_official | 237:f3da66175598 | 1116 | * @param pRxData: a 16-bit pointer to the Receive data buffer. |
| mbed_official | 237:f3da66175598 | 1117 | * @param Size: number of data sample to be sent: |
| mbed_official | 237:f3da66175598 | 1118 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 237:f3da66175598 | 1119 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 237:f3da66175598 | 1120 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 237:f3da66175598 | 1121 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 237:f3da66175598 | 1122 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 237:f3da66175598 | 1123 | * between Master and Slave(example: audio streaming). |
| mbed_official | 237:f3da66175598 | 1124 | * @retval HAL status |
| mbed_official | 237:f3da66175598 | 1125 | */ |
| mbed_official | 237:f3da66175598 | 1126 | HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size) |
| mbed_official | 237:f3da66175598 | 1127 | { |
| mbed_official | 237:f3da66175598 | 1128 | uint32_t *tmp; |
| mbed_official | 237:f3da66175598 | 1129 | |
| mbed_official | 237:f3da66175598 | 1130 | if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) |
| mbed_official | 237:f3da66175598 | 1131 | { |
| mbed_official | 237:f3da66175598 | 1132 | return HAL_ERROR; |
| mbed_official | 237:f3da66175598 | 1133 | } |
| mbed_official | 237:f3da66175598 | 1134 | |
| mbed_official | 237:f3da66175598 | 1135 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 237:f3da66175598 | 1136 | { |
| mbed_official | 237:f3da66175598 | 1137 | hi2s->pTxBuffPtr = pTxData; |
| mbed_official | 237:f3da66175598 | 1138 | hi2s->pRxBuffPtr = pRxData; |
| mbed_official | 237:f3da66175598 | 1139 | |
| mbed_official | 237:f3da66175598 | 1140 | /* Check the Data format: When a 16-bit data frame or a 16-bit data frame extended |
| mbed_official | 237:f3da66175598 | 1141 | is selected during the I2S configuration phase, the Size parameter means the number |
| mbed_official | 237:f3da66175598 | 1142 | of 16-bit data length in the transaction and when a 24-bit data frame or a 32-bit data |
| mbed_official | 237:f3da66175598 | 1143 | frame is selected the Size parameter means the number of 16-bit data length. */ |
| mbed_official | 237:f3da66175598 | 1144 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 237:f3da66175598 | 1145 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
| mbed_official | 237:f3da66175598 | 1146 | { |
| mbed_official | 237:f3da66175598 | 1147 | hi2s->TxXferSize = (Size << 1); |
| mbed_official | 237:f3da66175598 | 1148 | hi2s->TxXferCount = (Size << 1); |
| mbed_official | 237:f3da66175598 | 1149 | hi2s->RxXferSize = (Size << 1); |
| mbed_official | 237:f3da66175598 | 1150 | hi2s->RxXferCount = (Size << 1); |
| mbed_official | 237:f3da66175598 | 1151 | } |
| mbed_official | 237:f3da66175598 | 1152 | else |
| mbed_official | 237:f3da66175598 | 1153 | { |
| mbed_official | 237:f3da66175598 | 1154 | hi2s->TxXferSize = Size; |
| mbed_official | 237:f3da66175598 | 1155 | hi2s->TxXferCount = Size; |
| mbed_official | 237:f3da66175598 | 1156 | hi2s->RxXferSize = Size; |
| mbed_official | 237:f3da66175598 | 1157 | hi2s->RxXferCount = Size; |
| mbed_official | 237:f3da66175598 | 1158 | } |
| mbed_official | 237:f3da66175598 | 1159 | |
| mbed_official | 237:f3da66175598 | 1160 | /* Process Locked */ |
| mbed_official | 237:f3da66175598 | 1161 | __HAL_LOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 1162 | |
| mbed_official | 237:f3da66175598 | 1163 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 237:f3da66175598 | 1164 | hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; |
| mbed_official | 237:f3da66175598 | 1165 | |
| mbed_official | 237:f3da66175598 | 1166 | /* Set the I2S Rx DMA transfer complete callback */ |
| mbed_official | 237:f3da66175598 | 1167 | hi2s->hdmarx->XferCpltCallback = I2S_TxRxDMACplt; |
| mbed_official | 237:f3da66175598 | 1168 | |
| mbed_official | 237:f3da66175598 | 1169 | /* Set the DMA error callback */ |
| mbed_official | 237:f3da66175598 | 1170 | hi2s->hdmarx->XferErrorCallback = I2S_TxRxDMAError; |
| mbed_official | 237:f3da66175598 | 1171 | |
| mbed_official | 237:f3da66175598 | 1172 | /* Set the I2S Tx DMA transfer complete callback */ |
| mbed_official | 237:f3da66175598 | 1173 | hi2s->hdmatx->XferCpltCallback = I2S_TxRxDMACplt; |
| mbed_official | 237:f3da66175598 | 1174 | |
| mbed_official | 237:f3da66175598 | 1175 | /* Set the DMA error callback */ |
| mbed_official | 237:f3da66175598 | 1176 | hi2s->hdmatx->XferErrorCallback = I2S_TxRxDMAError; |
| mbed_official | 237:f3da66175598 | 1177 | |
| mbed_official | 237:f3da66175598 | 1178 | /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */ |
| mbed_official | 237:f3da66175598 | 1179 | if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX)) |
| mbed_official | 237:f3da66175598 | 1180 | { |
| mbed_official | 237:f3da66175598 | 1181 | /* Enable the Rx DMA Channel */ |
| mbed_official | 237:f3da66175598 | 1182 | tmp = (uint32_t*)&pRxData; |
| mbed_official | 237:f3da66175598 | 1183 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&I2SxEXT(hi2s->Instance)->DR, *(uint32_t*)tmp, hi2s->RxXferSize); |
| mbed_official | 237:f3da66175598 | 1184 | |
| mbed_official | 237:f3da66175598 | 1185 | /* Enable Rx DMA Request */ |
| mbed_official | 237:f3da66175598 | 1186 | I2SxEXT(hi2s->Instance)->CR2 |= SPI_CR2_RXDMAEN; |
| mbed_official | 237:f3da66175598 | 1187 | |
| mbed_official | 237:f3da66175598 | 1188 | /* Enable the Tx DMA Channel */ |
| mbed_official | 237:f3da66175598 | 1189 | tmp = (uint32_t*)&pTxData; |
| mbed_official | 237:f3da66175598 | 1190 | HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize); |
| mbed_official | 237:f3da66175598 | 1191 | |
| mbed_official | 237:f3da66175598 | 1192 | /* Enable Tx DMA Request */ |
| mbed_official | 237:f3da66175598 | 1193 | hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN; |
| mbed_official | 237:f3da66175598 | 1194 | |
| mbed_official | 237:f3da66175598 | 1195 | /* Check if the I2S is already enabled */ |
| mbed_official | 237:f3da66175598 | 1196 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 237:f3da66175598 | 1197 | { |
| mbed_official | 237:f3da66175598 | 1198 | /* Enable I2Sext(receiver) before enabling I2Sx peripheral */ |
| mbed_official | 237:f3da66175598 | 1199 | __HAL_I2SEXT_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 1200 | |
| mbed_official | 237:f3da66175598 | 1201 | /* Enable I2S peripheral after the I2Sext*/ |
| mbed_official | 237:f3da66175598 | 1202 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 1203 | } |
| mbed_official | 237:f3da66175598 | 1204 | } |
| mbed_official | 237:f3da66175598 | 1205 | else |
| mbed_official | 237:f3da66175598 | 1206 | { |
| mbed_official | 237:f3da66175598 | 1207 | /* Check if Master Receiver mode is selected */ |
| mbed_official | 237:f3da66175598 | 1208 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
| mbed_official | 237:f3da66175598 | 1209 | { |
| mbed_official | 237:f3da66175598 | 1210 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read |
| mbed_official | 237:f3da66175598 | 1211 | access to the SPI_SR register. */ |
| mbed_official | 237:f3da66175598 | 1212 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
| mbed_official | 237:f3da66175598 | 1213 | } |
| mbed_official | 237:f3da66175598 | 1214 | |
| mbed_official | 237:f3da66175598 | 1215 | /* Enable the Tx DMA Channel */ |
| mbed_official | 237:f3da66175598 | 1216 | tmp = (uint32_t*)&pTxData; |
| mbed_official | 237:f3da66175598 | 1217 | HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&I2SxEXT(hi2s->Instance)->DR, hi2s->TxXferSize); |
| mbed_official | 237:f3da66175598 | 1218 | |
| mbed_official | 237:f3da66175598 | 1219 | /* Enable Tx DMA Request */ |
| mbed_official | 237:f3da66175598 | 1220 | I2SxEXT(hi2s->Instance)->CR2 |= SPI_CR2_TXDMAEN; |
| mbed_official | 237:f3da66175598 | 1221 | |
| mbed_official | 237:f3da66175598 | 1222 | /* Enable the Rx DMA Channel */ |
| mbed_official | 237:f3da66175598 | 1223 | tmp = (uint32_t*)&pRxData; |
| mbed_official | 237:f3da66175598 | 1224 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize); |
| mbed_official | 237:f3da66175598 | 1225 | |
| mbed_official | 237:f3da66175598 | 1226 | /* Enable Rx DMA Request */ |
| mbed_official | 237:f3da66175598 | 1227 | hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN; |
| mbed_official | 237:f3da66175598 | 1228 | |
| mbed_official | 237:f3da66175598 | 1229 | /* Check if the I2S is already enabled */ |
| mbed_official | 237:f3da66175598 | 1230 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 237:f3da66175598 | 1231 | { |
| mbed_official | 237:f3da66175598 | 1232 | /* Enable I2Sext(transmitter) before enabling I2Sx peripheral */ |
| mbed_official | 237:f3da66175598 | 1233 | __HAL_I2SEXT_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 1234 | |
| mbed_official | 237:f3da66175598 | 1235 | /* Enable I2S peripheral after the I2Sext*/ |
| mbed_official | 237:f3da66175598 | 1236 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 237:f3da66175598 | 1237 | } |
| mbed_official | 237:f3da66175598 | 1238 | } |
| mbed_official | 237:f3da66175598 | 1239 | |
| mbed_official | 237:f3da66175598 | 1240 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 1241 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 1242 | |
| mbed_official | 237:f3da66175598 | 1243 | return HAL_OK; |
| mbed_official | 237:f3da66175598 | 1244 | } |
| mbed_official | 237:f3da66175598 | 1245 | else |
| mbed_official | 237:f3da66175598 | 1246 | { |
| mbed_official | 237:f3da66175598 | 1247 | return HAL_BUSY; |
| mbed_official | 237:f3da66175598 | 1248 | } |
| mbed_official | 237:f3da66175598 | 1249 | } |
| mbed_official | 237:f3da66175598 | 1250 | |
| mbed_official | 237:f3da66175598 | 1251 | /** |
| mbed_official | 237:f3da66175598 | 1252 | * @} |
| mbed_official | 237:f3da66175598 | 1253 | */ |
| mbed_official | 237:f3da66175598 | 1254 | |
| mbed_official | 237:f3da66175598 | 1255 | /** |
| mbed_official | 237:f3da66175598 | 1256 | * @} |
| mbed_official | 237:f3da66175598 | 1257 | */ |
| mbed_official | 237:f3da66175598 | 1258 | |
| mbed_official | 237:f3da66175598 | 1259 | /** |
| mbed_official | 237:f3da66175598 | 1260 | * @brief DMA I2S transmit receive process complete callback |
| mbed_official | 237:f3da66175598 | 1261 | * @param hdma: DMA handle |
| mbed_official | 237:f3da66175598 | 1262 | * @retval None |
| mbed_official | 237:f3da66175598 | 1263 | */ |
| mbed_official | 237:f3da66175598 | 1264 | static void I2S_TxRxDMACplt(DMA_HandleTypeDef *hdma) |
| mbed_official | 237:f3da66175598 | 1265 | { |
| mbed_official | 237:f3da66175598 | 1266 | I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| mbed_official | 237:f3da66175598 | 1267 | |
| mbed_official | 237:f3da66175598 | 1268 | if (hi2s->hdmarx == hdma) |
| mbed_official | 237:f3da66175598 | 1269 | { |
| mbed_official | 237:f3da66175598 | 1270 | /* Disable Rx DMA Request */ |
| mbed_official | 237:f3da66175598 | 1271 | if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX)) |
| mbed_official | 237:f3da66175598 | 1272 | { |
| mbed_official | 237:f3da66175598 | 1273 | I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
| mbed_official | 237:f3da66175598 | 1274 | } |
| mbed_official | 237:f3da66175598 | 1275 | else |
| mbed_official | 237:f3da66175598 | 1276 | { |
| mbed_official | 237:f3da66175598 | 1277 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
| mbed_official | 237:f3da66175598 | 1278 | } |
| mbed_official | 237:f3da66175598 | 1279 | |
| mbed_official | 237:f3da66175598 | 1280 | hi2s->RxXferCount = 0; |
| mbed_official | 237:f3da66175598 | 1281 | |
| mbed_official | 237:f3da66175598 | 1282 | if (hi2s->TxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1283 | { |
| mbed_official | 237:f3da66175598 | 1284 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1285 | |
| mbed_official | 237:f3da66175598 | 1286 | HAL_I2S_TxRxCpltCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 1287 | } |
| mbed_official | 237:f3da66175598 | 1288 | } |
| mbed_official | 237:f3da66175598 | 1289 | |
| mbed_official | 237:f3da66175598 | 1290 | if (hi2s->hdmatx == hdma) |
| mbed_official | 237:f3da66175598 | 1291 | { |
| mbed_official | 237:f3da66175598 | 1292 | /* Disable Tx DMA Request */ |
| mbed_official | 237:f3da66175598 | 1293 | if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX)) |
| mbed_official | 237:f3da66175598 | 1294 | { |
| mbed_official | 237:f3da66175598 | 1295 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
| mbed_official | 237:f3da66175598 | 1296 | } |
| mbed_official | 237:f3da66175598 | 1297 | else |
| mbed_official | 237:f3da66175598 | 1298 | { |
| mbed_official | 237:f3da66175598 | 1299 | I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
| mbed_official | 237:f3da66175598 | 1300 | } |
| mbed_official | 237:f3da66175598 | 1301 | |
| mbed_official | 237:f3da66175598 | 1302 | hi2s->TxXferCount = 0; |
| mbed_official | 237:f3da66175598 | 1303 | |
| mbed_official | 237:f3da66175598 | 1304 | if (hi2s->RxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1305 | { |
| mbed_official | 237:f3da66175598 | 1306 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1307 | |
| mbed_official | 237:f3da66175598 | 1308 | HAL_I2S_TxRxCpltCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 1309 | } |
| mbed_official | 237:f3da66175598 | 1310 | } |
| mbed_official | 237:f3da66175598 | 1311 | } |
| mbed_official | 237:f3da66175598 | 1312 | |
| mbed_official | 237:f3da66175598 | 1313 | /** |
| mbed_official | 237:f3da66175598 | 1314 | * @brief DMA I2S communication error callback |
| mbed_official | 237:f3da66175598 | 1315 | * @param hdma : DMA handle |
| mbed_official | 237:f3da66175598 | 1316 | * @retval None |
| mbed_official | 237:f3da66175598 | 1317 | */ |
| mbed_official | 237:f3da66175598 | 1318 | static void I2S_TxRxDMAError(DMA_HandleTypeDef *hdma) |
| mbed_official | 237:f3da66175598 | 1319 | { |
| mbed_official | 237:f3da66175598 | 1320 | I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| mbed_official | 237:f3da66175598 | 1321 | |
| mbed_official | 237:f3da66175598 | 1322 | /* Disable Rx and Tx DMA Request */ |
| mbed_official | 237:f3da66175598 | 1323 | hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
| mbed_official | 237:f3da66175598 | 1324 | I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
| mbed_official | 237:f3da66175598 | 1325 | |
| mbed_official | 237:f3da66175598 | 1326 | hi2s->TxXferCount = 0; |
| mbed_official | 237:f3da66175598 | 1327 | hi2s->RxXferCount = 0; |
| mbed_official | 237:f3da66175598 | 1328 | |
| mbed_official | 237:f3da66175598 | 1329 | hi2s->State= HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1330 | |
| mbed_official | 237:f3da66175598 | 1331 | /* Set the error code and execute error callback*/ |
| mbed_official | 237:f3da66175598 | 1332 | hi2s->ErrorCode |= HAL_I2S_ERROR_DMA; |
| mbed_official | 237:f3da66175598 | 1333 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 1334 | } |
| mbed_official | 237:f3da66175598 | 1335 | |
| mbed_official | 237:f3da66175598 | 1336 | /** |
| mbed_official | 237:f3da66175598 | 1337 | * @brief Full-Duplex IT handler transmit function |
| mbed_official | 237:f3da66175598 | 1338 | * @param hi2s: I2S handle |
| mbed_official | 237:f3da66175598 | 1339 | * @param i2sUsed: indicate if I2Sx or I2Sx_ext is concerned |
| mbed_official | 237:f3da66175598 | 1340 | * @retval None |
| mbed_official | 237:f3da66175598 | 1341 | */ |
| mbed_official | 237:f3da66175598 | 1342 | static void I2S_FullDuplexTx_IT(I2S_HandleTypeDef *hi2s, I2S_UseTypeDef i2sUsed) |
| mbed_official | 237:f3da66175598 | 1343 | { |
| mbed_official | 237:f3da66175598 | 1344 | if(i2sUsed == I2S_USE_I2S) |
| mbed_official | 237:f3da66175598 | 1345 | { |
| mbed_official | 237:f3da66175598 | 1346 | /* Transmit data */ |
| mbed_official | 237:f3da66175598 | 1347 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
| mbed_official | 237:f3da66175598 | 1348 | hi2s->TxXferCount--; |
| mbed_official | 237:f3da66175598 | 1349 | |
| mbed_official | 237:f3da66175598 | 1350 | if(hi2s->TxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1351 | { |
| mbed_official | 237:f3da66175598 | 1352 | /* Disable TXE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 1353 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1354 | |
| mbed_official | 237:f3da66175598 | 1355 | if(hi2s->RxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1356 | { |
| mbed_official | 237:f3da66175598 | 1357 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1358 | HAL_I2S_TxRxCpltCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 1359 | } |
| mbed_official | 237:f3da66175598 | 1360 | } |
| mbed_official | 237:f3da66175598 | 1361 | } |
| mbed_official | 237:f3da66175598 | 1362 | else |
| mbed_official | 237:f3da66175598 | 1363 | { |
| mbed_official | 237:f3da66175598 | 1364 | /* Transmit data */ |
| mbed_official | 237:f3da66175598 | 1365 | I2SxEXT(hi2s->Instance)->DR = (*hi2s->pTxBuffPtr++); |
| mbed_official | 237:f3da66175598 | 1366 | hi2s->TxXferCount--; |
| mbed_official | 237:f3da66175598 | 1367 | |
| mbed_official | 237:f3da66175598 | 1368 | if(hi2s->TxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1369 | { |
| mbed_official | 237:f3da66175598 | 1370 | /* Disable I2Sext TXE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 1371 | __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1372 | |
| mbed_official | 237:f3da66175598 | 1373 | if(hi2s->RxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1374 | { |
| mbed_official | 237:f3da66175598 | 1375 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1376 | HAL_I2S_TxRxCpltCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 1377 | } |
| mbed_official | 237:f3da66175598 | 1378 | } |
| mbed_official | 237:f3da66175598 | 1379 | } |
| mbed_official | 237:f3da66175598 | 1380 | } |
| mbed_official | 237:f3da66175598 | 1381 | |
| mbed_official | 237:f3da66175598 | 1382 | /** |
| mbed_official | 237:f3da66175598 | 1383 | * @brief Full-Duplex IT handler receive function |
| mbed_official | 237:f3da66175598 | 1384 | * @param hi2s: I2S handle |
| mbed_official | 237:f3da66175598 | 1385 | * @param i2sUsed: indicate if I2Sx or I2Sx_ext is concerned |
| mbed_official | 237:f3da66175598 | 1386 | * @retval None |
| mbed_official | 237:f3da66175598 | 1387 | */ |
| mbed_official | 237:f3da66175598 | 1388 | static void I2S_FullDuplexRx_IT(I2S_HandleTypeDef *hi2s, I2S_UseTypeDef i2sUsed) |
| mbed_official | 237:f3da66175598 | 1389 | { |
| mbed_official | 237:f3da66175598 | 1390 | if(i2sUsed == I2S_USE_I2S) |
| mbed_official | 237:f3da66175598 | 1391 | { |
| mbed_official | 237:f3da66175598 | 1392 | /* Receive data */ |
| mbed_official | 237:f3da66175598 | 1393 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
| mbed_official | 237:f3da66175598 | 1394 | hi2s->RxXferCount--; |
| mbed_official | 237:f3da66175598 | 1395 | |
| mbed_official | 237:f3da66175598 | 1396 | if(hi2s->RxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1397 | { |
| mbed_official | 237:f3da66175598 | 1398 | /* Disable RXNE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 1399 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1400 | |
| mbed_official | 237:f3da66175598 | 1401 | if(hi2s->TxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1402 | { |
| mbed_official | 237:f3da66175598 | 1403 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1404 | HAL_I2S_TxRxCpltCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 1405 | } |
| mbed_official | 237:f3da66175598 | 1406 | } |
| mbed_official | 237:f3da66175598 | 1407 | } |
| mbed_official | 237:f3da66175598 | 1408 | else |
| mbed_official | 237:f3da66175598 | 1409 | { |
| mbed_official | 237:f3da66175598 | 1410 | /* Receive data */ |
| mbed_official | 237:f3da66175598 | 1411 | (*hi2s->pRxBuffPtr++) = I2SxEXT(hi2s->Instance)->DR; |
| mbed_official | 237:f3da66175598 | 1412 | hi2s->RxXferCount--; |
| mbed_official | 237:f3da66175598 | 1413 | |
| mbed_official | 237:f3da66175598 | 1414 | if(hi2s->RxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1415 | { |
| mbed_official | 237:f3da66175598 | 1416 | /* Disable I2Sext RXNE and ERR interrupt */ |
| mbed_official | 237:f3da66175598 | 1417 | __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 237:f3da66175598 | 1418 | |
| mbed_official | 237:f3da66175598 | 1419 | if(hi2s->TxXferCount == 0) |
| mbed_official | 237:f3da66175598 | 1420 | { |
| mbed_official | 237:f3da66175598 | 1421 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1422 | HAL_I2S_TxRxCpltCallback(hi2s); |
| mbed_official | 237:f3da66175598 | 1423 | } |
| mbed_official | 237:f3da66175598 | 1424 | } |
| mbed_official | 237:f3da66175598 | 1425 | } |
| mbed_official | 237:f3da66175598 | 1426 | } |
| mbed_official | 237:f3da66175598 | 1427 | |
| mbed_official | 237:f3da66175598 | 1428 | /** |
| mbed_official | 237:f3da66175598 | 1429 | * @brief This function handles I2S Communication Timeout. |
| mbed_official | 237:f3da66175598 | 1430 | * @param hi2s: I2S handle |
| mbed_official | 237:f3da66175598 | 1431 | * @param Flag: Flag checked |
| mbed_official | 237:f3da66175598 | 1432 | * @param State: Value of the flag expected |
| mbed_official | 237:f3da66175598 | 1433 | * @param Timeout: Duration of the timeout |
| mbed_official | 237:f3da66175598 | 1434 | * @param i2sUsed: I2S instance reference |
| mbed_official | 237:f3da66175598 | 1435 | * @retval HAL status |
| mbed_official | 237:f3da66175598 | 1436 | */ |
| mbed_official | 237:f3da66175598 | 1437 | static HAL_StatusTypeDef I2S_FullDuplexWaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, |
| mbed_official | 237:f3da66175598 | 1438 | uint32_t State, uint32_t Timeout, I2S_UseTypeDef i2sUsed) |
| mbed_official | 237:f3da66175598 | 1439 | { |
| mbed_official | 237:f3da66175598 | 1440 | uint32_t tickstart = HAL_GetTick(); |
| mbed_official | 237:f3da66175598 | 1441 | |
| mbed_official | 237:f3da66175598 | 1442 | if(i2sUsed == I2S_USE_I2S) |
| mbed_official | 237:f3da66175598 | 1443 | { |
| mbed_official | 237:f3da66175598 | 1444 | while((__HAL_I2S_GET_FLAG(hi2s, Flag)) != State) |
| mbed_official | 237:f3da66175598 | 1445 | { |
| mbed_official | 237:f3da66175598 | 1446 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 237:f3da66175598 | 1447 | { |
| mbed_official | 237:f3da66175598 | 1448 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
| mbed_official | 237:f3da66175598 | 1449 | { |
| mbed_official | 237:f3da66175598 | 1450 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 1451 | hi2s->State= HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1452 | |
| mbed_official | 237:f3da66175598 | 1453 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 1454 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 1455 | |
| mbed_official | 237:f3da66175598 | 1456 | return HAL_TIMEOUT; |
| mbed_official | 237:f3da66175598 | 1457 | } |
| mbed_official | 237:f3da66175598 | 1458 | } |
| mbed_official | 237:f3da66175598 | 1459 | } |
| mbed_official | 237:f3da66175598 | 1460 | } |
| mbed_official | 237:f3da66175598 | 1461 | else |
| mbed_official | 237:f3da66175598 | 1462 | { |
| mbed_official | 237:f3da66175598 | 1463 | while((__HAL_I2SEXT_GET_FLAG(hi2s, Flag)) != State) |
| mbed_official | 237:f3da66175598 | 1464 | { |
| mbed_official | 237:f3da66175598 | 1465 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 237:f3da66175598 | 1466 | { |
| mbed_official | 237:f3da66175598 | 1467 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
| mbed_official | 237:f3da66175598 | 1468 | { |
| mbed_official | 237:f3da66175598 | 1469 | /* Set the I2S State ready */ |
| mbed_official | 237:f3da66175598 | 1470 | hi2s->State= HAL_I2S_STATE_READY; |
| mbed_official | 237:f3da66175598 | 1471 | |
| mbed_official | 237:f3da66175598 | 1472 | /* Process Unlocked */ |
| mbed_official | 237:f3da66175598 | 1473 | __HAL_UNLOCK(hi2s); |
| mbed_official | 237:f3da66175598 | 1474 | |
| mbed_official | 237:f3da66175598 | 1475 | return HAL_TIMEOUT; |
| mbed_official | 237:f3da66175598 | 1476 | } |
| mbed_official | 237:f3da66175598 | 1477 | } |
| mbed_official | 237:f3da66175598 | 1478 | } |
| mbed_official | 237:f3da66175598 | 1479 | } |
| mbed_official | 237:f3da66175598 | 1480 | |
| mbed_official | 237:f3da66175598 | 1481 | return HAL_OK; |
| mbed_official | 237:f3da66175598 | 1482 | } |
| mbed_official | 237:f3da66175598 | 1483 | #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ |
| mbed_official | 237:f3da66175598 | 1484 | |
| mbed_official | 237:f3da66175598 | 1485 | /** |
| mbed_official | 237:f3da66175598 | 1486 | * @} |
| mbed_official | 237:f3da66175598 | 1487 | */ |
| mbed_official | 237:f3da66175598 | 1488 | |
| mbed_official | 237:f3da66175598 | 1489 | /** |
| mbed_official | 237:f3da66175598 | 1490 | * @} |
| mbed_official | 237:f3da66175598 | 1491 | */ |
| mbed_official | 237:f3da66175598 | 1492 | |
| mbed_official | 237:f3da66175598 | 1493 | #endif /* defined(STM32F301x8) || */ |
| mbed_official | 237:f3da66175598 | 1494 | /* defined(STM32F302x8) || defined(STM32F302xC) || */ |
| mbed_official | 237:f3da66175598 | 1495 | /* defined(STM32F303xC) || defined(STM32F373xC) || */ |
| mbed_official | 237:f3da66175598 | 1496 | /* defined(STM32F318xx) || */ |
| mbed_official | 237:f3da66175598 | 1497 | /* defined(STM32F358xx) || defined(STM32F378xx) */ |
| mbed_official | 237:f3da66175598 | 1498 | |
| mbed_official | 237:f3da66175598 | 1499 | #endif /* HAL_I2S_MODULE_ENABLED */ |
| mbed_official | 237:f3da66175598 | 1500 | |
| mbed_official | 237:f3da66175598 | 1501 | /** |
| mbed_official | 237:f3da66175598 | 1502 | * @} |
| mbed_official | 237:f3da66175598 | 1503 | */ |
| mbed_official | 237:f3da66175598 | 1504 | |
| mbed_official | 237:f3da66175598 | 1505 | /** |
| mbed_official | 237:f3da66175598 | 1506 | * @} |
| mbed_official | 237:f3da66175598 | 1507 | */ |
| mbed_official | 237:f3da66175598 | 1508 | |
| mbed_official | 237:f3da66175598 | 1509 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |