mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/hal/TARGET_NXP/TARGET_LPC408X/can_api.c@259:da299e454ce7, 2014-07-18 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jul 18 14:15:09 2014 +0100
- Revision:
- 259:da299e454ce7
- Parent:
- 227:7bd0639b8911
Synchronized with git revision df84f2b3e967624878b8b54e093a8a3a675f3ca7
Full URL: https://github.com/mbedmicro/mbed/commit/df84f2b3e967624878b8b54e093a8a3a675f3ca7/
New ARCH_GPRS target
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 15:4892fe388435 | 1 | /* mbed Microcontroller Library |
bogdanm | 15:4892fe388435 | 2 | * Copyright (c) 2006-2013 ARM Limited |
bogdanm | 15:4892fe388435 | 3 | * |
bogdanm | 15:4892fe388435 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
bogdanm | 15:4892fe388435 | 5 | * you may not use this file except in compliance with the License. |
bogdanm | 15:4892fe388435 | 6 | * You may obtain a copy of the License at |
bogdanm | 15:4892fe388435 | 7 | * |
bogdanm | 15:4892fe388435 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
bogdanm | 15:4892fe388435 | 9 | * |
bogdanm | 15:4892fe388435 | 10 | * Unless required by applicable law or agreed to in writing, software |
bogdanm | 15:4892fe388435 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
bogdanm | 15:4892fe388435 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bogdanm | 15:4892fe388435 | 13 | * See the License for the specific language governing permissions and |
bogdanm | 15:4892fe388435 | 14 | * limitations under the License. |
bogdanm | 15:4892fe388435 | 15 | */ |
emilmont | 17:151ab7482c89 | 16 | #include "can_api.h" |
bogdanm | 15:4892fe388435 | 17 | |
bogdanm | 15:4892fe388435 | 18 | #include "cmsis.h" |
bogdanm | 15:4892fe388435 | 19 | #include "pinmap.h" |
bogdanm | 15:4892fe388435 | 20 | |
emilmont | 17:151ab7482c89 | 21 | #include <math.h> |
emilmont | 17:151ab7482c89 | 22 | #include <string.h> |
emilmont | 17:151ab7482c89 | 23 | |
emilmont | 17:151ab7482c89 | 24 | #define CAN_NUM 2 |
emilmont | 16:7da2369b400c | 25 | |
bogdanm | 15:4892fe388435 | 26 | /* Acceptance filter mode in AFMR register */ |
bogdanm | 15:4892fe388435 | 27 | #define ACCF_OFF 0x01 |
bogdanm | 15:4892fe388435 | 28 | #define ACCF_BYPASS 0x02 |
bogdanm | 15:4892fe388435 | 29 | #define ACCF_ON 0x00 |
bogdanm | 15:4892fe388435 | 30 | #define ACCF_FULLCAN 0x04 |
bogdanm | 15:4892fe388435 | 31 | |
bogdanm | 15:4892fe388435 | 32 | /* There are several bit timing calculators on the internet. |
bogdanm | 15:4892fe388435 | 33 | http://www.port.de/engl/canprod/sv_req_form.html |
bogdanm | 15:4892fe388435 | 34 | http://www.kvaser.com/can/index.htm |
bogdanm | 15:4892fe388435 | 35 | */ |
bogdanm | 15:4892fe388435 | 36 | |
bogdanm | 15:4892fe388435 | 37 | static const PinMap PinMap_CAN_RD[] = { |
bogdanm | 15:4892fe388435 | 38 | {P0_0 , CAN_1, 1}, |
bogdanm | 15:4892fe388435 | 39 | {P0_4 , CAN_2, 2}, |
bogdanm | 15:4892fe388435 | 40 | {P0_21, CAN_1, 4}, |
bogdanm | 15:4892fe388435 | 41 | {P2_7 , CAN_2, 1}, |
bogdanm | 15:4892fe388435 | 42 | {NC , NC , 0} |
bogdanm | 15:4892fe388435 | 43 | }; |
bogdanm | 15:4892fe388435 | 44 | |
bogdanm | 15:4892fe388435 | 45 | static const PinMap PinMap_CAN_TD[] = { |
bogdanm | 15:4892fe388435 | 46 | {P0_1 , CAN_1, 1}, |
bogdanm | 15:4892fe388435 | 47 | {P0_5 , CAN_2, 2}, |
bogdanm | 15:4892fe388435 | 48 | {P0_22, CAN_1, 4}, |
bogdanm | 15:4892fe388435 | 49 | {P2_8 , CAN_2, 1}, |
bogdanm | 15:4892fe388435 | 50 | {NC , NC , 0} |
bogdanm | 15:4892fe388435 | 51 | }; |
bogdanm | 15:4892fe388435 | 52 | |
bogdanm | 15:4892fe388435 | 53 | // Type definition to hold a CAN message |
bogdanm | 15:4892fe388435 | 54 | struct CANMsg { |
bogdanm | 15:4892fe388435 | 55 | unsigned int reserved1 : 16; |
bogdanm | 15:4892fe388435 | 56 | unsigned int dlc : 4; // Bits 16..19: DLC - Data Length Counter |
bogdanm | 15:4892fe388435 | 57 | unsigned int reserved0 : 10; |
bogdanm | 15:4892fe388435 | 58 | unsigned int rtr : 1; // Bit 30: Set if this is a RTR message |
bogdanm | 15:4892fe388435 | 59 | unsigned int type : 1; // Bit 31: Set if this is a 29-bit ID message |
bogdanm | 15:4892fe388435 | 60 | unsigned int id; // CAN Message ID (11-bit or 29-bit) |
bogdanm | 15:4892fe388435 | 61 | unsigned char data[8]; // CAN Message Data Bytes 0-7 |
bogdanm | 15:4892fe388435 | 62 | }; |
bogdanm | 15:4892fe388435 | 63 | typedef struct CANMsg CANMsg; |
bogdanm | 15:4892fe388435 | 64 | |
emilmont | 17:151ab7482c89 | 65 | static uint32_t can_irq_ids[CAN_NUM] = {0}; |
emilmont | 17:151ab7482c89 | 66 | static can_irq_handler irq_handler; |
emilmont | 17:151ab7482c89 | 67 | |
bogdanm | 15:4892fe388435 | 68 | static uint32_t can_disable(can_t *obj) { |
bogdanm | 15:4892fe388435 | 69 | uint32_t sm = obj->dev->MOD; |
bogdanm | 15:4892fe388435 | 70 | obj->dev->MOD |= 1; |
bogdanm | 15:4892fe388435 | 71 | return sm; |
bogdanm | 15:4892fe388435 | 72 | } |
bogdanm | 15:4892fe388435 | 73 | |
bogdanm | 15:4892fe388435 | 74 | static inline void can_enable(can_t *obj) { |
bogdanm | 15:4892fe388435 | 75 | if (obj->dev->MOD & 1) { |
bogdanm | 15:4892fe388435 | 76 | obj->dev->MOD &= ~(1); |
bogdanm | 15:4892fe388435 | 77 | } |
bogdanm | 15:4892fe388435 | 78 | } |
bogdanm | 15:4892fe388435 | 79 | |
emilmont | 17:151ab7482c89 | 80 | int can_mode(can_t *obj, CanMode mode) |
emilmont | 17:151ab7482c89 | 81 | { |
emilmont | 17:151ab7482c89 | 82 | return 0; // not implemented |
emilmont | 17:151ab7482c89 | 83 | } |
emilmont | 17:151ab7482c89 | 84 | |
mbed_official | 41:e8b66477f5bf | 85 | int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) { |
mbed_official | 41:e8b66477f5bf | 86 | return 0; // not implemented |
mbed_official | 41:e8b66477f5bf | 87 | } |
mbed_official | 41:e8b66477f5bf | 88 | |
emilmont | 17:151ab7482c89 | 89 | static inline void can_irq(uint32_t icr, uint32_t index) { |
emilmont | 17:151ab7482c89 | 90 | uint32_t i; |
emilmont | 17:151ab7482c89 | 91 | |
emilmont | 17:151ab7482c89 | 92 | for(i = 0; i < 8; i++) |
emilmont | 17:151ab7482c89 | 93 | { |
emilmont | 17:151ab7482c89 | 94 | if((can_irq_ids[index] != 0) && (icr & (1 << i))) |
emilmont | 17:151ab7482c89 | 95 | { |
emilmont | 17:151ab7482c89 | 96 | switch (i) { |
emilmont | 17:151ab7482c89 | 97 | case 0: irq_handler(can_irq_ids[index], IRQ_RX); break; |
emilmont | 17:151ab7482c89 | 98 | case 1: irq_handler(can_irq_ids[index], IRQ_TX); break; |
emilmont | 17:151ab7482c89 | 99 | case 2: irq_handler(can_irq_ids[index], IRQ_ERROR); break; |
emilmont | 17:151ab7482c89 | 100 | case 3: irq_handler(can_irq_ids[index], IRQ_OVERRUN); break; |
emilmont | 17:151ab7482c89 | 101 | case 4: irq_handler(can_irq_ids[index], IRQ_WAKEUP); break; |
emilmont | 17:151ab7482c89 | 102 | case 5: irq_handler(can_irq_ids[index], IRQ_PASSIVE); break; |
emilmont | 17:151ab7482c89 | 103 | case 6: irq_handler(can_irq_ids[index], IRQ_ARB); break; |
emilmont | 17:151ab7482c89 | 104 | case 7: irq_handler(can_irq_ids[index], IRQ_BUS); break; |
emilmont | 17:151ab7482c89 | 105 | case 8: irq_handler(can_irq_ids[index], IRQ_READY); break; |
emilmont | 17:151ab7482c89 | 106 | } |
emilmont | 17:151ab7482c89 | 107 | } |
emilmont | 17:151ab7482c89 | 108 | } |
emilmont | 17:151ab7482c89 | 109 | } |
emilmont | 17:151ab7482c89 | 110 | |
emilmont | 17:151ab7482c89 | 111 | // Have to check that the CAN block is active before reading the Interrupt |
emilmont | 17:151ab7482c89 | 112 | // Control Register, or the mbed hangs |
emilmont | 17:151ab7482c89 | 113 | void can_irq_n() { |
emilmont | 17:151ab7482c89 | 114 | uint32_t icr; |
emilmont | 17:151ab7482c89 | 115 | |
emilmont | 17:151ab7482c89 | 116 | if(LPC_SC->PCONP & (1 << 13)) { |
emilmont | 17:151ab7482c89 | 117 | icr = LPC_CAN1->ICR & 0x1FF; |
emilmont | 17:151ab7482c89 | 118 | can_irq(icr, 0); |
emilmont | 17:151ab7482c89 | 119 | } |
emilmont | 17:151ab7482c89 | 120 | |
emilmont | 17:151ab7482c89 | 121 | if(LPC_SC->PCONP & (1 << 14)) { |
emilmont | 17:151ab7482c89 | 122 | icr = LPC_CAN2->ICR & 0x1FF; |
emilmont | 17:151ab7482c89 | 123 | can_irq(icr, 1); |
emilmont | 17:151ab7482c89 | 124 | } |
emilmont | 17:151ab7482c89 | 125 | } |
emilmont | 17:151ab7482c89 | 126 | |
emilmont | 17:151ab7482c89 | 127 | // Register CAN object's irq handler |
emilmont | 17:151ab7482c89 | 128 | void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) { |
emilmont | 17:151ab7482c89 | 129 | irq_handler = handler; |
emilmont | 17:151ab7482c89 | 130 | can_irq_ids[obj->index] = id; |
emilmont | 17:151ab7482c89 | 131 | } |
emilmont | 17:151ab7482c89 | 132 | |
emilmont | 17:151ab7482c89 | 133 | // Unregister CAN object's irq handler |
emilmont | 17:151ab7482c89 | 134 | void can_irq_free(can_t *obj) { |
emilmont | 17:151ab7482c89 | 135 | obj->dev->IER &= ~(1); |
emilmont | 17:151ab7482c89 | 136 | can_irq_ids[obj->index] = 0; |
emilmont | 17:151ab7482c89 | 137 | |
emilmont | 17:151ab7482c89 | 138 | if ((can_irq_ids[0] == 0) && (can_irq_ids[1] == 0)) { |
emilmont | 17:151ab7482c89 | 139 | NVIC_DisableIRQ(CAN_IRQn); |
emilmont | 17:151ab7482c89 | 140 | } |
emilmont | 17:151ab7482c89 | 141 | } |
emilmont | 17:151ab7482c89 | 142 | |
emilmont | 17:151ab7482c89 | 143 | // Clear or set a irq |
emilmont | 17:151ab7482c89 | 144 | void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) { |
emilmont | 17:151ab7482c89 | 145 | uint32_t ier; |
emilmont | 17:151ab7482c89 | 146 | |
emilmont | 17:151ab7482c89 | 147 | switch (type) { |
emilmont | 17:151ab7482c89 | 148 | case IRQ_RX: ier = (1 << 0); break; |
emilmont | 17:151ab7482c89 | 149 | case IRQ_TX: ier = (1 << 1); break; |
emilmont | 17:151ab7482c89 | 150 | case IRQ_ERROR: ier = (1 << 2); break; |
emilmont | 17:151ab7482c89 | 151 | case IRQ_OVERRUN: ier = (1 << 3); break; |
emilmont | 17:151ab7482c89 | 152 | case IRQ_WAKEUP: ier = (1 << 4); break; |
emilmont | 17:151ab7482c89 | 153 | case IRQ_PASSIVE: ier = (1 << 5); break; |
emilmont | 17:151ab7482c89 | 154 | case IRQ_ARB: ier = (1 << 6); break; |
emilmont | 17:151ab7482c89 | 155 | case IRQ_BUS: ier = (1 << 7); break; |
emilmont | 17:151ab7482c89 | 156 | case IRQ_READY: ier = (1 << 8); break; |
emilmont | 17:151ab7482c89 | 157 | default: return; |
emilmont | 17:151ab7482c89 | 158 | } |
emilmont | 17:151ab7482c89 | 159 | |
emilmont | 17:151ab7482c89 | 160 | obj->dev->MOD |= 1; |
emilmont | 17:151ab7482c89 | 161 | if(enable == 0) { |
emilmont | 17:151ab7482c89 | 162 | obj->dev->IER &= ~ier; |
emilmont | 17:151ab7482c89 | 163 | } |
emilmont | 17:151ab7482c89 | 164 | else { |
emilmont | 17:151ab7482c89 | 165 | obj->dev->IER |= ier; |
emilmont | 17:151ab7482c89 | 166 | } |
emilmont | 17:151ab7482c89 | 167 | obj->dev->MOD &= ~(1); |
emilmont | 17:151ab7482c89 | 168 | |
emilmont | 17:151ab7482c89 | 169 | // Enable NVIC if at least 1 interrupt is active |
mbed_official | 29:6ac4027eff2b | 170 | if(((LPC_SC->PCONP & (1 << 13)) && LPC_CAN1->IER) || ((LPC_SC->PCONP & (1 << 14)) && LPC_CAN2->IER)) { |
emilmont | 17:151ab7482c89 | 171 | NVIC_SetVector(CAN_IRQn, (uint32_t) &can_irq_n); |
emilmont | 17:151ab7482c89 | 172 | NVIC_EnableIRQ(CAN_IRQn); |
emilmont | 17:151ab7482c89 | 173 | } |
emilmont | 17:151ab7482c89 | 174 | else { |
emilmont | 17:151ab7482c89 | 175 | NVIC_DisableIRQ(CAN_IRQn); |
emilmont | 17:151ab7482c89 | 176 | } |
emilmont | 17:151ab7482c89 | 177 | } |
emilmont | 17:151ab7482c89 | 178 | |
bogdanm | 15:4892fe388435 | 179 | // This table has the sampling points as close to 75% as possible. The first |
bogdanm | 15:4892fe388435 | 180 | // value is TSEG1, the second TSEG2. |
bogdanm | 15:4892fe388435 | 181 | static const int timing_pts[23][2] = { |
bogdanm | 15:4892fe388435 | 182 | {0x0, 0x0}, // 2, 50% |
bogdanm | 15:4892fe388435 | 183 | {0x1, 0x0}, // 3, 67% |
bogdanm | 15:4892fe388435 | 184 | {0x2, 0x0}, // 4, 75% |
bogdanm | 15:4892fe388435 | 185 | {0x3, 0x0}, // 5, 80% |
bogdanm | 15:4892fe388435 | 186 | {0x3, 0x1}, // 6, 67% |
bogdanm | 15:4892fe388435 | 187 | {0x4, 0x1}, // 7, 71% |
bogdanm | 15:4892fe388435 | 188 | {0x5, 0x1}, // 8, 75% |
bogdanm | 15:4892fe388435 | 189 | {0x6, 0x1}, // 9, 78% |
bogdanm | 15:4892fe388435 | 190 | {0x6, 0x2}, // 10, 70% |
bogdanm | 15:4892fe388435 | 191 | {0x7, 0x2}, // 11, 73% |
bogdanm | 15:4892fe388435 | 192 | {0x8, 0x2}, // 12, 75% |
bogdanm | 15:4892fe388435 | 193 | {0x9, 0x2}, // 13, 77% |
bogdanm | 15:4892fe388435 | 194 | {0x9, 0x3}, // 14, 71% |
bogdanm | 15:4892fe388435 | 195 | {0xA, 0x3}, // 15, 73% |
bogdanm | 15:4892fe388435 | 196 | {0xB, 0x3}, // 16, 75% |
bogdanm | 15:4892fe388435 | 197 | {0xC, 0x3}, // 17, 76% |
bogdanm | 15:4892fe388435 | 198 | {0xD, 0x3}, // 18, 78% |
bogdanm | 15:4892fe388435 | 199 | {0xD, 0x4}, // 19, 74% |
bogdanm | 15:4892fe388435 | 200 | {0xE, 0x4}, // 20, 75% |
bogdanm | 15:4892fe388435 | 201 | {0xF, 0x4}, // 21, 76% |
bogdanm | 15:4892fe388435 | 202 | {0xF, 0x5}, // 22, 73% |
bogdanm | 15:4892fe388435 | 203 | {0xF, 0x6}, // 23, 70% |
bogdanm | 15:4892fe388435 | 204 | {0xF, 0x7}, // 24, 67% |
bogdanm | 15:4892fe388435 | 205 | }; |
bogdanm | 15:4892fe388435 | 206 | |
bogdanm | 15:4892fe388435 | 207 | static unsigned int can_speed(unsigned int sclk, unsigned int pclk, unsigned int cclk, unsigned char psjw) { |
bogdanm | 15:4892fe388435 | 208 | uint32_t btr; |
bogdanm | 15:4892fe388435 | 209 | uint16_t brp = 0; |
bogdanm | 15:4892fe388435 | 210 | uint32_t calcbit; |
bogdanm | 15:4892fe388435 | 211 | uint32_t bitwidth; |
bogdanm | 15:4892fe388435 | 212 | int hit = 0; |
bogdanm | 15:4892fe388435 | 213 | int bits; |
bogdanm | 15:4892fe388435 | 214 | |
bogdanm | 15:4892fe388435 | 215 | bitwidth = sclk / (pclk * cclk); |
bogdanm | 15:4892fe388435 | 216 | |
bogdanm | 15:4892fe388435 | 217 | brp = bitwidth / 0x18; |
bogdanm | 15:4892fe388435 | 218 | while ((!hit) && (brp < bitwidth / 4)) { |
bogdanm | 15:4892fe388435 | 219 | brp++; |
bogdanm | 15:4892fe388435 | 220 | for (bits = 22; bits > 0; bits--) { |
bogdanm | 15:4892fe388435 | 221 | calcbit = (bits + 3) * (brp + 1); |
bogdanm | 15:4892fe388435 | 222 | if (calcbit == bitwidth) { |
bogdanm | 15:4892fe388435 | 223 | hit = 1; |
bogdanm | 15:4892fe388435 | 224 | break; |
bogdanm | 15:4892fe388435 | 225 | } |
bogdanm | 15:4892fe388435 | 226 | } |
bogdanm | 15:4892fe388435 | 227 | } |
bogdanm | 15:4892fe388435 | 228 | |
bogdanm | 15:4892fe388435 | 229 | if (hit) { |
bogdanm | 15:4892fe388435 | 230 | btr = ((timing_pts[bits][1] << 20) & 0x00700000) |
bogdanm | 15:4892fe388435 | 231 | | ((timing_pts[bits][0] << 16) & 0x000F0000) |
bogdanm | 15:4892fe388435 | 232 | | ((psjw << 14) & 0x0000C000) |
bogdanm | 15:4892fe388435 | 233 | | ((brp << 0) & 0x000003FF); |
bogdanm | 15:4892fe388435 | 234 | } else { |
bogdanm | 15:4892fe388435 | 235 | btr = 0xFFFFFFFF; |
bogdanm | 15:4892fe388435 | 236 | } |
bogdanm | 15:4892fe388435 | 237 | |
bogdanm | 15:4892fe388435 | 238 | return btr; |
emilmont | 17:151ab7482c89 | 239 | |
bogdanm | 15:4892fe388435 | 240 | } |
bogdanm | 15:4892fe388435 | 241 | |
bogdanm | 15:4892fe388435 | 242 | void can_init(can_t *obj, PinName rd, PinName td) { |
bogdanm | 15:4892fe388435 | 243 | CANName can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD); |
bogdanm | 15:4892fe388435 | 244 | CANName can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD); |
bogdanm | 15:4892fe388435 | 245 | obj->dev = (LPC_CAN_TypeDef *)pinmap_merge(can_rd, can_td); |
mbed_official | 227:7bd0639b8911 | 246 | MBED_ASSERT((int)obj->dev != NC); |
emilmont | 17:151ab7482c89 | 247 | |
bogdanm | 15:4892fe388435 | 248 | switch ((int)obj->dev) { |
bogdanm | 15:4892fe388435 | 249 | case CAN_1: LPC_SC->PCONP |= 1 << 13; break; |
bogdanm | 15:4892fe388435 | 250 | case CAN_2: LPC_SC->PCONP |= 1 << 14; break; |
bogdanm | 15:4892fe388435 | 251 | } |
emilmont | 17:151ab7482c89 | 252 | |
bogdanm | 15:4892fe388435 | 253 | pinmap_pinout(rd, PinMap_CAN_RD); |
bogdanm | 15:4892fe388435 | 254 | pinmap_pinout(td, PinMap_CAN_TD); |
bogdanm | 15:4892fe388435 | 255 | |
emilmont | 17:151ab7482c89 | 256 | switch ((int)obj->dev) { |
emilmont | 17:151ab7482c89 | 257 | case CAN_1: obj->index = 0; break; |
emilmont | 17:151ab7482c89 | 258 | case CAN_2: obj->index = 1; break; |
emilmont | 17:151ab7482c89 | 259 | } |
emilmont | 17:151ab7482c89 | 260 | |
bogdanm | 15:4892fe388435 | 261 | can_reset(obj); |
bogdanm | 15:4892fe388435 | 262 | obj->dev->IER = 0; // Disable Interrupts |
bogdanm | 15:4892fe388435 | 263 | can_frequency(obj, 100000); |
emilmont | 17:151ab7482c89 | 264 | |
bogdanm | 15:4892fe388435 | 265 | LPC_CANAF->AFMR = ACCF_BYPASS; // Bypass Filter |
bogdanm | 15:4892fe388435 | 266 | } |
bogdanm | 15:4892fe388435 | 267 | |
bogdanm | 15:4892fe388435 | 268 | void can_free(can_t *obj) { |
bogdanm | 15:4892fe388435 | 269 | switch ((int)obj->dev) { |
bogdanm | 15:4892fe388435 | 270 | case CAN_1: LPC_SC->PCONP &= ~(1 << 13); break; |
bogdanm | 15:4892fe388435 | 271 | case CAN_2: LPC_SC->PCONP &= ~(1 << 14); break; |
bogdanm | 15:4892fe388435 | 272 | } |
bogdanm | 15:4892fe388435 | 273 | } |
bogdanm | 15:4892fe388435 | 274 | |
bogdanm | 15:4892fe388435 | 275 | int can_frequency(can_t *obj, int f) { |
bogdanm | 15:4892fe388435 | 276 | int pclk = PeripheralClock; |
emilmont | 17:151ab7482c89 | 277 | |
bogdanm | 15:4892fe388435 | 278 | int btr = can_speed(SystemCoreClock, pclk, (unsigned int)f, 1); |
emilmont | 17:151ab7482c89 | 279 | |
bogdanm | 15:4892fe388435 | 280 | if (btr > 0) { |
bogdanm | 15:4892fe388435 | 281 | uint32_t modmask = can_disable(obj); |
bogdanm | 15:4892fe388435 | 282 | obj->dev->BTR = btr; |
bogdanm | 15:4892fe388435 | 283 | obj->dev->MOD = modmask; |
bogdanm | 15:4892fe388435 | 284 | return 1; |
bogdanm | 15:4892fe388435 | 285 | } else { |
bogdanm | 15:4892fe388435 | 286 | return 0; |
bogdanm | 15:4892fe388435 | 287 | } |
bogdanm | 15:4892fe388435 | 288 | } |
bogdanm | 15:4892fe388435 | 289 | |
bogdanm | 15:4892fe388435 | 290 | int can_write(can_t *obj, CAN_Message msg, int cc) { |
bogdanm | 15:4892fe388435 | 291 | unsigned int CANStatus; |
bogdanm | 15:4892fe388435 | 292 | CANMsg m; |
emilmont | 17:151ab7482c89 | 293 | |
bogdanm | 15:4892fe388435 | 294 | can_enable(obj); |
emilmont | 17:151ab7482c89 | 295 | |
bogdanm | 15:4892fe388435 | 296 | m.id = msg.id ; |
bogdanm | 15:4892fe388435 | 297 | m.dlc = msg.len & 0xF; |
bogdanm | 15:4892fe388435 | 298 | m.rtr = msg.type; |
bogdanm | 15:4892fe388435 | 299 | m.type = msg.format; |
bogdanm | 15:4892fe388435 | 300 | memcpy(m.data, msg.data, msg.len); |
bogdanm | 15:4892fe388435 | 301 | const unsigned int *buf = (const unsigned int *)&m; |
emilmont | 17:151ab7482c89 | 302 | |
bogdanm | 15:4892fe388435 | 303 | CANStatus = obj->dev->SR; |
bogdanm | 15:4892fe388435 | 304 | if (CANStatus & 0x00000004) { |
bogdanm | 15:4892fe388435 | 305 | obj->dev->TFI1 = buf[0] & 0xC00F0000; |
bogdanm | 15:4892fe388435 | 306 | obj->dev->TID1 = buf[1]; |
bogdanm | 15:4892fe388435 | 307 | obj->dev->TDA1 = buf[2]; |
bogdanm | 15:4892fe388435 | 308 | obj->dev->TDB1 = buf[3]; |
bogdanm | 15:4892fe388435 | 309 | if(cc) { |
bogdanm | 15:4892fe388435 | 310 | obj->dev->CMR = 0x30; |
bogdanm | 15:4892fe388435 | 311 | } else { |
bogdanm | 15:4892fe388435 | 312 | obj->dev->CMR = 0x21; |
bogdanm | 15:4892fe388435 | 313 | } |
bogdanm | 15:4892fe388435 | 314 | return 1; |
emilmont | 17:151ab7482c89 | 315 | |
bogdanm | 15:4892fe388435 | 316 | } else if (CANStatus & 0x00000400) { |
bogdanm | 15:4892fe388435 | 317 | obj->dev->TFI2 = buf[0] & 0xC00F0000; |
bogdanm | 15:4892fe388435 | 318 | obj->dev->TID2 = buf[1]; |
bogdanm | 15:4892fe388435 | 319 | obj->dev->TDA2 = buf[2]; |
bogdanm | 15:4892fe388435 | 320 | obj->dev->TDB2 = buf[3]; |
bogdanm | 15:4892fe388435 | 321 | if (cc) { |
bogdanm | 15:4892fe388435 | 322 | obj->dev->CMR = 0x50; |
bogdanm | 15:4892fe388435 | 323 | } else { |
bogdanm | 15:4892fe388435 | 324 | obj->dev->CMR = 0x41; |
bogdanm | 15:4892fe388435 | 325 | } |
bogdanm | 15:4892fe388435 | 326 | return 1; |
emilmont | 17:151ab7482c89 | 327 | |
bogdanm | 15:4892fe388435 | 328 | } else if (CANStatus & 0x00040000) { |
bogdanm | 15:4892fe388435 | 329 | obj->dev->TFI3 = buf[0] & 0xC00F0000; |
bogdanm | 15:4892fe388435 | 330 | obj->dev->TID3 = buf[1]; |
bogdanm | 15:4892fe388435 | 331 | obj->dev->TDA3 = buf[2]; |
bogdanm | 15:4892fe388435 | 332 | obj->dev->TDB3 = buf[3]; |
bogdanm | 15:4892fe388435 | 333 | if (cc) { |
bogdanm | 15:4892fe388435 | 334 | obj->dev->CMR = 0x90; |
bogdanm | 15:4892fe388435 | 335 | } else { |
bogdanm | 15:4892fe388435 | 336 | obj->dev->CMR = 0x81; |
bogdanm | 15:4892fe388435 | 337 | } |
bogdanm | 15:4892fe388435 | 338 | return 1; |
bogdanm | 15:4892fe388435 | 339 | } |
emilmont | 17:151ab7482c89 | 340 | |
bogdanm | 15:4892fe388435 | 341 | return 0; |
bogdanm | 15:4892fe388435 | 342 | } |
bogdanm | 15:4892fe388435 | 343 | |
mbed_official | 41:e8b66477f5bf | 344 | int can_read(can_t *obj, CAN_Message *msg, int handle) { |
bogdanm | 15:4892fe388435 | 345 | CANMsg x; |
bogdanm | 15:4892fe388435 | 346 | unsigned int *i = (unsigned int *)&x; |
emilmont | 17:151ab7482c89 | 347 | |
bogdanm | 15:4892fe388435 | 348 | can_enable(obj); |
emilmont | 17:151ab7482c89 | 349 | |
bogdanm | 15:4892fe388435 | 350 | if (obj->dev->GSR & 0x1) { |
bogdanm | 15:4892fe388435 | 351 | *i++ = obj->dev->RFS; // Frame |
bogdanm | 15:4892fe388435 | 352 | *i++ = obj->dev->RID; // ID |
bogdanm | 15:4892fe388435 | 353 | *i++ = obj->dev->RDA; // Data A |
bogdanm | 15:4892fe388435 | 354 | *i++ = obj->dev->RDB; // Data B |
bogdanm | 15:4892fe388435 | 355 | obj->dev->CMR = 0x04; // release receive buffer |
emilmont | 17:151ab7482c89 | 356 | |
bogdanm | 15:4892fe388435 | 357 | msg->id = x.id; |
bogdanm | 15:4892fe388435 | 358 | msg->len = x.dlc; |
bogdanm | 15:4892fe388435 | 359 | msg->format = (x.type)? CANExtended : CANStandard; |
bogdanm | 15:4892fe388435 | 360 | msg->type = (x.rtr)? CANRemote: CANData; |
bogdanm | 15:4892fe388435 | 361 | memcpy(msg->data,x.data,x.dlc); |
bogdanm | 15:4892fe388435 | 362 | return 1; |
bogdanm | 15:4892fe388435 | 363 | } |
emilmont | 17:151ab7482c89 | 364 | |
bogdanm | 15:4892fe388435 | 365 | return 0; |
bogdanm | 15:4892fe388435 | 366 | } |
bogdanm | 15:4892fe388435 | 367 | |
bogdanm | 15:4892fe388435 | 368 | void can_reset(can_t *obj) { |
bogdanm | 15:4892fe388435 | 369 | can_disable(obj); |
bogdanm | 15:4892fe388435 | 370 | obj->dev->GSR = 0; // Reset error counter when CAN1MOD is in reset |
bogdanm | 15:4892fe388435 | 371 | } |
bogdanm | 15:4892fe388435 | 372 | |
bogdanm | 15:4892fe388435 | 373 | unsigned char can_rderror(can_t *obj) { |
bogdanm | 15:4892fe388435 | 374 | return (obj->dev->GSR >> 16) & 0xFF; |
bogdanm | 15:4892fe388435 | 375 | } |
bogdanm | 15:4892fe388435 | 376 | |
bogdanm | 15:4892fe388435 | 377 | unsigned char can_tderror(can_t *obj) { |
bogdanm | 15:4892fe388435 | 378 | return (obj->dev->GSR >> 24) & 0xFF; |
bogdanm | 15:4892fe388435 | 379 | } |
bogdanm | 15:4892fe388435 | 380 | |
bogdanm | 15:4892fe388435 | 381 | void can_monitor(can_t *obj, int silent) { |
bogdanm | 15:4892fe388435 | 382 | uint32_t mod_mask = can_disable(obj); |
bogdanm | 15:4892fe388435 | 383 | if (silent) { |
bogdanm | 15:4892fe388435 | 384 | obj->dev->MOD |= (1 << 1); |
bogdanm | 15:4892fe388435 | 385 | } else { |
bogdanm | 15:4892fe388435 | 386 | obj->dev->MOD &= ~(1 << 1); |
bogdanm | 15:4892fe388435 | 387 | } |
bogdanm | 15:4892fe388435 | 388 | if (!(mod_mask & 1)) { |
bogdanm | 15:4892fe388435 | 389 | can_enable(obj); |
bogdanm | 15:4892fe388435 | 390 | } |
bogdanm | 15:4892fe388435 | 391 | } |