mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_rcc.h@76:aeb1df146756, 2014-01-27 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Jan 27 14:30:07 2014 +0000
- Revision:
- 76:aeb1df146756
- Child:
- 80:66393a7b209d
Synchronized with git revision a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd
Full URL: https://github.com/mbedmicro/mbed/commit/a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd/
Add NUCLEO_L152RE
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 76:aeb1df146756 | 1 | /** |
mbed_official | 76:aeb1df146756 | 2 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 3 | * @file stm32l1xx_rcc.h |
mbed_official | 76:aeb1df146756 | 4 | * @author MCD Application Team |
mbed_official | 76:aeb1df146756 | 5 | * @version V1.2.0 |
mbed_official | 76:aeb1df146756 | 6 | * @date 22-February-2013 |
mbed_official | 76:aeb1df146756 | 7 | * @brief This file contains all the functions prototypes for the RCC |
mbed_official | 76:aeb1df146756 | 8 | * firmware library. |
mbed_official | 76:aeb1df146756 | 9 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 10 | * @attention |
mbed_official | 76:aeb1df146756 | 11 | * |
mbed_official | 76:aeb1df146756 | 12 | * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> |
mbed_official | 76:aeb1df146756 | 13 | * |
mbed_official | 76:aeb1df146756 | 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
mbed_official | 76:aeb1df146756 | 15 | * You may not use this file except in compliance with the License. |
mbed_official | 76:aeb1df146756 | 16 | * You may obtain a copy of the License at: |
mbed_official | 76:aeb1df146756 | 17 | * |
mbed_official | 76:aeb1df146756 | 18 | * http://www.st.com/software_license_agreement_liberty_v2 |
mbed_official | 76:aeb1df146756 | 19 | * |
mbed_official | 76:aeb1df146756 | 20 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 76:aeb1df146756 | 21 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 76:aeb1df146756 | 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 76:aeb1df146756 | 23 | * See the License for the specific language governing permissions and |
mbed_official | 76:aeb1df146756 | 24 | * limitations under the License. |
mbed_official | 76:aeb1df146756 | 25 | * |
mbed_official | 76:aeb1df146756 | 26 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 27 | */ |
mbed_official | 76:aeb1df146756 | 28 | |
mbed_official | 76:aeb1df146756 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 30 | #ifndef __STM32L1xx_RCC_H |
mbed_official | 76:aeb1df146756 | 31 | #define __STM32L1xx_RCC_H |
mbed_official | 76:aeb1df146756 | 32 | |
mbed_official | 76:aeb1df146756 | 33 | #ifdef __cplusplus |
mbed_official | 76:aeb1df146756 | 34 | extern "C" { |
mbed_official | 76:aeb1df146756 | 35 | #endif |
mbed_official | 76:aeb1df146756 | 36 | |
mbed_official | 76:aeb1df146756 | 37 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 38 | #include "stm32l1xx.h" |
mbed_official | 76:aeb1df146756 | 39 | |
mbed_official | 76:aeb1df146756 | 40 | /** @addtogroup STM32L1xx_StdPeriph_Driver |
mbed_official | 76:aeb1df146756 | 41 | * @{ |
mbed_official | 76:aeb1df146756 | 42 | */ |
mbed_official | 76:aeb1df146756 | 43 | |
mbed_official | 76:aeb1df146756 | 44 | /** @addtogroup RCC |
mbed_official | 76:aeb1df146756 | 45 | * @{ |
mbed_official | 76:aeb1df146756 | 46 | */ |
mbed_official | 76:aeb1df146756 | 47 | |
mbed_official | 76:aeb1df146756 | 48 | /* Exported types ------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 49 | |
mbed_official | 76:aeb1df146756 | 50 | typedef struct |
mbed_official | 76:aeb1df146756 | 51 | { |
mbed_official | 76:aeb1df146756 | 52 | uint32_t SYSCLK_Frequency; |
mbed_official | 76:aeb1df146756 | 53 | uint32_t HCLK_Frequency; |
mbed_official | 76:aeb1df146756 | 54 | uint32_t PCLK1_Frequency; |
mbed_official | 76:aeb1df146756 | 55 | uint32_t PCLK2_Frequency; |
mbed_official | 76:aeb1df146756 | 56 | }RCC_ClocksTypeDef; |
mbed_official | 76:aeb1df146756 | 57 | |
mbed_official | 76:aeb1df146756 | 58 | /* Exported constants --------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 59 | |
mbed_official | 76:aeb1df146756 | 60 | /** @defgroup RCC_Exported_Constants |
mbed_official | 76:aeb1df146756 | 61 | * @{ |
mbed_official | 76:aeb1df146756 | 62 | */ |
mbed_official | 76:aeb1df146756 | 63 | |
mbed_official | 76:aeb1df146756 | 64 | /** @defgroup RCC_HSE_configuration |
mbed_official | 76:aeb1df146756 | 65 | * @{ |
mbed_official | 76:aeb1df146756 | 66 | */ |
mbed_official | 76:aeb1df146756 | 67 | |
mbed_official | 76:aeb1df146756 | 68 | #define RCC_HSE_OFF ((uint8_t)0x00) |
mbed_official | 76:aeb1df146756 | 69 | #define RCC_HSE_ON ((uint8_t)0x01) |
mbed_official | 76:aeb1df146756 | 70 | #define RCC_HSE_Bypass ((uint8_t)0x05) |
mbed_official | 76:aeb1df146756 | 71 | #define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \ |
mbed_official | 76:aeb1df146756 | 72 | ((HSE) == RCC_HSE_Bypass)) |
mbed_official | 76:aeb1df146756 | 73 | |
mbed_official | 76:aeb1df146756 | 74 | /** |
mbed_official | 76:aeb1df146756 | 75 | * @} |
mbed_official | 76:aeb1df146756 | 76 | */ |
mbed_official | 76:aeb1df146756 | 77 | |
mbed_official | 76:aeb1df146756 | 78 | /** @defgroup RCC_MSI_Clock_Range |
mbed_official | 76:aeb1df146756 | 79 | * @{ |
mbed_official | 76:aeb1df146756 | 80 | */ |
mbed_official | 76:aeb1df146756 | 81 | |
mbed_official | 76:aeb1df146756 | 82 | #define RCC_MSIRange_0 RCC_ICSCR_MSIRANGE_0 /*!< MSI = 65.536 KHz */ |
mbed_official | 76:aeb1df146756 | 83 | #define RCC_MSIRange_1 RCC_ICSCR_MSIRANGE_1 /*!< MSI = 131.072 KHz */ |
mbed_official | 76:aeb1df146756 | 84 | #define RCC_MSIRange_2 RCC_ICSCR_MSIRANGE_2 /*!< MSI = 262.144 KHz */ |
mbed_official | 76:aeb1df146756 | 85 | #define RCC_MSIRange_3 RCC_ICSCR_MSIRANGE_3 /*!< MSI = 524.288 KHz */ |
mbed_official | 76:aeb1df146756 | 86 | #define RCC_MSIRange_4 RCC_ICSCR_MSIRANGE_4 /*!< MSI = 1.048 MHz */ |
mbed_official | 76:aeb1df146756 | 87 | #define RCC_MSIRange_5 RCC_ICSCR_MSIRANGE_5 /*!< MSI = 2.097 MHz */ |
mbed_official | 76:aeb1df146756 | 88 | #define RCC_MSIRange_6 RCC_ICSCR_MSIRANGE_6 /*!< MSI = 4.194 MHz */ |
mbed_official | 76:aeb1df146756 | 89 | |
mbed_official | 76:aeb1df146756 | 90 | #define IS_RCC_MSI_CLOCK_RANGE(RANGE) (((RANGE) == RCC_MSIRange_0) || \ |
mbed_official | 76:aeb1df146756 | 91 | ((RANGE) == RCC_MSIRange_1) || \ |
mbed_official | 76:aeb1df146756 | 92 | ((RANGE) == RCC_MSIRange_2) || \ |
mbed_official | 76:aeb1df146756 | 93 | ((RANGE) == RCC_MSIRange_3) || \ |
mbed_official | 76:aeb1df146756 | 94 | ((RANGE) == RCC_MSIRange_4) || \ |
mbed_official | 76:aeb1df146756 | 95 | ((RANGE) == RCC_MSIRange_5) || \ |
mbed_official | 76:aeb1df146756 | 96 | ((RANGE) == RCC_MSIRange_6)) |
mbed_official | 76:aeb1df146756 | 97 | |
mbed_official | 76:aeb1df146756 | 98 | /** |
mbed_official | 76:aeb1df146756 | 99 | * @} |
mbed_official | 76:aeb1df146756 | 100 | */ |
mbed_official | 76:aeb1df146756 | 101 | |
mbed_official | 76:aeb1df146756 | 102 | /** @defgroup RCC_PLL_Clock_Source |
mbed_official | 76:aeb1df146756 | 103 | * @{ |
mbed_official | 76:aeb1df146756 | 104 | */ |
mbed_official | 76:aeb1df146756 | 105 | |
mbed_official | 76:aeb1df146756 | 106 | #define RCC_PLLSource_HSI ((uint8_t)0x00) |
mbed_official | 76:aeb1df146756 | 107 | #define RCC_PLLSource_HSE ((uint8_t)0x01) |
mbed_official | 76:aeb1df146756 | 108 | |
mbed_official | 76:aeb1df146756 | 109 | #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI) || \ |
mbed_official | 76:aeb1df146756 | 110 | ((SOURCE) == RCC_PLLSource_HSE)) |
mbed_official | 76:aeb1df146756 | 111 | /** |
mbed_official | 76:aeb1df146756 | 112 | * @} |
mbed_official | 76:aeb1df146756 | 113 | */ |
mbed_official | 76:aeb1df146756 | 114 | |
mbed_official | 76:aeb1df146756 | 115 | /** @defgroup RCC_PLL_Multiplication_Factor |
mbed_official | 76:aeb1df146756 | 116 | * @{ |
mbed_official | 76:aeb1df146756 | 117 | */ |
mbed_official | 76:aeb1df146756 | 118 | |
mbed_official | 76:aeb1df146756 | 119 | #define RCC_PLLMul_3 ((uint8_t)0x00) |
mbed_official | 76:aeb1df146756 | 120 | #define RCC_PLLMul_4 ((uint8_t)0x04) |
mbed_official | 76:aeb1df146756 | 121 | #define RCC_PLLMul_6 ((uint8_t)0x08) |
mbed_official | 76:aeb1df146756 | 122 | #define RCC_PLLMul_8 ((uint8_t)0x0C) |
mbed_official | 76:aeb1df146756 | 123 | #define RCC_PLLMul_12 ((uint8_t)0x10) |
mbed_official | 76:aeb1df146756 | 124 | #define RCC_PLLMul_16 ((uint8_t)0x14) |
mbed_official | 76:aeb1df146756 | 125 | #define RCC_PLLMul_24 ((uint8_t)0x18) |
mbed_official | 76:aeb1df146756 | 126 | #define RCC_PLLMul_32 ((uint8_t)0x1C) |
mbed_official | 76:aeb1df146756 | 127 | #define RCC_PLLMul_48 ((uint8_t)0x20) |
mbed_official | 76:aeb1df146756 | 128 | |
mbed_official | 76:aeb1df146756 | 129 | |
mbed_official | 76:aeb1df146756 | 130 | #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_3) || ((MUL) == RCC_PLLMul_4) || \ |
mbed_official | 76:aeb1df146756 | 131 | ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_8) || \ |
mbed_official | 76:aeb1df146756 | 132 | ((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_16) || \ |
mbed_official | 76:aeb1df146756 | 133 | ((MUL) == RCC_PLLMul_24) || ((MUL) == RCC_PLLMul_32) || \ |
mbed_official | 76:aeb1df146756 | 134 | ((MUL) == RCC_PLLMul_48)) |
mbed_official | 76:aeb1df146756 | 135 | /** |
mbed_official | 76:aeb1df146756 | 136 | * @} |
mbed_official | 76:aeb1df146756 | 137 | */ |
mbed_official | 76:aeb1df146756 | 138 | |
mbed_official | 76:aeb1df146756 | 139 | /** @defgroup RCC_PLL_Divider_Factor |
mbed_official | 76:aeb1df146756 | 140 | * @{ |
mbed_official | 76:aeb1df146756 | 141 | */ |
mbed_official | 76:aeb1df146756 | 142 | |
mbed_official | 76:aeb1df146756 | 143 | #define RCC_PLLDiv_2 ((uint8_t)0x40) |
mbed_official | 76:aeb1df146756 | 144 | #define RCC_PLLDiv_3 ((uint8_t)0x80) |
mbed_official | 76:aeb1df146756 | 145 | #define RCC_PLLDiv_4 ((uint8_t)0xC0) |
mbed_official | 76:aeb1df146756 | 146 | |
mbed_official | 76:aeb1df146756 | 147 | |
mbed_official | 76:aeb1df146756 | 148 | #define IS_RCC_PLL_DIV(DIV) (((DIV) == RCC_PLLDiv_2) || ((DIV) == RCC_PLLDiv_3) || \ |
mbed_official | 76:aeb1df146756 | 149 | ((DIV) == RCC_PLLDiv_4)) |
mbed_official | 76:aeb1df146756 | 150 | /** |
mbed_official | 76:aeb1df146756 | 151 | * @} |
mbed_official | 76:aeb1df146756 | 152 | */ |
mbed_official | 76:aeb1df146756 | 153 | |
mbed_official | 76:aeb1df146756 | 154 | /** @defgroup RCC_System_Clock_Source |
mbed_official | 76:aeb1df146756 | 155 | * @{ |
mbed_official | 76:aeb1df146756 | 156 | */ |
mbed_official | 76:aeb1df146756 | 157 | |
mbed_official | 76:aeb1df146756 | 158 | #define RCC_SYSCLKSource_MSI RCC_CFGR_SW_MSI |
mbed_official | 76:aeb1df146756 | 159 | #define RCC_SYSCLKSource_HSI RCC_CFGR_SW_HSI |
mbed_official | 76:aeb1df146756 | 160 | #define RCC_SYSCLKSource_HSE RCC_CFGR_SW_HSE |
mbed_official | 76:aeb1df146756 | 161 | #define RCC_SYSCLKSource_PLLCLK RCC_CFGR_SW_PLL |
mbed_official | 76:aeb1df146756 | 162 | #define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_MSI) || \ |
mbed_official | 76:aeb1df146756 | 163 | ((SOURCE) == RCC_SYSCLKSource_HSI) || \ |
mbed_official | 76:aeb1df146756 | 164 | ((SOURCE) == RCC_SYSCLKSource_HSE) || \ |
mbed_official | 76:aeb1df146756 | 165 | ((SOURCE) == RCC_SYSCLKSource_PLLCLK)) |
mbed_official | 76:aeb1df146756 | 166 | /** |
mbed_official | 76:aeb1df146756 | 167 | * @} |
mbed_official | 76:aeb1df146756 | 168 | */ |
mbed_official | 76:aeb1df146756 | 169 | |
mbed_official | 76:aeb1df146756 | 170 | /** @defgroup RCC_AHB_Clock_Source |
mbed_official | 76:aeb1df146756 | 171 | * @{ |
mbed_official | 76:aeb1df146756 | 172 | */ |
mbed_official | 76:aeb1df146756 | 173 | |
mbed_official | 76:aeb1df146756 | 174 | #define RCC_SYSCLK_Div1 RCC_CFGR_HPRE_DIV1 |
mbed_official | 76:aeb1df146756 | 175 | #define RCC_SYSCLK_Div2 RCC_CFGR_HPRE_DIV2 |
mbed_official | 76:aeb1df146756 | 176 | #define RCC_SYSCLK_Div4 RCC_CFGR_HPRE_DIV4 |
mbed_official | 76:aeb1df146756 | 177 | #define RCC_SYSCLK_Div8 RCC_CFGR_HPRE_DIV8 |
mbed_official | 76:aeb1df146756 | 178 | #define RCC_SYSCLK_Div16 RCC_CFGR_HPRE_DIV16 |
mbed_official | 76:aeb1df146756 | 179 | #define RCC_SYSCLK_Div64 RCC_CFGR_HPRE_DIV64 |
mbed_official | 76:aeb1df146756 | 180 | #define RCC_SYSCLK_Div128 RCC_CFGR_HPRE_DIV128 |
mbed_official | 76:aeb1df146756 | 181 | #define RCC_SYSCLK_Div256 RCC_CFGR_HPRE_DIV256 |
mbed_official | 76:aeb1df146756 | 182 | #define RCC_SYSCLK_Div512 RCC_CFGR_HPRE_DIV512 |
mbed_official | 76:aeb1df146756 | 183 | #define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \ |
mbed_official | 76:aeb1df146756 | 184 | ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \ |
mbed_official | 76:aeb1df146756 | 185 | ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \ |
mbed_official | 76:aeb1df146756 | 186 | ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \ |
mbed_official | 76:aeb1df146756 | 187 | ((HCLK) == RCC_SYSCLK_Div512)) |
mbed_official | 76:aeb1df146756 | 188 | /** |
mbed_official | 76:aeb1df146756 | 189 | * @} |
mbed_official | 76:aeb1df146756 | 190 | */ |
mbed_official | 76:aeb1df146756 | 191 | |
mbed_official | 76:aeb1df146756 | 192 | /** @defgroup RCC_APB1_APB2_Clock_Source |
mbed_official | 76:aeb1df146756 | 193 | * @{ |
mbed_official | 76:aeb1df146756 | 194 | */ |
mbed_official | 76:aeb1df146756 | 195 | |
mbed_official | 76:aeb1df146756 | 196 | #define RCC_HCLK_Div1 RCC_CFGR_PPRE1_DIV1 |
mbed_official | 76:aeb1df146756 | 197 | #define RCC_HCLK_Div2 RCC_CFGR_PPRE1_DIV2 |
mbed_official | 76:aeb1df146756 | 198 | #define RCC_HCLK_Div4 RCC_CFGR_PPRE1_DIV4 |
mbed_official | 76:aeb1df146756 | 199 | #define RCC_HCLK_Div8 RCC_CFGR_PPRE1_DIV8 |
mbed_official | 76:aeb1df146756 | 200 | #define RCC_HCLK_Div16 RCC_CFGR_PPRE1_DIV16 |
mbed_official | 76:aeb1df146756 | 201 | #define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \ |
mbed_official | 76:aeb1df146756 | 202 | ((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \ |
mbed_official | 76:aeb1df146756 | 203 | ((PCLK) == RCC_HCLK_Div16)) |
mbed_official | 76:aeb1df146756 | 204 | /** |
mbed_official | 76:aeb1df146756 | 205 | * @} |
mbed_official | 76:aeb1df146756 | 206 | */ |
mbed_official | 76:aeb1df146756 | 207 | |
mbed_official | 76:aeb1df146756 | 208 | |
mbed_official | 76:aeb1df146756 | 209 | /** @defgroup RCC_Interrupt_Source |
mbed_official | 76:aeb1df146756 | 210 | * @{ |
mbed_official | 76:aeb1df146756 | 211 | */ |
mbed_official | 76:aeb1df146756 | 212 | |
mbed_official | 76:aeb1df146756 | 213 | #define RCC_IT_LSIRDY ((uint8_t)0x01) |
mbed_official | 76:aeb1df146756 | 214 | #define RCC_IT_LSERDY ((uint8_t)0x02) |
mbed_official | 76:aeb1df146756 | 215 | #define RCC_IT_HSIRDY ((uint8_t)0x04) |
mbed_official | 76:aeb1df146756 | 216 | #define RCC_IT_HSERDY ((uint8_t)0x08) |
mbed_official | 76:aeb1df146756 | 217 | #define RCC_IT_PLLRDY ((uint8_t)0x10) |
mbed_official | 76:aeb1df146756 | 218 | #define RCC_IT_MSIRDY ((uint8_t)0x20) |
mbed_official | 76:aeb1df146756 | 219 | #define RCC_IT_LSECSS ((uint8_t)0x40) |
mbed_official | 76:aeb1df146756 | 220 | #define RCC_IT_CSS ((uint8_t)0x80) |
mbed_official | 76:aeb1df146756 | 221 | |
mbed_official | 76:aeb1df146756 | 222 | #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00)) |
mbed_official | 76:aeb1df146756 | 223 | |
mbed_official | 76:aeb1df146756 | 224 | #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \ |
mbed_official | 76:aeb1df146756 | 225 | ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \ |
mbed_official | 76:aeb1df146756 | 226 | ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_MSIRDY) || \ |
mbed_official | 76:aeb1df146756 | 227 | ((IT) == RCC_IT_CSS) || ((IT) == RCC_IT_LSECSS)) |
mbed_official | 76:aeb1df146756 | 228 | |
mbed_official | 76:aeb1df146756 | 229 | #define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x00) == 0x00) && ((IT) != 0x00)) |
mbed_official | 76:aeb1df146756 | 230 | |
mbed_official | 76:aeb1df146756 | 231 | /** |
mbed_official | 76:aeb1df146756 | 232 | * @} |
mbed_official | 76:aeb1df146756 | 233 | */ |
mbed_official | 76:aeb1df146756 | 234 | |
mbed_official | 76:aeb1df146756 | 235 | /** @defgroup RCC_LSE_Configuration |
mbed_official | 76:aeb1df146756 | 236 | * @{ |
mbed_official | 76:aeb1df146756 | 237 | */ |
mbed_official | 76:aeb1df146756 | 238 | |
mbed_official | 76:aeb1df146756 | 239 | #define RCC_LSE_OFF ((uint8_t)0x00) |
mbed_official | 76:aeb1df146756 | 240 | #define RCC_LSE_ON ((uint8_t)0x01) |
mbed_official | 76:aeb1df146756 | 241 | #define RCC_LSE_Bypass ((uint8_t)0x05) |
mbed_official | 76:aeb1df146756 | 242 | #define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \ |
mbed_official | 76:aeb1df146756 | 243 | ((LSE) == RCC_LSE_Bypass)) |
mbed_official | 76:aeb1df146756 | 244 | /** |
mbed_official | 76:aeb1df146756 | 245 | * @} |
mbed_official | 76:aeb1df146756 | 246 | */ |
mbed_official | 76:aeb1df146756 | 247 | |
mbed_official | 76:aeb1df146756 | 248 | /** @defgroup RCC_RTC_Clock_Source |
mbed_official | 76:aeb1df146756 | 249 | * @{ |
mbed_official | 76:aeb1df146756 | 250 | */ |
mbed_official | 76:aeb1df146756 | 251 | |
mbed_official | 76:aeb1df146756 | 252 | #define RCC_RTCCLKSource_LSE RCC_CSR_RTCSEL_LSE |
mbed_official | 76:aeb1df146756 | 253 | #define RCC_RTCCLKSource_LSI RCC_CSR_RTCSEL_LSI |
mbed_official | 76:aeb1df146756 | 254 | #define RCC_RTCCLKSource_HSE_Div2 RCC_CSR_RTCSEL_HSE |
mbed_official | 76:aeb1df146756 | 255 | #define RCC_RTCCLKSource_HSE_Div4 ((uint32_t)RCC_CSR_RTCSEL_HSE | RCC_CR_RTCPRE_0) |
mbed_official | 76:aeb1df146756 | 256 | #define RCC_RTCCLKSource_HSE_Div8 ((uint32_t)RCC_CSR_RTCSEL_HSE | RCC_CR_RTCPRE_1) |
mbed_official | 76:aeb1df146756 | 257 | #define RCC_RTCCLKSource_HSE_Div16 ((uint32_t)RCC_CSR_RTCSEL_HSE | RCC_CR_RTCPRE) |
mbed_official | 76:aeb1df146756 | 258 | #define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \ |
mbed_official | 76:aeb1df146756 | 259 | ((SOURCE) == RCC_RTCCLKSource_LSI) || \ |
mbed_official | 76:aeb1df146756 | 260 | ((SOURCE) == RCC_RTCCLKSource_HSE_Div2) || \ |
mbed_official | 76:aeb1df146756 | 261 | ((SOURCE) == RCC_RTCCLKSource_HSE_Div4) || \ |
mbed_official | 76:aeb1df146756 | 262 | ((SOURCE) == RCC_RTCCLKSource_HSE_Div8) || \ |
mbed_official | 76:aeb1df146756 | 263 | ((SOURCE) == RCC_RTCCLKSource_HSE_Div16)) |
mbed_official | 76:aeb1df146756 | 264 | /** |
mbed_official | 76:aeb1df146756 | 265 | * @} |
mbed_official | 76:aeb1df146756 | 266 | */ |
mbed_official | 76:aeb1df146756 | 267 | |
mbed_official | 76:aeb1df146756 | 268 | /** @defgroup RCC_AHB_Peripherals |
mbed_official | 76:aeb1df146756 | 269 | * @{ |
mbed_official | 76:aeb1df146756 | 270 | */ |
mbed_official | 76:aeb1df146756 | 271 | |
mbed_official | 76:aeb1df146756 | 272 | #define RCC_AHBPeriph_GPIOA RCC_AHBENR_GPIOAEN |
mbed_official | 76:aeb1df146756 | 273 | #define RCC_AHBPeriph_GPIOB RCC_AHBENR_GPIOBEN |
mbed_official | 76:aeb1df146756 | 274 | #define RCC_AHBPeriph_GPIOC RCC_AHBENR_GPIOCEN |
mbed_official | 76:aeb1df146756 | 275 | #define RCC_AHBPeriph_GPIOD RCC_AHBENR_GPIODEN |
mbed_official | 76:aeb1df146756 | 276 | #define RCC_AHBPeriph_GPIOE RCC_AHBENR_GPIOEEN |
mbed_official | 76:aeb1df146756 | 277 | #define RCC_AHBPeriph_GPIOH RCC_AHBENR_GPIOHEN |
mbed_official | 76:aeb1df146756 | 278 | #define RCC_AHBPeriph_GPIOF RCC_AHBENR_GPIOFEN |
mbed_official | 76:aeb1df146756 | 279 | #define RCC_AHBPeriph_GPIOG RCC_AHBENR_GPIOGEN |
mbed_official | 76:aeb1df146756 | 280 | #define RCC_AHBPeriph_CRC RCC_AHBENR_CRCEN |
mbed_official | 76:aeb1df146756 | 281 | #define RCC_AHBPeriph_FLITF RCC_AHBENR_FLITFEN |
mbed_official | 76:aeb1df146756 | 282 | #define RCC_AHBPeriph_SRAM RCC_AHBLPENR_SRAMLPEN |
mbed_official | 76:aeb1df146756 | 283 | #define RCC_AHBPeriph_DMA1 RCC_AHBENR_DMA1EN |
mbed_official | 76:aeb1df146756 | 284 | #define RCC_AHBPeriph_DMA2 RCC_AHBENR_DMA2EN |
mbed_official | 76:aeb1df146756 | 285 | #define RCC_AHBPeriph_AES RCC_AHBENR_AESEN |
mbed_official | 76:aeb1df146756 | 286 | #define RCC_AHBPeriph_FSMC RCC_AHBENR_FSMCEN |
mbed_official | 76:aeb1df146756 | 287 | |
mbed_official | 76:aeb1df146756 | 288 | #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xB4FF6F00) == 0x00) && ((PERIPH) != 0x00)) |
mbed_official | 76:aeb1df146756 | 289 | #define IS_RCC_AHB_LPMODE_PERIPH(PERIPH) ((((PERIPH) & 0xB4FF6F00) == 0x00) && ((PERIPH) != 0x00)) |
mbed_official | 76:aeb1df146756 | 290 | |
mbed_official | 76:aeb1df146756 | 291 | /** |
mbed_official | 76:aeb1df146756 | 292 | * @} |
mbed_official | 76:aeb1df146756 | 293 | */ |
mbed_official | 76:aeb1df146756 | 294 | |
mbed_official | 76:aeb1df146756 | 295 | /** @defgroup RCC_APB2_Peripherals |
mbed_official | 76:aeb1df146756 | 296 | * @{ |
mbed_official | 76:aeb1df146756 | 297 | */ |
mbed_official | 76:aeb1df146756 | 298 | |
mbed_official | 76:aeb1df146756 | 299 | #define RCC_APB2Periph_SYSCFG RCC_APB2ENR_SYSCFGEN |
mbed_official | 76:aeb1df146756 | 300 | #define RCC_APB2Periph_TIM9 RCC_APB2ENR_TIM9EN |
mbed_official | 76:aeb1df146756 | 301 | #define RCC_APB2Periph_TIM10 RCC_APB2ENR_TIM10EN |
mbed_official | 76:aeb1df146756 | 302 | #define RCC_APB2Periph_TIM11 RCC_APB2ENR_TIM11EN |
mbed_official | 76:aeb1df146756 | 303 | #define RCC_APB2Periph_ADC1 RCC_APB2ENR_ADC1EN |
mbed_official | 76:aeb1df146756 | 304 | #define RCC_APB2Periph_SDIO RCC_APB2ENR_SDIOEN |
mbed_official | 76:aeb1df146756 | 305 | #define RCC_APB2Periph_SPI1 RCC_APB2ENR_SPI1EN |
mbed_official | 76:aeb1df146756 | 306 | #define RCC_APB2Periph_USART1 RCC_APB2ENR_USART1EN |
mbed_official | 76:aeb1df146756 | 307 | |
mbed_official | 76:aeb1df146756 | 308 | #define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFA5E2) == 0x00) && ((PERIPH) != 0x00)) |
mbed_official | 76:aeb1df146756 | 309 | /** |
mbed_official | 76:aeb1df146756 | 310 | * @} |
mbed_official | 76:aeb1df146756 | 311 | */ |
mbed_official | 76:aeb1df146756 | 312 | |
mbed_official | 76:aeb1df146756 | 313 | /** @defgroup RCC_APB1_Peripherals |
mbed_official | 76:aeb1df146756 | 314 | * @{ |
mbed_official | 76:aeb1df146756 | 315 | */ |
mbed_official | 76:aeb1df146756 | 316 | |
mbed_official | 76:aeb1df146756 | 317 | #define RCC_APB1Periph_TIM2 RCC_APB1ENR_TIM2EN |
mbed_official | 76:aeb1df146756 | 318 | #define RCC_APB1Periph_TIM3 RCC_APB1ENR_TIM3EN |
mbed_official | 76:aeb1df146756 | 319 | #define RCC_APB1Periph_TIM4 RCC_APB1ENR_TIM4EN |
mbed_official | 76:aeb1df146756 | 320 | #define RCC_APB1Periph_TIM5 RCC_APB1ENR_TIM5EN |
mbed_official | 76:aeb1df146756 | 321 | #define RCC_APB1Periph_TIM6 RCC_APB1ENR_TIM6EN |
mbed_official | 76:aeb1df146756 | 322 | #define RCC_APB1Periph_TIM7 RCC_APB1ENR_TIM7EN |
mbed_official | 76:aeb1df146756 | 323 | #define RCC_APB1Periph_LCD RCC_APB1ENR_LCDEN |
mbed_official | 76:aeb1df146756 | 324 | #define RCC_APB1Periph_WWDG RCC_APB1ENR_WWDGEN |
mbed_official | 76:aeb1df146756 | 325 | #define RCC_APB1Periph_SPI2 RCC_APB1ENR_SPI2EN |
mbed_official | 76:aeb1df146756 | 326 | #define RCC_APB1Periph_SPI3 RCC_APB1ENR_SPI3EN |
mbed_official | 76:aeb1df146756 | 327 | #define RCC_APB1Periph_USART2 RCC_APB1ENR_USART2EN |
mbed_official | 76:aeb1df146756 | 328 | #define RCC_APB1Periph_USART3 RCC_APB1ENR_USART3EN |
mbed_official | 76:aeb1df146756 | 329 | #define RCC_APB1Periph_UART4 RCC_APB1ENR_UART4EN |
mbed_official | 76:aeb1df146756 | 330 | #define RCC_APB1Periph_UART5 RCC_APB1ENR_UART5EN |
mbed_official | 76:aeb1df146756 | 331 | #define RCC_APB1Periph_I2C1 RCC_APB1ENR_I2C1EN |
mbed_official | 76:aeb1df146756 | 332 | #define RCC_APB1Periph_I2C2 RCC_APB1ENR_I2C2EN |
mbed_official | 76:aeb1df146756 | 333 | #define RCC_APB1Periph_USB RCC_APB1ENR_USBEN |
mbed_official | 76:aeb1df146756 | 334 | #define RCC_APB1Periph_PWR RCC_APB1ENR_PWREN |
mbed_official | 76:aeb1df146756 | 335 | #define RCC_APB1Periph_DAC RCC_APB1ENR_DACEN |
mbed_official | 76:aeb1df146756 | 336 | #define RCC_APB1Periph_COMP RCC_APB1ENR_COMPEN |
mbed_official | 76:aeb1df146756 | 337 | |
mbed_official | 76:aeb1df146756 | 338 | |
mbed_official | 76:aeb1df146756 | 339 | #define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x4F0135C0) == 0x00) && ((PERIPH) != 0x00)) |
mbed_official | 76:aeb1df146756 | 340 | /** |
mbed_official | 76:aeb1df146756 | 341 | * @} |
mbed_official | 76:aeb1df146756 | 342 | */ |
mbed_official | 76:aeb1df146756 | 343 | |
mbed_official | 76:aeb1df146756 | 344 | /** @defgroup RCC_MCO_Clock_Source |
mbed_official | 76:aeb1df146756 | 345 | * @{ |
mbed_official | 76:aeb1df146756 | 346 | */ |
mbed_official | 76:aeb1df146756 | 347 | |
mbed_official | 76:aeb1df146756 | 348 | #define RCC_MCOSource_NoClock ((uint8_t)0x00) |
mbed_official | 76:aeb1df146756 | 349 | #define RCC_MCOSource_SYSCLK ((uint8_t)0x01) |
mbed_official | 76:aeb1df146756 | 350 | #define RCC_MCOSource_HSI ((uint8_t)0x02) |
mbed_official | 76:aeb1df146756 | 351 | #define RCC_MCOSource_MSI ((uint8_t)0x03) |
mbed_official | 76:aeb1df146756 | 352 | #define RCC_MCOSource_HSE ((uint8_t)0x04) |
mbed_official | 76:aeb1df146756 | 353 | #define RCC_MCOSource_PLLCLK ((uint8_t)0x05) |
mbed_official | 76:aeb1df146756 | 354 | #define RCC_MCOSource_LSI ((uint8_t)0x06) |
mbed_official | 76:aeb1df146756 | 355 | #define RCC_MCOSource_LSE ((uint8_t)0x07) |
mbed_official | 76:aeb1df146756 | 356 | |
mbed_official | 76:aeb1df146756 | 357 | #define IS_RCC_MCO_SOURCE(SOURCE) (((SOURCE) == RCC_MCOSource_NoClock) || ((SOURCE) == RCC_MCOSource_SYSCLK) || \ |
mbed_official | 76:aeb1df146756 | 358 | ((SOURCE) == RCC_MCOSource_HSI) || ((SOURCE) == RCC_MCOSource_MSI) || \ |
mbed_official | 76:aeb1df146756 | 359 | ((SOURCE) == RCC_MCOSource_HSE) || ((SOURCE) == RCC_MCOSource_PLLCLK) || \ |
mbed_official | 76:aeb1df146756 | 360 | ((SOURCE) == RCC_MCOSource_LSI) || ((SOURCE) == RCC_MCOSource_LSE)) |
mbed_official | 76:aeb1df146756 | 361 | /** |
mbed_official | 76:aeb1df146756 | 362 | * @} |
mbed_official | 76:aeb1df146756 | 363 | */ |
mbed_official | 76:aeb1df146756 | 364 | |
mbed_official | 76:aeb1df146756 | 365 | /** @defgroup RCC_MCO_Output_Divider |
mbed_official | 76:aeb1df146756 | 366 | * @{ |
mbed_official | 76:aeb1df146756 | 367 | */ |
mbed_official | 76:aeb1df146756 | 368 | |
mbed_official | 76:aeb1df146756 | 369 | #define RCC_MCODiv_1 ((uint8_t)0x00) |
mbed_official | 76:aeb1df146756 | 370 | #define RCC_MCODiv_2 ((uint8_t)0x10) |
mbed_official | 76:aeb1df146756 | 371 | #define RCC_MCODiv_4 ((uint8_t)0x20) |
mbed_official | 76:aeb1df146756 | 372 | #define RCC_MCODiv_8 ((uint8_t)0x30) |
mbed_official | 76:aeb1df146756 | 373 | #define RCC_MCODiv_16 ((uint8_t)0x40) |
mbed_official | 76:aeb1df146756 | 374 | |
mbed_official | 76:aeb1df146756 | 375 | #define IS_RCC_MCO_DIV(DIV) (((DIV) == RCC_MCODiv_1) || ((DIV) == RCC_MCODiv_2) || \ |
mbed_official | 76:aeb1df146756 | 376 | ((DIV) == RCC_MCODiv_4) || ((DIV) == RCC_MCODiv_8) || \ |
mbed_official | 76:aeb1df146756 | 377 | ((DIV) == RCC_MCODiv_16)) |
mbed_official | 76:aeb1df146756 | 378 | /** |
mbed_official | 76:aeb1df146756 | 379 | * @} |
mbed_official | 76:aeb1df146756 | 380 | */ |
mbed_official | 76:aeb1df146756 | 381 | |
mbed_official | 76:aeb1df146756 | 382 | /** @defgroup RCC_Flag |
mbed_official | 76:aeb1df146756 | 383 | * @{ |
mbed_official | 76:aeb1df146756 | 384 | */ |
mbed_official | 76:aeb1df146756 | 385 | |
mbed_official | 76:aeb1df146756 | 386 | #define RCC_FLAG_HSIRDY ((uint8_t)0x21) |
mbed_official | 76:aeb1df146756 | 387 | #define RCC_FLAG_MSIRDY ((uint8_t)0x29) |
mbed_official | 76:aeb1df146756 | 388 | #define RCC_FLAG_HSERDY ((uint8_t)0x31) |
mbed_official | 76:aeb1df146756 | 389 | #define RCC_FLAG_PLLRDY ((uint8_t)0x39) |
mbed_official | 76:aeb1df146756 | 390 | #define RCC_FLAG_LSERDY ((uint8_t)0x49) |
mbed_official | 76:aeb1df146756 | 391 | #define RCC_FLAG_LSECSS ((uint8_t)0x4A) |
mbed_official | 76:aeb1df146756 | 392 | #define RCC_FLAG_LSIRDY ((uint8_t)0x41) |
mbed_official | 76:aeb1df146756 | 393 | #define RCC_FLAG_OBLRST ((uint8_t)0x59) |
mbed_official | 76:aeb1df146756 | 394 | #define RCC_FLAG_PINRST ((uint8_t)0x5A) |
mbed_official | 76:aeb1df146756 | 395 | #define RCC_FLAG_PORRST ((uint8_t)0x5B) |
mbed_official | 76:aeb1df146756 | 396 | #define RCC_FLAG_SFTRST ((uint8_t)0x5C) |
mbed_official | 76:aeb1df146756 | 397 | #define RCC_FLAG_IWDGRST ((uint8_t)0x5D) |
mbed_official | 76:aeb1df146756 | 398 | #define RCC_FLAG_WWDGRST ((uint8_t)0x5E) |
mbed_official | 76:aeb1df146756 | 399 | #define RCC_FLAG_LPWRRST ((uint8_t)0x5F) |
mbed_official | 76:aeb1df146756 | 400 | |
mbed_official | 76:aeb1df146756 | 401 | #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \ |
mbed_official | 76:aeb1df146756 | 402 | ((FLAG) == RCC_FLAG_MSIRDY) || ((FLAG) == RCC_FLAG_PLLRDY) || \ |
mbed_official | 76:aeb1df146756 | 403 | ((FLAG) == RCC_FLAG_LSERDY) || ((FLAG) == RCC_FLAG_LSIRDY) || \ |
mbed_official | 76:aeb1df146756 | 404 | ((FLAG) == RCC_FLAG_PINRST) || ((FLAG) == RCC_FLAG_PORRST) || \ |
mbed_official | 76:aeb1df146756 | 405 | ((FLAG) == RCC_FLAG_SFTRST) || ((FLAG) == RCC_FLAG_IWDGRST)|| \ |
mbed_official | 76:aeb1df146756 | 406 | ((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LPWRRST)|| \ |
mbed_official | 76:aeb1df146756 | 407 | ((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LSECSS)) |
mbed_official | 76:aeb1df146756 | 408 | |
mbed_official | 76:aeb1df146756 | 409 | #define IS_RCC_HSI_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F) |
mbed_official | 76:aeb1df146756 | 410 | #define IS_RCC_MSI_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x3F) |
mbed_official | 76:aeb1df146756 | 411 | |
mbed_official | 76:aeb1df146756 | 412 | /** |
mbed_official | 76:aeb1df146756 | 413 | * @} |
mbed_official | 76:aeb1df146756 | 414 | */ |
mbed_official | 76:aeb1df146756 | 415 | |
mbed_official | 76:aeb1df146756 | 416 | /** |
mbed_official | 76:aeb1df146756 | 417 | * @} |
mbed_official | 76:aeb1df146756 | 418 | */ |
mbed_official | 76:aeb1df146756 | 419 | |
mbed_official | 76:aeb1df146756 | 420 | /* Exported macro ------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 421 | /* Exported functions ------------------------------------------------------- */ |
mbed_official | 76:aeb1df146756 | 422 | |
mbed_official | 76:aeb1df146756 | 423 | /* Function used to set the RCC clock configuration to the default reset state */ |
mbed_official | 76:aeb1df146756 | 424 | void RCC_DeInit(void); |
mbed_official | 76:aeb1df146756 | 425 | |
mbed_official | 76:aeb1df146756 | 426 | /* Internal/external clocks, PLL, CSS and MCO configuration functions *********/ |
mbed_official | 76:aeb1df146756 | 427 | void RCC_HSEConfig(uint8_t RCC_HSE); |
mbed_official | 76:aeb1df146756 | 428 | ErrorStatus RCC_WaitForHSEStartUp(void); |
mbed_official | 76:aeb1df146756 | 429 | void RCC_MSIRangeConfig(uint32_t RCC_MSIRange); |
mbed_official | 76:aeb1df146756 | 430 | void RCC_AdjustMSICalibrationValue(uint8_t MSICalibrationValue); |
mbed_official | 76:aeb1df146756 | 431 | void RCC_MSICmd(FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 432 | void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue); |
mbed_official | 76:aeb1df146756 | 433 | void RCC_HSICmd(FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 434 | void RCC_LSEConfig(uint8_t RCC_LSE); |
mbed_official | 76:aeb1df146756 | 435 | void RCC_LSICmd(FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 436 | void RCC_PLLConfig(uint8_t RCC_PLLSource, uint8_t RCC_PLLMul, uint8_t RCC_PLLDiv); |
mbed_official | 76:aeb1df146756 | 437 | void RCC_PLLCmd(FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 438 | void RCC_ClockSecuritySystemCmd(FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 439 | void RCC_LSEClockSecuritySystemCmd(FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 440 | void RCC_MCOConfig(uint8_t RCC_MCOSource, uint8_t RCC_MCODiv); |
mbed_official | 76:aeb1df146756 | 441 | |
mbed_official | 76:aeb1df146756 | 442 | /* System, AHB and APB busses clocks configuration functions ******************/ |
mbed_official | 76:aeb1df146756 | 443 | void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource); |
mbed_official | 76:aeb1df146756 | 444 | uint8_t RCC_GetSYSCLKSource(void); |
mbed_official | 76:aeb1df146756 | 445 | void RCC_HCLKConfig(uint32_t RCC_SYSCLK); |
mbed_official | 76:aeb1df146756 | 446 | void RCC_PCLK1Config(uint32_t RCC_HCLK); |
mbed_official | 76:aeb1df146756 | 447 | void RCC_PCLK2Config(uint32_t RCC_HCLK); |
mbed_official | 76:aeb1df146756 | 448 | void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks); |
mbed_official | 76:aeb1df146756 | 449 | |
mbed_official | 76:aeb1df146756 | 450 | /* Peripheral clocks configuration functions **********************************/ |
mbed_official | 76:aeb1df146756 | 451 | void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource); |
mbed_official | 76:aeb1df146756 | 452 | void RCC_RTCCLKCmd(FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 453 | void RCC_RTCResetCmd(FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 454 | |
mbed_official | 76:aeb1df146756 | 455 | void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 456 | void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 457 | void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 458 | |
mbed_official | 76:aeb1df146756 | 459 | void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 460 | void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 461 | void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 462 | |
mbed_official | 76:aeb1df146756 | 463 | void RCC_AHBPeriphClockLPModeCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 464 | void RCC_APB2PeriphClockLPModeCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 465 | void RCC_APB1PeriphClockLPModeCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 466 | |
mbed_official | 76:aeb1df146756 | 467 | /* Interrupts and flags management functions **********************************/ |
mbed_official | 76:aeb1df146756 | 468 | void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 469 | FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG); |
mbed_official | 76:aeb1df146756 | 470 | void RCC_ClearFlag(void); |
mbed_official | 76:aeb1df146756 | 471 | ITStatus RCC_GetITStatus(uint8_t RCC_IT); |
mbed_official | 76:aeb1df146756 | 472 | void RCC_ClearITPendingBit(uint8_t RCC_IT); |
mbed_official | 76:aeb1df146756 | 473 | |
mbed_official | 76:aeb1df146756 | 474 | #ifdef __cplusplus |
mbed_official | 76:aeb1df146756 | 475 | } |
mbed_official | 76:aeb1df146756 | 476 | #endif |
mbed_official | 76:aeb1df146756 | 477 | |
mbed_official | 76:aeb1df146756 | 478 | #endif /* __STM32L1xx_RCC_H */ |
mbed_official | 76:aeb1df146756 | 479 | |
mbed_official | 76:aeb1df146756 | 480 | /** |
mbed_official | 76:aeb1df146756 | 481 | * @} |
mbed_official | 76:aeb1df146756 | 482 | */ |
mbed_official | 76:aeb1df146756 | 483 | |
mbed_official | 76:aeb1df146756 | 484 | /** |
mbed_official | 76:aeb1df146756 | 485 | * @} |
mbed_official | 76:aeb1df146756 | 486 | */ |
mbed_official | 76:aeb1df146756 | 487 | |
mbed_official | 76:aeb1df146756 | 488 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |