mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_L053R8/stm32l0xx_hal_smbus.c@181:a4cbdfbbd2f4, 2014-05-07 (annotated)
- Committer:
- mbed_official
- Date:
- Wed May 07 13:15:08 2014 +0100
- Revision:
- 181:a4cbdfbbd2f4
Synchronized with git revision 7751e759576c6fd68deccb81ea82bac19ed41745
Full URL: https://github.com/mbedmicro/mbed/commit/7751e759576c6fd68deccb81ea82bac19ed41745/
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 181:a4cbdfbbd2f4 | 1 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 2 | ****************************************************************************** |
mbed_official | 181:a4cbdfbbd2f4 | 3 | * @file stm32l0xx_hal_smbus.c |
mbed_official | 181:a4cbdfbbd2f4 | 4 | * @author MCD Application Team |
mbed_official | 181:a4cbdfbbd2f4 | 5 | * @version V1.0.0 |
mbed_official | 181:a4cbdfbbd2f4 | 6 | * @date 22-April-2014 |
mbed_official | 181:a4cbdfbbd2f4 | 7 | * @brief SMBUS HAL module driver. |
mbed_official | 181:a4cbdfbbd2f4 | 8 | * |
mbed_official | 181:a4cbdfbbd2f4 | 9 | * This file provides firmware functions to manage the following |
mbed_official | 181:a4cbdfbbd2f4 | 10 | * functionalities of the System Management Bus (SMBus) peripheral, |
mbed_official | 181:a4cbdfbbd2f4 | 11 | * based on I2C principales of operation : |
mbed_official | 181:a4cbdfbbd2f4 | 12 | * + Initialization/de-initialization functions |
mbed_official | 181:a4cbdfbbd2f4 | 13 | * + I/O operation functions |
mbed_official | 181:a4cbdfbbd2f4 | 14 | * + Peripheral Control functions |
mbed_official | 181:a4cbdfbbd2f4 | 15 | * + Peripheral State functions |
mbed_official | 181:a4cbdfbbd2f4 | 16 | * |
mbed_official | 181:a4cbdfbbd2f4 | 17 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 18 | ============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 19 | ##### How to use this driver ##### |
mbed_official | 181:a4cbdfbbd2f4 | 20 | ============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 21 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 22 | The SMBUS HAL driver can be used as follows: |
mbed_official | 181:a4cbdfbbd2f4 | 23 | |
mbed_official | 181:a4cbdfbbd2f4 | 24 | (#) Declare a SMBUS_HandleTypeDef handle structure, for example: |
mbed_official | 181:a4cbdfbbd2f4 | 25 | SMBUS_HandleTypeDef hsmbus; |
mbed_official | 181:a4cbdfbbd2f4 | 26 | |
mbed_official | 181:a4cbdfbbd2f4 | 27 | (#)Initialize the SMBUS low level resources by implement the HAL_SMBUS_MspInit ()API: |
mbed_official | 181:a4cbdfbbd2f4 | 28 | (##) Enable the SMBUSx interface clock |
mbed_official | 181:a4cbdfbbd2f4 | 29 | (##) SMBUS pins configuration |
mbed_official | 181:a4cbdfbbd2f4 | 30 | (+) Enable the clock for the SMBUS GPIOs |
mbed_official | 181:a4cbdfbbd2f4 | 31 | (+) Configure SMBUS pins as alternate function open-drain |
mbed_official | 181:a4cbdfbbd2f4 | 32 | (##) NVIC configuration if you need to use interrupt process |
mbed_official | 181:a4cbdfbbd2f4 | 33 | (+) Configure the SMBUSx interrupt priority |
mbed_official | 181:a4cbdfbbd2f4 | 34 | (+) Enable the NVIC SMBUS IRQ Channel |
mbed_official | 181:a4cbdfbbd2f4 | 35 | |
mbed_official | 181:a4cbdfbbd2f4 | 36 | (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Adressing Mode, |
mbed_official | 181:a4cbdfbbd2f4 | 37 | Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode, |
mbed_official | 181:a4cbdfbbd2f4 | 38 | Peripheral mode and Packet Error Check mode in the hsmbus Init structure. |
mbed_official | 181:a4cbdfbbd2f4 | 39 | |
mbed_official | 181:a4cbdfbbd2f4 | 40 | (#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API: |
mbed_official | 181:a4cbdfbbd2f4 | 41 | (+) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
mbed_official | 181:a4cbdfbbd2f4 | 42 | by calling the customed HAL_SMBUS_MspInit(&hsmbus) API. |
mbed_official | 181:a4cbdfbbd2f4 | 43 | |
mbed_official | 181:a4cbdfbbd2f4 | 44 | (#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady() |
mbed_official | 181:a4cbdfbbd2f4 | 45 | |
mbed_official | 181:a4cbdfbbd2f4 | 46 | (#) For SMBUS IO operations, only one mode of operations is available within this driver : |
mbed_official | 181:a4cbdfbbd2f4 | 47 | |
mbed_official | 181:a4cbdfbbd2f4 | 48 | *** Interrupt mode IO operation *** |
mbed_official | 181:a4cbdfbbd2f4 | 49 | =================================== |
mbed_official | 181:a4cbdfbbd2f4 | 50 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 51 | (+) Transmit in master/host SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Master_Transmit_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 52 | (++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 53 | add his own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 54 | (+) Receive in master/host SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Master_Receive_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 55 | (++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 56 | add his own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 57 | (+) Abort a master/host SMBUS process commnunication with Interrupt using HAL_SMBUS_Master_Abort_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 58 | (++) The associated previous transfer callback is called at the end of abort process |
mbed_official | 181:a4cbdfbbd2f4 | 59 | (++) mean HAL_SMBUS_MasterTxCpltCallback in case of previous state was master transmit |
mbed_official | 181:a4cbdfbbd2f4 | 60 | (++) mean HAL_SMBUS_MasterRxCpltCallback in case of previous state was master receive |
mbed_official | 181:a4cbdfbbd2f4 | 61 | (+) Enable the Address listen mode in slave/device SMBUS mode using HAL_SMBUS_Slave_Listen_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 62 | (++) When address slave/device SMBUS match, HAL_SMBUS_SlaveAddrCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 63 | add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read). |
mbed_official | 181:a4cbdfbbd2f4 | 64 | (++) At Listen mode end HAL_SMBUS_SlaveListenCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 65 | add his own code by customization of function pointer HAL_SMBUS_SlaveListenCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 66 | (+) Transmit in slave/device SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Slave_Transmit_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 67 | (++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 68 | add his own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 69 | (+) Receive in slave/device SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Slave_Receive_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 70 | (++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 71 | add his own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 72 | (+) Enable/Disable the SMBUS alert mode using HAL_SMBUS_EnableAlert_IT() HAL_SMBUS_DisableAlert_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 73 | (++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 74 | add his own code by customization of function pointer HAL_SMBUS_ErrorCallback |
mbed_official | 181:a4cbdfbbd2f4 | 75 | to check the Alert Error Code using function HAL_SMBUS_GetError() |
mbed_official | 181:a4cbdfbbd2f4 | 76 | (+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError() |
mbed_official | 181:a4cbdfbbd2f4 | 77 | (+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 78 | add his own code by customization of function pointer HAL_SMBUS_ErrorCallback |
mbed_official | 181:a4cbdfbbd2f4 | 79 | to check the Error Code using function HAL_SMBUS_GetError() |
mbed_official | 181:a4cbdfbbd2f4 | 80 | |
mbed_official | 181:a4cbdfbbd2f4 | 81 | *** SMBUS HAL driver macros list *** |
mbed_official | 181:a4cbdfbbd2f4 | 82 | ================================== |
mbed_official | 181:a4cbdfbbd2f4 | 83 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 84 | Below the list of most used macros in SMBUS HAL driver. |
mbed_official | 181:a4cbdfbbd2f4 | 85 | |
mbed_official | 181:a4cbdfbbd2f4 | 86 | (+) __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral |
mbed_official | 181:a4cbdfbbd2f4 | 87 | (+) __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral |
mbed_official | 181:a4cbdfbbd2f4 | 88 | (+) __HAL_SMBUS_GET_FLAG : Checks whether the specified SMBUS flag is set or not |
mbed_official | 181:a4cbdfbbd2f4 | 89 | (+) __HAL_SMBUS_CLEAR_FLAG : Clears the specified SMBUS pending flag |
mbed_official | 181:a4cbdfbbd2f4 | 90 | (+) __HAL_SMBUS_ENABLE_IT: Enables the specified SMBUS interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 91 | (+) __HAL_SMBUS_DISABLE_IT: Disables the specified SMBUS interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 92 | |
mbed_official | 181:a4cbdfbbd2f4 | 93 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 94 | (@) You can refer to the SMBUS HAL driver header file for more useful macros |
mbed_official | 181:a4cbdfbbd2f4 | 95 | |
mbed_official | 181:a4cbdfbbd2f4 | 96 | |
mbed_official | 181:a4cbdfbbd2f4 | 97 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 98 | ****************************************************************************** |
mbed_official | 181:a4cbdfbbd2f4 | 99 | * @attention |
mbed_official | 181:a4cbdfbbd2f4 | 100 | * |
mbed_official | 181:a4cbdfbbd2f4 | 101 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 181:a4cbdfbbd2f4 | 102 | * |
mbed_official | 181:a4cbdfbbd2f4 | 103 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 181:a4cbdfbbd2f4 | 104 | * are permitted provided that the following conditions are met: |
mbed_official | 181:a4cbdfbbd2f4 | 105 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 181:a4cbdfbbd2f4 | 106 | * this list of conditions and the following disclaimer. |
mbed_official | 181:a4cbdfbbd2f4 | 107 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 181:a4cbdfbbd2f4 | 108 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 181:a4cbdfbbd2f4 | 109 | * and/or other materials provided with the distribution. |
mbed_official | 181:a4cbdfbbd2f4 | 110 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 181:a4cbdfbbd2f4 | 111 | * may be used to endorse or promote products derived from this software |
mbed_official | 181:a4cbdfbbd2f4 | 112 | * without specific prior written permission. |
mbed_official | 181:a4cbdfbbd2f4 | 113 | * |
mbed_official | 181:a4cbdfbbd2f4 | 114 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 181:a4cbdfbbd2f4 | 115 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 181:a4cbdfbbd2f4 | 116 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 181:a4cbdfbbd2f4 | 117 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 181:a4cbdfbbd2f4 | 118 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 181:a4cbdfbbd2f4 | 119 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 181:a4cbdfbbd2f4 | 120 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 181:a4cbdfbbd2f4 | 121 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 181:a4cbdfbbd2f4 | 122 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 181:a4cbdfbbd2f4 | 123 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 181:a4cbdfbbd2f4 | 124 | * |
mbed_official | 181:a4cbdfbbd2f4 | 125 | ****************************************************************************** |
mbed_official | 181:a4cbdfbbd2f4 | 126 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 127 | |
mbed_official | 181:a4cbdfbbd2f4 | 128 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 129 | #include "stm32l0xx_hal.h" |
mbed_official | 181:a4cbdfbbd2f4 | 130 | |
mbed_official | 181:a4cbdfbbd2f4 | 131 | /** @addtogroup STM32L0xx_HAL_Driver |
mbed_official | 181:a4cbdfbbd2f4 | 132 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 133 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 134 | |
mbed_official | 181:a4cbdfbbd2f4 | 135 | /** @defgroup SMBUS |
mbed_official | 181:a4cbdfbbd2f4 | 136 | * @brief SMBUS HAL module driver |
mbed_official | 181:a4cbdfbbd2f4 | 137 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 138 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 139 | |
mbed_official | 181:a4cbdfbbd2f4 | 140 | #ifdef HAL_SMBUS_MODULE_ENABLED |
mbed_official | 181:a4cbdfbbd2f4 | 141 | |
mbed_official | 181:a4cbdfbbd2f4 | 142 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 143 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 144 | #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! SMBUS TIMING clear register Mask */ |
mbed_official | 181:a4cbdfbbd2f4 | 145 | #define HAL_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */ |
mbed_official | 181:a4cbdfbbd2f4 | 146 | #define HAL_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */ |
mbed_official | 181:a4cbdfbbd2f4 | 147 | #define HAL_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */ |
mbed_official | 181:a4cbdfbbd2f4 | 148 | #define HAL_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */ |
mbed_official | 181:a4cbdfbbd2f4 | 149 | #define HAL_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */ |
mbed_official | 181:a4cbdfbbd2f4 | 150 | #define HAL_TIMEOUT_TC ((uint32_t)25) /* 25 ms */ |
mbed_official | 181:a4cbdfbbd2f4 | 151 | #define HAL_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */ |
mbed_official | 181:a4cbdfbbd2f4 | 152 | #define HAL_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */ |
mbed_official | 181:a4cbdfbbd2f4 | 153 | #define MAX_NBYTE_SIZE 255 |
mbed_official | 181:a4cbdfbbd2f4 | 154 | |
mbed_official | 181:a4cbdfbbd2f4 | 155 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 156 | #define __SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR) |
mbed_official | 181:a4cbdfbbd2f4 | 157 | #define __SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) |
mbed_official | 181:a4cbdfbbd2f4 | 158 | |
mbed_official | 181:a4cbdfbbd2f4 | 159 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 160 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 161 | static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
mbed_official | 181:a4cbdfbbd2f4 | 162 | |
mbed_official | 181:a4cbdfbbd2f4 | 163 | static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest); |
mbed_official | 181:a4cbdfbbd2f4 | 164 | static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest); |
mbed_official | 181:a4cbdfbbd2f4 | 165 | static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 166 | static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 167 | |
mbed_official | 181:a4cbdfbbd2f4 | 168 | static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request); |
mbed_official | 181:a4cbdfbbd2f4 | 169 | |
mbed_official | 181:a4cbdfbbd2f4 | 170 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 171 | |
mbed_official | 181:a4cbdfbbd2f4 | 172 | /** @defgroup SMBUS_Private_Functions |
mbed_official | 181:a4cbdfbbd2f4 | 173 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 174 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 175 | |
mbed_official | 181:a4cbdfbbd2f4 | 176 | /** @defgroup HAL_SMBUS_Group1 Initialization and de-initialization functions |
mbed_official | 181:a4cbdfbbd2f4 | 177 | * @brief Initialization and Configuration functions |
mbed_official | 181:a4cbdfbbd2f4 | 178 | * |
mbed_official | 181:a4cbdfbbd2f4 | 179 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 180 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 181 | ##### Initialization and de-initialization functions ##### |
mbed_official | 181:a4cbdfbbd2f4 | 182 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 183 | [..] This subsection provides a set of functions allowing to initialize and |
mbed_official | 181:a4cbdfbbd2f4 | 184 | de-initialiaze the SMBUSx peripheral: |
mbed_official | 181:a4cbdfbbd2f4 | 185 | |
mbed_official | 181:a4cbdfbbd2f4 | 186 | (+) User must Implement HAL_SMBUS_MspInit() function in which he configures |
mbed_official | 181:a4cbdfbbd2f4 | 187 | all related peripherals resources (CLOCK, GPIO, IT and NVIC ). |
mbed_official | 181:a4cbdfbbd2f4 | 188 | |
mbed_official | 181:a4cbdfbbd2f4 | 189 | (+) Call the function HAL_SMBUS_Init() to configure the selected device with |
mbed_official | 181:a4cbdfbbd2f4 | 190 | the selected configuration: |
mbed_official | 181:a4cbdfbbd2f4 | 191 | (++) Clock Timing |
mbed_official | 181:a4cbdfbbd2f4 | 192 | (++) Bus Timeout |
mbed_official | 181:a4cbdfbbd2f4 | 193 | (++) Analog Filer mode |
mbed_official | 181:a4cbdfbbd2f4 | 194 | (++) Own Address 1 |
mbed_official | 181:a4cbdfbbd2f4 | 195 | (++) Addressing mode (Master, Slave) |
mbed_official | 181:a4cbdfbbd2f4 | 196 | (++) Dual Addressing mode |
mbed_official | 181:a4cbdfbbd2f4 | 197 | (++) Own Address 2 |
mbed_official | 181:a4cbdfbbd2f4 | 198 | (++) Own Address 2 Mask |
mbed_official | 181:a4cbdfbbd2f4 | 199 | (++) General call mode |
mbed_official | 181:a4cbdfbbd2f4 | 200 | (++) Nostretch mode |
mbed_official | 181:a4cbdfbbd2f4 | 201 | (++) Packet Error Check mode |
mbed_official | 181:a4cbdfbbd2f4 | 202 | (++) Peripheral mode |
mbed_official | 181:a4cbdfbbd2f4 | 203 | |
mbed_official | 181:a4cbdfbbd2f4 | 204 | (+) Call the function HAL_SMBUS_DeInit() to restore the default configuration |
mbed_official | 181:a4cbdfbbd2f4 | 205 | of the selected SMBUSx periperal. |
mbed_official | 181:a4cbdfbbd2f4 | 206 | |
mbed_official | 181:a4cbdfbbd2f4 | 207 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 208 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 209 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 210 | |
mbed_official | 181:a4cbdfbbd2f4 | 211 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 212 | * @brief Initializes the SMBUS according to the specified parameters |
mbed_official | 181:a4cbdfbbd2f4 | 213 | * in the SMBUS_InitTypeDef and create the associated handle. |
mbed_official | 181:a4cbdfbbd2f4 | 214 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 215 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 216 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 217 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 218 | HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 219 | { |
mbed_official | 181:a4cbdfbbd2f4 | 220 | /* Check the SMBUS handle allocation */ |
mbed_official | 181:a4cbdfbbd2f4 | 221 | if(hsmbus == NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 222 | { |
mbed_official | 181:a4cbdfbbd2f4 | 223 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 224 | } |
mbed_official | 181:a4cbdfbbd2f4 | 225 | |
mbed_official | 181:a4cbdfbbd2f4 | 226 | /* Check the parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 227 | assert_param(IS_SMBUS_INSTANCE(hsmbus->Instance)); |
mbed_official | 181:a4cbdfbbd2f4 | 228 | assert_param(IS_SMBUS_ANALOG_FILTER(hsmbus->Init.AnalogFilter)); |
mbed_official | 181:a4cbdfbbd2f4 | 229 | assert_param(IS_SMBUS_OWN_ADDRESS1(hsmbus->Init.OwnAddress1)); |
mbed_official | 181:a4cbdfbbd2f4 | 230 | assert_param(IS_SMBUS_ADDRESSING_MODE(hsmbus->Init.AddressingMode)); |
mbed_official | 181:a4cbdfbbd2f4 | 231 | assert_param(IS_SMBUS_DUAL_ADDRESS(hsmbus->Init.DualAddressMode)); |
mbed_official | 181:a4cbdfbbd2f4 | 232 | assert_param(IS_SMBUS_OWN_ADDRESS2(hsmbus->Init.OwnAddress2)); |
mbed_official | 181:a4cbdfbbd2f4 | 233 | assert_param(IS_SMBUS_OWN_ADDRESS2_MASK(hsmbus->Init.OwnAddress2Masks)); |
mbed_official | 181:a4cbdfbbd2f4 | 234 | assert_param(IS_SMBUS_GENERAL_CALL(hsmbus->Init.GeneralCallMode)); |
mbed_official | 181:a4cbdfbbd2f4 | 235 | assert_param(IS_SMBUS_NO_STRETCH(hsmbus->Init.NoStretchMode)); |
mbed_official | 181:a4cbdfbbd2f4 | 236 | assert_param(IS_SMBUS_PEC(hsmbus->Init.PacketErrorCheckMode)); |
mbed_official | 181:a4cbdfbbd2f4 | 237 | assert_param(IS_SMBUS_PERIPHERAL_MODE(hsmbus->Init.PeripheralMode)); |
mbed_official | 181:a4cbdfbbd2f4 | 238 | |
mbed_official | 181:a4cbdfbbd2f4 | 239 | if(hsmbus->State == HAL_SMBUS_STATE_RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 240 | { |
mbed_official | 181:a4cbdfbbd2f4 | 241 | /* Init the low level hardware : GPIO, CLOCK, NVIC */ |
mbed_official | 181:a4cbdfbbd2f4 | 242 | HAL_SMBUS_MspInit(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 243 | } |
mbed_official | 181:a4cbdfbbd2f4 | 244 | |
mbed_official | 181:a4cbdfbbd2f4 | 245 | hsmbus->State = HAL_SMBUS_STATE_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 246 | |
mbed_official | 181:a4cbdfbbd2f4 | 247 | /* Disable the selected SMBUS peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 248 | __HAL_SMBUS_DISABLE(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 249 | |
mbed_official | 181:a4cbdfbbd2f4 | 250 | /*---------------------------- SMBUSx TIMINGR Configuration ----------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 251 | /* Configure SMBUSx: Frequency range */ |
mbed_official | 181:a4cbdfbbd2f4 | 252 | hsmbus->Instance->TIMINGR = hsmbus->Init.Timing & TIMING_CLEAR_MASK; |
mbed_official | 181:a4cbdfbbd2f4 | 253 | |
mbed_official | 181:a4cbdfbbd2f4 | 254 | /*---------------------------- SMBUSx TIMEOUTR Configuration ---------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 255 | /* Configure SMBUSx: Bus Timeout */ |
mbed_official | 181:a4cbdfbbd2f4 | 256 | hsmbus->Instance->TIMEOUTR = hsmbus->Init.SMBusTimeout; |
mbed_official | 181:a4cbdfbbd2f4 | 257 | |
mbed_official | 181:a4cbdfbbd2f4 | 258 | /*---------------------------- SMBUSx OAR1 Configuration -------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 259 | /* Configure SMBUSx: Own Address1 and ack own address1 mode */ |
mbed_official | 181:a4cbdfbbd2f4 | 260 | hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN; |
mbed_official | 181:a4cbdfbbd2f4 | 261 | if(hsmbus->Init.OwnAddress1 != 0) |
mbed_official | 181:a4cbdfbbd2f4 | 262 | { |
mbed_official | 181:a4cbdfbbd2f4 | 263 | if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT) |
mbed_official | 181:a4cbdfbbd2f4 | 264 | { |
mbed_official | 181:a4cbdfbbd2f4 | 265 | hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | hsmbus->Init.OwnAddress1); |
mbed_official | 181:a4cbdfbbd2f4 | 266 | } |
mbed_official | 181:a4cbdfbbd2f4 | 267 | else /* SMBUS_ADDRESSINGMODE_10BIT */ |
mbed_official | 181:a4cbdfbbd2f4 | 268 | { |
mbed_official | 181:a4cbdfbbd2f4 | 269 | hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hsmbus->Init.OwnAddress1); |
mbed_official | 181:a4cbdfbbd2f4 | 270 | } |
mbed_official | 181:a4cbdfbbd2f4 | 271 | } |
mbed_official | 181:a4cbdfbbd2f4 | 272 | |
mbed_official | 181:a4cbdfbbd2f4 | 273 | /*---------------------------- SMBUSx CR2 Configuration --------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 274 | /* Configure SMBUSx: Addressing Master mode */ |
mbed_official | 181:a4cbdfbbd2f4 | 275 | if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_10BIT) |
mbed_official | 181:a4cbdfbbd2f4 | 276 | { |
mbed_official | 181:a4cbdfbbd2f4 | 277 | hsmbus->Instance->CR2 = (I2C_CR2_ADD10); |
mbed_official | 181:a4cbdfbbd2f4 | 278 | } |
mbed_official | 181:a4cbdfbbd2f4 | 279 | /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */ |
mbed_official | 181:a4cbdfbbd2f4 | 280 | /* AUTOEND and NACK bit will be manage during Transfer process */ |
mbed_official | 181:a4cbdfbbd2f4 | 281 | hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); |
mbed_official | 181:a4cbdfbbd2f4 | 282 | |
mbed_official | 181:a4cbdfbbd2f4 | 283 | /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 284 | /* Configure SMBUSx: Dual mode and Own Address2 */ |
mbed_official | 181:a4cbdfbbd2f4 | 285 | hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8)); |
mbed_official | 181:a4cbdfbbd2f4 | 286 | |
mbed_official | 181:a4cbdfbbd2f4 | 287 | /*---------------------------- SMBUSx CR1 Configuration ------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 288 | /* Configure SMBUSx: Generalcall and NoStretch mode */ |
mbed_official | 181:a4cbdfbbd2f4 | 289 | hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter); |
mbed_official | 181:a4cbdfbbd2f4 | 290 | |
mbed_official | 181:a4cbdfbbd2f4 | 291 | /* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */ |
mbed_official | 181:a4cbdfbbd2f4 | 292 | if( (hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLED) |
mbed_official | 181:a4cbdfbbd2f4 | 293 | && ( (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP) ) ) |
mbed_official | 181:a4cbdfbbd2f4 | 294 | { |
mbed_official | 181:a4cbdfbbd2f4 | 295 | hsmbus->Instance->CR1 |= I2C_CR1_SBC; |
mbed_official | 181:a4cbdfbbd2f4 | 296 | } |
mbed_official | 181:a4cbdfbbd2f4 | 297 | |
mbed_official | 181:a4cbdfbbd2f4 | 298 | /* Enable the selected SMBUS peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 299 | __HAL_SMBUS_ENABLE(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 300 | |
mbed_official | 181:a4cbdfbbd2f4 | 301 | hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 302 | hsmbus->PreviousState = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 303 | hsmbus->State = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 304 | |
mbed_official | 181:a4cbdfbbd2f4 | 305 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 306 | } |
mbed_official | 181:a4cbdfbbd2f4 | 307 | |
mbed_official | 181:a4cbdfbbd2f4 | 308 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 309 | * @brief DeInitializes the SMBUS peripheral. |
mbed_official | 181:a4cbdfbbd2f4 | 310 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 311 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 312 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 313 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 314 | HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 315 | { |
mbed_official | 181:a4cbdfbbd2f4 | 316 | /* Check the SMBUS handle allocation */ |
mbed_official | 181:a4cbdfbbd2f4 | 317 | if(hsmbus == NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 318 | { |
mbed_official | 181:a4cbdfbbd2f4 | 319 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 320 | } |
mbed_official | 181:a4cbdfbbd2f4 | 321 | |
mbed_official | 181:a4cbdfbbd2f4 | 322 | /* Check the parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 323 | assert_param(IS_SMBUS_INSTANCE(hsmbus->Instance)); |
mbed_official | 181:a4cbdfbbd2f4 | 324 | |
mbed_official | 181:a4cbdfbbd2f4 | 325 | hsmbus->State = HAL_SMBUS_STATE_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 326 | |
mbed_official | 181:a4cbdfbbd2f4 | 327 | /* Disable the SMBUS Peripheral Clock */ |
mbed_official | 181:a4cbdfbbd2f4 | 328 | __HAL_SMBUS_DISABLE(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 329 | |
mbed_official | 181:a4cbdfbbd2f4 | 330 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
mbed_official | 181:a4cbdfbbd2f4 | 331 | HAL_SMBUS_MspDeInit(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 332 | |
mbed_official | 181:a4cbdfbbd2f4 | 333 | hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 334 | hsmbus->PreviousState = HAL_SMBUS_STATE_RESET; |
mbed_official | 181:a4cbdfbbd2f4 | 335 | hsmbus->State = HAL_SMBUS_STATE_RESET; |
mbed_official | 181:a4cbdfbbd2f4 | 336 | |
mbed_official | 181:a4cbdfbbd2f4 | 337 | /* Release Lock */ |
mbed_official | 181:a4cbdfbbd2f4 | 338 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 339 | |
mbed_official | 181:a4cbdfbbd2f4 | 340 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 341 | } |
mbed_official | 181:a4cbdfbbd2f4 | 342 | |
mbed_official | 181:a4cbdfbbd2f4 | 343 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 344 | * @brief SMBUS MSP Init. |
mbed_official | 181:a4cbdfbbd2f4 | 345 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 346 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 347 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 348 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 349 | __weak void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 350 | { |
mbed_official | 181:a4cbdfbbd2f4 | 351 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 352 | the HAL_SMBUS_MspInit could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 353 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 354 | } |
mbed_official | 181:a4cbdfbbd2f4 | 355 | |
mbed_official | 181:a4cbdfbbd2f4 | 356 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 357 | * @brief SMBUS MSP DeInit |
mbed_official | 181:a4cbdfbbd2f4 | 358 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 359 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 360 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 361 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 362 | __weak void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 363 | { |
mbed_official | 181:a4cbdfbbd2f4 | 364 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 365 | the HAL_SMBUS_MspDeInit could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 366 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 367 | } |
mbed_official | 181:a4cbdfbbd2f4 | 368 | |
mbed_official | 181:a4cbdfbbd2f4 | 369 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 370 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 371 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 372 | |
mbed_official | 181:a4cbdfbbd2f4 | 373 | /** @defgroup HAL_SMBUS_Group2 IO operation functions |
mbed_official | 181:a4cbdfbbd2f4 | 374 | * @brief Data transfers functions |
mbed_official | 181:a4cbdfbbd2f4 | 375 | * |
mbed_official | 181:a4cbdfbbd2f4 | 376 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 377 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 378 | ##### IO operation functions ##### |
mbed_official | 181:a4cbdfbbd2f4 | 379 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 380 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 381 | This subsection provides a set of functions allowing to manage the SMBUS data |
mbed_official | 181:a4cbdfbbd2f4 | 382 | transfers. |
mbed_official | 181:a4cbdfbbd2f4 | 383 | |
mbed_official | 181:a4cbdfbbd2f4 | 384 | (#) Blocking mode function to check if device is ready for usage is : |
mbed_official | 181:a4cbdfbbd2f4 | 385 | (++) HAL_SMBUS_IsDeviceReady() |
mbed_official | 181:a4cbdfbbd2f4 | 386 | |
mbed_official | 181:a4cbdfbbd2f4 | 387 | (#) There is only one mode of transfer: |
mbed_official | 181:a4cbdfbbd2f4 | 388 | (++) No-Blocking mode : The communication is performed using Interrupts. |
mbed_official | 181:a4cbdfbbd2f4 | 389 | These functions return the status of the transfer startup. |
mbed_official | 181:a4cbdfbbd2f4 | 390 | The end of the data processing will be indicated through the |
mbed_official | 181:a4cbdfbbd2f4 | 391 | dedicated SMBUS IRQ when using Interrupt mode. |
mbed_official | 181:a4cbdfbbd2f4 | 392 | |
mbed_official | 181:a4cbdfbbd2f4 | 393 | (#) No-Blocking mode functions with Interrupt are : |
mbed_official | 181:a4cbdfbbd2f4 | 394 | (++) HAL_SMBUS_Master_Transmit_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 395 | (++) HAL_SMBUS_Master_Receive_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 396 | (++) HAL_SMBUS_Slave_Transmit_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 397 | (++) HAL_SMBUS_Slave_Receive_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 398 | (++) HAL_SMBUS_Slave_Listen_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 399 | (++) HAL_SMBUS_EnableAlert_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 400 | (++) HAL_SMBUS_DisableAlert_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 401 | |
mbed_official | 181:a4cbdfbbd2f4 | 402 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
mbed_official | 181:a4cbdfbbd2f4 | 403 | (++) HAL_SMBUS_MasterTxCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 404 | (++) HAL_SMBUS_MasterRxCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 405 | (++) HAL_SMBUS_SlaveTxCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 406 | (++) HAL_SMBUS_SlaveRxCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 407 | (++) HAL_SMBUS_SlaveAddrCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 408 | (++) HAL_SMBUS_SlaveListenCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 409 | (++) HAL_SMBUS_ErrorCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 410 | |
mbed_official | 181:a4cbdfbbd2f4 | 411 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 412 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 413 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 414 | |
mbed_official | 181:a4cbdfbbd2f4 | 415 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 416 | * @brief Transmit in master/host SMBUS mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 417 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 418 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 419 | * @param DevAddress: Target device address |
mbed_official | 181:a4cbdfbbd2f4 | 420 | * @param pData: Pointer to data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 421 | * @param Size: Amount of data to be sent |
mbed_official | 181:a4cbdfbbd2f4 | 422 | * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition |
mbed_official | 181:a4cbdfbbd2f4 | 423 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 424 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 425 | HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
mbed_official | 181:a4cbdfbbd2f4 | 426 | { |
mbed_official | 181:a4cbdfbbd2f4 | 427 | /* Check the parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 428 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
mbed_official | 181:a4cbdfbbd2f4 | 429 | |
mbed_official | 181:a4cbdfbbd2f4 | 430 | if(hsmbus->State == HAL_SMBUS_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 431 | { |
mbed_official | 181:a4cbdfbbd2f4 | 432 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 433 | __HAL_LOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 434 | |
mbed_official | 181:a4cbdfbbd2f4 | 435 | hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX; |
mbed_official | 181:a4cbdfbbd2f4 | 436 | hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 437 | /* Prepare transfer parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 438 | hsmbus->pBuffPtr = pData; |
mbed_official | 181:a4cbdfbbd2f4 | 439 | hsmbus->XferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 440 | hsmbus->XferOptions = XferOptions; |
mbed_official | 181:a4cbdfbbd2f4 | 441 | |
mbed_official | 181:a4cbdfbbd2f4 | 442 | /* In case of Quick command, remove autoend mode */ |
mbed_official | 181:a4cbdfbbd2f4 | 443 | /* Manage the stop generation by software */ |
mbed_official | 181:a4cbdfbbd2f4 | 444 | if(hsmbus->pBuffPtr == NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 445 | { |
mbed_official | 181:a4cbdfbbd2f4 | 446 | hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE; |
mbed_official | 181:a4cbdfbbd2f4 | 447 | } |
mbed_official | 181:a4cbdfbbd2f4 | 448 | |
mbed_official | 181:a4cbdfbbd2f4 | 449 | if(Size > MAX_NBYTE_SIZE) |
mbed_official | 181:a4cbdfbbd2f4 | 450 | { |
mbed_official | 181:a4cbdfbbd2f4 | 451 | hsmbus->XferSize = MAX_NBYTE_SIZE; |
mbed_official | 181:a4cbdfbbd2f4 | 452 | } |
mbed_official | 181:a4cbdfbbd2f4 | 453 | else |
mbed_official | 181:a4cbdfbbd2f4 | 454 | { |
mbed_official | 181:a4cbdfbbd2f4 | 455 | hsmbus->XferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 456 | } |
mbed_official | 181:a4cbdfbbd2f4 | 457 | |
mbed_official | 181:a4cbdfbbd2f4 | 458 | /* Send Slave Address */ |
mbed_official | 181:a4cbdfbbd2f4 | 459 | /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ |
mbed_official | 181:a4cbdfbbd2f4 | 460 | if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) ) |
mbed_official | 181:a4cbdfbbd2f4 | 461 | { |
mbed_official | 181:a4cbdfbbd2f4 | 462 | SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE, SMBUS_GENERATE_START_WRITE); |
mbed_official | 181:a4cbdfbbd2f4 | 463 | } |
mbed_official | 181:a4cbdfbbd2f4 | 464 | else |
mbed_official | 181:a4cbdfbbd2f4 | 465 | { |
mbed_official | 181:a4cbdfbbd2f4 | 466 | /* If transfer direction not change, do not generate Restart Condition */ |
mbed_official | 181:a4cbdfbbd2f4 | 467 | /* Mean Previous state is same as current state */ |
mbed_official | 181:a4cbdfbbd2f4 | 468 | if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 469 | { |
mbed_official | 181:a4cbdfbbd2f4 | 470 | SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
mbed_official | 181:a4cbdfbbd2f4 | 471 | } |
mbed_official | 181:a4cbdfbbd2f4 | 472 | /* Else transfer direction change, so generate Restart with new transfer direction */ |
mbed_official | 181:a4cbdfbbd2f4 | 473 | else |
mbed_official | 181:a4cbdfbbd2f4 | 474 | { |
mbed_official | 181:a4cbdfbbd2f4 | 475 | SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE); |
mbed_official | 181:a4cbdfbbd2f4 | 476 | } |
mbed_official | 181:a4cbdfbbd2f4 | 477 | |
mbed_official | 181:a4cbdfbbd2f4 | 478 | /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */ |
mbed_official | 181:a4cbdfbbd2f4 | 479 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
mbed_official | 181:a4cbdfbbd2f4 | 480 | if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 481 | { |
mbed_official | 181:a4cbdfbbd2f4 | 482 | hsmbus->XferSize--; |
mbed_official | 181:a4cbdfbbd2f4 | 483 | hsmbus->XferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 484 | } |
mbed_official | 181:a4cbdfbbd2f4 | 485 | } |
mbed_official | 181:a4cbdfbbd2f4 | 486 | |
mbed_official | 181:a4cbdfbbd2f4 | 487 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 488 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 489 | |
mbed_official | 181:a4cbdfbbd2f4 | 490 | /* Note : The SMBUS interrupts must be enabled after unlocking current process |
mbed_official | 181:a4cbdfbbd2f4 | 491 | to avoid the risk of SMBUS interrupt handle execution before current |
mbed_official | 181:a4cbdfbbd2f4 | 492 | process unlock */ |
mbed_official | 181:a4cbdfbbd2f4 | 493 | SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 494 | |
mbed_official | 181:a4cbdfbbd2f4 | 495 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 496 | } |
mbed_official | 181:a4cbdfbbd2f4 | 497 | else |
mbed_official | 181:a4cbdfbbd2f4 | 498 | { |
mbed_official | 181:a4cbdfbbd2f4 | 499 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 500 | } |
mbed_official | 181:a4cbdfbbd2f4 | 501 | } |
mbed_official | 181:a4cbdfbbd2f4 | 502 | |
mbed_official | 181:a4cbdfbbd2f4 | 503 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 504 | * @brief Receive in master/host SMBUS mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 505 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 506 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 507 | * @param DevAddress: Target device address |
mbed_official | 181:a4cbdfbbd2f4 | 508 | * @param pData: Pointer to data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 509 | * @param Size: Amount of data to be sent |
mbed_official | 181:a4cbdfbbd2f4 | 510 | * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition |
mbed_official | 181:a4cbdfbbd2f4 | 511 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 512 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 513 | HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
mbed_official | 181:a4cbdfbbd2f4 | 514 | { |
mbed_official | 181:a4cbdfbbd2f4 | 515 | /* Check the parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 516 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
mbed_official | 181:a4cbdfbbd2f4 | 517 | |
mbed_official | 181:a4cbdfbbd2f4 | 518 | if(hsmbus->State == HAL_SMBUS_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 519 | { |
mbed_official | 181:a4cbdfbbd2f4 | 520 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 521 | __HAL_LOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 522 | |
mbed_official | 181:a4cbdfbbd2f4 | 523 | hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 524 | hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 525 | |
mbed_official | 181:a4cbdfbbd2f4 | 526 | /* Prepare transfer parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 527 | hsmbus->pBuffPtr = pData; |
mbed_official | 181:a4cbdfbbd2f4 | 528 | hsmbus->XferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 529 | hsmbus->XferOptions = XferOptions; |
mbed_official | 181:a4cbdfbbd2f4 | 530 | |
mbed_official | 181:a4cbdfbbd2f4 | 531 | /* In case of Quick command, remove autoend mode */ |
mbed_official | 181:a4cbdfbbd2f4 | 532 | /* Manage the stop generation by software */ |
mbed_official | 181:a4cbdfbbd2f4 | 533 | if(hsmbus->pBuffPtr == NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 534 | { |
mbed_official | 181:a4cbdfbbd2f4 | 535 | hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE; |
mbed_official | 181:a4cbdfbbd2f4 | 536 | } |
mbed_official | 181:a4cbdfbbd2f4 | 537 | |
mbed_official | 181:a4cbdfbbd2f4 | 538 | if(Size > MAX_NBYTE_SIZE) |
mbed_official | 181:a4cbdfbbd2f4 | 539 | { |
mbed_official | 181:a4cbdfbbd2f4 | 540 | hsmbus->XferSize = MAX_NBYTE_SIZE; |
mbed_official | 181:a4cbdfbbd2f4 | 541 | } |
mbed_official | 181:a4cbdfbbd2f4 | 542 | else |
mbed_official | 181:a4cbdfbbd2f4 | 543 | { |
mbed_official | 181:a4cbdfbbd2f4 | 544 | hsmbus->XferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 545 | } |
mbed_official | 181:a4cbdfbbd2f4 | 546 | |
mbed_official | 181:a4cbdfbbd2f4 | 547 | /* Send Slave Address */ |
mbed_official | 181:a4cbdfbbd2f4 | 548 | /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ |
mbed_official | 181:a4cbdfbbd2f4 | 549 | if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) ) |
mbed_official | 181:a4cbdfbbd2f4 | 550 | { |
mbed_official | 181:a4cbdfbbd2f4 | 551 | SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE, SMBUS_GENERATE_START_READ); |
mbed_official | 181:a4cbdfbbd2f4 | 552 | } |
mbed_official | 181:a4cbdfbbd2f4 | 553 | else |
mbed_official | 181:a4cbdfbbd2f4 | 554 | { |
mbed_official | 181:a4cbdfbbd2f4 | 555 | /* If transfer direction not change, do not generate Restart Condition */ |
mbed_official | 181:a4cbdfbbd2f4 | 556 | /* Mean Previous state is same as current state */ |
mbed_official | 181:a4cbdfbbd2f4 | 557 | if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 558 | { |
mbed_official | 181:a4cbdfbbd2f4 | 559 | SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
mbed_official | 181:a4cbdfbbd2f4 | 560 | } |
mbed_official | 181:a4cbdfbbd2f4 | 561 | /* Else transfer direction change, so generate Restart with new transfer direction */ |
mbed_official | 181:a4cbdfbbd2f4 | 562 | else |
mbed_official | 181:a4cbdfbbd2f4 | 563 | { |
mbed_official | 181:a4cbdfbbd2f4 | 564 | SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ); |
mbed_official | 181:a4cbdfbbd2f4 | 565 | } |
mbed_official | 181:a4cbdfbbd2f4 | 566 | } |
mbed_official | 181:a4cbdfbbd2f4 | 567 | |
mbed_official | 181:a4cbdfbbd2f4 | 568 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 569 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 570 | |
mbed_official | 181:a4cbdfbbd2f4 | 571 | /* Note : The SMBUS interrupts must be enabled after unlocking current process |
mbed_official | 181:a4cbdfbbd2f4 | 572 | to avoid the risk of SMBUS interrupt handle execution before current |
mbed_official | 181:a4cbdfbbd2f4 | 573 | process unlock */ |
mbed_official | 181:a4cbdfbbd2f4 | 574 | SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX); |
mbed_official | 181:a4cbdfbbd2f4 | 575 | |
mbed_official | 181:a4cbdfbbd2f4 | 576 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 577 | } |
mbed_official | 181:a4cbdfbbd2f4 | 578 | else |
mbed_official | 181:a4cbdfbbd2f4 | 579 | { |
mbed_official | 181:a4cbdfbbd2f4 | 580 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 581 | } |
mbed_official | 181:a4cbdfbbd2f4 | 582 | } |
mbed_official | 181:a4cbdfbbd2f4 | 583 | |
mbed_official | 181:a4cbdfbbd2f4 | 584 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 585 | * @brief Abort a master/host SMBUS process commnunication with Interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 586 | * @note : This abort can be called only if state is ready |
mbed_official | 181:a4cbdfbbd2f4 | 587 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 588 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 589 | * @param DevAddress: Target device address |
mbed_official | 181:a4cbdfbbd2f4 | 590 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 591 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 592 | HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress) |
mbed_official | 181:a4cbdfbbd2f4 | 593 | { |
mbed_official | 181:a4cbdfbbd2f4 | 594 | if(hsmbus->State == HAL_SMBUS_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 595 | { |
mbed_official | 181:a4cbdfbbd2f4 | 596 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 597 | __HAL_LOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 598 | |
mbed_official | 181:a4cbdfbbd2f4 | 599 | /* Keep the same state as previous */ |
mbed_official | 181:a4cbdfbbd2f4 | 600 | /* to perform as well the call of the corresponding end of transfer callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 601 | if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 602 | { |
mbed_official | 181:a4cbdfbbd2f4 | 603 | hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX; |
mbed_official | 181:a4cbdfbbd2f4 | 604 | } |
mbed_official | 181:a4cbdfbbd2f4 | 605 | else if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 606 | { |
mbed_official | 181:a4cbdfbbd2f4 | 607 | hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 608 | } |
mbed_official | 181:a4cbdfbbd2f4 | 609 | else |
mbed_official | 181:a4cbdfbbd2f4 | 610 | { |
mbed_official | 181:a4cbdfbbd2f4 | 611 | /* Wrong usage of abort function */ |
mbed_official | 181:a4cbdfbbd2f4 | 612 | /* This function should be used only in case of abort monitored by master device */ |
mbed_official | 181:a4cbdfbbd2f4 | 613 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 614 | } |
mbed_official | 181:a4cbdfbbd2f4 | 615 | hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 616 | |
mbed_official | 181:a4cbdfbbd2f4 | 617 | /* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 618 | /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */ |
mbed_official | 181:a4cbdfbbd2f4 | 619 | SMBUS_TransferConfig(hsmbus, DevAddress, 1, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP); |
mbed_official | 181:a4cbdfbbd2f4 | 620 | |
mbed_official | 181:a4cbdfbbd2f4 | 621 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 622 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 623 | |
mbed_official | 181:a4cbdfbbd2f4 | 624 | /* Note : The SMBUS interrupts must be enabled after unlocking current process |
mbed_official | 181:a4cbdfbbd2f4 | 625 | to avoid the risk of SMBUS interrupt handle execution before current |
mbed_official | 181:a4cbdfbbd2f4 | 626 | process unlock */ |
mbed_official | 181:a4cbdfbbd2f4 | 627 | if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 628 | { |
mbed_official | 181:a4cbdfbbd2f4 | 629 | SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 630 | } |
mbed_official | 181:a4cbdfbbd2f4 | 631 | else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 632 | { |
mbed_official | 181:a4cbdfbbd2f4 | 633 | SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX); |
mbed_official | 181:a4cbdfbbd2f4 | 634 | } |
mbed_official | 181:a4cbdfbbd2f4 | 635 | |
mbed_official | 181:a4cbdfbbd2f4 | 636 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 637 | } |
mbed_official | 181:a4cbdfbbd2f4 | 638 | else |
mbed_official | 181:a4cbdfbbd2f4 | 639 | { |
mbed_official | 181:a4cbdfbbd2f4 | 640 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 641 | } |
mbed_official | 181:a4cbdfbbd2f4 | 642 | } |
mbed_official | 181:a4cbdfbbd2f4 | 643 | |
mbed_official | 181:a4cbdfbbd2f4 | 644 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 645 | * @brief Transmit in slave/device SMBUS mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 646 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 647 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 648 | * @param pData: Pointer to data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 649 | * @param Size: Amount of data to be sent |
mbed_official | 181:a4cbdfbbd2f4 | 650 | * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition |
mbed_official | 181:a4cbdfbbd2f4 | 651 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 652 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 653 | HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
mbed_official | 181:a4cbdfbbd2f4 | 654 | { |
mbed_official | 181:a4cbdfbbd2f4 | 655 | /* Check the parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 656 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
mbed_official | 181:a4cbdfbbd2f4 | 657 | |
mbed_official | 181:a4cbdfbbd2f4 | 658 | if(hsmbus->State == HAL_SMBUS_STATE_SLAVE_LISTEN) |
mbed_official | 181:a4cbdfbbd2f4 | 659 | { |
mbed_official | 181:a4cbdfbbd2f4 | 660 | if((pData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 661 | { |
mbed_official | 181:a4cbdfbbd2f4 | 662 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 663 | } |
mbed_official | 181:a4cbdfbbd2f4 | 664 | |
mbed_official | 181:a4cbdfbbd2f4 | 665 | /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ |
mbed_official | 181:a4cbdfbbd2f4 | 666 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 667 | |
mbed_official | 181:a4cbdfbbd2f4 | 668 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 669 | __HAL_LOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 670 | |
mbed_official | 181:a4cbdfbbd2f4 | 671 | hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_TX; |
mbed_official | 181:a4cbdfbbd2f4 | 672 | hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 673 | |
mbed_official | 181:a4cbdfbbd2f4 | 674 | /* Enable Address Acknowledge */ |
mbed_official | 181:a4cbdfbbd2f4 | 675 | hsmbus->Instance->CR2 &= ~I2C_CR2_NACK; |
mbed_official | 181:a4cbdfbbd2f4 | 676 | |
mbed_official | 181:a4cbdfbbd2f4 | 677 | /* Prepare transfer parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 678 | hsmbus->pBuffPtr = pData; |
mbed_official | 181:a4cbdfbbd2f4 | 679 | hsmbus->XferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 680 | hsmbus->XferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 681 | hsmbus->XferOptions = XferOptions; |
mbed_official | 181:a4cbdfbbd2f4 | 682 | |
mbed_official | 181:a4cbdfbbd2f4 | 683 | /* Set NBYTE to transmit */ |
mbed_official | 181:a4cbdfbbd2f4 | 684 | SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
mbed_official | 181:a4cbdfbbd2f4 | 685 | |
mbed_official | 181:a4cbdfbbd2f4 | 686 | /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ |
mbed_official | 181:a4cbdfbbd2f4 | 687 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
mbed_official | 181:a4cbdfbbd2f4 | 688 | if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 689 | { |
mbed_official | 181:a4cbdfbbd2f4 | 690 | hsmbus->XferSize--; |
mbed_official | 181:a4cbdfbbd2f4 | 691 | hsmbus->XferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 692 | } |
mbed_official | 181:a4cbdfbbd2f4 | 693 | |
mbed_official | 181:a4cbdfbbd2f4 | 694 | /* Clear ADDR flag after prepare the transfer parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 695 | /* This action will generate an acknowledge to the HOST */ |
mbed_official | 181:a4cbdfbbd2f4 | 696 | __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR); |
mbed_official | 181:a4cbdfbbd2f4 | 697 | |
mbed_official | 181:a4cbdfbbd2f4 | 698 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 699 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 700 | |
mbed_official | 181:a4cbdfbbd2f4 | 701 | /* Note : The SMBUS interrupts must be enabled after unlocking current process |
mbed_official | 181:a4cbdfbbd2f4 | 702 | to avoid the risk of SMBUS interrupt handle execution before current |
mbed_official | 181:a4cbdfbbd2f4 | 703 | process unlock */ |
mbed_official | 181:a4cbdfbbd2f4 | 704 | /* REnable ADDR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 705 | SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX | SMBUS_IT_ADDR); |
mbed_official | 181:a4cbdfbbd2f4 | 706 | |
mbed_official | 181:a4cbdfbbd2f4 | 707 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 708 | } |
mbed_official | 181:a4cbdfbbd2f4 | 709 | else |
mbed_official | 181:a4cbdfbbd2f4 | 710 | { |
mbed_official | 181:a4cbdfbbd2f4 | 711 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 712 | } |
mbed_official | 181:a4cbdfbbd2f4 | 713 | } |
mbed_official | 181:a4cbdfbbd2f4 | 714 | |
mbed_official | 181:a4cbdfbbd2f4 | 715 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 716 | * @brief Receive in slave/device SMBUS mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 717 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 718 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 719 | * @param pData: Pointer to data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 720 | * @param Size: Amount of data to be sent |
mbed_official | 181:a4cbdfbbd2f4 | 721 | * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition |
mbed_official | 181:a4cbdfbbd2f4 | 722 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 723 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 724 | HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
mbed_official | 181:a4cbdfbbd2f4 | 725 | { |
mbed_official | 181:a4cbdfbbd2f4 | 726 | /* Check the parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 727 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
mbed_official | 181:a4cbdfbbd2f4 | 728 | |
mbed_official | 181:a4cbdfbbd2f4 | 729 | if(hsmbus->State == HAL_SMBUS_STATE_SLAVE_LISTEN) |
mbed_official | 181:a4cbdfbbd2f4 | 730 | { |
mbed_official | 181:a4cbdfbbd2f4 | 731 | if((pData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 732 | { |
mbed_official | 181:a4cbdfbbd2f4 | 733 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 734 | } |
mbed_official | 181:a4cbdfbbd2f4 | 735 | |
mbed_official | 181:a4cbdfbbd2f4 | 736 | /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ |
mbed_official | 181:a4cbdfbbd2f4 | 737 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_RX); |
mbed_official | 181:a4cbdfbbd2f4 | 738 | |
mbed_official | 181:a4cbdfbbd2f4 | 739 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 740 | __HAL_LOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 741 | |
mbed_official | 181:a4cbdfbbd2f4 | 742 | hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 743 | hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 744 | |
mbed_official | 181:a4cbdfbbd2f4 | 745 | /* Enable Address Acknowledge */ |
mbed_official | 181:a4cbdfbbd2f4 | 746 | hsmbus->Instance->CR2 &= ~I2C_CR2_NACK; |
mbed_official | 181:a4cbdfbbd2f4 | 747 | |
mbed_official | 181:a4cbdfbbd2f4 | 748 | /* Prepare transfer parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 749 | hsmbus->pBuffPtr = pData; |
mbed_official | 181:a4cbdfbbd2f4 | 750 | hsmbus->XferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 751 | hsmbus->XferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 752 | hsmbus->XferOptions = XferOptions; |
mbed_official | 181:a4cbdfbbd2f4 | 753 | |
mbed_official | 181:a4cbdfbbd2f4 | 754 | /* Set NBYTE to receive */ |
mbed_official | 181:a4cbdfbbd2f4 | 755 | /* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */ |
mbed_official | 181:a4cbdfbbd2f4 | 756 | /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */ |
mbed_official | 181:a4cbdfbbd2f4 | 757 | /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */ |
mbed_official | 181:a4cbdfbbd2f4 | 758 | /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */ |
mbed_official | 181:a4cbdfbbd2f4 | 759 | if((hsmbus->XferSize == 1) || ((hsmbus->XferSize == 2) && (__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET))) |
mbed_official | 181:a4cbdfbbd2f4 | 760 | { |
mbed_official | 181:a4cbdfbbd2f4 | 761 | SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
mbed_official | 181:a4cbdfbbd2f4 | 762 | } |
mbed_official | 181:a4cbdfbbd2f4 | 763 | else |
mbed_official | 181:a4cbdfbbd2f4 | 764 | { |
mbed_official | 181:a4cbdfbbd2f4 | 765 | SMBUS_TransferConfig(hsmbus,0,/*hsmbus->XferSize*/1, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP); |
mbed_official | 181:a4cbdfbbd2f4 | 766 | } |
mbed_official | 181:a4cbdfbbd2f4 | 767 | |
mbed_official | 181:a4cbdfbbd2f4 | 768 | /* Clear ADDR flag after prepare the transfer parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 769 | /* This action will generate an acknowledge to the HOST */ |
mbed_official | 181:a4cbdfbbd2f4 | 770 | __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR); |
mbed_official | 181:a4cbdfbbd2f4 | 771 | |
mbed_official | 181:a4cbdfbbd2f4 | 772 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 773 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 774 | |
mbed_official | 181:a4cbdfbbd2f4 | 775 | /* Note : The SMBUS interrupts must be enabled after unlocking current process |
mbed_official | 181:a4cbdfbbd2f4 | 776 | to avoid the risk of SMBUS interrupt handle execution before current |
mbed_official | 181:a4cbdfbbd2f4 | 777 | process unlock */ |
mbed_official | 181:a4cbdfbbd2f4 | 778 | /* REnable ADDR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 779 | SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_ADDR); |
mbed_official | 181:a4cbdfbbd2f4 | 780 | |
mbed_official | 181:a4cbdfbbd2f4 | 781 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 782 | } |
mbed_official | 181:a4cbdfbbd2f4 | 783 | else |
mbed_official | 181:a4cbdfbbd2f4 | 784 | { |
mbed_official | 181:a4cbdfbbd2f4 | 785 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 786 | } |
mbed_official | 181:a4cbdfbbd2f4 | 787 | } |
mbed_official | 181:a4cbdfbbd2f4 | 788 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 789 | * @brief This function enable the Address listen mode in Slave mode |
mbed_official | 181:a4cbdfbbd2f4 | 790 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 791 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 792 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 793 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 794 | HAL_StatusTypeDef HAL_SMBUS_Slave_Listen_IT(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 795 | { |
mbed_official | 181:a4cbdfbbd2f4 | 796 | hsmbus->State = HAL_SMBUS_STATE_SLAVE_LISTEN; |
mbed_official | 181:a4cbdfbbd2f4 | 797 | |
mbed_official | 181:a4cbdfbbd2f4 | 798 | /* Enable the Address Match interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 799 | SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ADDR); |
mbed_official | 181:a4cbdfbbd2f4 | 800 | |
mbed_official | 181:a4cbdfbbd2f4 | 801 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 802 | } |
mbed_official | 181:a4cbdfbbd2f4 | 803 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 804 | * @brief Enable SMBUS alert. |
mbed_official | 181:a4cbdfbbd2f4 | 805 | * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 806 | * the configuration information for the specified SMBUSx peripheral. |
mbed_official | 181:a4cbdfbbd2f4 | 807 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 808 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 809 | HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 810 | { |
mbed_official | 181:a4cbdfbbd2f4 | 811 | /* Enable SMBus alert */ |
mbed_official | 181:a4cbdfbbd2f4 | 812 | hsmbus->Instance->CR1 |= I2C_CR1_ALERTEN; |
mbed_official | 181:a4cbdfbbd2f4 | 813 | |
mbed_official | 181:a4cbdfbbd2f4 | 814 | /* Clear ALERT flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 815 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT); |
mbed_official | 181:a4cbdfbbd2f4 | 816 | |
mbed_official | 181:a4cbdfbbd2f4 | 817 | /* Enable Alert Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 818 | SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ALERT); |
mbed_official | 181:a4cbdfbbd2f4 | 819 | |
mbed_official | 181:a4cbdfbbd2f4 | 820 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 821 | } |
mbed_official | 181:a4cbdfbbd2f4 | 822 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 823 | * @brief Disable SMBUS alert. |
mbed_official | 181:a4cbdfbbd2f4 | 824 | * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 825 | * the configuration information for the specified SMBUSx peripheral. |
mbed_official | 181:a4cbdfbbd2f4 | 826 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 827 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 828 | HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 829 | { |
mbed_official | 181:a4cbdfbbd2f4 | 830 | /* Enable SMBus alert */ |
mbed_official | 181:a4cbdfbbd2f4 | 831 | hsmbus->Instance->CR1 &= ~I2C_CR1_ALERTEN; |
mbed_official | 181:a4cbdfbbd2f4 | 832 | |
mbed_official | 181:a4cbdfbbd2f4 | 833 | /* Disable Alert Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 834 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ALERT); |
mbed_official | 181:a4cbdfbbd2f4 | 835 | |
mbed_official | 181:a4cbdfbbd2f4 | 836 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 837 | } |
mbed_official | 181:a4cbdfbbd2f4 | 838 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 839 | * @brief Checks if target device is ready for communication. |
mbed_official | 181:a4cbdfbbd2f4 | 840 | * @note This function is used with Memory devices |
mbed_official | 181:a4cbdfbbd2f4 | 841 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 842 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 843 | * @param DevAddress: Target device address |
mbed_official | 181:a4cbdfbbd2f4 | 844 | * @param Trials: Number of trials |
mbed_official | 181:a4cbdfbbd2f4 | 845 | * @param Timeout: Timeout duration |
mbed_official | 181:a4cbdfbbd2f4 | 846 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 847 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 848 | HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 849 | { |
mbed_official | 181:a4cbdfbbd2f4 | 850 | uint32_t tickstart = 0x00; |
mbed_official | 181:a4cbdfbbd2f4 | 851 | __IO uint32_t SMBUS_Trials = 0x00; |
mbed_official | 181:a4cbdfbbd2f4 | 852 | |
mbed_official | 181:a4cbdfbbd2f4 | 853 | if(hsmbus->State == HAL_SMBUS_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 854 | { |
mbed_official | 181:a4cbdfbbd2f4 | 855 | if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BUSY) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 856 | { |
mbed_official | 181:a4cbdfbbd2f4 | 857 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 858 | } |
mbed_official | 181:a4cbdfbbd2f4 | 859 | |
mbed_official | 181:a4cbdfbbd2f4 | 860 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 861 | __HAL_LOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 862 | |
mbed_official | 181:a4cbdfbbd2f4 | 863 | hsmbus->State = HAL_SMBUS_STATE_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 864 | hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 865 | |
mbed_official | 181:a4cbdfbbd2f4 | 866 | do |
mbed_official | 181:a4cbdfbbd2f4 | 867 | { |
mbed_official | 181:a4cbdfbbd2f4 | 868 | /* Generate Start */ |
mbed_official | 181:a4cbdfbbd2f4 | 869 | hsmbus->Instance->CR2 = __HAL_SMBUS_GENERATE_START(hsmbus->Init.AddressingMode,DevAddress); |
mbed_official | 181:a4cbdfbbd2f4 | 870 | |
mbed_official | 181:a4cbdfbbd2f4 | 871 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 181:a4cbdfbbd2f4 | 872 | /* Wait until STOPF flag is set or a NACK flag is set*/ |
mbed_official | 181:a4cbdfbbd2f4 | 873 | tickstart = HAL_GetTick(); |
mbed_official | 181:a4cbdfbbd2f4 | 874 | while((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT)) |
mbed_official | 181:a4cbdfbbd2f4 | 875 | { |
mbed_official | 181:a4cbdfbbd2f4 | 876 | if((HAL_GetTick() - tickstart ) > Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 877 | { |
mbed_official | 181:a4cbdfbbd2f4 | 878 | hsmbus->State = HAL_SMBUS_STATE_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 879 | } |
mbed_official | 181:a4cbdfbbd2f4 | 880 | } |
mbed_official | 181:a4cbdfbbd2f4 | 881 | |
mbed_official | 181:a4cbdfbbd2f4 | 882 | /* Check if the NACKF flag has not been set */ |
mbed_official | 181:a4cbdfbbd2f4 | 883 | if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 884 | { |
mbed_official | 181:a4cbdfbbd2f4 | 885 | /* Wait until STOPF flag is reset */ |
mbed_official | 181:a4cbdfbbd2f4 | 886 | if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 887 | { |
mbed_official | 181:a4cbdfbbd2f4 | 888 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 889 | } |
mbed_official | 181:a4cbdfbbd2f4 | 890 | |
mbed_official | 181:a4cbdfbbd2f4 | 891 | /* Clear STOP Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 892 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); |
mbed_official | 181:a4cbdfbbd2f4 | 893 | |
mbed_official | 181:a4cbdfbbd2f4 | 894 | /* Device is ready */ |
mbed_official | 181:a4cbdfbbd2f4 | 895 | hsmbus->State = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 896 | |
mbed_official | 181:a4cbdfbbd2f4 | 897 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 898 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 899 | |
mbed_official | 181:a4cbdfbbd2f4 | 900 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 901 | } |
mbed_official | 181:a4cbdfbbd2f4 | 902 | else |
mbed_official | 181:a4cbdfbbd2f4 | 903 | { |
mbed_official | 181:a4cbdfbbd2f4 | 904 | /* Wait until STOPF flag is reset */ |
mbed_official | 181:a4cbdfbbd2f4 | 905 | if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 906 | { |
mbed_official | 181:a4cbdfbbd2f4 | 907 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 908 | } |
mbed_official | 181:a4cbdfbbd2f4 | 909 | |
mbed_official | 181:a4cbdfbbd2f4 | 910 | /* Clear NACK Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 911 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF); |
mbed_official | 181:a4cbdfbbd2f4 | 912 | |
mbed_official | 181:a4cbdfbbd2f4 | 913 | /* Clear STOP Flag, auto generated with autoend*/ |
mbed_official | 181:a4cbdfbbd2f4 | 914 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); |
mbed_official | 181:a4cbdfbbd2f4 | 915 | } |
mbed_official | 181:a4cbdfbbd2f4 | 916 | |
mbed_official | 181:a4cbdfbbd2f4 | 917 | /* Check if the maximum allowed numbe of trials has bee reached */ |
mbed_official | 181:a4cbdfbbd2f4 | 918 | if (SMBUS_Trials++ == Trials) |
mbed_official | 181:a4cbdfbbd2f4 | 919 | { |
mbed_official | 181:a4cbdfbbd2f4 | 920 | /* Generate Stop */ |
mbed_official | 181:a4cbdfbbd2f4 | 921 | hsmbus->Instance->CR2 |= I2C_CR2_STOP; |
mbed_official | 181:a4cbdfbbd2f4 | 922 | |
mbed_official | 181:a4cbdfbbd2f4 | 923 | /* Wait until STOPF flag is reset */ |
mbed_official | 181:a4cbdfbbd2f4 | 924 | if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 925 | { |
mbed_official | 181:a4cbdfbbd2f4 | 926 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 927 | } |
mbed_official | 181:a4cbdfbbd2f4 | 928 | |
mbed_official | 181:a4cbdfbbd2f4 | 929 | /* Clear STOP Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 930 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); |
mbed_official | 181:a4cbdfbbd2f4 | 931 | } |
mbed_official | 181:a4cbdfbbd2f4 | 932 | }while(SMBUS_Trials++ < Trials); |
mbed_official | 181:a4cbdfbbd2f4 | 933 | |
mbed_official | 181:a4cbdfbbd2f4 | 934 | hsmbus->State = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 935 | |
mbed_official | 181:a4cbdfbbd2f4 | 936 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 937 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 938 | |
mbed_official | 181:a4cbdfbbd2f4 | 939 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 940 | } |
mbed_official | 181:a4cbdfbbd2f4 | 941 | else |
mbed_official | 181:a4cbdfbbd2f4 | 942 | { |
mbed_official | 181:a4cbdfbbd2f4 | 943 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 944 | } |
mbed_official | 181:a4cbdfbbd2f4 | 945 | } |
mbed_official | 181:a4cbdfbbd2f4 | 946 | |
mbed_official | 181:a4cbdfbbd2f4 | 947 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 948 | * @brief This function handles SMBUS event interrupt request. |
mbed_official | 181:a4cbdfbbd2f4 | 949 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 950 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 951 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 952 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 953 | void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 954 | { |
mbed_official | 181:a4cbdfbbd2f4 | 955 | uint32_t tmpisrvalue = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 956 | |
mbed_official | 181:a4cbdfbbd2f4 | 957 | /* Use a local variable to store the current ISR flags */ |
mbed_official | 181:a4cbdfbbd2f4 | 958 | /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */ |
mbed_official | 181:a4cbdfbbd2f4 | 959 | tmpisrvalue = __SMBUS_GET_ISR_REG(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 960 | |
mbed_official | 181:a4cbdfbbd2f4 | 961 | /* SMBUS in mode Transmitter ---------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 962 | if (((__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 963 | { |
mbed_official | 181:a4cbdfbbd2f4 | 964 | /* Slave mode selected */ |
mbed_official | 181:a4cbdfbbd2f4 | 965 | if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 966 | { |
mbed_official | 181:a4cbdfbbd2f4 | 967 | SMBUS_Slave_ISR(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 968 | } |
mbed_official | 181:a4cbdfbbd2f4 | 969 | /* Master mode selected */ |
mbed_official | 181:a4cbdfbbd2f4 | 970 | else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_TX) == HAL_SMBUS_STATE_MASTER_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 971 | { |
mbed_official | 181:a4cbdfbbd2f4 | 972 | SMBUS_Master_ISR(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 973 | } |
mbed_official | 181:a4cbdfbbd2f4 | 974 | } |
mbed_official | 181:a4cbdfbbd2f4 | 975 | |
mbed_official | 181:a4cbdfbbd2f4 | 976 | /* SMBUS in mode Receiver ----------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 977 | if (((__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 978 | { |
mbed_official | 181:a4cbdfbbd2f4 | 979 | /* Slave mode selected */ |
mbed_official | 181:a4cbdfbbd2f4 | 980 | if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 981 | { |
mbed_official | 181:a4cbdfbbd2f4 | 982 | SMBUS_Slave_ISR(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 983 | } |
mbed_official | 181:a4cbdfbbd2f4 | 984 | /* Master mode selected */ |
mbed_official | 181:a4cbdfbbd2f4 | 985 | else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_RX) == HAL_SMBUS_STATE_MASTER_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 986 | { |
mbed_official | 181:a4cbdfbbd2f4 | 987 | SMBUS_Master_ISR(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 988 | } |
mbed_official | 181:a4cbdfbbd2f4 | 989 | } |
mbed_official | 181:a4cbdfbbd2f4 | 990 | |
mbed_official | 181:a4cbdfbbd2f4 | 991 | /* SMBUS in mode Listener Only --------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 992 | /* Slave mode selected */ |
mbed_official | 181:a4cbdfbbd2f4 | 993 | if (((__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 994 | && ((__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ADDRI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_STOPI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_NACKI) != RESET))) |
mbed_official | 181:a4cbdfbbd2f4 | 995 | { |
mbed_official | 181:a4cbdfbbd2f4 | 996 | if (hsmbus->State == HAL_SMBUS_STATE_SLAVE_LISTEN) |
mbed_official | 181:a4cbdfbbd2f4 | 997 | { |
mbed_official | 181:a4cbdfbbd2f4 | 998 | SMBUS_Slave_ISR(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 999 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1000 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1001 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1002 | |
mbed_official | 181:a4cbdfbbd2f4 | 1003 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1004 | * @brief This function handles SMBUS error interrupt request. |
mbed_official | 181:a4cbdfbbd2f4 | 1005 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1006 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1007 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1008 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1009 | void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1010 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1011 | /* SMBUS Bus error interrupt occurred ------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1012 | if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1013 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1014 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR; |
mbed_official | 181:a4cbdfbbd2f4 | 1015 | |
mbed_official | 181:a4cbdfbbd2f4 | 1016 | /* Clear BERR flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1017 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR); |
mbed_official | 181:a4cbdfbbd2f4 | 1018 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1019 | |
mbed_official | 181:a4cbdfbbd2f4 | 1020 | /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1021 | if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_OVR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1022 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1023 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR; |
mbed_official | 181:a4cbdfbbd2f4 | 1024 | |
mbed_official | 181:a4cbdfbbd2f4 | 1025 | /* Clear OVR flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1026 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR); |
mbed_official | 181:a4cbdfbbd2f4 | 1027 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1028 | |
mbed_official | 181:a4cbdfbbd2f4 | 1029 | /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1030 | if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ARLO) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1031 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1032 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO; |
mbed_official | 181:a4cbdfbbd2f4 | 1033 | |
mbed_official | 181:a4cbdfbbd2f4 | 1034 | /* Clear ARLO flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1035 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO); |
mbed_official | 181:a4cbdfbbd2f4 | 1036 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1037 | |
mbed_official | 181:a4cbdfbbd2f4 | 1038 | /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1039 | if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1040 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1041 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1042 | |
mbed_official | 181:a4cbdfbbd2f4 | 1043 | /* Clear TIMEOUT flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1044 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT); |
mbed_official | 181:a4cbdfbbd2f4 | 1045 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1046 | |
mbed_official | 181:a4cbdfbbd2f4 | 1047 | /* SMBUS Alert error interrupt occurred -----------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1048 | if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ALERT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1049 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1050 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT; |
mbed_official | 181:a4cbdfbbd2f4 | 1051 | |
mbed_official | 181:a4cbdfbbd2f4 | 1052 | /* Clear ALERT flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1053 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT); |
mbed_official | 181:a4cbdfbbd2f4 | 1054 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1055 | |
mbed_official | 181:a4cbdfbbd2f4 | 1056 | /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1057 | if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_PECERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1058 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1059 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR; |
mbed_official | 181:a4cbdfbbd2f4 | 1060 | |
mbed_official | 181:a4cbdfbbd2f4 | 1061 | /* Clear PEC error flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1062 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR); |
mbed_official | 181:a4cbdfbbd2f4 | 1063 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1064 | |
mbed_official | 181:a4cbdfbbd2f4 | 1065 | /* Call the Error Callback in case of Error detected */ |
mbed_official | 181:a4cbdfbbd2f4 | 1066 | if((hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE)&&(hsmbus->ErrorCode != HAL_SMBUS_ERROR_ACKF)) |
mbed_official | 181:a4cbdfbbd2f4 | 1067 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1068 | /* Do not Reset the the HAL state in case of ALERT error */ |
mbed_official | 181:a4cbdfbbd2f4 | 1069 | if((hsmbus->ErrorCode & HAL_SMBUS_ERROR_ALERT) != HAL_SMBUS_ERROR_ALERT) |
mbed_official | 181:a4cbdfbbd2f4 | 1070 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1071 | /* Reset only HAL_SMBUS_STATE_SLAVE_BUSY_XX and HAL_SMBUS_STATE_MASTER_BUSY_XX */ |
mbed_official | 181:a4cbdfbbd2f4 | 1072 | /* keep HAL_SMBUS_STATE_SLAVE_LISTEN if set */ |
mbed_official | 181:a4cbdfbbd2f4 | 1073 | hsmbus->State &= (uint32_t)~((uint32_t)HAL_SMBUS_STATE_MASTER_BUSY_RX | HAL_SMBUS_STATE_MASTER_BUSY_TX | HAL_SMBUS_STATE_SLAVE_BUSY_RX | HAL_SMBUS_STATE_SLAVE_BUSY_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 1074 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1075 | |
mbed_official | 181:a4cbdfbbd2f4 | 1076 | /* Call the Error callback to prevent upper layer */ |
mbed_official | 181:a4cbdfbbd2f4 | 1077 | HAL_SMBUS_ErrorCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1078 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1079 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1080 | |
mbed_official | 181:a4cbdfbbd2f4 | 1081 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1082 | * @brief Master Tx Transfer completed callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1083 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1084 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1085 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1086 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1087 | __weak void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1088 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1089 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1090 | the HAL_SMBUS_TxCpltCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1091 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1092 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1093 | |
mbed_official | 181:a4cbdfbbd2f4 | 1094 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1095 | * @brief Master Rx Transfer completed callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1096 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1097 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1098 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1099 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1100 | __weak void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1101 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1102 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1103 | the HAL_SMBUS_TxCpltCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1104 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1105 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1106 | |
mbed_official | 181:a4cbdfbbd2f4 | 1107 | /** @brief Slave Tx Transfer completed callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1108 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1109 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1110 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1111 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1112 | __weak void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1113 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1114 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1115 | the HAL_SMBUS_TxCpltCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1116 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1117 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1118 | |
mbed_official | 181:a4cbdfbbd2f4 | 1119 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1120 | * @brief Slave Rx Transfer completed callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1121 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1122 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1123 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1124 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1125 | __weak void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1126 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1127 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1128 | the HAL_SMBUS_TxCpltCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1129 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1130 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1131 | |
mbed_official | 181:a4cbdfbbd2f4 | 1132 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1133 | * @brief Slave Address Match callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1134 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1135 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1136 | * @param TransferDirection: Master request Transfer Direction (Write/Read) |
mbed_official | 181:a4cbdfbbd2f4 | 1137 | * @param AddrMatchCode: Address Match Code |
mbed_official | 181:a4cbdfbbd2f4 | 1138 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1139 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1140 | __weak void HAL_SMBUS_SlaveAddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode) |
mbed_official | 181:a4cbdfbbd2f4 | 1141 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1142 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1143 | the HAL_SMBUS_SlaveAddrCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1144 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1145 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1146 | |
mbed_official | 181:a4cbdfbbd2f4 | 1147 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1148 | * @brief Slave Listen Complete callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1149 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1150 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1151 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1152 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1153 | __weak void HAL_SMBUS_SlaveListenCpltCallback(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1154 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1155 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1156 | the HAL_SMBUS_SlaveListenCpltCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1157 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1158 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1159 | |
mbed_official | 181:a4cbdfbbd2f4 | 1160 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1161 | * @brief SMBUS error callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1162 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1163 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1164 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1165 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1166 | __weak void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1167 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1168 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1169 | the HAL_SMBUS_ErrorCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1170 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1171 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1172 | |
mbed_official | 181:a4cbdfbbd2f4 | 1173 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1174 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1175 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1176 | |
mbed_official | 181:a4cbdfbbd2f4 | 1177 | /** @defgroup HAL_SMBUS_Group3 Peripheral State and Errors functions |
mbed_official | 181:a4cbdfbbd2f4 | 1178 | * @brief Peripheral State and Errors functions |
mbed_official | 181:a4cbdfbbd2f4 | 1179 | * |
mbed_official | 181:a4cbdfbbd2f4 | 1180 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 1181 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 1182 | ##### Peripheral State and Errors functions ##### |
mbed_official | 181:a4cbdfbbd2f4 | 1183 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 1184 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 1185 | This subsection permit to get in run-time the status of the peripheral |
mbed_official | 181:a4cbdfbbd2f4 | 1186 | and the data flow. |
mbed_official | 181:a4cbdfbbd2f4 | 1187 | |
mbed_official | 181:a4cbdfbbd2f4 | 1188 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 1189 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 1190 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1191 | |
mbed_official | 181:a4cbdfbbd2f4 | 1192 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1193 | * @brief Returns the SMBUS state. |
mbed_official | 181:a4cbdfbbd2f4 | 1194 | * @param hsmbus : SMBUS handle |
mbed_official | 181:a4cbdfbbd2f4 | 1195 | * @retval HAL state |
mbed_official | 181:a4cbdfbbd2f4 | 1196 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1197 | HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1198 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1199 | return hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1200 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1201 | |
mbed_official | 181:a4cbdfbbd2f4 | 1202 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1203 | * @brief Return the SMBUS error code |
mbed_official | 181:a4cbdfbbd2f4 | 1204 | * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1205 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1206 | * @retval SMBUS Error Code |
mbed_official | 181:a4cbdfbbd2f4 | 1207 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1208 | uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1209 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1210 | return hsmbus->ErrorCode; |
mbed_official | 181:a4cbdfbbd2f4 | 1211 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1212 | |
mbed_official | 181:a4cbdfbbd2f4 | 1213 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1214 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1215 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1216 | |
mbed_official | 181:a4cbdfbbd2f4 | 1217 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1218 | * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode |
mbed_official | 181:a4cbdfbbd2f4 | 1219 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1220 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1221 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1222 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1223 | static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1224 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1225 | uint16_t DevAddress; |
mbed_official | 181:a4cbdfbbd2f4 | 1226 | |
mbed_official | 181:a4cbdfbbd2f4 | 1227 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1228 | __HAL_LOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1229 | |
mbed_official | 181:a4cbdfbbd2f4 | 1230 | if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1231 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1232 | /* Clear NACK Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1233 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF); |
mbed_official | 181:a4cbdfbbd2f4 | 1234 | |
mbed_official | 181:a4cbdfbbd2f4 | 1235 | /* Set corresponding Error Code */ |
mbed_official | 181:a4cbdfbbd2f4 | 1236 | /* No need to generate STOP, it is automatically done */ |
mbed_official | 181:a4cbdfbbd2f4 | 1237 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF; |
mbed_official | 181:a4cbdfbbd2f4 | 1238 | |
mbed_official | 181:a4cbdfbbd2f4 | 1239 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1240 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1241 | |
mbed_official | 181:a4cbdfbbd2f4 | 1242 | /* Call the Error callback to prevent upper layer */ |
mbed_official | 181:a4cbdfbbd2f4 | 1243 | HAL_SMBUS_ErrorCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1244 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1245 | else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1246 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1247 | |
mbed_official | 181:a4cbdfbbd2f4 | 1248 | /* Call the corresponding callback to inform upper layer of End of Transfer */ |
mbed_official | 181:a4cbdfbbd2f4 | 1249 | if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 1250 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1251 | /* Disable Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1252 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 1253 | |
mbed_official | 181:a4cbdfbbd2f4 | 1254 | /* Clear STOP Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1255 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); |
mbed_official | 181:a4cbdfbbd2f4 | 1256 | |
mbed_official | 181:a4cbdfbbd2f4 | 1257 | /* Clear Configuration Register 2 */ |
mbed_official | 181:a4cbdfbbd2f4 | 1258 | __HAL_SMBUS_RESET_CR2(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1259 | |
mbed_official | 181:a4cbdfbbd2f4 | 1260 | |
mbed_official | 181:a4cbdfbbd2f4 | 1261 | /* Flush remaining data in Fifo register in case of error occurs before TXEmpty */ |
mbed_official | 181:a4cbdfbbd2f4 | 1262 | /* Disable the selected SMBUS peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 1263 | __HAL_SMBUS_DISABLE(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1264 | |
mbed_official | 181:a4cbdfbbd2f4 | 1265 | hsmbus->PreviousState = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1266 | hsmbus->State = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1267 | |
mbed_official | 181:a4cbdfbbd2f4 | 1268 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1269 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1270 | |
mbed_official | 181:a4cbdfbbd2f4 | 1271 | /* REenable the selected SMBUS peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 1272 | __HAL_SMBUS_ENABLE(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1273 | |
mbed_official | 181:a4cbdfbbd2f4 | 1274 | HAL_SMBUS_MasterTxCpltCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1275 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1276 | else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 1277 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1278 | /* Disable Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1279 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX); |
mbed_official | 181:a4cbdfbbd2f4 | 1280 | |
mbed_official | 181:a4cbdfbbd2f4 | 1281 | /* Clear STOP Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1282 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); |
mbed_official | 181:a4cbdfbbd2f4 | 1283 | |
mbed_official | 181:a4cbdfbbd2f4 | 1284 | /* Clear Configuration Register 2 */ |
mbed_official | 181:a4cbdfbbd2f4 | 1285 | __HAL_SMBUS_RESET_CR2(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1286 | |
mbed_official | 181:a4cbdfbbd2f4 | 1287 | hsmbus->PreviousState = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1288 | hsmbus->State = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1289 | |
mbed_official | 181:a4cbdfbbd2f4 | 1290 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1291 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1292 | |
mbed_official | 181:a4cbdfbbd2f4 | 1293 | HAL_SMBUS_MasterRxCpltCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1294 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1295 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1296 | else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1297 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1298 | /* Read data from RXDR */ |
mbed_official | 181:a4cbdfbbd2f4 | 1299 | (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR; |
mbed_official | 181:a4cbdfbbd2f4 | 1300 | hsmbus->XferSize--; |
mbed_official | 181:a4cbdfbbd2f4 | 1301 | hsmbus->XferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 1302 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1303 | else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1304 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1305 | /* Write data to TXDR */ |
mbed_official | 181:a4cbdfbbd2f4 | 1306 | hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++); |
mbed_official | 181:a4cbdfbbd2f4 | 1307 | hsmbus->XferSize--; |
mbed_official | 181:a4cbdfbbd2f4 | 1308 | hsmbus->XferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 1309 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1310 | else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1311 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1312 | if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0)) |
mbed_official | 181:a4cbdfbbd2f4 | 1313 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1314 | DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD); |
mbed_official | 181:a4cbdfbbd2f4 | 1315 | |
mbed_official | 181:a4cbdfbbd2f4 | 1316 | if(hsmbus->XferCount > MAX_NBYTE_SIZE) |
mbed_official | 181:a4cbdfbbd2f4 | 1317 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1318 | SMBUS_TransferConfig(hsmbus,DevAddress,MAX_NBYTE_SIZE, SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP); |
mbed_official | 181:a4cbdfbbd2f4 | 1319 | hsmbus->XferSize = MAX_NBYTE_SIZE; |
mbed_official | 181:a4cbdfbbd2f4 | 1320 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1321 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1322 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1323 | SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_AUTOEND_MODE, SMBUS_GENERATE_START_WRITE); |
mbed_official | 181:a4cbdfbbd2f4 | 1324 | /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ |
mbed_official | 181:a4cbdfbbd2f4 | 1325 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
mbed_official | 181:a4cbdfbbd2f4 | 1326 | if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1327 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1328 | hsmbus->XferSize--; |
mbed_official | 181:a4cbdfbbd2f4 | 1329 | hsmbus->XferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 1330 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1331 | hsmbus->XferSize = hsmbus->XferCount; |
mbed_official | 181:a4cbdfbbd2f4 | 1332 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1333 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1334 | else if((hsmbus->XferSize == 0)&&(hsmbus->XferCount==0)) |
mbed_official | 181:a4cbdfbbd2f4 | 1335 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1336 | /* Call TxCpltCallback if no stop mode is set */ |
mbed_official | 181:a4cbdfbbd2f4 | 1337 | if(__HAL_SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE) |
mbed_official | 181:a4cbdfbbd2f4 | 1338 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1339 | /* Call the corresponding callback to inform upper layer of End of Transfer */ |
mbed_official | 181:a4cbdfbbd2f4 | 1340 | if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 1341 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1342 | /* Disable Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1343 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 1344 | hsmbus->PreviousState = hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1345 | hsmbus->State = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1346 | |
mbed_official | 181:a4cbdfbbd2f4 | 1347 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1348 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1349 | |
mbed_official | 181:a4cbdfbbd2f4 | 1350 | HAL_SMBUS_MasterTxCpltCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1351 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1352 | else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 1353 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1354 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX); |
mbed_official | 181:a4cbdfbbd2f4 | 1355 | hsmbus->PreviousState = hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1356 | hsmbus->State = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1357 | |
mbed_official | 181:a4cbdfbbd2f4 | 1358 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1359 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1360 | |
mbed_official | 181:a4cbdfbbd2f4 | 1361 | HAL_SMBUS_MasterRxCpltCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1362 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1363 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1364 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1365 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1366 | else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1367 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1368 | if(hsmbus->XferCount == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1369 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1370 | /* Specific use case for Quick command */ |
mbed_official | 181:a4cbdfbbd2f4 | 1371 | if(hsmbus->pBuffPtr == NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 1372 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1373 | /* Generate a Stop command */ |
mbed_official | 181:a4cbdfbbd2f4 | 1374 | hsmbus->Instance->CR2 |= I2C_CR2_STOP; |
mbed_official | 181:a4cbdfbbd2f4 | 1375 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1376 | /* Call TxCpltCallback if no stop mode is set */ |
mbed_official | 181:a4cbdfbbd2f4 | 1377 | else if(__HAL_SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE) |
mbed_official | 181:a4cbdfbbd2f4 | 1378 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1379 | /* No Generate Stop, to permit restart mode */ |
mbed_official | 181:a4cbdfbbd2f4 | 1380 | /* The stop will be done at the end of transfer, when SMBUS_AUTOEND_MODE enable */ |
mbed_official | 181:a4cbdfbbd2f4 | 1381 | |
mbed_official | 181:a4cbdfbbd2f4 | 1382 | /* Call the corresponding callback to inform upper layer of End of Transfer */ |
mbed_official | 181:a4cbdfbbd2f4 | 1383 | if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 1384 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1385 | /* Disable Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1386 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 1387 | hsmbus->PreviousState = hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1388 | hsmbus->State = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1389 | |
mbed_official | 181:a4cbdfbbd2f4 | 1390 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1391 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1392 | |
mbed_official | 181:a4cbdfbbd2f4 | 1393 | HAL_SMBUS_MasterTxCpltCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1394 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1395 | else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 1396 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1397 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX); |
mbed_official | 181:a4cbdfbbd2f4 | 1398 | hsmbus->PreviousState = hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1399 | hsmbus->State = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1400 | |
mbed_official | 181:a4cbdfbbd2f4 | 1401 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1402 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1403 | |
mbed_official | 181:a4cbdfbbd2f4 | 1404 | HAL_SMBUS_MasterRxCpltCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1405 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1406 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1407 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1408 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1409 | |
mbed_official | 181:a4cbdfbbd2f4 | 1410 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1411 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1412 | |
mbed_official | 181:a4cbdfbbd2f4 | 1413 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1414 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1415 | |
mbed_official | 181:a4cbdfbbd2f4 | 1416 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1417 | * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode |
mbed_official | 181:a4cbdfbbd2f4 | 1418 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1419 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1420 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1421 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1422 | static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus) |
mbed_official | 181:a4cbdfbbd2f4 | 1423 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1424 | uint8_t TransferDirection = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1425 | uint16_t SlaveAddrCode = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1426 | |
mbed_official | 181:a4cbdfbbd2f4 | 1427 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1428 | __HAL_LOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1429 | |
mbed_official | 181:a4cbdfbbd2f4 | 1430 | if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1431 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1432 | /* Check that SMBUS transfer finished */ |
mbed_official | 181:a4cbdfbbd2f4 | 1433 | /* if yes, normal usecase, a NACK is sent by the HOST when Transfer is finished */ |
mbed_official | 181:a4cbdfbbd2f4 | 1434 | /* Mean XferCount == 0*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1435 | /* So clear Flag NACKF only */ |
mbed_official | 181:a4cbdfbbd2f4 | 1436 | if(hsmbus->XferCount == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1437 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1438 | /* Clear NACK Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1439 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF); |
mbed_official | 181:a4cbdfbbd2f4 | 1440 | |
mbed_official | 181:a4cbdfbbd2f4 | 1441 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1442 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1443 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1444 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1445 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1446 | /* if no, error usecase, a Non-Acknowledge of last Data is generated by the HOST*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1447 | /* Clear NACK Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1448 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF); |
mbed_official | 181:a4cbdfbbd2f4 | 1449 | |
mbed_official | 181:a4cbdfbbd2f4 | 1450 | /* Set HAL State to "Idle" State, mean to LISTEN state */ |
mbed_official | 181:a4cbdfbbd2f4 | 1451 | /* So reset Slave Busy state */ |
mbed_official | 181:a4cbdfbbd2f4 | 1452 | hsmbus->PreviousState = hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1453 | hsmbus->State &= (uint32_t)~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 1454 | hsmbus->State &= (uint32_t)~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX); |
mbed_official | 181:a4cbdfbbd2f4 | 1455 | |
mbed_official | 181:a4cbdfbbd2f4 | 1456 | /* Disable RX/TX Interrupts, keep only ADDR Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1457 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 1458 | |
mbed_official | 181:a4cbdfbbd2f4 | 1459 | /* Set ErrorCode corresponding to a Non-Acknowledge */ |
mbed_official | 181:a4cbdfbbd2f4 | 1460 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF; |
mbed_official | 181:a4cbdfbbd2f4 | 1461 | |
mbed_official | 181:a4cbdfbbd2f4 | 1462 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1463 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1464 | |
mbed_official | 181:a4cbdfbbd2f4 | 1465 | /* Call the Error callback to prevent upper layer */ |
mbed_official | 181:a4cbdfbbd2f4 | 1466 | HAL_SMBUS_ErrorCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1467 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1468 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1469 | else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ADDR) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1470 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1471 | TransferDirection = __HAL_SMBUS_GET_DIR(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1472 | SlaveAddrCode = __HAL_SMBUS_GET_ADDR_MATCH(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1473 | |
mbed_official | 181:a4cbdfbbd2f4 | 1474 | /* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1475 | /* Other ADDRInterrupt will be treat in next Listen usecase */ |
mbed_official | 181:a4cbdfbbd2f4 | 1476 | __HAL_SMBUS_DISABLE_IT(hsmbus, SMBUS_IT_ADDRI); |
mbed_official | 181:a4cbdfbbd2f4 | 1477 | |
mbed_official | 181:a4cbdfbbd2f4 | 1478 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1479 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1480 | |
mbed_official | 181:a4cbdfbbd2f4 | 1481 | /* Call Slave Addr callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 1482 | HAL_SMBUS_SlaveAddrCallback(hsmbus, TransferDirection, SlaveAddrCode); |
mbed_official | 181:a4cbdfbbd2f4 | 1483 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1484 | else if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) || (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1485 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1486 | /* Read data from RXDR */ |
mbed_official | 181:a4cbdfbbd2f4 | 1487 | (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR; |
mbed_official | 181:a4cbdfbbd2f4 | 1488 | hsmbus->XferSize--; |
mbed_official | 181:a4cbdfbbd2f4 | 1489 | hsmbus->XferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 1490 | |
mbed_official | 181:a4cbdfbbd2f4 | 1491 | if(hsmbus->XferCount == 1) |
mbed_official | 181:a4cbdfbbd2f4 | 1492 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1493 | /* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 1494 | /* or only the last Byte of Transfer */ |
mbed_official | 181:a4cbdfbbd2f4 | 1495 | /* So reset the RELOAD bit mode */ |
mbed_official | 181:a4cbdfbbd2f4 | 1496 | hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE; |
mbed_official | 181:a4cbdfbbd2f4 | 1497 | SMBUS_TransferConfig(hsmbus,0 ,1 , hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
mbed_official | 181:a4cbdfbbd2f4 | 1498 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1499 | else if(hsmbus->XferCount == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1500 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1501 | /* Last Byte is received, disable Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1502 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX); |
mbed_official | 181:a4cbdfbbd2f4 | 1503 | |
mbed_official | 181:a4cbdfbbd2f4 | 1504 | /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_SMBUS_STATE_SLAVE_LISTEN */ |
mbed_official | 181:a4cbdfbbd2f4 | 1505 | hsmbus->PreviousState = hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1506 | hsmbus->State &= (uint32_t)~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX); |
mbed_official | 181:a4cbdfbbd2f4 | 1507 | |
mbed_official | 181:a4cbdfbbd2f4 | 1508 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1509 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1510 | |
mbed_official | 181:a4cbdfbbd2f4 | 1511 | /* Call the Rx complete callback to inform upper layer of the end of receive process */ |
mbed_official | 181:a4cbdfbbd2f4 | 1512 | HAL_SMBUS_SlaveRxCpltCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1513 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1514 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1515 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1516 | /* Set Reload for next Bytes */ |
mbed_official | 181:a4cbdfbbd2f4 | 1517 | SMBUS_TransferConfig(hsmbus,0, 1, SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP); |
mbed_official | 181:a4cbdfbbd2f4 | 1518 | |
mbed_official | 181:a4cbdfbbd2f4 | 1519 | /* Ack last Byte Read */ |
mbed_official | 181:a4cbdfbbd2f4 | 1520 | hsmbus->Instance->CR2 &= ~I2C_CR2_NACK; |
mbed_official | 181:a4cbdfbbd2f4 | 1521 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1522 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1523 | else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1524 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1525 | /* Write data to TXDR only if XferCount not reach "0" */ |
mbed_official | 181:a4cbdfbbd2f4 | 1526 | /* A TXIS flag can be set, during STOP treatment */ |
mbed_official | 181:a4cbdfbbd2f4 | 1527 | |
mbed_official | 181:a4cbdfbbd2f4 | 1528 | /* Check if all Datas have already been sent */ |
mbed_official | 181:a4cbdfbbd2f4 | 1529 | /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ |
mbed_official | 181:a4cbdfbbd2f4 | 1530 | if(hsmbus->XferCount > 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1531 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1532 | /* Write data to TXDR */ |
mbed_official | 181:a4cbdfbbd2f4 | 1533 | hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++); |
mbed_official | 181:a4cbdfbbd2f4 | 1534 | hsmbus->XferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 1535 | hsmbus->XferSize--; |
mbed_official | 181:a4cbdfbbd2f4 | 1536 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1537 | |
mbed_official | 181:a4cbdfbbd2f4 | 1538 | if(hsmbus->XferSize == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1539 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1540 | /* Last Byte is Transmitted */ |
mbed_official | 181:a4cbdfbbd2f4 | 1541 | /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_SLAVE_LISTEN */ |
mbed_official | 181:a4cbdfbbd2f4 | 1542 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 1543 | hsmbus->PreviousState = hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1544 | hsmbus->State &= (uint32_t)~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 1545 | |
mbed_official | 181:a4cbdfbbd2f4 | 1546 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1547 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1548 | |
mbed_official | 181:a4cbdfbbd2f4 | 1549 | /* Call the Tx complete callback to inform upper layer of the end of transmit process */ |
mbed_official | 181:a4cbdfbbd2f4 | 1550 | HAL_SMBUS_SlaveTxCpltCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1551 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1552 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1553 | |
mbed_official | 181:a4cbdfbbd2f4 | 1554 | /* Check if STOPF is set */ |
mbed_official | 181:a4cbdfbbd2f4 | 1555 | if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1556 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1557 | if((hsmbus->State & HAL_SMBUS_STATE_SLAVE_LISTEN) == HAL_SMBUS_STATE_SLAVE_LISTEN) |
mbed_official | 181:a4cbdfbbd2f4 | 1558 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1559 | /* Disable RX and TX Interrupts */ |
mbed_official | 181:a4cbdfbbd2f4 | 1560 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX); |
mbed_official | 181:a4cbdfbbd2f4 | 1561 | |
mbed_official | 181:a4cbdfbbd2f4 | 1562 | /* Disable ADDR Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1563 | SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR); |
mbed_official | 181:a4cbdfbbd2f4 | 1564 | |
mbed_official | 181:a4cbdfbbd2f4 | 1565 | /* Disable Address Acknowledge */ |
mbed_official | 181:a4cbdfbbd2f4 | 1566 | hsmbus->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 181:a4cbdfbbd2f4 | 1567 | |
mbed_official | 181:a4cbdfbbd2f4 | 1568 | /* Clear Configuration Register 2 */ |
mbed_official | 181:a4cbdfbbd2f4 | 1569 | __HAL_SMBUS_RESET_CR2(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1570 | |
mbed_official | 181:a4cbdfbbd2f4 | 1571 | /* Clear STOP Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1572 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); |
mbed_official | 181:a4cbdfbbd2f4 | 1573 | |
mbed_official | 181:a4cbdfbbd2f4 | 1574 | /* Clear ADDR flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1575 | __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR); |
mbed_official | 181:a4cbdfbbd2f4 | 1576 | |
mbed_official | 181:a4cbdfbbd2f4 | 1577 | hsmbus->XferOptions = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1578 | hsmbus->PreviousState = hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1579 | hsmbus->State = HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1580 | |
mbed_official | 181:a4cbdfbbd2f4 | 1581 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1582 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1583 | |
mbed_official | 181:a4cbdfbbd2f4 | 1584 | /* Call the Slave Complete callback, to prevent upper layer of the end of slave usecase */ |
mbed_official | 181:a4cbdfbbd2f4 | 1585 | HAL_SMBUS_SlaveListenCpltCallback(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1586 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1587 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1588 | |
mbed_official | 181:a4cbdfbbd2f4 | 1589 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1590 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1591 | |
mbed_official | 181:a4cbdfbbd2f4 | 1592 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1593 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1594 | |
mbed_official | 181:a4cbdfbbd2f4 | 1595 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1596 | * @brief Manage the enabling of Interrupts |
mbed_official | 181:a4cbdfbbd2f4 | 1597 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1598 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1599 | * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition. |
mbed_official | 181:a4cbdfbbd2f4 | 1600 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1601 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1602 | static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest) |
mbed_official | 181:a4cbdfbbd2f4 | 1603 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1604 | uint32_t tmpisr = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1605 | |
mbed_official | 181:a4cbdfbbd2f4 | 1606 | if((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) |
mbed_official | 181:a4cbdfbbd2f4 | 1607 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1608 | /* Enable ERR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1609 | tmpisr |= SMBUS_IT_ERRI; |
mbed_official | 181:a4cbdfbbd2f4 | 1610 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1611 | |
mbed_official | 181:a4cbdfbbd2f4 | 1612 | if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR) |
mbed_official | 181:a4cbdfbbd2f4 | 1613 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1614 | /* Enable ADDR, STOP interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1615 | tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_ERRI; |
mbed_official | 181:a4cbdfbbd2f4 | 1616 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1617 | |
mbed_official | 181:a4cbdfbbd2f4 | 1618 | if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 1619 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1620 | /* Enable ERR, TC, STOP, NACK, RXI interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1621 | tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI; |
mbed_official | 181:a4cbdfbbd2f4 | 1622 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1623 | |
mbed_official | 181:a4cbdfbbd2f4 | 1624 | if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 1625 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1626 | /* Enable ERR, TC, STOP, NACK, TXI interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1627 | tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI; |
mbed_official | 181:a4cbdfbbd2f4 | 1628 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1629 | |
mbed_official | 181:a4cbdfbbd2f4 | 1630 | /* Enable interrupts only at the end */ |
mbed_official | 181:a4cbdfbbd2f4 | 1631 | /* to avoid the risk of SMBUS interrupt handle execution before */ |
mbed_official | 181:a4cbdfbbd2f4 | 1632 | /* all interrupts requested done */ |
mbed_official | 181:a4cbdfbbd2f4 | 1633 | __HAL_SMBUS_ENABLE_IT(hsmbus, tmpisr); |
mbed_official | 181:a4cbdfbbd2f4 | 1634 | |
mbed_official | 181:a4cbdfbbd2f4 | 1635 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1636 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1637 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1638 | * @brief Manage the disabling of Interrupts |
mbed_official | 181:a4cbdfbbd2f4 | 1639 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1640 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1641 | * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition. |
mbed_official | 181:a4cbdfbbd2f4 | 1642 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1643 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1644 | static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest) |
mbed_official | 181:a4cbdfbbd2f4 | 1645 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1646 | uint32_t tmpisr = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1647 | |
mbed_official | 181:a4cbdfbbd2f4 | 1648 | if( ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY) ) |
mbed_official | 181:a4cbdfbbd2f4 | 1649 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1650 | /* Disable ERR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1651 | tmpisr |= SMBUS_IT_ERRI; |
mbed_official | 181:a4cbdfbbd2f4 | 1652 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1653 | |
mbed_official | 181:a4cbdfbbd2f4 | 1654 | if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 1655 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1656 | /* Disable TC, STOP, NACK, TXI interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1657 | tmpisr |= SMBUS_IT_TCI | SMBUS_IT_TXI; |
mbed_official | 181:a4cbdfbbd2f4 | 1658 | |
mbed_official | 181:a4cbdfbbd2f4 | 1659 | if((__HAL_SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1660 | && ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_LISTEN) != HAL_SMBUS_STATE_SLAVE_LISTEN)) |
mbed_official | 181:a4cbdfbbd2f4 | 1661 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1662 | /* Disable ERR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1663 | tmpisr |= SMBUS_IT_ERRI; |
mbed_official | 181:a4cbdfbbd2f4 | 1664 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1665 | |
mbed_official | 181:a4cbdfbbd2f4 | 1666 | if((hsmbus->State & HAL_SMBUS_STATE_SLAVE_LISTEN) != HAL_SMBUS_STATE_SLAVE_LISTEN) |
mbed_official | 181:a4cbdfbbd2f4 | 1667 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1668 | /* Disable STOPI, NACKI */ |
mbed_official | 181:a4cbdfbbd2f4 | 1669 | tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI; |
mbed_official | 181:a4cbdfbbd2f4 | 1670 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1671 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1672 | |
mbed_official | 181:a4cbdfbbd2f4 | 1673 | if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 1674 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1675 | /* Disable TC, STOP, NACK, RXI interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1676 | tmpisr |= SMBUS_IT_TCI | SMBUS_IT_RXI; |
mbed_official | 181:a4cbdfbbd2f4 | 1677 | |
mbed_official | 181:a4cbdfbbd2f4 | 1678 | if((__HAL_SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1679 | && ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_LISTEN) != HAL_SMBUS_STATE_SLAVE_LISTEN)) |
mbed_official | 181:a4cbdfbbd2f4 | 1680 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1681 | /* Disable ERR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1682 | tmpisr |= SMBUS_IT_ERRI; |
mbed_official | 181:a4cbdfbbd2f4 | 1683 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1684 | |
mbed_official | 181:a4cbdfbbd2f4 | 1685 | if((hsmbus->State & HAL_SMBUS_STATE_SLAVE_LISTEN) != HAL_SMBUS_STATE_SLAVE_LISTEN) |
mbed_official | 181:a4cbdfbbd2f4 | 1686 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1687 | /* Disable STOPI, NACKI */ |
mbed_official | 181:a4cbdfbbd2f4 | 1688 | tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI; |
mbed_official | 181:a4cbdfbbd2f4 | 1689 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1690 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1691 | |
mbed_official | 181:a4cbdfbbd2f4 | 1692 | if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR) |
mbed_official | 181:a4cbdfbbd2f4 | 1693 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1694 | /* Enable ADDR, STOP interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1695 | tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI; |
mbed_official | 181:a4cbdfbbd2f4 | 1696 | |
mbed_official | 181:a4cbdfbbd2f4 | 1697 | if(__HAL_SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1698 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1699 | /* Disable ERR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1700 | tmpisr |= SMBUS_IT_ERRI; |
mbed_official | 181:a4cbdfbbd2f4 | 1701 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1702 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1703 | |
mbed_official | 181:a4cbdfbbd2f4 | 1704 | /* Disable interrupts only at the end */ |
mbed_official | 181:a4cbdfbbd2f4 | 1705 | /* to avoid a breaking situation like at "t" time */ |
mbed_official | 181:a4cbdfbbd2f4 | 1706 | /* all disable interrupts request are not done */ |
mbed_official | 181:a4cbdfbbd2f4 | 1707 | __HAL_SMBUS_DISABLE_IT(hsmbus, tmpisr); |
mbed_official | 181:a4cbdfbbd2f4 | 1708 | |
mbed_official | 181:a4cbdfbbd2f4 | 1709 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1710 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1711 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1712 | * @brief This function handles SMBUS Communication Timeout. |
mbed_official | 181:a4cbdfbbd2f4 | 1713 | * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1714 | * the configuration information for the specified SMBUS. |
mbed_official | 181:a4cbdfbbd2f4 | 1715 | * @param Flag: specifies the SMBUS flag to check. |
mbed_official | 181:a4cbdfbbd2f4 | 1716 | * @param Status: The new Flag status (SET or RESET). |
mbed_official | 181:a4cbdfbbd2f4 | 1717 | * @param Timeout: Timeout duration |
mbed_official | 181:a4cbdfbbd2f4 | 1718 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1719 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1720 | static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 1721 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1722 | uint32_t tickstart = 0x00; |
mbed_official | 181:a4cbdfbbd2f4 | 1723 | tickstart = HAL_GetTick(); |
mbed_official | 181:a4cbdfbbd2f4 | 1724 | |
mbed_official | 181:a4cbdfbbd2f4 | 1725 | /* Wait until flag is set */ |
mbed_official | 181:a4cbdfbbd2f4 | 1726 | if(Status == RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1727 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1728 | while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) == RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1729 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1730 | /* Check for the Timeout */ |
mbed_official | 181:a4cbdfbbd2f4 | 1731 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 181:a4cbdfbbd2f4 | 1732 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1733 | if((HAL_GetTick() - tickstart ) > Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 1734 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1735 | hsmbus->PreviousState = hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1736 | hsmbus->State= HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1737 | |
mbed_official | 181:a4cbdfbbd2f4 | 1738 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1739 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1740 | |
mbed_official | 181:a4cbdfbbd2f4 | 1741 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1742 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1743 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1744 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1745 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1746 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1747 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1748 | while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1749 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1750 | /* Check for the Timeout */ |
mbed_official | 181:a4cbdfbbd2f4 | 1751 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 181:a4cbdfbbd2f4 | 1752 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1753 | if((HAL_GetTick() - tickstart ) > Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 1754 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1755 | hsmbus->PreviousState = hsmbus->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1756 | hsmbus->State= HAL_SMBUS_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1757 | |
mbed_official | 181:a4cbdfbbd2f4 | 1758 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1759 | __HAL_UNLOCK(hsmbus); |
mbed_official | 181:a4cbdfbbd2f4 | 1760 | |
mbed_official | 181:a4cbdfbbd2f4 | 1761 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1762 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1763 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1764 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1765 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1766 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1767 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1768 | |
mbed_official | 181:a4cbdfbbd2f4 | 1769 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1770 | * @brief Handles SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). |
mbed_official | 181:a4cbdfbbd2f4 | 1771 | * @param hsmbus: SMBUS handle. |
mbed_official | 181:a4cbdfbbd2f4 | 1772 | * @param DevAddress: specifies the slave address to be programmed. |
mbed_official | 181:a4cbdfbbd2f4 | 1773 | * @param Size: specifies the number of bytes to be programmed. |
mbed_official | 181:a4cbdfbbd2f4 | 1774 | * This parameter must be a value between 0 and 255. |
mbed_official | 181:a4cbdfbbd2f4 | 1775 | * @param Mode: new state of the SMBUS START condition generation. |
mbed_official | 181:a4cbdfbbd2f4 | 1776 | * This parameter can be one or a combination of the following values: |
mbed_official | 181:a4cbdfbbd2f4 | 1777 | * @arg SMBUS_NO_MODE: No specific mode enabled. |
mbed_official | 181:a4cbdfbbd2f4 | 1778 | * @arg SMBUS_RELOAD_MODE: Enable Reload mode. |
mbed_official | 181:a4cbdfbbd2f4 | 1779 | * @arg SMBUS_AUTOEND_MODE: Enable Automatic end mode. |
mbed_official | 181:a4cbdfbbd2f4 | 1780 | * @arg SMBUS_SOFTEND_MODE: Enable Software end mode and Reload mode. |
mbed_official | 181:a4cbdfbbd2f4 | 1781 | * @param Request: new state of the SMBUS START condition generation. |
mbed_official | 181:a4cbdfbbd2f4 | 1782 | * This parameter can be one of the following values: |
mbed_official | 181:a4cbdfbbd2f4 | 1783 | * @arg SMBUS_NO_STARTSTOP: Don't Generate stop and start condition. |
mbed_official | 181:a4cbdfbbd2f4 | 1784 | * @arg SMBUS_GENERATE_STOP: Generate stop condition (Size should be set to 0). |
mbed_official | 181:a4cbdfbbd2f4 | 1785 | * @arg SMBUS_GENERATE_START_READ: Generate Restart for read request. |
mbed_official | 181:a4cbdfbbd2f4 | 1786 | * @arg SMBUS_GENERATE_START_WRITE: Generate Restart for write request. |
mbed_official | 181:a4cbdfbbd2f4 | 1787 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1788 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1789 | static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) |
mbed_official | 181:a4cbdfbbd2f4 | 1790 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1791 | uint32_t tmpreg = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1792 | |
mbed_official | 181:a4cbdfbbd2f4 | 1793 | /* Check the parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 1794 | assert_param(IS_SMBUS_INSTANCE(hsmbus->Instance)); |
mbed_official | 181:a4cbdfbbd2f4 | 1795 | assert_param(IS_SMBUS_TRANSFER_MODE(Mode)); |
mbed_official | 181:a4cbdfbbd2f4 | 1796 | assert_param(IS_SMBUS_TRANSFER_REQUEST(Request)); |
mbed_official | 181:a4cbdfbbd2f4 | 1797 | |
mbed_official | 181:a4cbdfbbd2f4 | 1798 | /* Get the CR2 register value */ |
mbed_official | 181:a4cbdfbbd2f4 | 1799 | tmpreg = hsmbus->Instance->CR2; |
mbed_official | 181:a4cbdfbbd2f4 | 1800 | |
mbed_official | 181:a4cbdfbbd2f4 | 1801 | /* clear tmpreg specific bits */ |
mbed_official | 181:a4cbdfbbd2f4 | 1802 | tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE)); |
mbed_official | 181:a4cbdfbbd2f4 | 1803 | |
mbed_official | 181:a4cbdfbbd2f4 | 1804 | /* update tmpreg */ |
mbed_official | 181:a4cbdfbbd2f4 | 1805 | tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \ |
mbed_official | 181:a4cbdfbbd2f4 | 1806 | (uint32_t)Mode | (uint32_t)Request); |
mbed_official | 181:a4cbdfbbd2f4 | 1807 | |
mbed_official | 181:a4cbdfbbd2f4 | 1808 | /* update CR2 register */ |
mbed_official | 181:a4cbdfbbd2f4 | 1809 | hsmbus->Instance->CR2 = tmpreg; |
mbed_official | 181:a4cbdfbbd2f4 | 1810 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1811 | |
mbed_official | 181:a4cbdfbbd2f4 | 1812 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1813 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1814 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1815 | |
mbed_official | 181:a4cbdfbbd2f4 | 1816 | #endif /* HAL_SMBUS_MODULE_ENABLED */ |
mbed_official | 181:a4cbdfbbd2f4 | 1817 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1818 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1819 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1820 | |
mbed_official | 181:a4cbdfbbd2f4 | 1821 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1822 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1823 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1824 | |
mbed_official | 181:a4cbdfbbd2f4 | 1825 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |