mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_L053R8/stm32l0xx_hal_i2s.c@181:a4cbdfbbd2f4, 2014-05-07 (annotated)
- Committer:
- mbed_official
- Date:
- Wed May 07 13:15:08 2014 +0100
- Revision:
- 181:a4cbdfbbd2f4
Synchronized with git revision 7751e759576c6fd68deccb81ea82bac19ed41745
Full URL: https://github.com/mbedmicro/mbed/commit/7751e759576c6fd68deccb81ea82bac19ed41745/
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 181:a4cbdfbbd2f4 | 1 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 2 | ****************************************************************************** |
mbed_official | 181:a4cbdfbbd2f4 | 3 | * @file stm32l0xx_hal_i2s.c |
mbed_official | 181:a4cbdfbbd2f4 | 4 | * @author MCD Application Team |
mbed_official | 181:a4cbdfbbd2f4 | 5 | * @version V1.0.0 |
mbed_official | 181:a4cbdfbbd2f4 | 6 | * @date 22-April-2014 |
mbed_official | 181:a4cbdfbbd2f4 | 7 | * @brief I2S HAL module driver. |
mbed_official | 181:a4cbdfbbd2f4 | 8 | * |
mbed_official | 181:a4cbdfbbd2f4 | 9 | * This file provides firmware functions to manage the following |
mbed_official | 181:a4cbdfbbd2f4 | 10 | * functionalities of the Integrated Interchip Sound (I2S) peripheral: |
mbed_official | 181:a4cbdfbbd2f4 | 11 | * + Initialization and de-initialization functions |
mbed_official | 181:a4cbdfbbd2f4 | 12 | * + IO operation functions |
mbed_official | 181:a4cbdfbbd2f4 | 13 | * + Peripheral State and Errors functions |
mbed_official | 181:a4cbdfbbd2f4 | 14 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 15 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 16 | ##### How to use this driver ##### |
mbed_official | 181:a4cbdfbbd2f4 | 17 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 18 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 19 | The I2S HAL driver can be used as follow: |
mbed_official | 181:a4cbdfbbd2f4 | 20 | |
mbed_official | 181:a4cbdfbbd2f4 | 21 | (#) Declare a I2S_HandleTypeDef handle structure. |
mbed_official | 181:a4cbdfbbd2f4 | 22 | (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API: |
mbed_official | 181:a4cbdfbbd2f4 | 23 | (##) Enable the SPIx interface clock. |
mbed_official | 181:a4cbdfbbd2f4 | 24 | (##) I2S pins configuration: |
mbed_official | 181:a4cbdfbbd2f4 | 25 | (+++) Enable the clock for the I2S GPIOs. |
mbed_official | 181:a4cbdfbbd2f4 | 26 | (+++) Configure these I2S pins as alternate function pull-up. |
mbed_official | 181:a4cbdfbbd2f4 | 27 | (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 28 | and HAL_I2S_Receive_IT() APIs). |
mbed_official | 181:a4cbdfbbd2f4 | 29 | (+++) Configure the I2Sx interrupt priority. |
mbed_official | 181:a4cbdfbbd2f4 | 30 | (+++) Enable the NVIC I2S IRQ handle. |
mbed_official | 181:a4cbdfbbd2f4 | 31 | (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA() |
mbed_official | 181:a4cbdfbbd2f4 | 32 | and HAL_I2S_Receive_DMA() APIs: |
mbed_official | 181:a4cbdfbbd2f4 | 33 | (+++) Declare a DMA handle structure for the Tx/Rx stream. |
mbed_official | 181:a4cbdfbbd2f4 | 34 | (+++) Enable the DMAx interface clock. |
mbed_official | 181:a4cbdfbbd2f4 | 35 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. |
mbed_official | 181:a4cbdfbbd2f4 | 36 | (+++) Configure the DMA Tx/Rx Stream. |
mbed_official | 181:a4cbdfbbd2f4 | 37 | (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle. |
mbed_official | 181:a4cbdfbbd2f4 | 38 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the |
mbed_official | 181:a4cbdfbbd2f4 | 39 | DMA Tx/Rx Stream. |
mbed_official | 181:a4cbdfbbd2f4 | 40 | |
mbed_official | 181:a4cbdfbbd2f4 | 41 | (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity |
mbed_official | 181:a4cbdfbbd2f4 | 42 | using HAL_I2S_Init() function. |
mbed_official | 181:a4cbdfbbd2f4 | 43 | |
mbed_official | 181:a4cbdfbbd2f4 | 44 | -@- The specific I2S interrupts (Transmission complete interrupt, |
mbed_official | 181:a4cbdfbbd2f4 | 45 | RXNE interrupt and Error Interrupts) will be managed using the macros |
mbed_official | 181:a4cbdfbbd2f4 | 46 | __I2S_ENABLE_IT() and __I2S_DISABLE_IT() inside the transmit and receive process. |
mbed_official | 181:a4cbdfbbd2f4 | 47 | (#) Three mode of operations are available within this driver : |
mbed_official | 181:a4cbdfbbd2f4 | 48 | |
mbed_official | 181:a4cbdfbbd2f4 | 49 | *** Polling mode IO operation *** |
mbed_official | 181:a4cbdfbbd2f4 | 50 | ================================= |
mbed_official | 181:a4cbdfbbd2f4 | 51 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 52 | (+) Send an amount of data in blocking mode using HAL_I2S_Transmit() |
mbed_official | 181:a4cbdfbbd2f4 | 53 | (+) Receive an amount of data in blocking mode using HAL_I2S_Receive() |
mbed_official | 181:a4cbdfbbd2f4 | 54 | |
mbed_official | 181:a4cbdfbbd2f4 | 55 | *** Interrupt mode IO operation *** |
mbed_official | 181:a4cbdfbbd2f4 | 56 | =================================== |
mbed_official | 181:a4cbdfbbd2f4 | 57 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 58 | (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 59 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 60 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 61 | (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 62 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 63 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 64 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 65 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
mbed_official | 181:a4cbdfbbd2f4 | 66 | |
mbed_official | 181:a4cbdfbbd2f4 | 67 | *** DMA mode IO operation *** |
mbed_official | 181:a4cbdfbbd2f4 | 68 | ============================== |
mbed_official | 181:a4cbdfbbd2f4 | 69 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 70 | (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA() |
mbed_official | 181:a4cbdfbbd2f4 | 71 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 72 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 73 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 74 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 75 | (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA() |
mbed_official | 181:a4cbdfbbd2f4 | 76 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 77 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 78 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 79 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
mbed_official | 181:a4cbdfbbd2f4 | 80 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
mbed_official | 181:a4cbdfbbd2f4 | 81 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
mbed_official | 181:a4cbdfbbd2f4 | 82 | (+) Pause the DMA Transfer using HAL_I2S_DMAPause() |
mbed_official | 181:a4cbdfbbd2f4 | 83 | (+) Resume the DMA Transfer using HAL_I2S_DMAResume() |
mbed_official | 181:a4cbdfbbd2f4 | 84 | (+) Stop the DMA Transfer using HAL_I2S_DMAStop() |
mbed_official | 181:a4cbdfbbd2f4 | 85 | |
mbed_official | 181:a4cbdfbbd2f4 | 86 | *** I2S HAL driver macros list *** |
mbed_official | 181:a4cbdfbbd2f4 | 87 | =================================== |
mbed_official | 181:a4cbdfbbd2f4 | 88 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 89 | Below the list of most used macros in USART HAL driver. |
mbed_official | 181:a4cbdfbbd2f4 | 90 | |
mbed_official | 181:a4cbdfbbd2f4 | 91 | (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode) |
mbed_official | 181:a4cbdfbbd2f4 | 92 | (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode) |
mbed_official | 181:a4cbdfbbd2f4 | 93 | (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts |
mbed_official | 181:a4cbdfbbd2f4 | 94 | (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts |
mbed_official | 181:a4cbdfbbd2f4 | 95 | (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not |
mbed_official | 181:a4cbdfbbd2f4 | 96 | |
mbed_official | 181:a4cbdfbbd2f4 | 97 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 98 | (@) You can refer to the I2S HAL driver header file for more useful macros |
mbed_official | 181:a4cbdfbbd2f4 | 99 | |
mbed_official | 181:a4cbdfbbd2f4 | 100 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 101 | ****************************************************************************** |
mbed_official | 181:a4cbdfbbd2f4 | 102 | * @attention |
mbed_official | 181:a4cbdfbbd2f4 | 103 | * |
mbed_official | 181:a4cbdfbbd2f4 | 104 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 181:a4cbdfbbd2f4 | 105 | * |
mbed_official | 181:a4cbdfbbd2f4 | 106 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 181:a4cbdfbbd2f4 | 107 | * are permitted provided that the following conditions are met: |
mbed_official | 181:a4cbdfbbd2f4 | 108 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 181:a4cbdfbbd2f4 | 109 | * this list of conditions and the following disclaimer. |
mbed_official | 181:a4cbdfbbd2f4 | 110 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 181:a4cbdfbbd2f4 | 111 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 181:a4cbdfbbd2f4 | 112 | * and/or other materials provided with the distribution. |
mbed_official | 181:a4cbdfbbd2f4 | 113 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 181:a4cbdfbbd2f4 | 114 | * may be used to endorse or promote products derived from this software |
mbed_official | 181:a4cbdfbbd2f4 | 115 | * without specific prior written permission. |
mbed_official | 181:a4cbdfbbd2f4 | 116 | * |
mbed_official | 181:a4cbdfbbd2f4 | 117 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 181:a4cbdfbbd2f4 | 118 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 181:a4cbdfbbd2f4 | 119 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 181:a4cbdfbbd2f4 | 120 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 181:a4cbdfbbd2f4 | 121 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 181:a4cbdfbbd2f4 | 122 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 181:a4cbdfbbd2f4 | 123 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 181:a4cbdfbbd2f4 | 124 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 181:a4cbdfbbd2f4 | 125 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 181:a4cbdfbbd2f4 | 126 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 181:a4cbdfbbd2f4 | 127 | * |
mbed_official | 181:a4cbdfbbd2f4 | 128 | ****************************************************************************** |
mbed_official | 181:a4cbdfbbd2f4 | 129 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 130 | |
mbed_official | 181:a4cbdfbbd2f4 | 131 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 132 | #include "stm32l0xx_hal.h" |
mbed_official | 181:a4cbdfbbd2f4 | 133 | |
mbed_official | 181:a4cbdfbbd2f4 | 134 | /** @addtogroup STM32L0xx_HAL_Driver |
mbed_official | 181:a4cbdfbbd2f4 | 135 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 136 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 137 | |
mbed_official | 181:a4cbdfbbd2f4 | 138 | /** @defgroup I2S |
mbed_official | 181:a4cbdfbbd2f4 | 139 | * @brief I2S HAL module driver |
mbed_official | 181:a4cbdfbbd2f4 | 140 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 141 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 142 | |
mbed_official | 181:a4cbdfbbd2f4 | 143 | #ifdef HAL_I2S_MODULE_ENABLED |
mbed_official | 181:a4cbdfbbd2f4 | 144 | |
mbed_official | 181:a4cbdfbbd2f4 | 145 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 146 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 147 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 148 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 149 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 150 | static HAL_StatusTypeDef I2S_Transmit_IT(I2S_HandleTypeDef *hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 151 | static HAL_StatusTypeDef I2S_Receive_IT(I2S_HandleTypeDef *hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 152 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 153 | |
mbed_official | 181:a4cbdfbbd2f4 | 154 | /** @defgroup I2S_Private_Functions |
mbed_official | 181:a4cbdfbbd2f4 | 155 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 156 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 157 | |
mbed_official | 181:a4cbdfbbd2f4 | 158 | /** @defgroup I2S_Group1 Initialization and de-initialization functions |
mbed_official | 181:a4cbdfbbd2f4 | 159 | * @brief Initialization and Configuration functions |
mbed_official | 181:a4cbdfbbd2f4 | 160 | * |
mbed_official | 181:a4cbdfbbd2f4 | 161 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 162 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 163 | ##### Initialization and de-initialization functions ##### |
mbed_official | 181:a4cbdfbbd2f4 | 164 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 165 | [..] This subsection provides a set of functions allowing to initialize and |
mbed_official | 181:a4cbdfbbd2f4 | 166 | de-initialiaze the I2Sx peripheral in simplex mode: |
mbed_official | 181:a4cbdfbbd2f4 | 167 | |
mbed_official | 181:a4cbdfbbd2f4 | 168 | (+) User must Implement HAL_I2S_MspInit() function in which he configures |
mbed_official | 181:a4cbdfbbd2f4 | 169 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
mbed_official | 181:a4cbdfbbd2f4 | 170 | |
mbed_official | 181:a4cbdfbbd2f4 | 171 | (+) Call the function HAL_I2S_Init() to configure the selected device with |
mbed_official | 181:a4cbdfbbd2f4 | 172 | the selected configuration: |
mbed_official | 181:a4cbdfbbd2f4 | 173 | (++) Mode |
mbed_official | 181:a4cbdfbbd2f4 | 174 | (++) Standard |
mbed_official | 181:a4cbdfbbd2f4 | 175 | (++) Data Format |
mbed_official | 181:a4cbdfbbd2f4 | 176 | (++) MCLK Output |
mbed_official | 181:a4cbdfbbd2f4 | 177 | (++) Audio frequency |
mbed_official | 181:a4cbdfbbd2f4 | 178 | (++) Polarity |
mbed_official | 181:a4cbdfbbd2f4 | 179 | |
mbed_official | 181:a4cbdfbbd2f4 | 180 | (+) Call the function HAL_I2S_DeInit() to restore the default configuration |
mbed_official | 181:a4cbdfbbd2f4 | 181 | of the selected I2Sx periperal. |
mbed_official | 181:a4cbdfbbd2f4 | 182 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 183 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 184 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 185 | |
mbed_official | 181:a4cbdfbbd2f4 | 186 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 187 | * @brief Initializes the I2S according to the specified parameters |
mbed_official | 181:a4cbdfbbd2f4 | 188 | * in the I2S_InitTypeDef and create the associated handle. |
mbed_official | 181:a4cbdfbbd2f4 | 189 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 190 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 191 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 192 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 193 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 194 | { |
mbed_official | 181:a4cbdfbbd2f4 | 195 | uint32_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1; |
mbed_official | 181:a4cbdfbbd2f4 | 196 | uint32_t tmp = 0, i2sclk = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 197 | |
mbed_official | 181:a4cbdfbbd2f4 | 198 | /* Check the I2S handle allocation */ |
mbed_official | 181:a4cbdfbbd2f4 | 199 | if(hi2s == NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 200 | { |
mbed_official | 181:a4cbdfbbd2f4 | 201 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 202 | } |
mbed_official | 181:a4cbdfbbd2f4 | 203 | |
mbed_official | 181:a4cbdfbbd2f4 | 204 | /* Check the I2S parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 205 | assert_param(IS_I2S_MODE(hi2s->Init.Mode)); |
mbed_official | 181:a4cbdfbbd2f4 | 206 | assert_param(IS_I2S_STANDARD(hi2s->Init.Standard)); |
mbed_official | 181:a4cbdfbbd2f4 | 207 | assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat)); |
mbed_official | 181:a4cbdfbbd2f4 | 208 | assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput)); |
mbed_official | 181:a4cbdfbbd2f4 | 209 | assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq)); |
mbed_official | 181:a4cbdfbbd2f4 | 210 | assert_param(IS_I2S_CPOL(hi2s->Init.CPOL)); |
mbed_official | 181:a4cbdfbbd2f4 | 211 | |
mbed_official | 181:a4cbdfbbd2f4 | 212 | if(hi2s->State == HAL_I2S_STATE_RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 213 | { |
mbed_official | 181:a4cbdfbbd2f4 | 214 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ |
mbed_official | 181:a4cbdfbbd2f4 | 215 | HAL_I2S_MspInit(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 216 | } |
mbed_official | 181:a4cbdfbbd2f4 | 217 | |
mbed_official | 181:a4cbdfbbd2f4 | 218 | hi2s->State = HAL_I2S_STATE_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 219 | |
mbed_official | 181:a4cbdfbbd2f4 | 220 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration ---------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 221 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
mbed_official | 181:a4cbdfbbd2f4 | 222 | hi2s->Instance->I2SCFGR &= (uint32_t)~((uint32_t)SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \ |
mbed_official | 181:a4cbdfbbd2f4 | 223 | SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \ |
mbed_official | 181:a4cbdfbbd2f4 | 224 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD); |
mbed_official | 181:a4cbdfbbd2f4 | 225 | hi2s->Instance->I2SPR = 0x0002; |
mbed_official | 181:a4cbdfbbd2f4 | 226 | |
mbed_official | 181:a4cbdfbbd2f4 | 227 | /* Get the I2SCFGR register value */ |
mbed_official | 181:a4cbdfbbd2f4 | 228 | tmpreg = hi2s->Instance->I2SCFGR; |
mbed_official | 181:a4cbdfbbd2f4 | 229 | |
mbed_official | 181:a4cbdfbbd2f4 | 230 | /* If the default frequency value has to be written, reinitialize i2sdiv and i2sodd */ |
mbed_official | 181:a4cbdfbbd2f4 | 231 | /* If the requested audio frequency is not the default, compute the prescaler */ |
mbed_official | 181:a4cbdfbbd2f4 | 232 | if(hi2s->Init.AudioFreq != I2S_AUDIOFREQ_DEFAULT) |
mbed_official | 181:a4cbdfbbd2f4 | 233 | { |
mbed_official | 181:a4cbdfbbd2f4 | 234 | /* Check the frame length (For the Prescaler computing) *******************/ |
mbed_official | 181:a4cbdfbbd2f4 | 235 | if(hi2s->Init.DataFormat != I2S_DATAFORMAT_16B) |
mbed_official | 181:a4cbdfbbd2f4 | 236 | { |
mbed_official | 181:a4cbdfbbd2f4 | 237 | /* Packet length is 32 bits */ |
mbed_official | 181:a4cbdfbbd2f4 | 238 | packetlength = 2; |
mbed_official | 181:a4cbdfbbd2f4 | 239 | } |
mbed_official | 181:a4cbdfbbd2f4 | 240 | |
mbed_official | 181:a4cbdfbbd2f4 | 241 | /* Get I2S source Clock frequency ****************************************/ |
mbed_official | 181:a4cbdfbbd2f4 | 242 | /* I2S clock source is SystemClock for stm32l0xx devices */ |
mbed_official | 181:a4cbdfbbd2f4 | 243 | |
mbed_official | 181:a4cbdfbbd2f4 | 244 | i2sclk = HAL_RCC_GetSysClockFreq(); |
mbed_official | 181:a4cbdfbbd2f4 | 245 | |
mbed_official | 181:a4cbdfbbd2f4 | 246 | /* Compute the Real divider depending on the MCLK output state, with a floating point */ |
mbed_official | 181:a4cbdfbbd2f4 | 247 | if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE) |
mbed_official | 181:a4cbdfbbd2f4 | 248 | { |
mbed_official | 181:a4cbdfbbd2f4 | 249 | /* MCLK output is enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 250 | tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5); |
mbed_official | 181:a4cbdfbbd2f4 | 251 | } |
mbed_official | 181:a4cbdfbbd2f4 | 252 | else |
mbed_official | 181:a4cbdfbbd2f4 | 253 | { |
mbed_official | 181:a4cbdfbbd2f4 | 254 | /* MCLK output is disabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 255 | tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5); |
mbed_official | 181:a4cbdfbbd2f4 | 256 | } |
mbed_official | 181:a4cbdfbbd2f4 | 257 | |
mbed_official | 181:a4cbdfbbd2f4 | 258 | /* Remove the flatting point */ |
mbed_official | 181:a4cbdfbbd2f4 | 259 | tmp = tmp / 10; |
mbed_official | 181:a4cbdfbbd2f4 | 260 | |
mbed_official | 181:a4cbdfbbd2f4 | 261 | /* Check the parity of the divider */ |
mbed_official | 181:a4cbdfbbd2f4 | 262 | i2sodd = (uint32_t)(tmp & (uint32_t)1); |
mbed_official | 181:a4cbdfbbd2f4 | 263 | |
mbed_official | 181:a4cbdfbbd2f4 | 264 | /* Compute the i2sdiv prescaler */ |
mbed_official | 181:a4cbdfbbd2f4 | 265 | i2sdiv = (uint32_t)((tmp - i2sodd) / 2); |
mbed_official | 181:a4cbdfbbd2f4 | 266 | |
mbed_official | 181:a4cbdfbbd2f4 | 267 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
mbed_official | 181:a4cbdfbbd2f4 | 268 | i2sodd = (uint32_t) (i2sodd << 8); |
mbed_official | 181:a4cbdfbbd2f4 | 269 | } |
mbed_official | 181:a4cbdfbbd2f4 | 270 | |
mbed_official | 181:a4cbdfbbd2f4 | 271 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
mbed_official | 181:a4cbdfbbd2f4 | 272 | if((i2sdiv < 2) || (i2sdiv > 0xFF)) |
mbed_official | 181:a4cbdfbbd2f4 | 273 | { |
mbed_official | 181:a4cbdfbbd2f4 | 274 | /* Set the default values */ |
mbed_official | 181:a4cbdfbbd2f4 | 275 | i2sdiv = 2; |
mbed_official | 181:a4cbdfbbd2f4 | 276 | i2sodd = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 277 | } |
mbed_official | 181:a4cbdfbbd2f4 | 278 | |
mbed_official | 181:a4cbdfbbd2f4 | 279 | /* Write to SPIx I2SPR register the computed value */ |
mbed_official | 181:a4cbdfbbd2f4 | 280 | hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput)); |
mbed_official | 181:a4cbdfbbd2f4 | 281 | |
mbed_official | 181:a4cbdfbbd2f4 | 282 | /* Configure the I2S with the I2S_InitStruct values */ |
mbed_official | 181:a4cbdfbbd2f4 | 283 | tmpreg |= (uint32_t)(SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode | hi2s->Init.Standard | hi2s->Init.DataFormat | hi2s->Init.CPOL); |
mbed_official | 181:a4cbdfbbd2f4 | 284 | |
mbed_official | 181:a4cbdfbbd2f4 | 285 | /* Write to SPIx I2SCFGR */ |
mbed_official | 181:a4cbdfbbd2f4 | 286 | hi2s->Instance->I2SCFGR = tmpreg; |
mbed_official | 181:a4cbdfbbd2f4 | 287 | |
mbed_official | 181:a4cbdfbbd2f4 | 288 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 289 | hi2s->State= HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 290 | |
mbed_official | 181:a4cbdfbbd2f4 | 291 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 292 | } |
mbed_official | 181:a4cbdfbbd2f4 | 293 | |
mbed_official | 181:a4cbdfbbd2f4 | 294 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 295 | * @brief DeInitializes the I2S peripheral |
mbed_official | 181:a4cbdfbbd2f4 | 296 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 297 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 298 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 299 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 300 | HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 301 | { |
mbed_official | 181:a4cbdfbbd2f4 | 302 | /* Check the I2S handle allocation */ |
mbed_official | 181:a4cbdfbbd2f4 | 303 | if(hi2s == NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 304 | { |
mbed_official | 181:a4cbdfbbd2f4 | 305 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 306 | } |
mbed_official | 181:a4cbdfbbd2f4 | 307 | |
mbed_official | 181:a4cbdfbbd2f4 | 308 | hi2s->State = HAL_I2S_STATE_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 309 | |
mbed_official | 181:a4cbdfbbd2f4 | 310 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ |
mbed_official | 181:a4cbdfbbd2f4 | 311 | HAL_I2S_MspDeInit(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 312 | |
mbed_official | 181:a4cbdfbbd2f4 | 313 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 314 | hi2s->State = HAL_I2S_STATE_RESET; |
mbed_official | 181:a4cbdfbbd2f4 | 315 | |
mbed_official | 181:a4cbdfbbd2f4 | 316 | /* Release Lock */ |
mbed_official | 181:a4cbdfbbd2f4 | 317 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 318 | |
mbed_official | 181:a4cbdfbbd2f4 | 319 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 320 | } |
mbed_official | 181:a4cbdfbbd2f4 | 321 | |
mbed_official | 181:a4cbdfbbd2f4 | 322 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 323 | * @brief I2S MSP Init |
mbed_official | 181:a4cbdfbbd2f4 | 324 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 325 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 326 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 327 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 328 | __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 329 | { |
mbed_official | 181:a4cbdfbbd2f4 | 330 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 331 | the HAL_I2S_MspInit could be implenetd in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 332 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 333 | } |
mbed_official | 181:a4cbdfbbd2f4 | 334 | |
mbed_official | 181:a4cbdfbbd2f4 | 335 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 336 | * @brief I2S MSP DeInit |
mbed_official | 181:a4cbdfbbd2f4 | 337 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 338 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 339 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 340 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 341 | __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 342 | { |
mbed_official | 181:a4cbdfbbd2f4 | 343 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 344 | the HAL_I2S_MspDeInit could be implenetd in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 345 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 346 | } |
mbed_official | 181:a4cbdfbbd2f4 | 347 | |
mbed_official | 181:a4cbdfbbd2f4 | 348 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 349 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 350 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 351 | |
mbed_official | 181:a4cbdfbbd2f4 | 352 | /** @defgroup I2S_Group2 IO operation functions |
mbed_official | 181:a4cbdfbbd2f4 | 353 | * @brief Data transfers functions |
mbed_official | 181:a4cbdfbbd2f4 | 354 | * |
mbed_official | 181:a4cbdfbbd2f4 | 355 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 356 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 357 | ##### IO operation functions ##### |
mbed_official | 181:a4cbdfbbd2f4 | 358 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 359 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 360 | This subsection provides a set of functions allowing to manage the I2S data |
mbed_official | 181:a4cbdfbbd2f4 | 361 | transfers. |
mbed_official | 181:a4cbdfbbd2f4 | 362 | |
mbed_official | 181:a4cbdfbbd2f4 | 363 | (#) There is two mode of transfer: |
mbed_official | 181:a4cbdfbbd2f4 | 364 | (++) Blocking mode : The communication is performed in the polling mode. |
mbed_official | 181:a4cbdfbbd2f4 | 365 | The status of all data processing is returned by the same function |
mbed_official | 181:a4cbdfbbd2f4 | 366 | after finishing transfer. |
mbed_official | 181:a4cbdfbbd2f4 | 367 | (++) No-Blocking mode : The communication is performed using Interrupts |
mbed_official | 181:a4cbdfbbd2f4 | 368 | or DMA. These functions return the status of the transfer startup. |
mbed_official | 181:a4cbdfbbd2f4 | 369 | The end of the data processing will be indicated through the |
mbed_official | 181:a4cbdfbbd2f4 | 370 | dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when |
mbed_official | 181:a4cbdfbbd2f4 | 371 | using DMA mode. |
mbed_official | 181:a4cbdfbbd2f4 | 372 | |
mbed_official | 181:a4cbdfbbd2f4 | 373 | (#) Blocking mode functions are : |
mbed_official | 181:a4cbdfbbd2f4 | 374 | (++) HAL_I2S_Transmit() |
mbed_official | 181:a4cbdfbbd2f4 | 375 | (++) HAL_I2S_Receive() |
mbed_official | 181:a4cbdfbbd2f4 | 376 | |
mbed_official | 181:a4cbdfbbd2f4 | 377 | (#) No-Blocking mode functions with Interrupt are : |
mbed_official | 181:a4cbdfbbd2f4 | 378 | (++) HAL_I2S_Transmit_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 379 | (++) HAL_I2S_Receive_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 380 | |
mbed_official | 181:a4cbdfbbd2f4 | 381 | (#) No-Blocking mode functions with DMA are : |
mbed_official | 181:a4cbdfbbd2f4 | 382 | (++) HAL_I2S_Transmit_DMA() |
mbed_official | 181:a4cbdfbbd2f4 | 383 | (++) HAL_I2S_Receive_DMA() |
mbed_official | 181:a4cbdfbbd2f4 | 384 | |
mbed_official | 181:a4cbdfbbd2f4 | 385 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
mbed_official | 181:a4cbdfbbd2f4 | 386 | (++) HAL_I2S_TxCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 387 | (++) HAL_I2S_RxCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 388 | (++) HAL_I2S_ErrorCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 389 | |
mbed_official | 181:a4cbdfbbd2f4 | 390 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 391 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 392 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 393 | |
mbed_official | 181:a4cbdfbbd2f4 | 394 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 395 | * @brief Transmit an amount of data in blocking mode |
mbed_official | 181:a4cbdfbbd2f4 | 396 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 397 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 398 | * @param pData: a 16-bit pointer to data buffer. |
mbed_official | 181:a4cbdfbbd2f4 | 399 | * @param Size: number of data sample to be sent: |
mbed_official | 181:a4cbdfbbd2f4 | 400 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
mbed_official | 181:a4cbdfbbd2f4 | 401 | * configuration phase, the Size parameter means the number of 16-bit data length |
mbed_official | 181:a4cbdfbbd2f4 | 402 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
mbed_official | 181:a4cbdfbbd2f4 | 403 | * the Size parameter means the number of 16-bit data length. |
mbed_official | 181:a4cbdfbbd2f4 | 404 | * @param Timeout: Timeout duration |
mbed_official | 181:a4cbdfbbd2f4 | 405 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
mbed_official | 181:a4cbdfbbd2f4 | 406 | * between Master and Slave(example: audio streaming). |
mbed_official | 181:a4cbdfbbd2f4 | 407 | * @note This function can use an Audio Frequency up to 44KHz when I2S Clock Source is 32MHz |
mbed_official | 181:a4cbdfbbd2f4 | 408 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 409 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 410 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 411 | { |
mbed_official | 181:a4cbdfbbd2f4 | 412 | uint32_t tmp1 = 0, tmp2 = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 413 | if((pData == NULL ) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 414 | { |
mbed_official | 181:a4cbdfbbd2f4 | 415 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 416 | } |
mbed_official | 181:a4cbdfbbd2f4 | 417 | |
mbed_official | 181:a4cbdfbbd2f4 | 418 | if(hi2s->State == HAL_I2S_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 419 | { |
mbed_official | 181:a4cbdfbbd2f4 | 420 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 421 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 422 | if((tmp1 == I2S_DATAFORMAT_24B)|| \ |
mbed_official | 181:a4cbdfbbd2f4 | 423 | (tmp2 == I2S_DATAFORMAT_32B)) |
mbed_official | 181:a4cbdfbbd2f4 | 424 | { |
mbed_official | 181:a4cbdfbbd2f4 | 425 | hi2s->TxXferSize = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 426 | hi2s->TxXferCount = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 427 | } |
mbed_official | 181:a4cbdfbbd2f4 | 428 | else |
mbed_official | 181:a4cbdfbbd2f4 | 429 | { |
mbed_official | 181:a4cbdfbbd2f4 | 430 | hi2s->TxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 431 | hi2s->TxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 432 | } |
mbed_official | 181:a4cbdfbbd2f4 | 433 | |
mbed_official | 181:a4cbdfbbd2f4 | 434 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 435 | __HAL_LOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 436 | |
mbed_official | 181:a4cbdfbbd2f4 | 437 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
mbed_official | 181:a4cbdfbbd2f4 | 438 | |
mbed_official | 181:a4cbdfbbd2f4 | 439 | /* Check if the I2S is already enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 440 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
mbed_official | 181:a4cbdfbbd2f4 | 441 | { |
mbed_official | 181:a4cbdfbbd2f4 | 442 | /* Enable I2S peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 443 | __HAL_I2S_ENABLE(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 444 | } |
mbed_official | 181:a4cbdfbbd2f4 | 445 | |
mbed_official | 181:a4cbdfbbd2f4 | 446 | while(hi2s->TxXferCount > 0) |
mbed_official | 181:a4cbdfbbd2f4 | 447 | { |
mbed_official | 181:a4cbdfbbd2f4 | 448 | hi2s->Instance->DR = (*pData++); |
mbed_official | 181:a4cbdfbbd2f4 | 449 | hi2s->TxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 450 | /* Wait until TXE flag is set */ |
mbed_official | 181:a4cbdfbbd2f4 | 451 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 452 | { |
mbed_official | 181:a4cbdfbbd2f4 | 453 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 454 | } |
mbed_official | 181:a4cbdfbbd2f4 | 455 | } |
mbed_official | 181:a4cbdfbbd2f4 | 456 | /* Wait until Busy flag is reset */ |
mbed_official | 181:a4cbdfbbd2f4 | 457 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 458 | { |
mbed_official | 181:a4cbdfbbd2f4 | 459 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 460 | } |
mbed_official | 181:a4cbdfbbd2f4 | 461 | |
mbed_official | 181:a4cbdfbbd2f4 | 462 | hi2s->State = HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 463 | |
mbed_official | 181:a4cbdfbbd2f4 | 464 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 465 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 466 | |
mbed_official | 181:a4cbdfbbd2f4 | 467 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 468 | } |
mbed_official | 181:a4cbdfbbd2f4 | 469 | else |
mbed_official | 181:a4cbdfbbd2f4 | 470 | { |
mbed_official | 181:a4cbdfbbd2f4 | 471 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 472 | } |
mbed_official | 181:a4cbdfbbd2f4 | 473 | } |
mbed_official | 181:a4cbdfbbd2f4 | 474 | |
mbed_official | 181:a4cbdfbbd2f4 | 475 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 476 | * @brief Receive an amount of data in blocking mode |
mbed_official | 181:a4cbdfbbd2f4 | 477 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 478 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 479 | * @param pData: a 16-bit pointer to data buffer. |
mbed_official | 181:a4cbdfbbd2f4 | 480 | * @param Size: number of data sample to be sent: |
mbed_official | 181:a4cbdfbbd2f4 | 481 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
mbed_official | 181:a4cbdfbbd2f4 | 482 | * configuration phase, the Size parameter means the number of 16-bit data length |
mbed_official | 181:a4cbdfbbd2f4 | 483 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
mbed_official | 181:a4cbdfbbd2f4 | 484 | * the Size parameter means the number of 16-bit data length. |
mbed_official | 181:a4cbdfbbd2f4 | 485 | * @param Timeout: Timeout duration |
mbed_official | 181:a4cbdfbbd2f4 | 486 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
mbed_official | 181:a4cbdfbbd2f4 | 487 | * between Master and Slave(example: audio streaming). |
mbed_official | 181:a4cbdfbbd2f4 | 488 | * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate |
mbed_official | 181:a4cbdfbbd2f4 | 489 | * in continouse way and as the I2S is not disabled at the end of the I2S transaction. |
mbed_official | 181:a4cbdfbbd2f4 | 490 | * @note This function can use an Audio Frequency up to 44KHz when I2S Clock Source is 32MHz |
mbed_official | 181:a4cbdfbbd2f4 | 491 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 492 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 493 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 494 | { |
mbed_official | 181:a4cbdfbbd2f4 | 495 | uint32_t tmp1 = 0, tmp2 = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 496 | if((pData == NULL ) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 497 | { |
mbed_official | 181:a4cbdfbbd2f4 | 498 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 499 | } |
mbed_official | 181:a4cbdfbbd2f4 | 500 | |
mbed_official | 181:a4cbdfbbd2f4 | 501 | if(hi2s->State == HAL_I2S_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 502 | { |
mbed_official | 181:a4cbdfbbd2f4 | 503 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 504 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 505 | if((tmp1 == I2S_DATAFORMAT_24B)|| \ |
mbed_official | 181:a4cbdfbbd2f4 | 506 | (tmp2 == I2S_DATAFORMAT_32B)) |
mbed_official | 181:a4cbdfbbd2f4 | 507 | { |
mbed_official | 181:a4cbdfbbd2f4 | 508 | hi2s->RxXferSize = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 509 | hi2s->RxXferCount = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 510 | } |
mbed_official | 181:a4cbdfbbd2f4 | 511 | else |
mbed_official | 181:a4cbdfbbd2f4 | 512 | { |
mbed_official | 181:a4cbdfbbd2f4 | 513 | hi2s->RxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 514 | hi2s->RxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 515 | } |
mbed_official | 181:a4cbdfbbd2f4 | 516 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 517 | __HAL_LOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 518 | |
mbed_official | 181:a4cbdfbbd2f4 | 519 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 520 | |
mbed_official | 181:a4cbdfbbd2f4 | 521 | /* Check if the I2S is already enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 522 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
mbed_official | 181:a4cbdfbbd2f4 | 523 | { |
mbed_official | 181:a4cbdfbbd2f4 | 524 | /* Enable I2S peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 525 | __HAL_I2S_ENABLE(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 526 | } |
mbed_official | 181:a4cbdfbbd2f4 | 527 | |
mbed_official | 181:a4cbdfbbd2f4 | 528 | /* Check if Master Receiver mode is selected */ |
mbed_official | 181:a4cbdfbbd2f4 | 529 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 530 | { |
mbed_official | 181:a4cbdfbbd2f4 | 531 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read |
mbed_official | 181:a4cbdfbbd2f4 | 532 | access to the SPI_SR register. */ |
mbed_official | 181:a4cbdfbbd2f4 | 533 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 534 | } |
mbed_official | 181:a4cbdfbbd2f4 | 535 | |
mbed_official | 181:a4cbdfbbd2f4 | 536 | /* Receive data */ |
mbed_official | 181:a4cbdfbbd2f4 | 537 | while(hi2s->RxXferCount > 0) |
mbed_official | 181:a4cbdfbbd2f4 | 538 | { |
mbed_official | 181:a4cbdfbbd2f4 | 539 | /* Wait until RXNE flag is set */ |
mbed_official | 181:a4cbdfbbd2f4 | 540 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 541 | { |
mbed_official | 181:a4cbdfbbd2f4 | 542 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 543 | } |
mbed_official | 181:a4cbdfbbd2f4 | 544 | |
mbed_official | 181:a4cbdfbbd2f4 | 545 | (*pData++) = hi2s->Instance->DR; |
mbed_official | 181:a4cbdfbbd2f4 | 546 | hi2s->RxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 547 | } |
mbed_official | 181:a4cbdfbbd2f4 | 548 | |
mbed_official | 181:a4cbdfbbd2f4 | 549 | hi2s->State = HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 550 | |
mbed_official | 181:a4cbdfbbd2f4 | 551 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 552 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 553 | |
mbed_official | 181:a4cbdfbbd2f4 | 554 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 555 | } |
mbed_official | 181:a4cbdfbbd2f4 | 556 | else |
mbed_official | 181:a4cbdfbbd2f4 | 557 | { |
mbed_official | 181:a4cbdfbbd2f4 | 558 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 559 | } |
mbed_official | 181:a4cbdfbbd2f4 | 560 | } |
mbed_official | 181:a4cbdfbbd2f4 | 561 | |
mbed_official | 181:a4cbdfbbd2f4 | 562 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 563 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 564 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 565 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 566 | * @param pData: a 16-bit pointer to data buffer. |
mbed_official | 181:a4cbdfbbd2f4 | 567 | * @param Size: number of data sample to be sent: |
mbed_official | 181:a4cbdfbbd2f4 | 568 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
mbed_official | 181:a4cbdfbbd2f4 | 569 | * configuration phase, the Size parameter means the number of 16-bit data length |
mbed_official | 181:a4cbdfbbd2f4 | 570 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
mbed_official | 181:a4cbdfbbd2f4 | 571 | * the Size parameter means the number of 16-bit data length. |
mbed_official | 181:a4cbdfbbd2f4 | 572 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
mbed_official | 181:a4cbdfbbd2f4 | 573 | * between Master and Slave(example: audio streaming). |
mbed_official | 181:a4cbdfbbd2f4 | 574 | * @note This function can use an Audio Frequency up to 32KHz when I2S Clock Source is 32MHz |
mbed_official | 181:a4cbdfbbd2f4 | 575 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 576 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 577 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
mbed_official | 181:a4cbdfbbd2f4 | 578 | { |
mbed_official | 181:a4cbdfbbd2f4 | 579 | uint32_t tmp1 = 0, tmp2 = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 580 | if(hi2s->State == HAL_I2S_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 581 | { |
mbed_official | 181:a4cbdfbbd2f4 | 582 | if((pData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 583 | { |
mbed_official | 181:a4cbdfbbd2f4 | 584 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 585 | } |
mbed_official | 181:a4cbdfbbd2f4 | 586 | |
mbed_official | 181:a4cbdfbbd2f4 | 587 | hi2s->pTxBuffPtr = pData; |
mbed_official | 181:a4cbdfbbd2f4 | 588 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 589 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 590 | if((tmp1 == I2S_DATAFORMAT_24B)|| \ |
mbed_official | 181:a4cbdfbbd2f4 | 591 | (tmp2 == I2S_DATAFORMAT_32B)) |
mbed_official | 181:a4cbdfbbd2f4 | 592 | { |
mbed_official | 181:a4cbdfbbd2f4 | 593 | hi2s->TxXferSize = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 594 | hi2s->TxXferCount = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 595 | } |
mbed_official | 181:a4cbdfbbd2f4 | 596 | else |
mbed_official | 181:a4cbdfbbd2f4 | 597 | { |
mbed_official | 181:a4cbdfbbd2f4 | 598 | hi2s->TxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 599 | hi2s->TxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 600 | } |
mbed_official | 181:a4cbdfbbd2f4 | 601 | |
mbed_official | 181:a4cbdfbbd2f4 | 602 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 603 | __HAL_LOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 604 | |
mbed_official | 181:a4cbdfbbd2f4 | 605 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
mbed_official | 181:a4cbdfbbd2f4 | 606 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 607 | |
mbed_official | 181:a4cbdfbbd2f4 | 608 | /* Enable TXE and ERR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 609 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
mbed_official | 181:a4cbdfbbd2f4 | 610 | |
mbed_official | 181:a4cbdfbbd2f4 | 611 | /* Check if the I2S is already enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 612 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
mbed_official | 181:a4cbdfbbd2f4 | 613 | { |
mbed_official | 181:a4cbdfbbd2f4 | 614 | /* Enable I2S peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 615 | __HAL_I2S_ENABLE(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 616 | } |
mbed_official | 181:a4cbdfbbd2f4 | 617 | |
mbed_official | 181:a4cbdfbbd2f4 | 618 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 619 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 620 | |
mbed_official | 181:a4cbdfbbd2f4 | 621 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 622 | } |
mbed_official | 181:a4cbdfbbd2f4 | 623 | else |
mbed_official | 181:a4cbdfbbd2f4 | 624 | { |
mbed_official | 181:a4cbdfbbd2f4 | 625 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 626 | } |
mbed_official | 181:a4cbdfbbd2f4 | 627 | } |
mbed_official | 181:a4cbdfbbd2f4 | 628 | |
mbed_official | 181:a4cbdfbbd2f4 | 629 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 630 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 631 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 632 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 633 | * @param pData: a 16-bit pointer to the Receive data buffer. |
mbed_official | 181:a4cbdfbbd2f4 | 634 | * @param Size: number of data sample to be sent: |
mbed_official | 181:a4cbdfbbd2f4 | 635 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
mbed_official | 181:a4cbdfbbd2f4 | 636 | * configuration phase, the Size parameter means the number of 16-bit data length |
mbed_official | 181:a4cbdfbbd2f4 | 637 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
mbed_official | 181:a4cbdfbbd2f4 | 638 | * the Size parameter means the number of 16-bit data length. |
mbed_official | 181:a4cbdfbbd2f4 | 639 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
mbed_official | 181:a4cbdfbbd2f4 | 640 | * between Master and Slave(example: audio streaming). |
mbed_official | 181:a4cbdfbbd2f4 | 641 | * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation |
mbed_official | 181:a4cbdfbbd2f4 | 642 | * between Master and Slave otherwise the I2S interrupt should be optimized. |
mbed_official | 181:a4cbdfbbd2f4 | 643 | * @note This function can use an Audio Frequency up to 32KHz when I2S Clock Source is 32MHz |
mbed_official | 181:a4cbdfbbd2f4 | 644 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 645 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 646 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
mbed_official | 181:a4cbdfbbd2f4 | 647 | { |
mbed_official | 181:a4cbdfbbd2f4 | 648 | uint32_t tmp1 = 0, tmp2 = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 649 | if(hi2s->State == HAL_I2S_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 650 | { |
mbed_official | 181:a4cbdfbbd2f4 | 651 | if((pData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 652 | { |
mbed_official | 181:a4cbdfbbd2f4 | 653 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 654 | } |
mbed_official | 181:a4cbdfbbd2f4 | 655 | |
mbed_official | 181:a4cbdfbbd2f4 | 656 | hi2s->pRxBuffPtr = pData; |
mbed_official | 181:a4cbdfbbd2f4 | 657 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 658 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 659 | if((tmp1 == I2S_DATAFORMAT_24B)||\ |
mbed_official | 181:a4cbdfbbd2f4 | 660 | (tmp2 == I2S_DATAFORMAT_32B)) |
mbed_official | 181:a4cbdfbbd2f4 | 661 | { |
mbed_official | 181:a4cbdfbbd2f4 | 662 | hi2s->RxXferSize = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 663 | hi2s->RxXferCount = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 664 | } |
mbed_official | 181:a4cbdfbbd2f4 | 665 | else |
mbed_official | 181:a4cbdfbbd2f4 | 666 | { |
mbed_official | 181:a4cbdfbbd2f4 | 667 | hi2s->RxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 668 | hi2s->RxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 669 | } |
mbed_official | 181:a4cbdfbbd2f4 | 670 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 671 | __HAL_LOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 672 | |
mbed_official | 181:a4cbdfbbd2f4 | 673 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 674 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 675 | |
mbed_official | 181:a4cbdfbbd2f4 | 676 | /* Enable TXE and ERR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 677 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
mbed_official | 181:a4cbdfbbd2f4 | 678 | |
mbed_official | 181:a4cbdfbbd2f4 | 679 | /* Check if the I2S is already enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 680 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
mbed_official | 181:a4cbdfbbd2f4 | 681 | { |
mbed_official | 181:a4cbdfbbd2f4 | 682 | /* Enable I2S peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 683 | __HAL_I2S_ENABLE(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 684 | } |
mbed_official | 181:a4cbdfbbd2f4 | 685 | |
mbed_official | 181:a4cbdfbbd2f4 | 686 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 687 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 688 | |
mbed_official | 181:a4cbdfbbd2f4 | 689 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 690 | } |
mbed_official | 181:a4cbdfbbd2f4 | 691 | |
mbed_official | 181:a4cbdfbbd2f4 | 692 | else |
mbed_official | 181:a4cbdfbbd2f4 | 693 | { |
mbed_official | 181:a4cbdfbbd2f4 | 694 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 695 | } |
mbed_official | 181:a4cbdfbbd2f4 | 696 | } |
mbed_official | 181:a4cbdfbbd2f4 | 697 | |
mbed_official | 181:a4cbdfbbd2f4 | 698 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 699 | * @brief Transmit an amount of data in non-blocking mode with DMA |
mbed_official | 181:a4cbdfbbd2f4 | 700 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 701 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 702 | * @param pData: a 16-bit pointer to the Transmit data buffer. |
mbed_official | 181:a4cbdfbbd2f4 | 703 | * @param Size: number of data sample to be sent: |
mbed_official | 181:a4cbdfbbd2f4 | 704 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
mbed_official | 181:a4cbdfbbd2f4 | 705 | * configuration phase, the Size parameter means the number of 16-bit data length |
mbed_official | 181:a4cbdfbbd2f4 | 706 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
mbed_official | 181:a4cbdfbbd2f4 | 707 | * the Size parameter means the number of 16-bit data length. |
mbed_official | 181:a4cbdfbbd2f4 | 708 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
mbed_official | 181:a4cbdfbbd2f4 | 709 | * between Master and Slave(example: audio streaming). |
mbed_official | 181:a4cbdfbbd2f4 | 710 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 711 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 712 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
mbed_official | 181:a4cbdfbbd2f4 | 713 | { |
mbed_official | 181:a4cbdfbbd2f4 | 714 | uint32_t *tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 715 | uint32_t tmp1 = 0, tmp2 = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 716 | |
mbed_official | 181:a4cbdfbbd2f4 | 717 | if((pData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 718 | { |
mbed_official | 181:a4cbdfbbd2f4 | 719 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 720 | } |
mbed_official | 181:a4cbdfbbd2f4 | 721 | |
mbed_official | 181:a4cbdfbbd2f4 | 722 | if(hi2s->State == HAL_I2S_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 723 | { |
mbed_official | 181:a4cbdfbbd2f4 | 724 | hi2s->pTxBuffPtr = pData; |
mbed_official | 181:a4cbdfbbd2f4 | 725 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 726 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 727 | if((tmp1 == I2S_DATAFORMAT_24B)|| \ |
mbed_official | 181:a4cbdfbbd2f4 | 728 | (tmp2 == I2S_DATAFORMAT_32B)) |
mbed_official | 181:a4cbdfbbd2f4 | 729 | { |
mbed_official | 181:a4cbdfbbd2f4 | 730 | hi2s->TxXferSize = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 731 | hi2s->TxXferCount = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 732 | } |
mbed_official | 181:a4cbdfbbd2f4 | 733 | else |
mbed_official | 181:a4cbdfbbd2f4 | 734 | { |
mbed_official | 181:a4cbdfbbd2f4 | 735 | hi2s->TxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 736 | hi2s->TxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 737 | } |
mbed_official | 181:a4cbdfbbd2f4 | 738 | |
mbed_official | 181:a4cbdfbbd2f4 | 739 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 740 | __HAL_LOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 741 | |
mbed_official | 181:a4cbdfbbd2f4 | 742 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
mbed_official | 181:a4cbdfbbd2f4 | 743 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 744 | |
mbed_official | 181:a4cbdfbbd2f4 | 745 | /* Set the I2S Tx DMA Half transfert complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 746 | hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 747 | |
mbed_official | 181:a4cbdfbbd2f4 | 748 | /* Set the I2S Tx DMA transfert complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 749 | hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 750 | |
mbed_official | 181:a4cbdfbbd2f4 | 751 | /* Set the DMA error callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 752 | hi2s->hdmatx->XferErrorCallback = I2S_DMAError; |
mbed_official | 181:a4cbdfbbd2f4 | 753 | |
mbed_official | 181:a4cbdfbbd2f4 | 754 | /* Enable the Tx DMA Stream */ |
mbed_official | 181:a4cbdfbbd2f4 | 755 | tmp = (uint32_t*)&pData; |
mbed_official | 181:a4cbdfbbd2f4 | 756 | HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize); |
mbed_official | 181:a4cbdfbbd2f4 | 757 | |
mbed_official | 181:a4cbdfbbd2f4 | 758 | /* Check if the I2S is already enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 759 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
mbed_official | 181:a4cbdfbbd2f4 | 760 | { |
mbed_official | 181:a4cbdfbbd2f4 | 761 | /* Enable I2S peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 762 | __HAL_I2S_ENABLE(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 763 | } |
mbed_official | 181:a4cbdfbbd2f4 | 764 | |
mbed_official | 181:a4cbdfbbd2f4 | 765 | /* Check if the I2S Tx request is already enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 766 | if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN) |
mbed_official | 181:a4cbdfbbd2f4 | 767 | { |
mbed_official | 181:a4cbdfbbd2f4 | 768 | /* Enable Tx DMA Request */ |
mbed_official | 181:a4cbdfbbd2f4 | 769 | hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN; |
mbed_official | 181:a4cbdfbbd2f4 | 770 | } |
mbed_official | 181:a4cbdfbbd2f4 | 771 | |
mbed_official | 181:a4cbdfbbd2f4 | 772 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 773 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 774 | |
mbed_official | 181:a4cbdfbbd2f4 | 775 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 776 | } |
mbed_official | 181:a4cbdfbbd2f4 | 777 | else |
mbed_official | 181:a4cbdfbbd2f4 | 778 | { |
mbed_official | 181:a4cbdfbbd2f4 | 779 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 780 | } |
mbed_official | 181:a4cbdfbbd2f4 | 781 | } |
mbed_official | 181:a4cbdfbbd2f4 | 782 | |
mbed_official | 181:a4cbdfbbd2f4 | 783 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 784 | * @brief Receive an amount of data in non-blocking mode with DMA |
mbed_official | 181:a4cbdfbbd2f4 | 785 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 786 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 787 | * @param pData: a 16-bit pointer to the Receive data buffer. |
mbed_official | 181:a4cbdfbbd2f4 | 788 | * @param Size: number of data sample to be sent: |
mbed_official | 181:a4cbdfbbd2f4 | 789 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
mbed_official | 181:a4cbdfbbd2f4 | 790 | * configuration phase, the Size parameter means the number of 16-bit data length |
mbed_official | 181:a4cbdfbbd2f4 | 791 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
mbed_official | 181:a4cbdfbbd2f4 | 792 | * the Size parameter means the number of 16-bit data length. |
mbed_official | 181:a4cbdfbbd2f4 | 793 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
mbed_official | 181:a4cbdfbbd2f4 | 794 | * between Master and Slave(example: audio streaming). |
mbed_official | 181:a4cbdfbbd2f4 | 795 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 796 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 797 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
mbed_official | 181:a4cbdfbbd2f4 | 798 | { |
mbed_official | 181:a4cbdfbbd2f4 | 799 | uint32_t *tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 800 | uint32_t tmp1 = 0, tmp2 = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 801 | |
mbed_official | 181:a4cbdfbbd2f4 | 802 | if((pData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 803 | { |
mbed_official | 181:a4cbdfbbd2f4 | 804 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 805 | } |
mbed_official | 181:a4cbdfbbd2f4 | 806 | |
mbed_official | 181:a4cbdfbbd2f4 | 807 | if(hi2s->State == HAL_I2S_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 808 | { |
mbed_official | 181:a4cbdfbbd2f4 | 809 | hi2s->pRxBuffPtr = pData; |
mbed_official | 181:a4cbdfbbd2f4 | 810 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 811 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
mbed_official | 181:a4cbdfbbd2f4 | 812 | if((tmp1 == I2S_DATAFORMAT_24B)|| \ |
mbed_official | 181:a4cbdfbbd2f4 | 813 | (tmp2 == I2S_DATAFORMAT_32B)) |
mbed_official | 181:a4cbdfbbd2f4 | 814 | { |
mbed_official | 181:a4cbdfbbd2f4 | 815 | hi2s->RxXferSize = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 816 | hi2s->RxXferCount = Size*2; |
mbed_official | 181:a4cbdfbbd2f4 | 817 | } |
mbed_official | 181:a4cbdfbbd2f4 | 818 | else |
mbed_official | 181:a4cbdfbbd2f4 | 819 | { |
mbed_official | 181:a4cbdfbbd2f4 | 820 | hi2s->RxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 821 | hi2s->RxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 822 | } |
mbed_official | 181:a4cbdfbbd2f4 | 823 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 824 | __HAL_LOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 825 | |
mbed_official | 181:a4cbdfbbd2f4 | 826 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 827 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 828 | |
mbed_official | 181:a4cbdfbbd2f4 | 829 | /* Set the I2S Rx DMA Half transfert complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 830 | hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 831 | |
mbed_official | 181:a4cbdfbbd2f4 | 832 | /* Set the I2S Rx DMA transfert complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 833 | hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 834 | |
mbed_official | 181:a4cbdfbbd2f4 | 835 | /* Set the DMA error callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 836 | hi2s->hdmarx->XferErrorCallback = I2S_DMAError; |
mbed_official | 181:a4cbdfbbd2f4 | 837 | |
mbed_official | 181:a4cbdfbbd2f4 | 838 | /* Check if Master Receiver mode is selected */ |
mbed_official | 181:a4cbdfbbd2f4 | 839 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 840 | { |
mbed_official | 181:a4cbdfbbd2f4 | 841 | /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read |
mbed_official | 181:a4cbdfbbd2f4 | 842 | access to the SPI_SR register. */ |
mbed_official | 181:a4cbdfbbd2f4 | 843 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 844 | } |
mbed_official | 181:a4cbdfbbd2f4 | 845 | |
mbed_official | 181:a4cbdfbbd2f4 | 846 | /* Enable the Rx DMA Stream */ |
mbed_official | 181:a4cbdfbbd2f4 | 847 | tmp = (uint32_t*)&pData; |
mbed_official | 181:a4cbdfbbd2f4 | 848 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize); |
mbed_official | 181:a4cbdfbbd2f4 | 849 | |
mbed_official | 181:a4cbdfbbd2f4 | 850 | /* Check if the I2S is already enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 851 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
mbed_official | 181:a4cbdfbbd2f4 | 852 | { |
mbed_official | 181:a4cbdfbbd2f4 | 853 | /* Enable I2S peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 854 | __HAL_I2S_ENABLE(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 855 | } |
mbed_official | 181:a4cbdfbbd2f4 | 856 | |
mbed_official | 181:a4cbdfbbd2f4 | 857 | /* Check if the I2S Rx request is already enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 858 | if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN) |
mbed_official | 181:a4cbdfbbd2f4 | 859 | { |
mbed_official | 181:a4cbdfbbd2f4 | 860 | /* Enable Rx DMA Request */ |
mbed_official | 181:a4cbdfbbd2f4 | 861 | hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN; |
mbed_official | 181:a4cbdfbbd2f4 | 862 | } |
mbed_official | 181:a4cbdfbbd2f4 | 863 | |
mbed_official | 181:a4cbdfbbd2f4 | 864 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 865 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 866 | |
mbed_official | 181:a4cbdfbbd2f4 | 867 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 868 | } |
mbed_official | 181:a4cbdfbbd2f4 | 869 | else |
mbed_official | 181:a4cbdfbbd2f4 | 870 | { |
mbed_official | 181:a4cbdfbbd2f4 | 871 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 872 | } |
mbed_official | 181:a4cbdfbbd2f4 | 873 | } |
mbed_official | 181:a4cbdfbbd2f4 | 874 | |
mbed_official | 181:a4cbdfbbd2f4 | 875 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 876 | * @brief Pauses the audio stream playing from the Media. |
mbed_official | 181:a4cbdfbbd2f4 | 877 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 878 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 879 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 880 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 881 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 882 | { |
mbed_official | 181:a4cbdfbbd2f4 | 883 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 884 | __HAL_LOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 885 | |
mbed_official | 181:a4cbdfbbd2f4 | 886 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 887 | { |
mbed_official | 181:a4cbdfbbd2f4 | 888 | /* Disable the I2S DMA Tx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 889 | hi2s->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_TXDMAEN); |
mbed_official | 181:a4cbdfbbd2f4 | 890 | } |
mbed_official | 181:a4cbdfbbd2f4 | 891 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 892 | { |
mbed_official | 181:a4cbdfbbd2f4 | 893 | /* Disable the I2S DMA Rx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 894 | hi2s->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_RXDMAEN); |
mbed_official | 181:a4cbdfbbd2f4 | 895 | } |
mbed_official | 181:a4cbdfbbd2f4 | 896 | |
mbed_official | 181:a4cbdfbbd2f4 | 897 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 898 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 899 | |
mbed_official | 181:a4cbdfbbd2f4 | 900 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 901 | } |
mbed_official | 181:a4cbdfbbd2f4 | 902 | |
mbed_official | 181:a4cbdfbbd2f4 | 903 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 904 | * @brief Resumes the audio stream playing from the Media. |
mbed_official | 181:a4cbdfbbd2f4 | 905 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 906 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 907 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 908 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 909 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 910 | { |
mbed_official | 181:a4cbdfbbd2f4 | 911 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 912 | __HAL_LOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 913 | |
mbed_official | 181:a4cbdfbbd2f4 | 914 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 915 | { |
mbed_official | 181:a4cbdfbbd2f4 | 916 | /* Enable the I2S DMA Tx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 917 | hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN; |
mbed_official | 181:a4cbdfbbd2f4 | 918 | } |
mbed_official | 181:a4cbdfbbd2f4 | 919 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 920 | { |
mbed_official | 181:a4cbdfbbd2f4 | 921 | /* Enable the I2S DMA Rx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 922 | hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN; |
mbed_official | 181:a4cbdfbbd2f4 | 923 | } |
mbed_official | 181:a4cbdfbbd2f4 | 924 | |
mbed_official | 181:a4cbdfbbd2f4 | 925 | /* If the I2S peripheral is still not enabled, enable it */ |
mbed_official | 181:a4cbdfbbd2f4 | 926 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 927 | { |
mbed_official | 181:a4cbdfbbd2f4 | 928 | /* Enable I2S peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 929 | __HAL_I2S_ENABLE(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 930 | } |
mbed_official | 181:a4cbdfbbd2f4 | 931 | |
mbed_official | 181:a4cbdfbbd2f4 | 932 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 933 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 934 | |
mbed_official | 181:a4cbdfbbd2f4 | 935 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 936 | } |
mbed_official | 181:a4cbdfbbd2f4 | 937 | |
mbed_official | 181:a4cbdfbbd2f4 | 938 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 939 | * @brief Resumes the audio stream playing from the Media. |
mbed_official | 181:a4cbdfbbd2f4 | 940 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 941 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 942 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 943 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 944 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 945 | { |
mbed_official | 181:a4cbdfbbd2f4 | 946 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 947 | __HAL_LOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 948 | |
mbed_official | 181:a4cbdfbbd2f4 | 949 | /* Disable the I2S Tx/Rx DMA requests */ |
mbed_official | 181:a4cbdfbbd2f4 | 950 | hi2s->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_TXDMAEN); |
mbed_official | 181:a4cbdfbbd2f4 | 951 | hi2s->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_RXDMAEN); |
mbed_official | 181:a4cbdfbbd2f4 | 952 | |
mbed_official | 181:a4cbdfbbd2f4 | 953 | /* Abort the I2S DMA Stream tx */ |
mbed_official | 181:a4cbdfbbd2f4 | 954 | if(hi2s->hdmatx != NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 955 | { |
mbed_official | 181:a4cbdfbbd2f4 | 956 | HAL_DMA_Abort(hi2s->hdmatx); |
mbed_official | 181:a4cbdfbbd2f4 | 957 | } |
mbed_official | 181:a4cbdfbbd2f4 | 958 | /* Abort the I2S DMA Stream rx */ |
mbed_official | 181:a4cbdfbbd2f4 | 959 | if(hi2s->hdmarx != NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 960 | { |
mbed_official | 181:a4cbdfbbd2f4 | 961 | HAL_DMA_Abort(hi2s->hdmarx); |
mbed_official | 181:a4cbdfbbd2f4 | 962 | } |
mbed_official | 181:a4cbdfbbd2f4 | 963 | |
mbed_official | 181:a4cbdfbbd2f4 | 964 | /* Disable I2S peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 965 | __HAL_I2S_DISABLE(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 966 | |
mbed_official | 181:a4cbdfbbd2f4 | 967 | hi2s->State = HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 968 | |
mbed_official | 181:a4cbdfbbd2f4 | 969 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 970 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 971 | |
mbed_official | 181:a4cbdfbbd2f4 | 972 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 973 | } |
mbed_official | 181:a4cbdfbbd2f4 | 974 | |
mbed_official | 181:a4cbdfbbd2f4 | 975 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 976 | * @brief This function handles I2S interrupt request. |
mbed_official | 181:a4cbdfbbd2f4 | 977 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 978 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 979 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 980 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 981 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 982 | { |
mbed_official | 181:a4cbdfbbd2f4 | 983 | uint32_t tmp1 = 0, tmp2 = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 984 | if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 985 | { |
mbed_official | 181:a4cbdfbbd2f4 | 986 | tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_RXNE); |
mbed_official | 181:a4cbdfbbd2f4 | 987 | tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE); |
mbed_official | 181:a4cbdfbbd2f4 | 988 | /* I2S in mode Receiver --------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 989 | if((tmp1 != RESET) && (tmp2 != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 990 | { |
mbed_official | 181:a4cbdfbbd2f4 | 991 | I2S_Receive_IT(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 992 | } |
mbed_official | 181:a4cbdfbbd2f4 | 993 | tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR); |
mbed_official | 181:a4cbdfbbd2f4 | 994 | tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR); |
mbed_official | 181:a4cbdfbbd2f4 | 995 | /* I2S Overrun error interrupt occured -----------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 996 | if((tmp1 != RESET) && (tmp2 != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 997 | { |
mbed_official | 181:a4cbdfbbd2f4 | 998 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 999 | hi2s->ErrorCode |= HAL_I2S_ERROR_OVR; |
mbed_official | 181:a4cbdfbbd2f4 | 1000 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1001 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1002 | |
mbed_official | 181:a4cbdfbbd2f4 | 1003 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 1004 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1005 | tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_TXE); |
mbed_official | 181:a4cbdfbbd2f4 | 1006 | tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE); |
mbed_official | 181:a4cbdfbbd2f4 | 1007 | /* I2S in mode Tramitter -------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1008 | if((tmp1 != RESET) && (tmp2 != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1009 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1010 | I2S_Transmit_IT(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1011 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1012 | |
mbed_official | 181:a4cbdfbbd2f4 | 1013 | tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR); |
mbed_official | 181:a4cbdfbbd2f4 | 1014 | tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR); |
mbed_official | 181:a4cbdfbbd2f4 | 1015 | /* I2S Underrun error interrupt occured ----------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1016 | if((tmp1 != RESET) && (tmp2 != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1017 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1018 | __HAL_I2S_CLEAR_UDRFLAG(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1019 | hi2s->ErrorCode |= HAL_I2S_ERROR_UDR; |
mbed_official | 181:a4cbdfbbd2f4 | 1020 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1021 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1022 | |
mbed_official | 181:a4cbdfbbd2f4 | 1023 | /* Call the Error call Back in case of Errors */ |
mbed_official | 181:a4cbdfbbd2f4 | 1024 | if(hi2s->ErrorCode != HAL_I2S_ERROR_NONE) |
mbed_official | 181:a4cbdfbbd2f4 | 1025 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1026 | /* Set the I2S state ready to be able to start again the process */ |
mbed_official | 181:a4cbdfbbd2f4 | 1027 | hi2s->State= HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1028 | HAL_I2S_ErrorCallback(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1029 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1030 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1031 | |
mbed_official | 181:a4cbdfbbd2f4 | 1032 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1033 | * @brief Tx Transfer Half completed callbacks |
mbed_official | 181:a4cbdfbbd2f4 | 1034 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1035 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 1036 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1037 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1038 | __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 1039 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1040 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1041 | the HAL_I2S_TxHalfCpltCallback could be implenetd in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1042 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1043 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1044 | |
mbed_official | 181:a4cbdfbbd2f4 | 1045 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1046 | * @brief Tx Transfer completed callbacks |
mbed_official | 181:a4cbdfbbd2f4 | 1047 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1048 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 1049 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1050 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1051 | __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 1052 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1053 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1054 | the HAL_I2S_TxCpltCallback could be implenetd in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1055 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1056 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1057 | |
mbed_official | 181:a4cbdfbbd2f4 | 1058 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1059 | * @brief Rx Transfer half completed callbacks |
mbed_official | 181:a4cbdfbbd2f4 | 1060 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1061 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 1062 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1063 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1064 | __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 1065 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1066 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1067 | the HAL_I2S_RxCpltCallback could be implenetd in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1068 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1069 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1070 | |
mbed_official | 181:a4cbdfbbd2f4 | 1071 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1072 | * @brief Rx Transfer completed callbacks |
mbed_official | 181:a4cbdfbbd2f4 | 1073 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1074 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 1075 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1076 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1077 | __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 1078 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1079 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1080 | the HAL_I2S_RxCpltCallback could be implenetd in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1081 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1082 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1083 | |
mbed_official | 181:a4cbdfbbd2f4 | 1084 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1085 | * @brief I2S error callbacks |
mbed_official | 181:a4cbdfbbd2f4 | 1086 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1087 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 1088 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1089 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1090 | __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 1091 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1092 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1093 | the HAL_I2S_ErrorCallback could be implenetd in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1094 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1095 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1096 | |
mbed_official | 181:a4cbdfbbd2f4 | 1097 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1098 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1099 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1100 | |
mbed_official | 181:a4cbdfbbd2f4 | 1101 | /** @defgroup I2S_Group3 Peripheral State and Errors functions |
mbed_official | 181:a4cbdfbbd2f4 | 1102 | * @brief Peripheral State functions |
mbed_official | 181:a4cbdfbbd2f4 | 1103 | * |
mbed_official | 181:a4cbdfbbd2f4 | 1104 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 1105 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 1106 | ##### Peripheral State and Errors functions ##### |
mbed_official | 181:a4cbdfbbd2f4 | 1107 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 1108 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 1109 | This subsection permit to get in run-time the status of the peripheral |
mbed_official | 181:a4cbdfbbd2f4 | 1110 | and the data flow. |
mbed_official | 181:a4cbdfbbd2f4 | 1111 | |
mbed_official | 181:a4cbdfbbd2f4 | 1112 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 1113 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 1114 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1115 | |
mbed_official | 181:a4cbdfbbd2f4 | 1116 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1117 | * @brief Return the I2S state |
mbed_official | 181:a4cbdfbbd2f4 | 1118 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1119 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 1120 | * @retval HAL state |
mbed_official | 181:a4cbdfbbd2f4 | 1121 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1122 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 1123 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1124 | return hi2s->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1125 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1126 | |
mbed_official | 181:a4cbdfbbd2f4 | 1127 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1128 | * @brief Return the I2S error code |
mbed_official | 181:a4cbdfbbd2f4 | 1129 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1130 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 1131 | * @retval I2S Error Code |
mbed_official | 181:a4cbdfbbd2f4 | 1132 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1133 | HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 1134 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1135 | return hi2s->ErrorCode; |
mbed_official | 181:a4cbdfbbd2f4 | 1136 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1137 | |
mbed_official | 181:a4cbdfbbd2f4 | 1138 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1139 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1140 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1141 | |
mbed_official | 181:a4cbdfbbd2f4 | 1142 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1143 | * @brief DMA I2S transmit process complete callback |
mbed_official | 181:a4cbdfbbd2f4 | 1144 | * @param hdma : DMA handle |
mbed_official | 181:a4cbdfbbd2f4 | 1145 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1146 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1147 | void I2S_DMATxCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 181:a4cbdfbbd2f4 | 1148 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1149 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 181:a4cbdfbbd2f4 | 1150 | |
mbed_official | 181:a4cbdfbbd2f4 | 1151 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1152 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1153 | hi2s->TxXferCount = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1154 | |
mbed_official | 181:a4cbdfbbd2f4 | 1155 | /* Disable Tx DMA Request */ |
mbed_official | 181:a4cbdfbbd2f4 | 1156 | hi2s->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_TXDMAEN); |
mbed_official | 181:a4cbdfbbd2f4 | 1157 | |
mbed_official | 181:a4cbdfbbd2f4 | 1158 | hi2s->State = HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1159 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1160 | HAL_I2S_TxCpltCallback(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1161 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1162 | |
mbed_official | 181:a4cbdfbbd2f4 | 1163 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1164 | * @brief DMA I2S transmit process half complete callback |
mbed_official | 181:a4cbdfbbd2f4 | 1165 | * @param hdma : DMA handle |
mbed_official | 181:a4cbdfbbd2f4 | 1166 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1167 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1168 | void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 181:a4cbdfbbd2f4 | 1169 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1170 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 181:a4cbdfbbd2f4 | 1171 | |
mbed_official | 181:a4cbdfbbd2f4 | 1172 | HAL_I2S_TxHalfCpltCallback(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1173 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1174 | |
mbed_official | 181:a4cbdfbbd2f4 | 1175 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1176 | * @brief DMA I2S receive process complete callback |
mbed_official | 181:a4cbdfbbd2f4 | 1177 | * @param hdma : DMA handle |
mbed_official | 181:a4cbdfbbd2f4 | 1178 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1179 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1180 | void I2S_DMARxCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 181:a4cbdfbbd2f4 | 1181 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1182 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 181:a4cbdfbbd2f4 | 1183 | |
mbed_official | 181:a4cbdfbbd2f4 | 1184 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1185 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1186 | /* Disable Rx DMA Request */ |
mbed_official | 181:a4cbdfbbd2f4 | 1187 | hi2s->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_RXDMAEN); |
mbed_official | 181:a4cbdfbbd2f4 | 1188 | |
mbed_official | 181:a4cbdfbbd2f4 | 1189 | hi2s->RxXferCount = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1190 | |
mbed_official | 181:a4cbdfbbd2f4 | 1191 | hi2s->State = HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1192 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1193 | HAL_I2S_RxCpltCallback(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1194 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1195 | |
mbed_official | 181:a4cbdfbbd2f4 | 1196 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1197 | * @brief DMA I2S receive process half complete callback |
mbed_official | 181:a4cbdfbbd2f4 | 1198 | * @param hdma : DMA handle |
mbed_official | 181:a4cbdfbbd2f4 | 1199 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1200 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1201 | void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 181:a4cbdfbbd2f4 | 1202 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1203 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 181:a4cbdfbbd2f4 | 1204 | |
mbed_official | 181:a4cbdfbbd2f4 | 1205 | HAL_I2S_RxHalfCpltCallback(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1206 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1207 | |
mbed_official | 181:a4cbdfbbd2f4 | 1208 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1209 | * @brief DMA I2S communication error callback |
mbed_official | 181:a4cbdfbbd2f4 | 1210 | * @param hdma : DMA handle |
mbed_official | 181:a4cbdfbbd2f4 | 1211 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1212 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1213 | void I2S_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 181:a4cbdfbbd2f4 | 1214 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1215 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 181:a4cbdfbbd2f4 | 1216 | |
mbed_official | 181:a4cbdfbbd2f4 | 1217 | hi2s->TxXferCount = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1218 | hi2s->RxXferCount = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1219 | |
mbed_official | 181:a4cbdfbbd2f4 | 1220 | hi2s->State= HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1221 | |
mbed_official | 181:a4cbdfbbd2f4 | 1222 | hi2s->ErrorCode |= HAL_I2S_ERROR_DMA; |
mbed_official | 181:a4cbdfbbd2f4 | 1223 | HAL_I2S_ErrorCallback(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1224 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1225 | |
mbed_official | 181:a4cbdfbbd2f4 | 1226 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1227 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 1228 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1229 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 1230 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1231 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1232 | static HAL_StatusTypeDef I2S_Transmit_IT(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 1233 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1234 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 1235 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1236 | /* Transmit data */ |
mbed_official | 181:a4cbdfbbd2f4 | 1237 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
mbed_official | 181:a4cbdfbbd2f4 | 1238 | |
mbed_official | 181:a4cbdfbbd2f4 | 1239 | hi2s->TxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 1240 | |
mbed_official | 181:a4cbdfbbd2f4 | 1241 | if(hi2s->TxXferCount == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1242 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1243 | /* Disable TXE and ERR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1244 | __HAL_I2S_DISABLE_IT(hi2s, (uint32_t)(I2S_IT_TXE | I2S_IT_ERR)); |
mbed_official | 181:a4cbdfbbd2f4 | 1245 | |
mbed_official | 181:a4cbdfbbd2f4 | 1246 | hi2s->State = HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1247 | |
mbed_official | 181:a4cbdfbbd2f4 | 1248 | HAL_I2S_TxCpltCallback(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1249 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1250 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1251 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1252 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1253 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1254 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 1255 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1256 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1257 | |
mbed_official | 181:a4cbdfbbd2f4 | 1258 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1259 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 1260 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1261 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 1262 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1263 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1264 | static HAL_StatusTypeDef I2S_Receive_IT(I2S_HandleTypeDef *hi2s) |
mbed_official | 181:a4cbdfbbd2f4 | 1265 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1266 | if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 1267 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1268 | /* Receive data */ |
mbed_official | 181:a4cbdfbbd2f4 | 1269 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
mbed_official | 181:a4cbdfbbd2f4 | 1270 | |
mbed_official | 181:a4cbdfbbd2f4 | 1271 | hi2s->RxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 1272 | |
mbed_official | 181:a4cbdfbbd2f4 | 1273 | /* Check if Master Receiver mode is selected */ |
mbed_official | 181:a4cbdfbbd2f4 | 1274 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 1275 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1276 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read |
mbed_official | 181:a4cbdfbbd2f4 | 1277 | access to the SPI_SR register. */ |
mbed_official | 181:a4cbdfbbd2f4 | 1278 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1279 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1280 | |
mbed_official | 181:a4cbdfbbd2f4 | 1281 | if(hi2s->RxXferCount == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1282 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1283 | /* Disable RXNE and ERR interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1284 | __HAL_I2S_DISABLE_IT(hi2s, (uint32_t)(I2S_IT_RXNE | I2S_IT_ERR)); |
mbed_official | 181:a4cbdfbbd2f4 | 1285 | |
mbed_official | 181:a4cbdfbbd2f4 | 1286 | hi2s->State = HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1287 | |
mbed_official | 181:a4cbdfbbd2f4 | 1288 | HAL_I2S_RxCpltCallback(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1289 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1290 | |
mbed_official | 181:a4cbdfbbd2f4 | 1291 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1292 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1293 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1294 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1295 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 1296 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1297 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1298 | |
mbed_official | 181:a4cbdfbbd2f4 | 1299 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1300 | * @brief This function handles I2S Communication Timeout. |
mbed_official | 181:a4cbdfbbd2f4 | 1301 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1302 | * the configuration information for I2S module |
mbed_official | 181:a4cbdfbbd2f4 | 1303 | * @param Flag: Flag checked |
mbed_official | 181:a4cbdfbbd2f4 | 1304 | * @param State: Value of the flag expected |
mbed_official | 181:a4cbdfbbd2f4 | 1305 | * @param Timeout: Duration of the timeout |
mbed_official | 181:a4cbdfbbd2f4 | 1306 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1307 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1308 | HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 1309 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1310 | uint32_t tickstart = 0x00; |
mbed_official | 181:a4cbdfbbd2f4 | 1311 | tickstart = HAL_GetTick(); |
mbed_official | 181:a4cbdfbbd2f4 | 1312 | |
mbed_official | 181:a4cbdfbbd2f4 | 1313 | /* Wait until flag is set */ |
mbed_official | 181:a4cbdfbbd2f4 | 1314 | if(Status == RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1315 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1316 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1317 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1318 | /* Check for the Timeout */ |
mbed_official | 181:a4cbdfbbd2f4 | 1319 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 181:a4cbdfbbd2f4 | 1320 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1321 | if((HAL_GetTick() - tickstart ) > Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 1322 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1323 | /* Set the I2S State ready */ |
mbed_official | 181:a4cbdfbbd2f4 | 1324 | hi2s->State= HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1325 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1326 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1327 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1328 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1329 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1330 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1331 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1332 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1333 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1334 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1335 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1336 | /* Check for the Timeout */ |
mbed_official | 181:a4cbdfbbd2f4 | 1337 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 181:a4cbdfbbd2f4 | 1338 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1339 | if((HAL_GetTick() - tickstart ) > Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 1340 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1341 | /* Set the I2S State ready */ |
mbed_official | 181:a4cbdfbbd2f4 | 1342 | hi2s->State= HAL_I2S_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1343 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1344 | __HAL_UNLOCK(hi2s); |
mbed_official | 181:a4cbdfbbd2f4 | 1345 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1346 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1347 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1348 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1349 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1350 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1351 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1352 | |
mbed_official | 181:a4cbdfbbd2f4 | 1353 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1354 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1355 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1356 | |
mbed_official | 181:a4cbdfbbd2f4 | 1357 | #endif /* HAL_I2S_MODULE_ENABLED */ |
mbed_official | 181:a4cbdfbbd2f4 | 1358 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1359 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1360 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1361 | |
mbed_official | 181:a4cbdfbbd2f4 | 1362 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1363 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1364 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1365 | |
mbed_official | 181:a4cbdfbbd2f4 | 1366 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |