mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_DISCO_F303VC/stm32f30x_wwdg.c@157:90e3acc479a2, 2014-04-11 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Apr 11 17:15:06 2014 +0100
- Revision:
- 157:90e3acc479a2
Synchronized with git revision 6e20ca17847dceb62132bf3d8519876411e175bf
Full URL: https://github.com/mbedmicro/mbed/commit/6e20ca17847dceb62132bf3d8519876411e175bf/
[STM32F3-Discovery][DISCO_F303VC] initial port.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 157:90e3acc479a2 | 1 | /** |
mbed_official | 157:90e3acc479a2 | 2 | ****************************************************************************** |
mbed_official | 157:90e3acc479a2 | 3 | * @file stm32f30x_wwdg.c |
mbed_official | 157:90e3acc479a2 | 4 | * @author MCD Application Team |
mbed_official | 157:90e3acc479a2 | 5 | * @version V1.1.0 |
mbed_official | 157:90e3acc479a2 | 6 | * @date 27-February-2014 |
mbed_official | 157:90e3acc479a2 | 7 | * @brief This file provides firmware functions to manage the following |
mbed_official | 157:90e3acc479a2 | 8 | * functionalities of the Window watchdog (WWDG) peripheral: |
mbed_official | 157:90e3acc479a2 | 9 | * + Prescaler, Refresh window and Counter configuration |
mbed_official | 157:90e3acc479a2 | 10 | * + WWDG activation |
mbed_official | 157:90e3acc479a2 | 11 | * + Interrupts and flags management |
mbed_official | 157:90e3acc479a2 | 12 | * |
mbed_official | 157:90e3acc479a2 | 13 | * @verbatim |
mbed_official | 157:90e3acc479a2 | 14 | * |
mbed_official | 157:90e3acc479a2 | 15 | ============================================================================== |
mbed_official | 157:90e3acc479a2 | 16 | ##### WWDG features ##### |
mbed_official | 157:90e3acc479a2 | 17 | ============================================================================== |
mbed_official | 157:90e3acc479a2 | 18 | |
mbed_official | 157:90e3acc479a2 | 19 | [..] Once enabled the WWDG generates a system reset on expiry of a programmed |
mbed_official | 157:90e3acc479a2 | 20 | time period, unless the program refreshes the counter (downcounter) |
mbed_official | 157:90e3acc479a2 | 21 | before to reach 0x3F value (i.e. a reset is generated when the counter |
mbed_official | 157:90e3acc479a2 | 22 | value rolls over from 0x40 to 0x3F). |
mbed_official | 157:90e3acc479a2 | 23 | [..] An MCU reset is also generated if the counter value is refreshed |
mbed_official | 157:90e3acc479a2 | 24 | before the counter has reached the refresh window value. This |
mbed_official | 157:90e3acc479a2 | 25 | implies that the counter must be refreshed in a limited window. |
mbed_official | 157:90e3acc479a2 | 26 | |
mbed_official | 157:90e3acc479a2 | 27 | [..] Once enabled the WWDG cannot be disabled except by a system reset. |
mbed_official | 157:90e3acc479a2 | 28 | |
mbed_official | 157:90e3acc479a2 | 29 | [..] WWDGRST flag in RCC_CSR register can be used to inform when a WWDG |
mbed_official | 157:90e3acc479a2 | 30 | reset occurs. |
mbed_official | 157:90e3acc479a2 | 31 | |
mbed_official | 157:90e3acc479a2 | 32 | [..] The WWDG counter input clock is derived from the APB clock divided |
mbed_official | 157:90e3acc479a2 | 33 | by a programmable prescaler. |
mbed_official | 157:90e3acc479a2 | 34 | |
mbed_official | 157:90e3acc479a2 | 35 | [..] WWDG counter clock = PCLK1 / Prescaler. |
mbed_official | 157:90e3acc479a2 | 36 | [..] WWDG timeout = (WWDG counter clock) * (counter value). |
mbed_official | 157:90e3acc479a2 | 37 | |
mbed_official | 157:90e3acc479a2 | 38 | [..] Min-max timeout value @36MHz (PCLK1): ~114us / ~58.3ms. |
mbed_official | 157:90e3acc479a2 | 39 | |
mbed_official | 157:90e3acc479a2 | 40 | ##### How to use this driver ##### |
mbed_official | 157:90e3acc479a2 | 41 | ============================================================================== |
mbed_official | 157:90e3acc479a2 | 42 | [..] |
mbed_official | 157:90e3acc479a2 | 43 | (#) Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) |
mbed_official | 157:90e3acc479a2 | 44 | function. |
mbed_official | 157:90e3acc479a2 | 45 | |
mbed_official | 157:90e3acc479a2 | 46 | (#) Configure the WWDG prescaler using WWDG_SetPrescaler() function. |
mbed_official | 157:90e3acc479a2 | 47 | |
mbed_official | 157:90e3acc479a2 | 48 | (#) Configure the WWDG refresh window using WWDG_SetWindowValue() function. |
mbed_official | 157:90e3acc479a2 | 49 | |
mbed_official | 157:90e3acc479a2 | 50 | (#) Set the WWDG counter value and start it using WWDG_Enable() function. |
mbed_official | 157:90e3acc479a2 | 51 | When the WWDG is enabled the counter value should be configured to |
mbed_official | 157:90e3acc479a2 | 52 | a value greater than 0x40 to prevent generating an immediate reset. |
mbed_official | 157:90e3acc479a2 | 53 | |
mbed_official | 157:90e3acc479a2 | 54 | (#) Optionally you can enable the Early wakeup interrupt which is |
mbed_official | 157:90e3acc479a2 | 55 | generated when the counter reach 0x40. |
mbed_official | 157:90e3acc479a2 | 56 | Once enabled this interrupt cannot be disabled except by a system reset. |
mbed_official | 157:90e3acc479a2 | 57 | |
mbed_official | 157:90e3acc479a2 | 58 | (#) Then the application program must refresh the WWDG counter at regular |
mbed_official | 157:90e3acc479a2 | 59 | intervals during normal operation to prevent an MCU reset, using |
mbed_official | 157:90e3acc479a2 | 60 | WWDG_SetCounter() function. This operation must occur only when |
mbed_official | 157:90e3acc479a2 | 61 | the counter value is lower than the refresh window value, |
mbed_official | 157:90e3acc479a2 | 62 | programmed using WWDG_SetWindowValue(). |
mbed_official | 157:90e3acc479a2 | 63 | |
mbed_official | 157:90e3acc479a2 | 64 | @endverbatim |
mbed_official | 157:90e3acc479a2 | 65 | |
mbed_official | 157:90e3acc479a2 | 66 | ****************************************************************************** |
mbed_official | 157:90e3acc479a2 | 67 | * @attention |
mbed_official | 157:90e3acc479a2 | 68 | * |
mbed_official | 157:90e3acc479a2 | 69 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 157:90e3acc479a2 | 70 | * |
mbed_official | 157:90e3acc479a2 | 71 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 157:90e3acc479a2 | 72 | * are permitted provided that the following conditions are met: |
mbed_official | 157:90e3acc479a2 | 73 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 157:90e3acc479a2 | 74 | * this list of conditions and the following disclaimer. |
mbed_official | 157:90e3acc479a2 | 75 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 157:90e3acc479a2 | 76 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 157:90e3acc479a2 | 77 | * and/or other materials provided with the distribution. |
mbed_official | 157:90e3acc479a2 | 78 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 157:90e3acc479a2 | 79 | * may be used to endorse or promote products derived from this software |
mbed_official | 157:90e3acc479a2 | 80 | * without specific prior written permission. |
mbed_official | 157:90e3acc479a2 | 81 | * |
mbed_official | 157:90e3acc479a2 | 82 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 157:90e3acc479a2 | 83 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 157:90e3acc479a2 | 84 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 157:90e3acc479a2 | 85 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 157:90e3acc479a2 | 86 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 157:90e3acc479a2 | 87 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 157:90e3acc479a2 | 88 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 157:90e3acc479a2 | 89 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 157:90e3acc479a2 | 90 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 157:90e3acc479a2 | 91 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 157:90e3acc479a2 | 92 | * |
mbed_official | 157:90e3acc479a2 | 93 | ****************************************************************************** |
mbed_official | 157:90e3acc479a2 | 94 | */ |
mbed_official | 157:90e3acc479a2 | 95 | |
mbed_official | 157:90e3acc479a2 | 96 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 157:90e3acc479a2 | 97 | #include "stm32f30x_wwdg.h" |
mbed_official | 157:90e3acc479a2 | 98 | #include "stm32f30x_rcc.h" |
mbed_official | 157:90e3acc479a2 | 99 | |
mbed_official | 157:90e3acc479a2 | 100 | /** @addtogroup STM32F30x_StdPeriph_Driver |
mbed_official | 157:90e3acc479a2 | 101 | * @{ |
mbed_official | 157:90e3acc479a2 | 102 | */ |
mbed_official | 157:90e3acc479a2 | 103 | |
mbed_official | 157:90e3acc479a2 | 104 | /** @defgroup WWDG |
mbed_official | 157:90e3acc479a2 | 105 | * @brief WWDG driver modules |
mbed_official | 157:90e3acc479a2 | 106 | * @{ |
mbed_official | 157:90e3acc479a2 | 107 | */ |
mbed_official | 157:90e3acc479a2 | 108 | |
mbed_official | 157:90e3acc479a2 | 109 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 157:90e3acc479a2 | 110 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 157:90e3acc479a2 | 111 | /* --------------------- WWDG registers bit mask ---------------------------- */ |
mbed_official | 157:90e3acc479a2 | 112 | /* CFR register bit mask */ |
mbed_official | 157:90e3acc479a2 | 113 | #define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F) |
mbed_official | 157:90e3acc479a2 | 114 | #define CFR_W_MASK ((uint32_t)0xFFFFFF80) |
mbed_official | 157:90e3acc479a2 | 115 | #define BIT_MASK ((uint8_t)0x7F) |
mbed_official | 157:90e3acc479a2 | 116 | |
mbed_official | 157:90e3acc479a2 | 117 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 157:90e3acc479a2 | 118 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 157:90e3acc479a2 | 119 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 157:90e3acc479a2 | 120 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 157:90e3acc479a2 | 121 | |
mbed_official | 157:90e3acc479a2 | 122 | /** @defgroup WWDG_Private_Functions |
mbed_official | 157:90e3acc479a2 | 123 | * @{ |
mbed_official | 157:90e3acc479a2 | 124 | */ |
mbed_official | 157:90e3acc479a2 | 125 | |
mbed_official | 157:90e3acc479a2 | 126 | /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions |
mbed_official | 157:90e3acc479a2 | 127 | * @brief Prescaler, Refresh window and Counter configuration functions |
mbed_official | 157:90e3acc479a2 | 128 | * |
mbed_official | 157:90e3acc479a2 | 129 | @verbatim |
mbed_official | 157:90e3acc479a2 | 130 | ============================================================================== |
mbed_official | 157:90e3acc479a2 | 131 | ##### Prescaler, Refresh window and Counter configuration functions ##### |
mbed_official | 157:90e3acc479a2 | 132 | ============================================================================== |
mbed_official | 157:90e3acc479a2 | 133 | |
mbed_official | 157:90e3acc479a2 | 134 | @endverbatim |
mbed_official | 157:90e3acc479a2 | 135 | * @{ |
mbed_official | 157:90e3acc479a2 | 136 | */ |
mbed_official | 157:90e3acc479a2 | 137 | |
mbed_official | 157:90e3acc479a2 | 138 | /** |
mbed_official | 157:90e3acc479a2 | 139 | * @brief Deinitializes the WWDG peripheral registers to their default reset values. |
mbed_official | 157:90e3acc479a2 | 140 | * @param None |
mbed_official | 157:90e3acc479a2 | 141 | * @retval None |
mbed_official | 157:90e3acc479a2 | 142 | */ |
mbed_official | 157:90e3acc479a2 | 143 | void WWDG_DeInit(void) |
mbed_official | 157:90e3acc479a2 | 144 | { |
mbed_official | 157:90e3acc479a2 | 145 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); |
mbed_official | 157:90e3acc479a2 | 146 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); |
mbed_official | 157:90e3acc479a2 | 147 | } |
mbed_official | 157:90e3acc479a2 | 148 | |
mbed_official | 157:90e3acc479a2 | 149 | /** |
mbed_official | 157:90e3acc479a2 | 150 | * @brief Sets the WWDG Prescaler. |
mbed_official | 157:90e3acc479a2 | 151 | * @param WWDG_Prescaler: specifies the WWDG Prescaler. |
mbed_official | 157:90e3acc479a2 | 152 | * This parameter can be one of the following values: |
mbed_official | 157:90e3acc479a2 | 153 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 |
mbed_official | 157:90e3acc479a2 | 154 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 |
mbed_official | 157:90e3acc479a2 | 155 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 |
mbed_official | 157:90e3acc479a2 | 156 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 |
mbed_official | 157:90e3acc479a2 | 157 | * @retval None |
mbed_official | 157:90e3acc479a2 | 158 | */ |
mbed_official | 157:90e3acc479a2 | 159 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) |
mbed_official | 157:90e3acc479a2 | 160 | { |
mbed_official | 157:90e3acc479a2 | 161 | uint32_t tmpreg = 0; |
mbed_official | 157:90e3acc479a2 | 162 | /* Check the parameters */ |
mbed_official | 157:90e3acc479a2 | 163 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); |
mbed_official | 157:90e3acc479a2 | 164 | /* Clear WDGTB[1:0] bits */ |
mbed_official | 157:90e3acc479a2 | 165 | tmpreg = WWDG->CFR & CFR_WDGTB_MASK; |
mbed_official | 157:90e3acc479a2 | 166 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */ |
mbed_official | 157:90e3acc479a2 | 167 | tmpreg |= WWDG_Prescaler; |
mbed_official | 157:90e3acc479a2 | 168 | /* Store the new value */ |
mbed_official | 157:90e3acc479a2 | 169 | WWDG->CFR = tmpreg; |
mbed_official | 157:90e3acc479a2 | 170 | } |
mbed_official | 157:90e3acc479a2 | 171 | |
mbed_official | 157:90e3acc479a2 | 172 | /** |
mbed_official | 157:90e3acc479a2 | 173 | * @brief Sets the WWDG window value. |
mbed_official | 157:90e3acc479a2 | 174 | * @param WindowValue: specifies the window value to be compared to the downcounter. |
mbed_official | 157:90e3acc479a2 | 175 | * This parameter value must be lower than 0x80. |
mbed_official | 157:90e3acc479a2 | 176 | * @retval None |
mbed_official | 157:90e3acc479a2 | 177 | */ |
mbed_official | 157:90e3acc479a2 | 178 | void WWDG_SetWindowValue(uint8_t WindowValue) |
mbed_official | 157:90e3acc479a2 | 179 | { |
mbed_official | 157:90e3acc479a2 | 180 | __IO uint32_t tmpreg = 0; |
mbed_official | 157:90e3acc479a2 | 181 | |
mbed_official | 157:90e3acc479a2 | 182 | /* Check the parameters */ |
mbed_official | 157:90e3acc479a2 | 183 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); |
mbed_official | 157:90e3acc479a2 | 184 | /* Clear W[6:0] bits */ |
mbed_official | 157:90e3acc479a2 | 185 | |
mbed_official | 157:90e3acc479a2 | 186 | tmpreg = WWDG->CFR & CFR_W_MASK; |
mbed_official | 157:90e3acc479a2 | 187 | |
mbed_official | 157:90e3acc479a2 | 188 | /* Set W[6:0] bits according to WindowValue value */ |
mbed_official | 157:90e3acc479a2 | 189 | tmpreg |= WindowValue & (uint32_t) BIT_MASK; |
mbed_official | 157:90e3acc479a2 | 190 | |
mbed_official | 157:90e3acc479a2 | 191 | /* Store the new value */ |
mbed_official | 157:90e3acc479a2 | 192 | WWDG->CFR = tmpreg; |
mbed_official | 157:90e3acc479a2 | 193 | } |
mbed_official | 157:90e3acc479a2 | 194 | |
mbed_official | 157:90e3acc479a2 | 195 | /** |
mbed_official | 157:90e3acc479a2 | 196 | * @brief Enables the WWDG Early Wakeup interrupt(EWI). |
mbed_official | 157:90e3acc479a2 | 197 | * @note Once enabled this interrupt cannot be disabled except by a system reset. |
mbed_official | 157:90e3acc479a2 | 198 | * @param None |
mbed_official | 157:90e3acc479a2 | 199 | * @retval None |
mbed_official | 157:90e3acc479a2 | 200 | */ |
mbed_official | 157:90e3acc479a2 | 201 | void WWDG_EnableIT(void) |
mbed_official | 157:90e3acc479a2 | 202 | { |
mbed_official | 157:90e3acc479a2 | 203 | WWDG->CFR |= WWDG_CFR_EWI; |
mbed_official | 157:90e3acc479a2 | 204 | } |
mbed_official | 157:90e3acc479a2 | 205 | |
mbed_official | 157:90e3acc479a2 | 206 | /** |
mbed_official | 157:90e3acc479a2 | 207 | * @brief Sets the WWDG counter value. |
mbed_official | 157:90e3acc479a2 | 208 | * @param Counter: specifies the watchdog counter value. |
mbed_official | 157:90e3acc479a2 | 209 | * This parameter must be a number between 0x40 and 0x7F (to prevent generating |
mbed_official | 157:90e3acc479a2 | 210 | * an immediate reset). |
mbed_official | 157:90e3acc479a2 | 211 | * @retval None |
mbed_official | 157:90e3acc479a2 | 212 | */ |
mbed_official | 157:90e3acc479a2 | 213 | void WWDG_SetCounter(uint8_t Counter) |
mbed_official | 157:90e3acc479a2 | 214 | { |
mbed_official | 157:90e3acc479a2 | 215 | /* Check the parameters */ |
mbed_official | 157:90e3acc479a2 | 216 | assert_param(IS_WWDG_COUNTER(Counter)); |
mbed_official | 157:90e3acc479a2 | 217 | /* Write to T[6:0] bits to configure the counter value, no need to do |
mbed_official | 157:90e3acc479a2 | 218 | a read-modify-write; writing a 0 to WDGA bit does nothing */ |
mbed_official | 157:90e3acc479a2 | 219 | WWDG->CR = Counter & BIT_MASK; |
mbed_official | 157:90e3acc479a2 | 220 | } |
mbed_official | 157:90e3acc479a2 | 221 | |
mbed_official | 157:90e3acc479a2 | 222 | /** |
mbed_official | 157:90e3acc479a2 | 223 | * @} |
mbed_official | 157:90e3acc479a2 | 224 | */ |
mbed_official | 157:90e3acc479a2 | 225 | |
mbed_official | 157:90e3acc479a2 | 226 | /** @defgroup WWDG_Group2 WWDG activation functions |
mbed_official | 157:90e3acc479a2 | 227 | * @brief WWDG activation functions |
mbed_official | 157:90e3acc479a2 | 228 | * |
mbed_official | 157:90e3acc479a2 | 229 | @verbatim |
mbed_official | 157:90e3acc479a2 | 230 | ============================================================================== |
mbed_official | 157:90e3acc479a2 | 231 | ##### WWDG activation function ##### |
mbed_official | 157:90e3acc479a2 | 232 | ============================================================================== |
mbed_official | 157:90e3acc479a2 | 233 | |
mbed_official | 157:90e3acc479a2 | 234 | @endverbatim |
mbed_official | 157:90e3acc479a2 | 235 | * @{ |
mbed_official | 157:90e3acc479a2 | 236 | */ |
mbed_official | 157:90e3acc479a2 | 237 | |
mbed_official | 157:90e3acc479a2 | 238 | /** |
mbed_official | 157:90e3acc479a2 | 239 | * @brief Enables WWDG and load the counter value. |
mbed_official | 157:90e3acc479a2 | 240 | * @param Counter: specifies the watchdog counter value. |
mbed_official | 157:90e3acc479a2 | 241 | * This parameter must be a number between 0x40 and 0x7F (to prevent generating |
mbed_official | 157:90e3acc479a2 | 242 | * an immediate reset). |
mbed_official | 157:90e3acc479a2 | 243 | * @retval None |
mbed_official | 157:90e3acc479a2 | 244 | */ |
mbed_official | 157:90e3acc479a2 | 245 | void WWDG_Enable(uint8_t Counter) |
mbed_official | 157:90e3acc479a2 | 246 | { |
mbed_official | 157:90e3acc479a2 | 247 | /* Check the parameters */ |
mbed_official | 157:90e3acc479a2 | 248 | assert_param(IS_WWDG_COUNTER(Counter)); |
mbed_official | 157:90e3acc479a2 | 249 | WWDG->CR = WWDG_CR_WDGA | Counter; |
mbed_official | 157:90e3acc479a2 | 250 | } |
mbed_official | 157:90e3acc479a2 | 251 | |
mbed_official | 157:90e3acc479a2 | 252 | /** |
mbed_official | 157:90e3acc479a2 | 253 | * @} |
mbed_official | 157:90e3acc479a2 | 254 | */ |
mbed_official | 157:90e3acc479a2 | 255 | |
mbed_official | 157:90e3acc479a2 | 256 | /** @defgroup WWDG_Group3 Interrupts and flags management functions |
mbed_official | 157:90e3acc479a2 | 257 | * @brief Interrupts and flags management functions |
mbed_official | 157:90e3acc479a2 | 258 | * |
mbed_official | 157:90e3acc479a2 | 259 | @verbatim |
mbed_official | 157:90e3acc479a2 | 260 | ============================================================================== |
mbed_official | 157:90e3acc479a2 | 261 | ##### Interrupts and flags management functions ##### |
mbed_official | 157:90e3acc479a2 | 262 | ============================================================================== |
mbed_official | 157:90e3acc479a2 | 263 | |
mbed_official | 157:90e3acc479a2 | 264 | @endverbatim |
mbed_official | 157:90e3acc479a2 | 265 | * @{ |
mbed_official | 157:90e3acc479a2 | 266 | */ |
mbed_official | 157:90e3acc479a2 | 267 | |
mbed_official | 157:90e3acc479a2 | 268 | /** |
mbed_official | 157:90e3acc479a2 | 269 | * @brief Checks whether the Early Wakeup interrupt flag is set or not. |
mbed_official | 157:90e3acc479a2 | 270 | * @param None |
mbed_official | 157:90e3acc479a2 | 271 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET). |
mbed_official | 157:90e3acc479a2 | 272 | */ |
mbed_official | 157:90e3acc479a2 | 273 | FlagStatus WWDG_GetFlagStatus(void) |
mbed_official | 157:90e3acc479a2 | 274 | { |
mbed_official | 157:90e3acc479a2 | 275 | FlagStatus bitstatus = RESET; |
mbed_official | 157:90e3acc479a2 | 276 | |
mbed_official | 157:90e3acc479a2 | 277 | if ((WWDG->SR) != (uint32_t)RESET) |
mbed_official | 157:90e3acc479a2 | 278 | { |
mbed_official | 157:90e3acc479a2 | 279 | bitstatus = SET; |
mbed_official | 157:90e3acc479a2 | 280 | } |
mbed_official | 157:90e3acc479a2 | 281 | else |
mbed_official | 157:90e3acc479a2 | 282 | { |
mbed_official | 157:90e3acc479a2 | 283 | bitstatus = RESET; |
mbed_official | 157:90e3acc479a2 | 284 | } |
mbed_official | 157:90e3acc479a2 | 285 | return bitstatus; |
mbed_official | 157:90e3acc479a2 | 286 | } |
mbed_official | 157:90e3acc479a2 | 287 | |
mbed_official | 157:90e3acc479a2 | 288 | /** |
mbed_official | 157:90e3acc479a2 | 289 | * @brief Clears Early Wakeup interrupt flag. |
mbed_official | 157:90e3acc479a2 | 290 | * @param None |
mbed_official | 157:90e3acc479a2 | 291 | * @retval None |
mbed_official | 157:90e3acc479a2 | 292 | */ |
mbed_official | 157:90e3acc479a2 | 293 | void WWDG_ClearFlag(void) |
mbed_official | 157:90e3acc479a2 | 294 | { |
mbed_official | 157:90e3acc479a2 | 295 | WWDG->SR = (uint32_t)RESET; |
mbed_official | 157:90e3acc479a2 | 296 | } |
mbed_official | 157:90e3acc479a2 | 297 | |
mbed_official | 157:90e3acc479a2 | 298 | /** |
mbed_official | 157:90e3acc479a2 | 299 | * @} |
mbed_official | 157:90e3acc479a2 | 300 | */ |
mbed_official | 157:90e3acc479a2 | 301 | |
mbed_official | 157:90e3acc479a2 | 302 | /** |
mbed_official | 157:90e3acc479a2 | 303 | * @} |
mbed_official | 157:90e3acc479a2 | 304 | */ |
mbed_official | 157:90e3acc479a2 | 305 | |
mbed_official | 157:90e3acc479a2 | 306 | /** |
mbed_official | 157:90e3acc479a2 | 307 | * @} |
mbed_official | 157:90e3acc479a2 | 308 | */ |
mbed_official | 157:90e3acc479a2 | 309 | |
mbed_official | 157:90e3acc479a2 | 310 | /** |
mbed_official | 157:90e3acc479a2 | 311 | * @} |
mbed_official | 157:90e3acc479a2 | 312 | */ |
mbed_official | 157:90e3acc479a2 | 313 | |
mbed_official | 157:90e3acc479a2 | 314 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |