mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_tim.h@155:8435094ec241, 2014-04-08 (annotated)
- Committer:
- mbed_official
- Date:
- Tue Apr 08 09:15:06 2014 +0100
- Revision:
- 155:8435094ec241
Synchronized with git revision d616c415fc62f490b915ff0ff39c8d24b2917c0f
Full URL: https://github.com/mbedmicro/mbed/commit/d616c415fc62f490b915ff0ff39c8d24b2917c0f/
[STM32F3XX] Initial port
Who changed what in which revision?
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mbed_official | 155:8435094ec241 | 1 | /** |
mbed_official | 155:8435094ec241 | 2 | ****************************************************************************** |
mbed_official | 155:8435094ec241 | 3 | * @file stm32f30x_tim.h |
mbed_official | 155:8435094ec241 | 4 | * @author MCD Application Team |
mbed_official | 155:8435094ec241 | 5 | * @version V1.1.0 |
mbed_official | 155:8435094ec241 | 6 | * @date 27-February-2014 |
mbed_official | 155:8435094ec241 | 7 | * @brief This file contains all the functions prototypes for the TIM firmware |
mbed_official | 155:8435094ec241 | 8 | * library. |
mbed_official | 155:8435094ec241 | 9 | ****************************************************************************** |
mbed_official | 155:8435094ec241 | 10 | * @attention |
mbed_official | 155:8435094ec241 | 11 | * |
mbed_official | 155:8435094ec241 | 12 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 155:8435094ec241 | 13 | * |
mbed_official | 155:8435094ec241 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 155:8435094ec241 | 15 | * are permitted provided that the following conditions are met: |
mbed_official | 155:8435094ec241 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 155:8435094ec241 | 17 | * this list of conditions and the following disclaimer. |
mbed_official | 155:8435094ec241 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 155:8435094ec241 | 19 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 155:8435094ec241 | 20 | * and/or other materials provided with the distribution. |
mbed_official | 155:8435094ec241 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 155:8435094ec241 | 22 | * may be used to endorse or promote products derived from this software |
mbed_official | 155:8435094ec241 | 23 | * without specific prior written permission. |
mbed_official | 155:8435094ec241 | 24 | * |
mbed_official | 155:8435094ec241 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 155:8435094ec241 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 155:8435094ec241 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 155:8435094ec241 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 155:8435094ec241 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 155:8435094ec241 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 155:8435094ec241 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 155:8435094ec241 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 155:8435094ec241 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 155:8435094ec241 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 155:8435094ec241 | 35 | * |
mbed_official | 155:8435094ec241 | 36 | ****************************************************************************** |
mbed_official | 155:8435094ec241 | 37 | */ |
mbed_official | 155:8435094ec241 | 38 | |
mbed_official | 155:8435094ec241 | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
mbed_official | 155:8435094ec241 | 40 | #ifndef __STM32F30x_TIM_H |
mbed_official | 155:8435094ec241 | 41 | #define __STM32F30x_TIM_H |
mbed_official | 155:8435094ec241 | 42 | |
mbed_official | 155:8435094ec241 | 43 | #ifdef __cplusplus |
mbed_official | 155:8435094ec241 | 44 | extern "C" { |
mbed_official | 155:8435094ec241 | 45 | #endif |
mbed_official | 155:8435094ec241 | 46 | |
mbed_official | 155:8435094ec241 | 47 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 155:8435094ec241 | 48 | #include "stm32f30x.h" |
mbed_official | 155:8435094ec241 | 49 | |
mbed_official | 155:8435094ec241 | 50 | /** @addtogroup stm32f30x_StdPeriph_Driver |
mbed_official | 155:8435094ec241 | 51 | * @{ |
mbed_official | 155:8435094ec241 | 52 | */ |
mbed_official | 155:8435094ec241 | 53 | |
mbed_official | 155:8435094ec241 | 54 | /** @addtogroup TIM |
mbed_official | 155:8435094ec241 | 55 | * @{ |
mbed_official | 155:8435094ec241 | 56 | */ |
mbed_official | 155:8435094ec241 | 57 | |
mbed_official | 155:8435094ec241 | 58 | /* Exported types ------------------------------------------------------------*/ |
mbed_official | 155:8435094ec241 | 59 | |
mbed_official | 155:8435094ec241 | 60 | /** |
mbed_official | 155:8435094ec241 | 61 | * @brief TIM Time Base Init structure definition |
mbed_official | 155:8435094ec241 | 62 | * @note This structure is used with all TIMx except for TIM6 and TIM7. |
mbed_official | 155:8435094ec241 | 63 | */ |
mbed_official | 155:8435094ec241 | 64 | |
mbed_official | 155:8435094ec241 | 65 | typedef struct |
mbed_official | 155:8435094ec241 | 66 | { |
mbed_official | 155:8435094ec241 | 67 | uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. |
mbed_official | 155:8435094ec241 | 68 | This parameter can be a number between 0x0000 and 0xFFFF */ |
mbed_official | 155:8435094ec241 | 69 | |
mbed_official | 155:8435094ec241 | 70 | uint16_t TIM_CounterMode; /*!< Specifies the counter mode. |
mbed_official | 155:8435094ec241 | 71 | This parameter can be a value of @ref TIM_Counter_Mode */ |
mbed_official | 155:8435094ec241 | 72 | |
mbed_official | 155:8435094ec241 | 73 | uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active |
mbed_official | 155:8435094ec241 | 74 | Auto-Reload Register at the next update event. |
mbed_official | 155:8435094ec241 | 75 | This parameter must be a number between 0x0000 and 0xFFFF. */ |
mbed_official | 155:8435094ec241 | 76 | |
mbed_official | 155:8435094ec241 | 77 | uint16_t TIM_ClockDivision; /*!< Specifies the clock division. |
mbed_official | 155:8435094ec241 | 78 | This parameter can be a value of @ref TIM_Clock_Division_CKD */ |
mbed_official | 155:8435094ec241 | 79 | |
mbed_official | 155:8435094ec241 | 80 | uint16_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter |
mbed_official | 155:8435094ec241 | 81 | reaches zero, an update event is generated and counting restarts |
mbed_official | 155:8435094ec241 | 82 | from the RCR value (N). |
mbed_official | 155:8435094ec241 | 83 | This means in PWM mode that (N+1) corresponds to: |
mbed_official | 155:8435094ec241 | 84 | - the number of PWM periods in edge-aligned mode |
mbed_official | 155:8435094ec241 | 85 | - the number of half PWM period in center-aligned mode |
mbed_official | 155:8435094ec241 | 86 | This parameter must be a number between 0x00 and 0xFF. |
mbed_official | 155:8435094ec241 | 87 | @note This parameter is valid only for TIM1 and TIM8. */ |
mbed_official | 155:8435094ec241 | 88 | } TIM_TimeBaseInitTypeDef; |
mbed_official | 155:8435094ec241 | 89 | |
mbed_official | 155:8435094ec241 | 90 | /** |
mbed_official | 155:8435094ec241 | 91 | * @brief TIM Output Compare Init structure definition |
mbed_official | 155:8435094ec241 | 92 | */ |
mbed_official | 155:8435094ec241 | 93 | |
mbed_official | 155:8435094ec241 | 94 | typedef struct |
mbed_official | 155:8435094ec241 | 95 | { |
mbed_official | 155:8435094ec241 | 96 | uint32_t TIM_OCMode; /*!< Specifies the TIM mode. |
mbed_official | 155:8435094ec241 | 97 | This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ |
mbed_official | 155:8435094ec241 | 98 | |
mbed_official | 155:8435094ec241 | 99 | uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state. |
mbed_official | 155:8435094ec241 | 100 | This parameter can be a value of @ref TIM_Output_Compare_State */ |
mbed_official | 155:8435094ec241 | 101 | |
mbed_official | 155:8435094ec241 | 102 | uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state. |
mbed_official | 155:8435094ec241 | 103 | This parameter can be a value of @ref TIM_Output_Compare_N_State |
mbed_official | 155:8435094ec241 | 104 | @note This parameter is valid only for TIM1 and TIM8. */ |
mbed_official | 155:8435094ec241 | 105 | |
mbed_official | 155:8435094ec241 | 106 | uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. |
mbed_official | 155:8435094ec241 | 107 | This parameter can be a number between 0x0000 and 0xFFFF */ |
mbed_official | 155:8435094ec241 | 108 | |
mbed_official | 155:8435094ec241 | 109 | uint16_t TIM_OCPolarity; /*!< Specifies the output polarity. |
mbed_official | 155:8435094ec241 | 110 | This parameter can be a value of @ref TIM_Output_Compare_Polarity */ |
mbed_official | 155:8435094ec241 | 111 | |
mbed_official | 155:8435094ec241 | 112 | uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity. |
mbed_official | 155:8435094ec241 | 113 | This parameter can be a value of @ref TIM_Output_Compare_N_Polarity |
mbed_official | 155:8435094ec241 | 114 | @note This parameter is valid only for TIM1 and TIM8. */ |
mbed_official | 155:8435094ec241 | 115 | |
mbed_official | 155:8435094ec241 | 116 | uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. |
mbed_official | 155:8435094ec241 | 117 | This parameter can be a value of @ref TIM_Output_Compare_Idle_State |
mbed_official | 155:8435094ec241 | 118 | @note This parameter is valid only for TIM1 and TIM8. */ |
mbed_official | 155:8435094ec241 | 119 | |
mbed_official | 155:8435094ec241 | 120 | uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. |
mbed_official | 155:8435094ec241 | 121 | This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State |
mbed_official | 155:8435094ec241 | 122 | @note This parameter is valid only for TIM1 and TIM8. */ |
mbed_official | 155:8435094ec241 | 123 | } TIM_OCInitTypeDef; |
mbed_official | 155:8435094ec241 | 124 | |
mbed_official | 155:8435094ec241 | 125 | /** |
mbed_official | 155:8435094ec241 | 126 | * @brief TIM Input Capture Init structure definition |
mbed_official | 155:8435094ec241 | 127 | */ |
mbed_official | 155:8435094ec241 | 128 | |
mbed_official | 155:8435094ec241 | 129 | typedef struct |
mbed_official | 155:8435094ec241 | 130 | { |
mbed_official | 155:8435094ec241 | 131 | |
mbed_official | 155:8435094ec241 | 132 | uint16_t TIM_Channel; /*!< Specifies the TIM channel. |
mbed_official | 155:8435094ec241 | 133 | This parameter can be a value of @ref TIM_Channel */ |
mbed_official | 155:8435094ec241 | 134 | |
mbed_official | 155:8435094ec241 | 135 | uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal. |
mbed_official | 155:8435094ec241 | 136 | This parameter can be a value of @ref TIM_Input_Capture_Polarity */ |
mbed_official | 155:8435094ec241 | 137 | |
mbed_official | 155:8435094ec241 | 138 | uint16_t TIM_ICSelection; /*!< Specifies the input. |
mbed_official | 155:8435094ec241 | 139 | This parameter can be a value of @ref TIM_Input_Capture_Selection */ |
mbed_official | 155:8435094ec241 | 140 | |
mbed_official | 155:8435094ec241 | 141 | uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler. |
mbed_official | 155:8435094ec241 | 142 | This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ |
mbed_official | 155:8435094ec241 | 143 | |
mbed_official | 155:8435094ec241 | 144 | uint16_t TIM_ICFilter; /*!< Specifies the input capture filter. |
mbed_official | 155:8435094ec241 | 145 | This parameter can be a number between 0x0 and 0xF */ |
mbed_official | 155:8435094ec241 | 146 | } TIM_ICInitTypeDef; |
mbed_official | 155:8435094ec241 | 147 | |
mbed_official | 155:8435094ec241 | 148 | /** |
mbed_official | 155:8435094ec241 | 149 | * @brief BDTR structure definition |
mbed_official | 155:8435094ec241 | 150 | * @note This structure is used only with TIM1 and TIM8. |
mbed_official | 155:8435094ec241 | 151 | */ |
mbed_official | 155:8435094ec241 | 152 | |
mbed_official | 155:8435094ec241 | 153 | typedef struct |
mbed_official | 155:8435094ec241 | 154 | { |
mbed_official | 155:8435094ec241 | 155 | |
mbed_official | 155:8435094ec241 | 156 | uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode. |
mbed_official | 155:8435094ec241 | 157 | This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ |
mbed_official | 155:8435094ec241 | 158 | |
mbed_official | 155:8435094ec241 | 159 | uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state. |
mbed_official | 155:8435094ec241 | 160 | This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ |
mbed_official | 155:8435094ec241 | 161 | |
mbed_official | 155:8435094ec241 | 162 | uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters. |
mbed_official | 155:8435094ec241 | 163 | This parameter can be a value of @ref TIM_Lock_level */ |
mbed_official | 155:8435094ec241 | 164 | |
mbed_official | 155:8435094ec241 | 165 | uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the |
mbed_official | 155:8435094ec241 | 166 | switching-on of the outputs. |
mbed_official | 155:8435094ec241 | 167 | This parameter can be a number between 0x00 and 0xFF */ |
mbed_official | 155:8435094ec241 | 168 | |
mbed_official | 155:8435094ec241 | 169 | uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not. |
mbed_official | 155:8435094ec241 | 170 | This parameter can be a value of @ref TIM_Break_Input_enable_disable */ |
mbed_official | 155:8435094ec241 | 171 | |
mbed_official | 155:8435094ec241 | 172 | uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. |
mbed_official | 155:8435094ec241 | 173 | This parameter can be a value of @ref TIM_Break_Polarity */ |
mbed_official | 155:8435094ec241 | 174 | |
mbed_official | 155:8435094ec241 | 175 | uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. |
mbed_official | 155:8435094ec241 | 176 | This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ |
mbed_official | 155:8435094ec241 | 177 | } TIM_BDTRInitTypeDef; |
mbed_official | 155:8435094ec241 | 178 | |
mbed_official | 155:8435094ec241 | 179 | /* Exported constants --------------------------------------------------------*/ |
mbed_official | 155:8435094ec241 | 180 | |
mbed_official | 155:8435094ec241 | 181 | /** @defgroup TIM_Exported_constants |
mbed_official | 155:8435094ec241 | 182 | * @{ |
mbed_official | 155:8435094ec241 | 183 | */ |
mbed_official | 155:8435094ec241 | 184 | |
mbed_official | 155:8435094ec241 | 185 | #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 155:8435094ec241 | 186 | ((PERIPH) == TIM2) || \ |
mbed_official | 155:8435094ec241 | 187 | ((PERIPH) == TIM3) || \ |
mbed_official | 155:8435094ec241 | 188 | ((PERIPH) == TIM4) || \ |
mbed_official | 155:8435094ec241 | 189 | ((PERIPH) == TIM6) || \ |
mbed_official | 155:8435094ec241 | 190 | ((PERIPH) == TIM7) || \ |
mbed_official | 155:8435094ec241 | 191 | ((PERIPH) == TIM8) || \ |
mbed_official | 155:8435094ec241 | 192 | ((PERIPH) == TIM15) || \ |
mbed_official | 155:8435094ec241 | 193 | ((PERIPH) == TIM16) || \ |
mbed_official | 155:8435094ec241 | 194 | ((PERIPH) == TIM17)) |
mbed_official | 155:8435094ec241 | 195 | /* LIST1: TIM1, TIM2, TIM3, TIM4, TIM8, TIM15, TIM16 and TIM17 */ |
mbed_official | 155:8435094ec241 | 196 | #define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 155:8435094ec241 | 197 | ((PERIPH) == TIM2) || \ |
mbed_official | 155:8435094ec241 | 198 | ((PERIPH) == TIM3) || \ |
mbed_official | 155:8435094ec241 | 199 | ((PERIPH) == TIM4) || \ |
mbed_official | 155:8435094ec241 | 200 | ((PERIPH) == TIM8) || \ |
mbed_official | 155:8435094ec241 | 201 | ((PERIPH) == TIM15) || \ |
mbed_official | 155:8435094ec241 | 202 | ((PERIPH) == TIM16) || \ |
mbed_official | 155:8435094ec241 | 203 | ((PERIPH) == TIM17)) |
mbed_official | 155:8435094ec241 | 204 | |
mbed_official | 155:8435094ec241 | 205 | /* LIST2: TIM1, TIM2, TIM3, TIM4, TIM8 and TIM15 */ |
mbed_official | 155:8435094ec241 | 206 | #define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 155:8435094ec241 | 207 | ((PERIPH) == TIM2) || \ |
mbed_official | 155:8435094ec241 | 208 | ((PERIPH) == TIM3) || \ |
mbed_official | 155:8435094ec241 | 209 | ((PERIPH) == TIM4) || \ |
mbed_official | 155:8435094ec241 | 210 | ((PERIPH) == TIM8) || \ |
mbed_official | 155:8435094ec241 | 211 | ((PERIPH) == TIM15)) |
mbed_official | 155:8435094ec241 | 212 | /* LIST3: TIM1, TIM2, TIM3, TIM4 and TIM8 */ |
mbed_official | 155:8435094ec241 | 213 | #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 155:8435094ec241 | 214 | ((PERIPH) == TIM2) || \ |
mbed_official | 155:8435094ec241 | 215 | ((PERIPH) == TIM3) || \ |
mbed_official | 155:8435094ec241 | 216 | ((PERIPH) == TIM4) || \ |
mbed_official | 155:8435094ec241 | 217 | ((PERIPH) == TIM8)) |
mbed_official | 155:8435094ec241 | 218 | /* LIST4: TIM1 and TIM8 */ |
mbed_official | 155:8435094ec241 | 219 | #define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) ||\ |
mbed_official | 155:8435094ec241 | 220 | ((PERIPH) == TIM8)) |
mbed_official | 155:8435094ec241 | 221 | /* LIST5: TIM1, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7 and TIM8 */ |
mbed_official | 155:8435094ec241 | 222 | #define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 155:8435094ec241 | 223 | ((PERIPH) == TIM2) || \ |
mbed_official | 155:8435094ec241 | 224 | ((PERIPH) == TIM3) || \ |
mbed_official | 155:8435094ec241 | 225 | ((PERIPH) == TIM4) || \ |
mbed_official | 155:8435094ec241 | 226 | ((PERIPH) == TIM6) || \ |
mbed_official | 155:8435094ec241 | 227 | ((PERIPH) == TIM7) || \ |
mbed_official | 155:8435094ec241 | 228 | ((PERIPH) == TIM8)) |
mbed_official | 155:8435094ec241 | 229 | /* LIST6: TIM1, TIM8, TIM15, TIM16 and TIM17 */ |
mbed_official | 155:8435094ec241 | 230 | #define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 155:8435094ec241 | 231 | ((PERIPH) == TIM8) || \ |
mbed_official | 155:8435094ec241 | 232 | ((PERIPH) == TIM15) || \ |
mbed_official | 155:8435094ec241 | 233 | ((PERIPH) == TIM16) || \ |
mbed_official | 155:8435094ec241 | 234 | ((PERIPH) == TIM17)) |
mbed_official | 155:8435094ec241 | 235 | |
mbed_official | 155:8435094ec241 | 236 | /* LIST5: TIM1, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7 and TIM8 */ |
mbed_official | 155:8435094ec241 | 237 | #define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 155:8435094ec241 | 238 | ((PERIPH) == TIM2) || \ |
mbed_official | 155:8435094ec241 | 239 | ((PERIPH) == TIM3) || \ |
mbed_official | 155:8435094ec241 | 240 | ((PERIPH) == TIM4) || \ |
mbed_official | 155:8435094ec241 | 241 | ((PERIPH) == TIM6) || \ |
mbed_official | 155:8435094ec241 | 242 | ((PERIPH) == TIM7) || \ |
mbed_official | 155:8435094ec241 | 243 | ((PERIPH) == TIM8) || \ |
mbed_official | 155:8435094ec241 | 244 | ((PERIPH) == TIM15)) |
mbed_official | 155:8435094ec241 | 245 | /* LIST8: TIM16 (option register) */ |
mbed_official | 155:8435094ec241 | 246 | #define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM16)|| \ |
mbed_official | 155:8435094ec241 | 247 | ((PERIPH) == TIM1)||\ |
mbed_official | 155:8435094ec241 | 248 | ((PERIPH) == TIM8)) |
mbed_official | 155:8435094ec241 | 249 | |
mbed_official | 155:8435094ec241 | 250 | /** @defgroup TIM_Output_Compare_and_PWM_modes |
mbed_official | 155:8435094ec241 | 251 | * @{ |
mbed_official | 155:8435094ec241 | 252 | */ |
mbed_official | 155:8435094ec241 | 253 | |
mbed_official | 155:8435094ec241 | 254 | #define TIM_OCMode_Timing ((uint32_t)0x00000) |
mbed_official | 155:8435094ec241 | 255 | #define TIM_OCMode_Active ((uint32_t)0x00010) |
mbed_official | 155:8435094ec241 | 256 | #define TIM_OCMode_Inactive ((uint32_t)0x00020) |
mbed_official | 155:8435094ec241 | 257 | #define TIM_OCMode_Toggle ((uint32_t)0x00030) |
mbed_official | 155:8435094ec241 | 258 | #define TIM_OCMode_PWM1 ((uint32_t)0x00060) |
mbed_official | 155:8435094ec241 | 259 | #define TIM_OCMode_PWM2 ((uint32_t)0x00070) |
mbed_official | 155:8435094ec241 | 260 | |
mbed_official | 155:8435094ec241 | 261 | #define TIM_OCMode_Retrigerrable_OPM1 ((uint32_t)0x10000) |
mbed_official | 155:8435094ec241 | 262 | #define TIM_OCMode_Retrigerrable_OPM2 ((uint32_t)0x10010) |
mbed_official | 155:8435094ec241 | 263 | #define TIM_OCMode_Combined_PWM1 ((uint32_t)0x10040) |
mbed_official | 155:8435094ec241 | 264 | #define TIM_OCMode_Combined_PWM2 ((uint32_t)0x10050) |
mbed_official | 155:8435094ec241 | 265 | #define TIM_OCMode_Asymmetric_PWM1 ((uint32_t)0x10060) |
mbed_official | 155:8435094ec241 | 266 | #define TIM_OCMode_Asymmetric_PWM2 ((uint32_t)0x10070) |
mbed_official | 155:8435094ec241 | 267 | |
mbed_official | 155:8435094ec241 | 268 | #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ |
mbed_official | 155:8435094ec241 | 269 | ((MODE) == TIM_OCMode_Active) || \ |
mbed_official | 155:8435094ec241 | 270 | ((MODE) == TIM_OCMode_Inactive) || \ |
mbed_official | 155:8435094ec241 | 271 | ((MODE) == TIM_OCMode_Toggle)|| \ |
mbed_official | 155:8435094ec241 | 272 | ((MODE) == TIM_OCMode_PWM1) || \ |
mbed_official | 155:8435094ec241 | 273 | ((MODE) == TIM_OCMode_PWM2) || \ |
mbed_official | 155:8435094ec241 | 274 | ((MODE) == TIM_OCMode_Retrigerrable_OPM1) || \ |
mbed_official | 155:8435094ec241 | 275 | ((MODE) == TIM_OCMode_Retrigerrable_OPM2) || \ |
mbed_official | 155:8435094ec241 | 276 | ((MODE) == TIM_OCMode_Combined_PWM1) || \ |
mbed_official | 155:8435094ec241 | 277 | ((MODE) == TIM_OCMode_Combined_PWM2) || \ |
mbed_official | 155:8435094ec241 | 278 | ((MODE) == TIM_OCMode_Asymmetric_PWM1) || \ |
mbed_official | 155:8435094ec241 | 279 | ((MODE) == TIM_OCMode_Asymmetric_PWM2)) |
mbed_official | 155:8435094ec241 | 280 | |
mbed_official | 155:8435094ec241 | 281 | #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ |
mbed_official | 155:8435094ec241 | 282 | ((MODE) == TIM_OCMode_Active) || \ |
mbed_official | 155:8435094ec241 | 283 | ((MODE) == TIM_OCMode_Inactive) || \ |
mbed_official | 155:8435094ec241 | 284 | ((MODE) == TIM_OCMode_Toggle)|| \ |
mbed_official | 155:8435094ec241 | 285 | ((MODE) == TIM_OCMode_PWM1) || \ |
mbed_official | 155:8435094ec241 | 286 | ((MODE) == TIM_OCMode_PWM2) || \ |
mbed_official | 155:8435094ec241 | 287 | ((MODE) == TIM_ForcedAction_Active) || \ |
mbed_official | 155:8435094ec241 | 288 | ((MODE) == TIM_ForcedAction_InActive) || \ |
mbed_official | 155:8435094ec241 | 289 | ((MODE) == TIM_OCMode_Retrigerrable_OPM1) || \ |
mbed_official | 155:8435094ec241 | 290 | ((MODE) == TIM_OCMode_Retrigerrable_OPM2) || \ |
mbed_official | 155:8435094ec241 | 291 | ((MODE) == TIM_OCMode_Combined_PWM1) || \ |
mbed_official | 155:8435094ec241 | 292 | ((MODE) == TIM_OCMode_Combined_PWM2) || \ |
mbed_official | 155:8435094ec241 | 293 | ((MODE) == TIM_OCMode_Asymmetric_PWM1) || \ |
mbed_official | 155:8435094ec241 | 294 | ((MODE) == TIM_OCMode_Asymmetric_PWM2)) |
mbed_official | 155:8435094ec241 | 295 | /** |
mbed_official | 155:8435094ec241 | 296 | * @} |
mbed_official | 155:8435094ec241 | 297 | */ |
mbed_official | 155:8435094ec241 | 298 | |
mbed_official | 155:8435094ec241 | 299 | /** @defgroup TIM_One_Pulse_Mode |
mbed_official | 155:8435094ec241 | 300 | * @{ |
mbed_official | 155:8435094ec241 | 301 | */ |
mbed_official | 155:8435094ec241 | 302 | |
mbed_official | 155:8435094ec241 | 303 | #define TIM_OPMode_Single ((uint16_t)0x0008) |
mbed_official | 155:8435094ec241 | 304 | #define TIM_OPMode_Repetitive ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 305 | #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ |
mbed_official | 155:8435094ec241 | 306 | ((MODE) == TIM_OPMode_Repetitive)) |
mbed_official | 155:8435094ec241 | 307 | /** |
mbed_official | 155:8435094ec241 | 308 | * @} |
mbed_official | 155:8435094ec241 | 309 | */ |
mbed_official | 155:8435094ec241 | 310 | |
mbed_official | 155:8435094ec241 | 311 | /** @defgroup TIM_Channel |
mbed_official | 155:8435094ec241 | 312 | * @{ |
mbed_official | 155:8435094ec241 | 313 | */ |
mbed_official | 155:8435094ec241 | 314 | |
mbed_official | 155:8435094ec241 | 315 | #define TIM_Channel_1 ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 316 | #define TIM_Channel_2 ((uint16_t)0x0004) |
mbed_official | 155:8435094ec241 | 317 | #define TIM_Channel_3 ((uint16_t)0x0008) |
mbed_official | 155:8435094ec241 | 318 | #define TIM_Channel_4 ((uint16_t)0x000C) |
mbed_official | 155:8435094ec241 | 319 | #define TIM_Channel_5 ((uint16_t)0x0010) |
mbed_official | 155:8435094ec241 | 320 | #define TIM_Channel_6 ((uint16_t)0x0014) |
mbed_official | 155:8435094ec241 | 321 | |
mbed_official | 155:8435094ec241 | 322 | #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ |
mbed_official | 155:8435094ec241 | 323 | ((CHANNEL) == TIM_Channel_2) || \ |
mbed_official | 155:8435094ec241 | 324 | ((CHANNEL) == TIM_Channel_3) || \ |
mbed_official | 155:8435094ec241 | 325 | ((CHANNEL) == TIM_Channel_4)) |
mbed_official | 155:8435094ec241 | 326 | |
mbed_official | 155:8435094ec241 | 327 | #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ |
mbed_official | 155:8435094ec241 | 328 | ((CHANNEL) == TIM_Channel_2)) |
mbed_official | 155:8435094ec241 | 329 | #define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ |
mbed_official | 155:8435094ec241 | 330 | ((CHANNEL) == TIM_Channel_2) || \ |
mbed_official | 155:8435094ec241 | 331 | ((CHANNEL) == TIM_Channel_3)) |
mbed_official | 155:8435094ec241 | 332 | /** |
mbed_official | 155:8435094ec241 | 333 | * @} |
mbed_official | 155:8435094ec241 | 334 | */ |
mbed_official | 155:8435094ec241 | 335 | |
mbed_official | 155:8435094ec241 | 336 | /** @defgroup TIM_Clock_Division_CKD |
mbed_official | 155:8435094ec241 | 337 | * @{ |
mbed_official | 155:8435094ec241 | 338 | */ |
mbed_official | 155:8435094ec241 | 339 | |
mbed_official | 155:8435094ec241 | 340 | #define TIM_CKD_DIV1 ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 341 | #define TIM_CKD_DIV2 ((uint16_t)0x0100) |
mbed_official | 155:8435094ec241 | 342 | #define TIM_CKD_DIV4 ((uint16_t)0x0200) |
mbed_official | 155:8435094ec241 | 343 | #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \ |
mbed_official | 155:8435094ec241 | 344 | ((DIV) == TIM_CKD_DIV2) || \ |
mbed_official | 155:8435094ec241 | 345 | ((DIV) == TIM_CKD_DIV4)) |
mbed_official | 155:8435094ec241 | 346 | /** |
mbed_official | 155:8435094ec241 | 347 | * @} |
mbed_official | 155:8435094ec241 | 348 | */ |
mbed_official | 155:8435094ec241 | 349 | |
mbed_official | 155:8435094ec241 | 350 | /** @defgroup TIM_Counter_Mode |
mbed_official | 155:8435094ec241 | 351 | * @{ |
mbed_official | 155:8435094ec241 | 352 | */ |
mbed_official | 155:8435094ec241 | 353 | |
mbed_official | 155:8435094ec241 | 354 | #define TIM_CounterMode_Up ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 355 | #define TIM_CounterMode_Down ((uint16_t)0x0010) |
mbed_official | 155:8435094ec241 | 356 | #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) |
mbed_official | 155:8435094ec241 | 357 | #define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) |
mbed_official | 155:8435094ec241 | 358 | #define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) |
mbed_official | 155:8435094ec241 | 359 | #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ |
mbed_official | 155:8435094ec241 | 360 | ((MODE) == TIM_CounterMode_Down) || \ |
mbed_official | 155:8435094ec241 | 361 | ((MODE) == TIM_CounterMode_CenterAligned1) || \ |
mbed_official | 155:8435094ec241 | 362 | ((MODE) == TIM_CounterMode_CenterAligned2) || \ |
mbed_official | 155:8435094ec241 | 363 | ((MODE) == TIM_CounterMode_CenterAligned3)) |
mbed_official | 155:8435094ec241 | 364 | /** |
mbed_official | 155:8435094ec241 | 365 | * @} |
mbed_official | 155:8435094ec241 | 366 | */ |
mbed_official | 155:8435094ec241 | 367 | |
mbed_official | 155:8435094ec241 | 368 | /** @defgroup TIM_Output_Compare_Polarity |
mbed_official | 155:8435094ec241 | 369 | * @{ |
mbed_official | 155:8435094ec241 | 370 | */ |
mbed_official | 155:8435094ec241 | 371 | |
mbed_official | 155:8435094ec241 | 372 | #define TIM_OCPolarity_High ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 373 | #define TIM_OCPolarity_Low ((uint16_t)0x0002) |
mbed_official | 155:8435094ec241 | 374 | #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \ |
mbed_official | 155:8435094ec241 | 375 | ((POLARITY) == TIM_OCPolarity_Low)) |
mbed_official | 155:8435094ec241 | 376 | /** |
mbed_official | 155:8435094ec241 | 377 | * @} |
mbed_official | 155:8435094ec241 | 378 | */ |
mbed_official | 155:8435094ec241 | 379 | |
mbed_official | 155:8435094ec241 | 380 | /** @defgroup TIM_Output_Compare_N_Polarity |
mbed_official | 155:8435094ec241 | 381 | * @{ |
mbed_official | 155:8435094ec241 | 382 | */ |
mbed_official | 155:8435094ec241 | 383 | |
mbed_official | 155:8435094ec241 | 384 | #define TIM_OCNPolarity_High ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 385 | #define TIM_OCNPolarity_Low ((uint16_t)0x0008) |
mbed_official | 155:8435094ec241 | 386 | #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \ |
mbed_official | 155:8435094ec241 | 387 | ((POLARITY) == TIM_OCNPolarity_Low)) |
mbed_official | 155:8435094ec241 | 388 | /** |
mbed_official | 155:8435094ec241 | 389 | * @} |
mbed_official | 155:8435094ec241 | 390 | */ |
mbed_official | 155:8435094ec241 | 391 | |
mbed_official | 155:8435094ec241 | 392 | /** @defgroup TIM_Output_Compare_State |
mbed_official | 155:8435094ec241 | 393 | * @{ |
mbed_official | 155:8435094ec241 | 394 | */ |
mbed_official | 155:8435094ec241 | 395 | |
mbed_official | 155:8435094ec241 | 396 | #define TIM_OutputState_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 397 | #define TIM_OutputState_Enable ((uint16_t)0x0001) |
mbed_official | 155:8435094ec241 | 398 | #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ |
mbed_official | 155:8435094ec241 | 399 | ((STATE) == TIM_OutputState_Enable)) |
mbed_official | 155:8435094ec241 | 400 | /** |
mbed_official | 155:8435094ec241 | 401 | * @} |
mbed_official | 155:8435094ec241 | 402 | */ |
mbed_official | 155:8435094ec241 | 403 | |
mbed_official | 155:8435094ec241 | 404 | /** @defgroup TIM_Output_Compare_N_State |
mbed_official | 155:8435094ec241 | 405 | * @{ |
mbed_official | 155:8435094ec241 | 406 | */ |
mbed_official | 155:8435094ec241 | 407 | |
mbed_official | 155:8435094ec241 | 408 | #define TIM_OutputNState_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 409 | #define TIM_OutputNState_Enable ((uint16_t)0x0004) |
mbed_official | 155:8435094ec241 | 410 | #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ |
mbed_official | 155:8435094ec241 | 411 | ((STATE) == TIM_OutputNState_Enable)) |
mbed_official | 155:8435094ec241 | 412 | /** |
mbed_official | 155:8435094ec241 | 413 | * @} |
mbed_official | 155:8435094ec241 | 414 | */ |
mbed_official | 155:8435094ec241 | 415 | |
mbed_official | 155:8435094ec241 | 416 | /** @defgroup TIM_Capture_Compare_State |
mbed_official | 155:8435094ec241 | 417 | * @{ |
mbed_official | 155:8435094ec241 | 418 | */ |
mbed_official | 155:8435094ec241 | 419 | |
mbed_official | 155:8435094ec241 | 420 | #define TIM_CCx_Enable ((uint16_t)0x0001) |
mbed_official | 155:8435094ec241 | 421 | #define TIM_CCx_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 422 | #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \ |
mbed_official | 155:8435094ec241 | 423 | ((CCX) == TIM_CCx_Disable)) |
mbed_official | 155:8435094ec241 | 424 | /** |
mbed_official | 155:8435094ec241 | 425 | * @} |
mbed_official | 155:8435094ec241 | 426 | */ |
mbed_official | 155:8435094ec241 | 427 | |
mbed_official | 155:8435094ec241 | 428 | /** @defgroup TIM_Capture_Compare_N_State |
mbed_official | 155:8435094ec241 | 429 | * @{ |
mbed_official | 155:8435094ec241 | 430 | */ |
mbed_official | 155:8435094ec241 | 431 | |
mbed_official | 155:8435094ec241 | 432 | #define TIM_CCxN_Enable ((uint16_t)0x0004) |
mbed_official | 155:8435094ec241 | 433 | #define TIM_CCxN_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 434 | #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \ |
mbed_official | 155:8435094ec241 | 435 | ((CCXN) == TIM_CCxN_Disable)) |
mbed_official | 155:8435094ec241 | 436 | /** |
mbed_official | 155:8435094ec241 | 437 | * @} |
mbed_official | 155:8435094ec241 | 438 | */ |
mbed_official | 155:8435094ec241 | 439 | |
mbed_official | 155:8435094ec241 | 440 | /** @defgroup TIM_Break_Input_enable_disable |
mbed_official | 155:8435094ec241 | 441 | * @{ |
mbed_official | 155:8435094ec241 | 442 | */ |
mbed_official | 155:8435094ec241 | 443 | |
mbed_official | 155:8435094ec241 | 444 | #define TIM_Break_Enable ((uint16_t)0x1000) |
mbed_official | 155:8435094ec241 | 445 | #define TIM_Break_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 446 | #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ |
mbed_official | 155:8435094ec241 | 447 | ((STATE) == TIM_Break_Disable)) |
mbed_official | 155:8435094ec241 | 448 | /** |
mbed_official | 155:8435094ec241 | 449 | * @} |
mbed_official | 155:8435094ec241 | 450 | */ |
mbed_official | 155:8435094ec241 | 451 | |
mbed_official | 155:8435094ec241 | 452 | /** @defgroup TIM_Break1_Input_enable_disable |
mbed_official | 155:8435094ec241 | 453 | * @{ |
mbed_official | 155:8435094ec241 | 454 | */ |
mbed_official | 155:8435094ec241 | 455 | |
mbed_official | 155:8435094ec241 | 456 | #define TIM_Break1_Enable ((uint32_t)0x00001000) |
mbed_official | 155:8435094ec241 | 457 | #define TIM_Break1_Disable ((uint32_t)0x00000000) |
mbed_official | 155:8435094ec241 | 458 | #define IS_TIM_BREAK1_STATE(STATE) (((STATE) == TIM_Break1_Enable) || \ |
mbed_official | 155:8435094ec241 | 459 | ((STATE) == TIM_Break1_Disable)) |
mbed_official | 155:8435094ec241 | 460 | /** |
mbed_official | 155:8435094ec241 | 461 | * @} |
mbed_official | 155:8435094ec241 | 462 | */ |
mbed_official | 155:8435094ec241 | 463 | |
mbed_official | 155:8435094ec241 | 464 | /** @defgroup TIM_Break2_Input_enable_disable |
mbed_official | 155:8435094ec241 | 465 | * @{ |
mbed_official | 155:8435094ec241 | 466 | */ |
mbed_official | 155:8435094ec241 | 467 | |
mbed_official | 155:8435094ec241 | 468 | #define TIM_Break2_Enable ((uint32_t)0x01000000) |
mbed_official | 155:8435094ec241 | 469 | #define TIM_Break2_Disable ((uint32_t)0x00000000) |
mbed_official | 155:8435094ec241 | 470 | #define IS_TIM_BREAK2_STATE(STATE) (((STATE) == TIM_Break2_Enable) || \ |
mbed_official | 155:8435094ec241 | 471 | ((STATE) == TIM_Break2_Disable)) |
mbed_official | 155:8435094ec241 | 472 | /** |
mbed_official | 155:8435094ec241 | 473 | * @} |
mbed_official | 155:8435094ec241 | 474 | */ |
mbed_official | 155:8435094ec241 | 475 | |
mbed_official | 155:8435094ec241 | 476 | /** @defgroup TIM_Break_Polarity |
mbed_official | 155:8435094ec241 | 477 | * @{ |
mbed_official | 155:8435094ec241 | 478 | */ |
mbed_official | 155:8435094ec241 | 479 | |
mbed_official | 155:8435094ec241 | 480 | #define TIM_BreakPolarity_Low ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 481 | #define TIM_BreakPolarity_High ((uint16_t)0x2000) |
mbed_official | 155:8435094ec241 | 482 | #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \ |
mbed_official | 155:8435094ec241 | 483 | ((POLARITY) == TIM_BreakPolarity_High)) |
mbed_official | 155:8435094ec241 | 484 | /** |
mbed_official | 155:8435094ec241 | 485 | * @} |
mbed_official | 155:8435094ec241 | 486 | */ |
mbed_official | 155:8435094ec241 | 487 | |
mbed_official | 155:8435094ec241 | 488 | /** @defgroup TIM_Break1_Polarity |
mbed_official | 155:8435094ec241 | 489 | * @{ |
mbed_official | 155:8435094ec241 | 490 | */ |
mbed_official | 155:8435094ec241 | 491 | |
mbed_official | 155:8435094ec241 | 492 | #define TIM_Break1Polarity_Low ((uint32_t)0x00000000) |
mbed_official | 155:8435094ec241 | 493 | #define TIM_Break1Polarity_High ((uint32_t)0x00002000) |
mbed_official | 155:8435094ec241 | 494 | #define IS_TIM_BREAK1_POLARITY(POLARITY) (((POLARITY) == TIM_Break1Polarity_Low) || \ |
mbed_official | 155:8435094ec241 | 495 | ((POLARITY) == TIM_Break1Polarity_High)) |
mbed_official | 155:8435094ec241 | 496 | /** |
mbed_official | 155:8435094ec241 | 497 | * @} |
mbed_official | 155:8435094ec241 | 498 | */ |
mbed_official | 155:8435094ec241 | 499 | |
mbed_official | 155:8435094ec241 | 500 | /** @defgroup TIM_Break2_Polarity |
mbed_official | 155:8435094ec241 | 501 | * @{ |
mbed_official | 155:8435094ec241 | 502 | */ |
mbed_official | 155:8435094ec241 | 503 | |
mbed_official | 155:8435094ec241 | 504 | #define TIM_Break2Polarity_Low ((uint32_t)0x00000000) |
mbed_official | 155:8435094ec241 | 505 | #define TIM_Break2Polarity_High ((uint32_t)0x02000000) |
mbed_official | 155:8435094ec241 | 506 | #define IS_TIM_BREAK2_POLARITY(POLARITY) (((POLARITY) == TIM_Break2Polarity_Low) || \ |
mbed_official | 155:8435094ec241 | 507 | ((POLARITY) == TIM_Break2Polarity_High)) |
mbed_official | 155:8435094ec241 | 508 | /** |
mbed_official | 155:8435094ec241 | 509 | * @} |
mbed_official | 155:8435094ec241 | 510 | */ |
mbed_official | 155:8435094ec241 | 511 | |
mbed_official | 155:8435094ec241 | 512 | /** @defgroup TIM_Break1_Filter |
mbed_official | 155:8435094ec241 | 513 | * @{ |
mbed_official | 155:8435094ec241 | 514 | */ |
mbed_official | 155:8435094ec241 | 515 | |
mbed_official | 155:8435094ec241 | 516 | #define IS_TIM_BREAK1_FILTER(FILTER) ((FILTER) <= 0xF) |
mbed_official | 155:8435094ec241 | 517 | /** |
mbed_official | 155:8435094ec241 | 518 | * @} |
mbed_official | 155:8435094ec241 | 519 | */ |
mbed_official | 155:8435094ec241 | 520 | |
mbed_official | 155:8435094ec241 | 521 | /** @defgroup TIM_Break2_Filter |
mbed_official | 155:8435094ec241 | 522 | * @{ |
mbed_official | 155:8435094ec241 | 523 | */ |
mbed_official | 155:8435094ec241 | 524 | |
mbed_official | 155:8435094ec241 | 525 | #define IS_TIM_BREAK2_FILTER(FILTER) ((FILTER) <= 0xF) |
mbed_official | 155:8435094ec241 | 526 | /** |
mbed_official | 155:8435094ec241 | 527 | * @} |
mbed_official | 155:8435094ec241 | 528 | */ |
mbed_official | 155:8435094ec241 | 529 | |
mbed_official | 155:8435094ec241 | 530 | /** @defgroup TIM_AOE_Bit_Set_Reset |
mbed_official | 155:8435094ec241 | 531 | * @{ |
mbed_official | 155:8435094ec241 | 532 | */ |
mbed_official | 155:8435094ec241 | 533 | |
mbed_official | 155:8435094ec241 | 534 | #define TIM_AutomaticOutput_Enable ((uint16_t)0x4000) |
mbed_official | 155:8435094ec241 | 535 | #define TIM_AutomaticOutput_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 536 | #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \ |
mbed_official | 155:8435094ec241 | 537 | ((STATE) == TIM_AutomaticOutput_Disable)) |
mbed_official | 155:8435094ec241 | 538 | /** |
mbed_official | 155:8435094ec241 | 539 | * @} |
mbed_official | 155:8435094ec241 | 540 | */ |
mbed_official | 155:8435094ec241 | 541 | |
mbed_official | 155:8435094ec241 | 542 | /** @defgroup TIM_Lock_level |
mbed_official | 155:8435094ec241 | 543 | * @{ |
mbed_official | 155:8435094ec241 | 544 | */ |
mbed_official | 155:8435094ec241 | 545 | |
mbed_official | 155:8435094ec241 | 546 | #define TIM_LOCKLevel_OFF ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 547 | #define TIM_LOCKLevel_1 ((uint16_t)0x0100) |
mbed_official | 155:8435094ec241 | 548 | #define TIM_LOCKLevel_2 ((uint16_t)0x0200) |
mbed_official | 155:8435094ec241 | 549 | #define TIM_LOCKLevel_3 ((uint16_t)0x0300) |
mbed_official | 155:8435094ec241 | 550 | #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ |
mbed_official | 155:8435094ec241 | 551 | ((LEVEL) == TIM_LOCKLevel_1) || \ |
mbed_official | 155:8435094ec241 | 552 | ((LEVEL) == TIM_LOCKLevel_2) || \ |
mbed_official | 155:8435094ec241 | 553 | ((LEVEL) == TIM_LOCKLevel_3)) |
mbed_official | 155:8435094ec241 | 554 | /** |
mbed_official | 155:8435094ec241 | 555 | * @} |
mbed_official | 155:8435094ec241 | 556 | */ |
mbed_official | 155:8435094ec241 | 557 | |
mbed_official | 155:8435094ec241 | 558 | /** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state |
mbed_official | 155:8435094ec241 | 559 | * @{ |
mbed_official | 155:8435094ec241 | 560 | */ |
mbed_official | 155:8435094ec241 | 561 | |
mbed_official | 155:8435094ec241 | 562 | #define TIM_OSSIState_Enable ((uint16_t)0x0400) |
mbed_official | 155:8435094ec241 | 563 | #define TIM_OSSIState_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 564 | #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ |
mbed_official | 155:8435094ec241 | 565 | ((STATE) == TIM_OSSIState_Disable)) |
mbed_official | 155:8435094ec241 | 566 | /** |
mbed_official | 155:8435094ec241 | 567 | * @} |
mbed_official | 155:8435094ec241 | 568 | */ |
mbed_official | 155:8435094ec241 | 569 | |
mbed_official | 155:8435094ec241 | 570 | /** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state |
mbed_official | 155:8435094ec241 | 571 | * @{ |
mbed_official | 155:8435094ec241 | 572 | */ |
mbed_official | 155:8435094ec241 | 573 | |
mbed_official | 155:8435094ec241 | 574 | #define TIM_OSSRState_Enable ((uint16_t)0x0800) |
mbed_official | 155:8435094ec241 | 575 | #define TIM_OSSRState_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 576 | #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ |
mbed_official | 155:8435094ec241 | 577 | ((STATE) == TIM_OSSRState_Disable)) |
mbed_official | 155:8435094ec241 | 578 | /** |
mbed_official | 155:8435094ec241 | 579 | * @} |
mbed_official | 155:8435094ec241 | 580 | */ |
mbed_official | 155:8435094ec241 | 581 | |
mbed_official | 155:8435094ec241 | 582 | /** @defgroup TIM_Output_Compare_Idle_State |
mbed_official | 155:8435094ec241 | 583 | * @{ |
mbed_official | 155:8435094ec241 | 584 | */ |
mbed_official | 155:8435094ec241 | 585 | |
mbed_official | 155:8435094ec241 | 586 | #define TIM_OCIdleState_Set ((uint16_t)0x0100) |
mbed_official | 155:8435094ec241 | 587 | #define TIM_OCIdleState_Reset ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 588 | #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ |
mbed_official | 155:8435094ec241 | 589 | ((STATE) == TIM_OCIdleState_Reset)) |
mbed_official | 155:8435094ec241 | 590 | /** |
mbed_official | 155:8435094ec241 | 591 | * @} |
mbed_official | 155:8435094ec241 | 592 | */ |
mbed_official | 155:8435094ec241 | 593 | |
mbed_official | 155:8435094ec241 | 594 | /** @defgroup TIM_Output_Compare_N_Idle_State |
mbed_official | 155:8435094ec241 | 595 | * @{ |
mbed_official | 155:8435094ec241 | 596 | */ |
mbed_official | 155:8435094ec241 | 597 | |
mbed_official | 155:8435094ec241 | 598 | #define TIM_OCNIdleState_Set ((uint16_t)0x0200) |
mbed_official | 155:8435094ec241 | 599 | #define TIM_OCNIdleState_Reset ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 600 | #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ |
mbed_official | 155:8435094ec241 | 601 | ((STATE) == TIM_OCNIdleState_Reset)) |
mbed_official | 155:8435094ec241 | 602 | /** |
mbed_official | 155:8435094ec241 | 603 | * @} |
mbed_official | 155:8435094ec241 | 604 | */ |
mbed_official | 155:8435094ec241 | 605 | |
mbed_official | 155:8435094ec241 | 606 | /** @defgroup TIM_Input_Capture_Polarity |
mbed_official | 155:8435094ec241 | 607 | * @{ |
mbed_official | 155:8435094ec241 | 608 | */ |
mbed_official | 155:8435094ec241 | 609 | |
mbed_official | 155:8435094ec241 | 610 | #define TIM_ICPolarity_Rising ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 611 | #define TIM_ICPolarity_Falling ((uint16_t)0x0002) |
mbed_official | 155:8435094ec241 | 612 | #define TIM_ICPolarity_BothEdge ((uint16_t)0x000A) |
mbed_official | 155:8435094ec241 | 613 | #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ |
mbed_official | 155:8435094ec241 | 614 | ((POLARITY) == TIM_ICPolarity_Falling)|| \ |
mbed_official | 155:8435094ec241 | 615 | ((POLARITY) == TIM_ICPolarity_BothEdge)) |
mbed_official | 155:8435094ec241 | 616 | /** |
mbed_official | 155:8435094ec241 | 617 | * @} |
mbed_official | 155:8435094ec241 | 618 | */ |
mbed_official | 155:8435094ec241 | 619 | |
mbed_official | 155:8435094ec241 | 620 | /** @defgroup TIM_Input_Capture_Selection |
mbed_official | 155:8435094ec241 | 621 | * @{ |
mbed_official | 155:8435094ec241 | 622 | */ |
mbed_official | 155:8435094ec241 | 623 | |
mbed_official | 155:8435094ec241 | 624 | #define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be |
mbed_official | 155:8435094ec241 | 625 | connected to IC1, IC2, IC3 or IC4, respectively */ |
mbed_official | 155:8435094ec241 | 626 | #define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be |
mbed_official | 155:8435094ec241 | 627 | connected to IC2, IC1, IC4 or IC3, respectively. */ |
mbed_official | 155:8435094ec241 | 628 | #define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */ |
mbed_official | 155:8435094ec241 | 629 | #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \ |
mbed_official | 155:8435094ec241 | 630 | ((SELECTION) == TIM_ICSelection_IndirectTI) || \ |
mbed_official | 155:8435094ec241 | 631 | ((SELECTION) == TIM_ICSelection_TRC)) |
mbed_official | 155:8435094ec241 | 632 | /** |
mbed_official | 155:8435094ec241 | 633 | * @} |
mbed_official | 155:8435094ec241 | 634 | */ |
mbed_official | 155:8435094ec241 | 635 | |
mbed_official | 155:8435094ec241 | 636 | /** @defgroup TIM_Input_Capture_Prescaler |
mbed_official | 155:8435094ec241 | 637 | * @{ |
mbed_official | 155:8435094ec241 | 638 | */ |
mbed_official | 155:8435094ec241 | 639 | |
mbed_official | 155:8435094ec241 | 640 | #define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */ |
mbed_official | 155:8435094ec241 | 641 | #define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */ |
mbed_official | 155:8435094ec241 | 642 | #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */ |
mbed_official | 155:8435094ec241 | 643 | #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */ |
mbed_official | 155:8435094ec241 | 644 | #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \ |
mbed_official | 155:8435094ec241 | 645 | ((PRESCALER) == TIM_ICPSC_DIV2) || \ |
mbed_official | 155:8435094ec241 | 646 | ((PRESCALER) == TIM_ICPSC_DIV4) || \ |
mbed_official | 155:8435094ec241 | 647 | ((PRESCALER) == TIM_ICPSC_DIV8)) |
mbed_official | 155:8435094ec241 | 648 | /** |
mbed_official | 155:8435094ec241 | 649 | * @} |
mbed_official | 155:8435094ec241 | 650 | */ |
mbed_official | 155:8435094ec241 | 651 | |
mbed_official | 155:8435094ec241 | 652 | /** @defgroup TIM_interrupt_sources |
mbed_official | 155:8435094ec241 | 653 | * @{ |
mbed_official | 155:8435094ec241 | 654 | */ |
mbed_official | 155:8435094ec241 | 655 | |
mbed_official | 155:8435094ec241 | 656 | #define TIM_IT_Update ((uint16_t)0x0001) |
mbed_official | 155:8435094ec241 | 657 | #define TIM_IT_CC1 ((uint16_t)0x0002) |
mbed_official | 155:8435094ec241 | 658 | #define TIM_IT_CC2 ((uint16_t)0x0004) |
mbed_official | 155:8435094ec241 | 659 | #define TIM_IT_CC3 ((uint16_t)0x0008) |
mbed_official | 155:8435094ec241 | 660 | #define TIM_IT_CC4 ((uint16_t)0x0010) |
mbed_official | 155:8435094ec241 | 661 | #define TIM_IT_COM ((uint16_t)0x0020) |
mbed_official | 155:8435094ec241 | 662 | #define TIM_IT_Trigger ((uint16_t)0x0040) |
mbed_official | 155:8435094ec241 | 663 | #define TIM_IT_Break ((uint16_t)0x0080) |
mbed_official | 155:8435094ec241 | 664 | #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000)) |
mbed_official | 155:8435094ec241 | 665 | |
mbed_official | 155:8435094ec241 | 666 | #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \ |
mbed_official | 155:8435094ec241 | 667 | ((IT) == TIM_IT_CC1) || \ |
mbed_official | 155:8435094ec241 | 668 | ((IT) == TIM_IT_CC2) || \ |
mbed_official | 155:8435094ec241 | 669 | ((IT) == TIM_IT_CC3) || \ |
mbed_official | 155:8435094ec241 | 670 | ((IT) == TIM_IT_CC4) || \ |
mbed_official | 155:8435094ec241 | 671 | ((IT) == TIM_IT_COM) || \ |
mbed_official | 155:8435094ec241 | 672 | ((IT) == TIM_IT_Trigger) || \ |
mbed_official | 155:8435094ec241 | 673 | ((IT) == TIM_IT_Break)) |
mbed_official | 155:8435094ec241 | 674 | /** |
mbed_official | 155:8435094ec241 | 675 | * @} |
mbed_official | 155:8435094ec241 | 676 | */ |
mbed_official | 155:8435094ec241 | 677 | |
mbed_official | 155:8435094ec241 | 678 | /** @defgroup TIM_DMA_Base_address |
mbed_official | 155:8435094ec241 | 679 | * @{ |
mbed_official | 155:8435094ec241 | 680 | */ |
mbed_official | 155:8435094ec241 | 681 | |
mbed_official | 155:8435094ec241 | 682 | #define TIM_DMABase_CR1 ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 683 | #define TIM_DMABase_CR2 ((uint16_t)0x0001) |
mbed_official | 155:8435094ec241 | 684 | #define TIM_DMABase_SMCR ((uint16_t)0x0002) |
mbed_official | 155:8435094ec241 | 685 | #define TIM_DMABase_DIER ((uint16_t)0x0003) |
mbed_official | 155:8435094ec241 | 686 | #define TIM_DMABase_SR ((uint16_t)0x0004) |
mbed_official | 155:8435094ec241 | 687 | #define TIM_DMABase_EGR ((uint16_t)0x0005) |
mbed_official | 155:8435094ec241 | 688 | #define TIM_DMABase_CCMR1 ((uint16_t)0x0006) |
mbed_official | 155:8435094ec241 | 689 | #define TIM_DMABase_CCMR2 ((uint16_t)0x0007) |
mbed_official | 155:8435094ec241 | 690 | #define TIM_DMABase_CCER ((uint16_t)0x0008) |
mbed_official | 155:8435094ec241 | 691 | #define TIM_DMABase_CNT ((uint16_t)0x0009) |
mbed_official | 155:8435094ec241 | 692 | #define TIM_DMABase_PSC ((uint16_t)0x000A) |
mbed_official | 155:8435094ec241 | 693 | #define TIM_DMABase_ARR ((uint16_t)0x000B) |
mbed_official | 155:8435094ec241 | 694 | #define TIM_DMABase_RCR ((uint16_t)0x000C) |
mbed_official | 155:8435094ec241 | 695 | #define TIM_DMABase_CCR1 ((uint16_t)0x000D) |
mbed_official | 155:8435094ec241 | 696 | #define TIM_DMABase_CCR2 ((uint16_t)0x000E) |
mbed_official | 155:8435094ec241 | 697 | #define TIM_DMABase_CCR3 ((uint16_t)0x000F) |
mbed_official | 155:8435094ec241 | 698 | #define TIM_DMABase_CCR4 ((uint16_t)0x0010) |
mbed_official | 155:8435094ec241 | 699 | #define TIM_DMABase_BDTR ((uint16_t)0x0011) |
mbed_official | 155:8435094ec241 | 700 | #define TIM_DMABase_DCR ((uint16_t)0x0012) |
mbed_official | 155:8435094ec241 | 701 | #define TIM_DMABase_OR ((uint16_t)0x0013) |
mbed_official | 155:8435094ec241 | 702 | #define TIM_DMABase_CCMR3 ((uint16_t)0x0014) |
mbed_official | 155:8435094ec241 | 703 | #define TIM_DMABase_CCR5 ((uint16_t)0x0015) |
mbed_official | 155:8435094ec241 | 704 | #define TIM_DMABase_CCR6 ((uint16_t)0x0016) |
mbed_official | 155:8435094ec241 | 705 | #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \ |
mbed_official | 155:8435094ec241 | 706 | ((BASE) == TIM_DMABase_CR2) || \ |
mbed_official | 155:8435094ec241 | 707 | ((BASE) == TIM_DMABase_SMCR) || \ |
mbed_official | 155:8435094ec241 | 708 | ((BASE) == TIM_DMABase_DIER) || \ |
mbed_official | 155:8435094ec241 | 709 | ((BASE) == TIM_DMABase_SR) || \ |
mbed_official | 155:8435094ec241 | 710 | ((BASE) == TIM_DMABase_EGR) || \ |
mbed_official | 155:8435094ec241 | 711 | ((BASE) == TIM_DMABase_CCMR1) || \ |
mbed_official | 155:8435094ec241 | 712 | ((BASE) == TIM_DMABase_CCMR2) || \ |
mbed_official | 155:8435094ec241 | 713 | ((BASE) == TIM_DMABase_CCER) || \ |
mbed_official | 155:8435094ec241 | 714 | ((BASE) == TIM_DMABase_CNT) || \ |
mbed_official | 155:8435094ec241 | 715 | ((BASE) == TIM_DMABase_PSC) || \ |
mbed_official | 155:8435094ec241 | 716 | ((BASE) == TIM_DMABase_ARR) || \ |
mbed_official | 155:8435094ec241 | 717 | ((BASE) == TIM_DMABase_RCR) || \ |
mbed_official | 155:8435094ec241 | 718 | ((BASE) == TIM_DMABase_CCR1) || \ |
mbed_official | 155:8435094ec241 | 719 | ((BASE) == TIM_DMABase_CCR2) || \ |
mbed_official | 155:8435094ec241 | 720 | ((BASE) == TIM_DMABase_CCR3) || \ |
mbed_official | 155:8435094ec241 | 721 | ((BASE) == TIM_DMABase_CCR4) || \ |
mbed_official | 155:8435094ec241 | 722 | ((BASE) == TIM_DMABase_BDTR) || \ |
mbed_official | 155:8435094ec241 | 723 | ((BASE) == TIM_DMABase_DCR) || \ |
mbed_official | 155:8435094ec241 | 724 | ((BASE) == TIM_DMABase_OR) || \ |
mbed_official | 155:8435094ec241 | 725 | ((BASE) == TIM_DMABase_CCMR3) || \ |
mbed_official | 155:8435094ec241 | 726 | ((BASE) == TIM_DMABase_CCR5) || \ |
mbed_official | 155:8435094ec241 | 727 | ((BASE) == TIM_DMABase_CCR6)) |
mbed_official | 155:8435094ec241 | 728 | /** |
mbed_official | 155:8435094ec241 | 729 | * @} |
mbed_official | 155:8435094ec241 | 730 | */ |
mbed_official | 155:8435094ec241 | 731 | |
mbed_official | 155:8435094ec241 | 732 | /** @defgroup TIM_DMA_Burst_Length |
mbed_official | 155:8435094ec241 | 733 | * @{ |
mbed_official | 155:8435094ec241 | 734 | */ |
mbed_official | 155:8435094ec241 | 735 | |
mbed_official | 155:8435094ec241 | 736 | #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 737 | #define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100) |
mbed_official | 155:8435094ec241 | 738 | #define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200) |
mbed_official | 155:8435094ec241 | 739 | #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300) |
mbed_official | 155:8435094ec241 | 740 | #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400) |
mbed_official | 155:8435094ec241 | 741 | #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500) |
mbed_official | 155:8435094ec241 | 742 | #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600) |
mbed_official | 155:8435094ec241 | 743 | #define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700) |
mbed_official | 155:8435094ec241 | 744 | #define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800) |
mbed_official | 155:8435094ec241 | 745 | #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900) |
mbed_official | 155:8435094ec241 | 746 | #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00) |
mbed_official | 155:8435094ec241 | 747 | #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00) |
mbed_official | 155:8435094ec241 | 748 | #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00) |
mbed_official | 155:8435094ec241 | 749 | #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00) |
mbed_official | 155:8435094ec241 | 750 | #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00) |
mbed_official | 155:8435094ec241 | 751 | #define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00) |
mbed_official | 155:8435094ec241 | 752 | #define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000) |
mbed_official | 155:8435094ec241 | 753 | #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100) |
mbed_official | 155:8435094ec241 | 754 | #define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \ |
mbed_official | 155:8435094ec241 | 755 | ((LENGTH) == TIM_DMABurstLength_2Transfers) || \ |
mbed_official | 155:8435094ec241 | 756 | ((LENGTH) == TIM_DMABurstLength_3Transfers) || \ |
mbed_official | 155:8435094ec241 | 757 | ((LENGTH) == TIM_DMABurstLength_4Transfers) || \ |
mbed_official | 155:8435094ec241 | 758 | ((LENGTH) == TIM_DMABurstLength_5Transfers) || \ |
mbed_official | 155:8435094ec241 | 759 | ((LENGTH) == TIM_DMABurstLength_6Transfers) || \ |
mbed_official | 155:8435094ec241 | 760 | ((LENGTH) == TIM_DMABurstLength_7Transfers) || \ |
mbed_official | 155:8435094ec241 | 761 | ((LENGTH) == TIM_DMABurstLength_8Transfers) || \ |
mbed_official | 155:8435094ec241 | 762 | ((LENGTH) == TIM_DMABurstLength_9Transfers) || \ |
mbed_official | 155:8435094ec241 | 763 | ((LENGTH) == TIM_DMABurstLength_10Transfers) || \ |
mbed_official | 155:8435094ec241 | 764 | ((LENGTH) == TIM_DMABurstLength_11Transfers) || \ |
mbed_official | 155:8435094ec241 | 765 | ((LENGTH) == TIM_DMABurstLength_12Transfers) || \ |
mbed_official | 155:8435094ec241 | 766 | ((LENGTH) == TIM_DMABurstLength_13Transfers) || \ |
mbed_official | 155:8435094ec241 | 767 | ((LENGTH) == TIM_DMABurstLength_14Transfers) || \ |
mbed_official | 155:8435094ec241 | 768 | ((LENGTH) == TIM_DMABurstLength_15Transfers) || \ |
mbed_official | 155:8435094ec241 | 769 | ((LENGTH) == TIM_DMABurstLength_16Transfers) || \ |
mbed_official | 155:8435094ec241 | 770 | ((LENGTH) == TIM_DMABurstLength_17Transfers) || \ |
mbed_official | 155:8435094ec241 | 771 | ((LENGTH) == TIM_DMABurstLength_18Transfers)) |
mbed_official | 155:8435094ec241 | 772 | /** |
mbed_official | 155:8435094ec241 | 773 | * @} |
mbed_official | 155:8435094ec241 | 774 | */ |
mbed_official | 155:8435094ec241 | 775 | |
mbed_official | 155:8435094ec241 | 776 | /** @defgroup TIM_DMA_sources |
mbed_official | 155:8435094ec241 | 777 | * @{ |
mbed_official | 155:8435094ec241 | 778 | */ |
mbed_official | 155:8435094ec241 | 779 | |
mbed_official | 155:8435094ec241 | 780 | #define TIM_DMA_Update ((uint16_t)0x0100) |
mbed_official | 155:8435094ec241 | 781 | #define TIM_DMA_CC1 ((uint16_t)0x0200) |
mbed_official | 155:8435094ec241 | 782 | #define TIM_DMA_CC2 ((uint16_t)0x0400) |
mbed_official | 155:8435094ec241 | 783 | #define TIM_DMA_CC3 ((uint16_t)0x0800) |
mbed_official | 155:8435094ec241 | 784 | #define TIM_DMA_CC4 ((uint16_t)0x1000) |
mbed_official | 155:8435094ec241 | 785 | #define TIM_DMA_COM ((uint16_t)0x2000) |
mbed_official | 155:8435094ec241 | 786 | #define TIM_DMA_Trigger ((uint16_t)0x4000) |
mbed_official | 155:8435094ec241 | 787 | #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000)) |
mbed_official | 155:8435094ec241 | 788 | |
mbed_official | 155:8435094ec241 | 789 | /** |
mbed_official | 155:8435094ec241 | 790 | * @} |
mbed_official | 155:8435094ec241 | 791 | */ |
mbed_official | 155:8435094ec241 | 792 | |
mbed_official | 155:8435094ec241 | 793 | /** @defgroup TIM_External_Trigger_Prescaler |
mbed_official | 155:8435094ec241 | 794 | * @{ |
mbed_official | 155:8435094ec241 | 795 | */ |
mbed_official | 155:8435094ec241 | 796 | |
mbed_official | 155:8435094ec241 | 797 | #define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 798 | #define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) |
mbed_official | 155:8435094ec241 | 799 | #define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000) |
mbed_official | 155:8435094ec241 | 800 | #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000) |
mbed_official | 155:8435094ec241 | 801 | #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \ |
mbed_official | 155:8435094ec241 | 802 | ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \ |
mbed_official | 155:8435094ec241 | 803 | ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \ |
mbed_official | 155:8435094ec241 | 804 | ((PRESCALER) == TIM_ExtTRGPSC_DIV8)) |
mbed_official | 155:8435094ec241 | 805 | /** |
mbed_official | 155:8435094ec241 | 806 | * @} |
mbed_official | 155:8435094ec241 | 807 | */ |
mbed_official | 155:8435094ec241 | 808 | |
mbed_official | 155:8435094ec241 | 809 | /** @defgroup TIM_Internal_Trigger_Selection |
mbed_official | 155:8435094ec241 | 810 | * @{ |
mbed_official | 155:8435094ec241 | 811 | */ |
mbed_official | 155:8435094ec241 | 812 | |
mbed_official | 155:8435094ec241 | 813 | #define TIM_TS_ITR0 ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 814 | #define TIM_TS_ITR1 ((uint16_t)0x0010) |
mbed_official | 155:8435094ec241 | 815 | #define TIM_TS_ITR2 ((uint16_t)0x0020) |
mbed_official | 155:8435094ec241 | 816 | #define TIM_TS_ITR3 ((uint16_t)0x0030) |
mbed_official | 155:8435094ec241 | 817 | #define TIM_TS_TI1F_ED ((uint16_t)0x0040) |
mbed_official | 155:8435094ec241 | 818 | #define TIM_TS_TI1FP1 ((uint16_t)0x0050) |
mbed_official | 155:8435094ec241 | 819 | #define TIM_TS_TI2FP2 ((uint16_t)0x0060) |
mbed_official | 155:8435094ec241 | 820 | #define TIM_TS_ETRF ((uint16_t)0x0070) |
mbed_official | 155:8435094ec241 | 821 | #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ |
mbed_official | 155:8435094ec241 | 822 | ((SELECTION) == TIM_TS_ITR1) || \ |
mbed_official | 155:8435094ec241 | 823 | ((SELECTION) == TIM_TS_ITR2) || \ |
mbed_official | 155:8435094ec241 | 824 | ((SELECTION) == TIM_TS_ITR3) || \ |
mbed_official | 155:8435094ec241 | 825 | ((SELECTION) == TIM_TS_TI1F_ED) || \ |
mbed_official | 155:8435094ec241 | 826 | ((SELECTION) == TIM_TS_TI1FP1) || \ |
mbed_official | 155:8435094ec241 | 827 | ((SELECTION) == TIM_TS_TI2FP2) || \ |
mbed_official | 155:8435094ec241 | 828 | ((SELECTION) == TIM_TS_ETRF)) |
mbed_official | 155:8435094ec241 | 829 | #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ |
mbed_official | 155:8435094ec241 | 830 | ((SELECTION) == TIM_TS_ITR1) || \ |
mbed_official | 155:8435094ec241 | 831 | ((SELECTION) == TIM_TS_ITR2) || \ |
mbed_official | 155:8435094ec241 | 832 | ((SELECTION) == TIM_TS_ITR3)) |
mbed_official | 155:8435094ec241 | 833 | /** |
mbed_official | 155:8435094ec241 | 834 | * @} |
mbed_official | 155:8435094ec241 | 835 | */ |
mbed_official | 155:8435094ec241 | 836 | |
mbed_official | 155:8435094ec241 | 837 | /** @defgroup TIM_TIx_External_Clock_Source |
mbed_official | 155:8435094ec241 | 838 | * @{ |
mbed_official | 155:8435094ec241 | 839 | */ |
mbed_official | 155:8435094ec241 | 840 | |
mbed_official | 155:8435094ec241 | 841 | #define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) |
mbed_official | 155:8435094ec241 | 842 | #define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) |
mbed_official | 155:8435094ec241 | 843 | #define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040) |
mbed_official | 155:8435094ec241 | 844 | |
mbed_official | 155:8435094ec241 | 845 | /** |
mbed_official | 155:8435094ec241 | 846 | * @} |
mbed_official | 155:8435094ec241 | 847 | */ |
mbed_official | 155:8435094ec241 | 848 | |
mbed_official | 155:8435094ec241 | 849 | /** @defgroup TIM_External_Trigger_Polarity |
mbed_official | 155:8435094ec241 | 850 | * @{ |
mbed_official | 155:8435094ec241 | 851 | */ |
mbed_official | 155:8435094ec241 | 852 | #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) |
mbed_official | 155:8435094ec241 | 853 | #define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 854 | #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \ |
mbed_official | 155:8435094ec241 | 855 | ((POLARITY) == TIM_ExtTRGPolarity_NonInverted)) |
mbed_official | 155:8435094ec241 | 856 | /** |
mbed_official | 155:8435094ec241 | 857 | * @} |
mbed_official | 155:8435094ec241 | 858 | */ |
mbed_official | 155:8435094ec241 | 859 | |
mbed_official | 155:8435094ec241 | 860 | /** @defgroup TIM_Prescaler_Reload_Mode |
mbed_official | 155:8435094ec241 | 861 | * @{ |
mbed_official | 155:8435094ec241 | 862 | */ |
mbed_official | 155:8435094ec241 | 863 | |
mbed_official | 155:8435094ec241 | 864 | #define TIM_PSCReloadMode_Update ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 865 | #define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001) |
mbed_official | 155:8435094ec241 | 866 | #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \ |
mbed_official | 155:8435094ec241 | 867 | ((RELOAD) == TIM_PSCReloadMode_Immediate)) |
mbed_official | 155:8435094ec241 | 868 | /** |
mbed_official | 155:8435094ec241 | 869 | * @} |
mbed_official | 155:8435094ec241 | 870 | */ |
mbed_official | 155:8435094ec241 | 871 | |
mbed_official | 155:8435094ec241 | 872 | /** @defgroup TIM_Forced_Action |
mbed_official | 155:8435094ec241 | 873 | * @{ |
mbed_official | 155:8435094ec241 | 874 | */ |
mbed_official | 155:8435094ec241 | 875 | |
mbed_official | 155:8435094ec241 | 876 | #define TIM_ForcedAction_Active ((uint16_t)0x0050) |
mbed_official | 155:8435094ec241 | 877 | #define TIM_ForcedAction_InActive ((uint16_t)0x0040) |
mbed_official | 155:8435094ec241 | 878 | #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \ |
mbed_official | 155:8435094ec241 | 879 | ((ACTION) == TIM_ForcedAction_InActive)) |
mbed_official | 155:8435094ec241 | 880 | /** |
mbed_official | 155:8435094ec241 | 881 | * @} |
mbed_official | 155:8435094ec241 | 882 | */ |
mbed_official | 155:8435094ec241 | 883 | |
mbed_official | 155:8435094ec241 | 884 | /** @defgroup TIM_Encoder_Mode |
mbed_official | 155:8435094ec241 | 885 | * @{ |
mbed_official | 155:8435094ec241 | 886 | */ |
mbed_official | 155:8435094ec241 | 887 | |
mbed_official | 155:8435094ec241 | 888 | #define TIM_EncoderMode_TI1 ((uint16_t)0x0001) |
mbed_official | 155:8435094ec241 | 889 | #define TIM_EncoderMode_TI2 ((uint16_t)0x0002) |
mbed_official | 155:8435094ec241 | 890 | #define TIM_EncoderMode_TI12 ((uint16_t)0x0003) |
mbed_official | 155:8435094ec241 | 891 | #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ |
mbed_official | 155:8435094ec241 | 892 | ((MODE) == TIM_EncoderMode_TI2) || \ |
mbed_official | 155:8435094ec241 | 893 | ((MODE) == TIM_EncoderMode_TI12)) |
mbed_official | 155:8435094ec241 | 894 | /** |
mbed_official | 155:8435094ec241 | 895 | * @} |
mbed_official | 155:8435094ec241 | 896 | */ |
mbed_official | 155:8435094ec241 | 897 | |
mbed_official | 155:8435094ec241 | 898 | |
mbed_official | 155:8435094ec241 | 899 | /** @defgroup TIM_Event_Source |
mbed_official | 155:8435094ec241 | 900 | * @{ |
mbed_official | 155:8435094ec241 | 901 | */ |
mbed_official | 155:8435094ec241 | 902 | |
mbed_official | 155:8435094ec241 | 903 | #define TIM_EventSource_Update ((uint16_t)0x0001) |
mbed_official | 155:8435094ec241 | 904 | #define TIM_EventSource_CC1 ((uint16_t)0x0002) |
mbed_official | 155:8435094ec241 | 905 | #define TIM_EventSource_CC2 ((uint16_t)0x0004) |
mbed_official | 155:8435094ec241 | 906 | #define TIM_EventSource_CC3 ((uint16_t)0x0008) |
mbed_official | 155:8435094ec241 | 907 | #define TIM_EventSource_CC4 ((uint16_t)0x0010) |
mbed_official | 155:8435094ec241 | 908 | #define TIM_EventSource_COM ((uint16_t)0x0020) |
mbed_official | 155:8435094ec241 | 909 | #define TIM_EventSource_Trigger ((uint16_t)0x0040) |
mbed_official | 155:8435094ec241 | 910 | #define TIM_EventSource_Break ((uint16_t)0x0080) |
mbed_official | 155:8435094ec241 | 911 | #define TIM_EventSource_Break2 ((uint16_t)0x0100) |
mbed_official | 155:8435094ec241 | 912 | #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFE00) == 0x0000) && ((SOURCE) != 0x0000)) |
mbed_official | 155:8435094ec241 | 913 | |
mbed_official | 155:8435094ec241 | 914 | /** |
mbed_official | 155:8435094ec241 | 915 | * @} |
mbed_official | 155:8435094ec241 | 916 | */ |
mbed_official | 155:8435094ec241 | 917 | |
mbed_official | 155:8435094ec241 | 918 | /** @defgroup TIM_Update_Source |
mbed_official | 155:8435094ec241 | 919 | * @{ |
mbed_official | 155:8435094ec241 | 920 | */ |
mbed_official | 155:8435094ec241 | 921 | |
mbed_official | 155:8435094ec241 | 922 | #define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow |
mbed_official | 155:8435094ec241 | 923 | or the setting of UG bit, or an update generation |
mbed_official | 155:8435094ec241 | 924 | through the slave mode controller. */ |
mbed_official | 155:8435094ec241 | 925 | #define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */ |
mbed_official | 155:8435094ec241 | 926 | #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ |
mbed_official | 155:8435094ec241 | 927 | ((SOURCE) == TIM_UpdateSource_Regular)) |
mbed_official | 155:8435094ec241 | 928 | /** |
mbed_official | 155:8435094ec241 | 929 | * @} |
mbed_official | 155:8435094ec241 | 930 | */ |
mbed_official | 155:8435094ec241 | 931 | |
mbed_official | 155:8435094ec241 | 932 | /** @defgroup TIM_Output_Compare_Preload_State |
mbed_official | 155:8435094ec241 | 933 | * @{ |
mbed_official | 155:8435094ec241 | 934 | */ |
mbed_official | 155:8435094ec241 | 935 | |
mbed_official | 155:8435094ec241 | 936 | #define TIM_OCPreload_Enable ((uint16_t)0x0008) |
mbed_official | 155:8435094ec241 | 937 | #define TIM_OCPreload_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 938 | #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ |
mbed_official | 155:8435094ec241 | 939 | ((STATE) == TIM_OCPreload_Disable)) |
mbed_official | 155:8435094ec241 | 940 | /** |
mbed_official | 155:8435094ec241 | 941 | * @} |
mbed_official | 155:8435094ec241 | 942 | */ |
mbed_official | 155:8435094ec241 | 943 | |
mbed_official | 155:8435094ec241 | 944 | /** @defgroup TIM_Output_Compare_Fast_State |
mbed_official | 155:8435094ec241 | 945 | * @{ |
mbed_official | 155:8435094ec241 | 946 | */ |
mbed_official | 155:8435094ec241 | 947 | |
mbed_official | 155:8435094ec241 | 948 | #define TIM_OCFast_Enable ((uint16_t)0x0004) |
mbed_official | 155:8435094ec241 | 949 | #define TIM_OCFast_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 950 | #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ |
mbed_official | 155:8435094ec241 | 951 | ((STATE) == TIM_OCFast_Disable)) |
mbed_official | 155:8435094ec241 | 952 | |
mbed_official | 155:8435094ec241 | 953 | /** |
mbed_official | 155:8435094ec241 | 954 | * @} |
mbed_official | 155:8435094ec241 | 955 | */ |
mbed_official | 155:8435094ec241 | 956 | |
mbed_official | 155:8435094ec241 | 957 | /** @defgroup TIM_Output_Compare_Clear_State |
mbed_official | 155:8435094ec241 | 958 | * @{ |
mbed_official | 155:8435094ec241 | 959 | */ |
mbed_official | 155:8435094ec241 | 960 | |
mbed_official | 155:8435094ec241 | 961 | #define TIM_OCClear_Enable ((uint16_t)0x0080) |
mbed_official | 155:8435094ec241 | 962 | #define TIM_OCClear_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 963 | #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ |
mbed_official | 155:8435094ec241 | 964 | ((STATE) == TIM_OCClear_Disable)) |
mbed_official | 155:8435094ec241 | 965 | /** |
mbed_official | 155:8435094ec241 | 966 | * @} |
mbed_official | 155:8435094ec241 | 967 | */ |
mbed_official | 155:8435094ec241 | 968 | |
mbed_official | 155:8435094ec241 | 969 | /** @defgroup TIM_Trigger_Output_Source |
mbed_official | 155:8435094ec241 | 970 | * @{ |
mbed_official | 155:8435094ec241 | 971 | */ |
mbed_official | 155:8435094ec241 | 972 | |
mbed_official | 155:8435094ec241 | 973 | #define TIM_TRGOSource_Reset ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 974 | #define TIM_TRGOSource_Enable ((uint16_t)0x0010) |
mbed_official | 155:8435094ec241 | 975 | #define TIM_TRGOSource_Update ((uint16_t)0x0020) |
mbed_official | 155:8435094ec241 | 976 | #define TIM_TRGOSource_OC1 ((uint16_t)0x0030) |
mbed_official | 155:8435094ec241 | 977 | #define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) |
mbed_official | 155:8435094ec241 | 978 | #define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050) |
mbed_official | 155:8435094ec241 | 979 | #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060) |
mbed_official | 155:8435094ec241 | 980 | #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070) |
mbed_official | 155:8435094ec241 | 981 | #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ |
mbed_official | 155:8435094ec241 | 982 | ((SOURCE) == TIM_TRGOSource_Enable) || \ |
mbed_official | 155:8435094ec241 | 983 | ((SOURCE) == TIM_TRGOSource_Update) || \ |
mbed_official | 155:8435094ec241 | 984 | ((SOURCE) == TIM_TRGOSource_OC1) || \ |
mbed_official | 155:8435094ec241 | 985 | ((SOURCE) == TIM_TRGOSource_OC1Ref) || \ |
mbed_official | 155:8435094ec241 | 986 | ((SOURCE) == TIM_TRGOSource_OC2Ref) || \ |
mbed_official | 155:8435094ec241 | 987 | ((SOURCE) == TIM_TRGOSource_OC3Ref) || \ |
mbed_official | 155:8435094ec241 | 988 | ((SOURCE) == TIM_TRGOSource_OC4Ref)) |
mbed_official | 155:8435094ec241 | 989 | |
mbed_official | 155:8435094ec241 | 990 | |
mbed_official | 155:8435094ec241 | 991 | #define TIM_TRGO2Source_Reset ((uint32_t)0x00000000) |
mbed_official | 155:8435094ec241 | 992 | #define TIM_TRGO2Source_Enable ((uint32_t)0x00100000) |
mbed_official | 155:8435094ec241 | 993 | #define TIM_TRGO2Source_Update ((uint32_t)0x00200000) |
mbed_official | 155:8435094ec241 | 994 | #define TIM_TRGO2Source_OC1 ((uint32_t)0x00300000) |
mbed_official | 155:8435094ec241 | 995 | #define TIM_TRGO2Source_OC1Ref ((uint32_t)0x00400000) |
mbed_official | 155:8435094ec241 | 996 | #define TIM_TRGO2Source_OC2Ref ((uint32_t)0x00500000) |
mbed_official | 155:8435094ec241 | 997 | #define TIM_TRGO2Source_OC3Ref ((uint32_t)0x00600000) |
mbed_official | 155:8435094ec241 | 998 | #define TIM_TRGO2Source_OC4Ref ((uint32_t)0x00700000) |
mbed_official | 155:8435094ec241 | 999 | #define TIM_TRGO2Source_OC5Ref ((uint32_t)0x00800000) |
mbed_official | 155:8435094ec241 | 1000 | #define TIM_TRGO2Source_OC6Ref ((uint32_t)0x00900000) |
mbed_official | 155:8435094ec241 | 1001 | #define TIM_TRGO2Source_OC4Ref_RisingFalling ((uint32_t)0x00A00000) |
mbed_official | 155:8435094ec241 | 1002 | #define TIM_TRGO2Source_OC6Ref_RisingFalling ((uint32_t)0x00B00000) |
mbed_official | 155:8435094ec241 | 1003 | #define TIM_TRGO2Source_OC4RefRising_OC6RefRising ((uint32_t)0x00C00000) |
mbed_official | 155:8435094ec241 | 1004 | #define TIM_TRGO2Source_OC4RefRising_OC6RefFalling ((uint32_t)0x00D00000) |
mbed_official | 155:8435094ec241 | 1005 | #define TIM_TRGO2Source_OC5RefRising_OC6RefRising ((uint32_t)0x00E00000) |
mbed_official | 155:8435094ec241 | 1006 | #define TIM_TRGO2Source_OC5RefRising_OC6RefFalling ((uint32_t)0x00F00000) |
mbed_official | 155:8435094ec241 | 1007 | #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2Source_Reset) || \ |
mbed_official | 155:8435094ec241 | 1008 | ((SOURCE) == TIM_TRGO2Source_Enable) || \ |
mbed_official | 155:8435094ec241 | 1009 | ((SOURCE) == TIM_TRGO2Source_Update) || \ |
mbed_official | 155:8435094ec241 | 1010 | ((SOURCE) == TIM_TRGO2Source_OC1) || \ |
mbed_official | 155:8435094ec241 | 1011 | ((SOURCE) == TIM_TRGO2Source_OC1Ref) || \ |
mbed_official | 155:8435094ec241 | 1012 | ((SOURCE) == TIM_TRGO2Source_OC2Ref) || \ |
mbed_official | 155:8435094ec241 | 1013 | ((SOURCE) == TIM_TRGO2Source_OC3Ref) || \ |
mbed_official | 155:8435094ec241 | 1014 | ((SOURCE) == TIM_TRGO2Source_OC4Ref) || \ |
mbed_official | 155:8435094ec241 | 1015 | ((SOURCE) == TIM_TRGO2Source_OC5Ref) || \ |
mbed_official | 155:8435094ec241 | 1016 | ((SOURCE) == TIM_TRGO2Source_OC6Ref) || \ |
mbed_official | 155:8435094ec241 | 1017 | ((SOURCE) == TIM_TRGO2Source_OC4Ref_RisingFalling) || \ |
mbed_official | 155:8435094ec241 | 1018 | ((SOURCE) == TIM_TRGO2Source_OC6Ref_RisingFalling) || \ |
mbed_official | 155:8435094ec241 | 1019 | ((SOURCE) == TIM_TRGO2Source_OC4RefRising_OC6RefRising) || \ |
mbed_official | 155:8435094ec241 | 1020 | ((SOURCE) == TIM_TRGO2Source_OC4RefRising_OC6RefFalling) || \ |
mbed_official | 155:8435094ec241 | 1021 | ((SOURCE) == TIM_TRGO2Source_OC5RefRising_OC6RefRising) || \ |
mbed_official | 155:8435094ec241 | 1022 | ((SOURCE) == TIM_TRGO2Source_OC5RefRising_OC6RefFalling)) |
mbed_official | 155:8435094ec241 | 1023 | /** |
mbed_official | 155:8435094ec241 | 1024 | * @} |
mbed_official | 155:8435094ec241 | 1025 | */ |
mbed_official | 155:8435094ec241 | 1026 | |
mbed_official | 155:8435094ec241 | 1027 | /** @defgroup TIM_Slave_Mode |
mbed_official | 155:8435094ec241 | 1028 | * @{ |
mbed_official | 155:8435094ec241 | 1029 | */ |
mbed_official | 155:8435094ec241 | 1030 | |
mbed_official | 155:8435094ec241 | 1031 | #define TIM_SlaveMode_Reset ((uint32_t)0x00004) |
mbed_official | 155:8435094ec241 | 1032 | #define TIM_SlaveMode_Gated ((uint32_t)0x00005) |
mbed_official | 155:8435094ec241 | 1033 | #define TIM_SlaveMode_Trigger ((uint32_t)0x00006) |
mbed_official | 155:8435094ec241 | 1034 | #define TIM_SlaveMode_External1 ((uint32_t)0x00007) |
mbed_official | 155:8435094ec241 | 1035 | #define TIM_SlaveMode_Combined_ResetTrigger ((uint32_t)0x10000) |
mbed_official | 155:8435094ec241 | 1036 | #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \ |
mbed_official | 155:8435094ec241 | 1037 | ((MODE) == TIM_SlaveMode_Gated) || \ |
mbed_official | 155:8435094ec241 | 1038 | ((MODE) == TIM_SlaveMode_Trigger) || \ |
mbed_official | 155:8435094ec241 | 1039 | ((MODE) == TIM_SlaveMode_External1) || \ |
mbed_official | 155:8435094ec241 | 1040 | ((MODE) == TIM_SlaveMode_Combined_ResetTrigger)) |
mbed_official | 155:8435094ec241 | 1041 | /** |
mbed_official | 155:8435094ec241 | 1042 | * @} |
mbed_official | 155:8435094ec241 | 1043 | */ |
mbed_official | 155:8435094ec241 | 1044 | |
mbed_official | 155:8435094ec241 | 1045 | /** @defgroup TIM_Master_Slave_Mode |
mbed_official | 155:8435094ec241 | 1046 | * @{ |
mbed_official | 155:8435094ec241 | 1047 | */ |
mbed_official | 155:8435094ec241 | 1048 | |
mbed_official | 155:8435094ec241 | 1049 | #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080) |
mbed_official | 155:8435094ec241 | 1050 | #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 1051 | #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \ |
mbed_official | 155:8435094ec241 | 1052 | ((STATE) == TIM_MasterSlaveMode_Disable)) |
mbed_official | 155:8435094ec241 | 1053 | /** |
mbed_official | 155:8435094ec241 | 1054 | * @} |
mbed_official | 155:8435094ec241 | 1055 | */ |
mbed_official | 155:8435094ec241 | 1056 | /** @defgroup TIM_Remap |
mbed_official | 155:8435094ec241 | 1057 | * @{ |
mbed_official | 155:8435094ec241 | 1058 | */ |
mbed_official | 155:8435094ec241 | 1059 | #define TIM16_GPIO ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 1060 | #define TIM16_RTC_CLK ((uint16_t)0x0001) |
mbed_official | 155:8435094ec241 | 1061 | #define TIM16_HSEDiv32 ((uint16_t)0x0002) |
mbed_official | 155:8435094ec241 | 1062 | #define TIM16_MCO ((uint16_t)0x0003) |
mbed_official | 155:8435094ec241 | 1063 | |
mbed_official | 155:8435094ec241 | 1064 | #define TIM1_ADC1_AWDG1 ((uint16_t)0x0001) |
mbed_official | 155:8435094ec241 | 1065 | #define TIM1_ADC1_AWDG2 ((uint16_t)0x0002) |
mbed_official | 155:8435094ec241 | 1066 | #define TIM1_ADC1_AWDG3 ((uint16_t)0x0003) |
mbed_official | 155:8435094ec241 | 1067 | #define TIM1_ADC4_AWDG1 ((uint16_t)0x0004) |
mbed_official | 155:8435094ec241 | 1068 | #define TIM1_ADC4_AWDG2 ((uint16_t)0x0008) |
mbed_official | 155:8435094ec241 | 1069 | #define TIM1_ADC4_AWDG3 ((uint16_t)0x000C) |
mbed_official | 155:8435094ec241 | 1070 | |
mbed_official | 155:8435094ec241 | 1071 | #define TIM8_ADC2_AWDG1 ((uint16_t)0x0001) |
mbed_official | 155:8435094ec241 | 1072 | #define TIM8_ADC2_AWDG2 ((uint16_t)0x0002) |
mbed_official | 155:8435094ec241 | 1073 | #define TIM8_ADC2_AWDG3 ((uint16_t)0x0003) |
mbed_official | 155:8435094ec241 | 1074 | #define TIM8_ADC3_AWDG1 ((uint16_t)0x0004) |
mbed_official | 155:8435094ec241 | 1075 | #define TIM8_ADC3_AWDG2 ((uint16_t)0x0008) |
mbed_official | 155:8435094ec241 | 1076 | #define TIM8_ADC3_AWDG3 ((uint16_t)0x000C) |
mbed_official | 155:8435094ec241 | 1077 | |
mbed_official | 155:8435094ec241 | 1078 | #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM16_GPIO)|| \ |
mbed_official | 155:8435094ec241 | 1079 | ((TIM_REMAP) == TIM16_RTC_CLK) || \ |
mbed_official | 155:8435094ec241 | 1080 | ((TIM_REMAP) == TIM16_HSEDiv32) || \ |
mbed_official | 155:8435094ec241 | 1081 | ((TIM_REMAP) == TIM16_MCO) ||\ |
mbed_official | 155:8435094ec241 | 1082 | ((TIM_REMAP) == TIM1_ADC1_AWDG1) ||\ |
mbed_official | 155:8435094ec241 | 1083 | ((TIM_REMAP) == TIM1_ADC1_AWDG2) ||\ |
mbed_official | 155:8435094ec241 | 1084 | ((TIM_REMAP) == TIM1_ADC1_AWDG3) ||\ |
mbed_official | 155:8435094ec241 | 1085 | ((TIM_REMAP) == TIM1_ADC4_AWDG1) ||\ |
mbed_official | 155:8435094ec241 | 1086 | ((TIM_REMAP) == TIM1_ADC4_AWDG2) ||\ |
mbed_official | 155:8435094ec241 | 1087 | ((TIM_REMAP) == TIM1_ADC4_AWDG3) ||\ |
mbed_official | 155:8435094ec241 | 1088 | ((TIM_REMAP) == TIM8_ADC2_AWDG1) ||\ |
mbed_official | 155:8435094ec241 | 1089 | ((TIM_REMAP) == TIM8_ADC2_AWDG2) ||\ |
mbed_official | 155:8435094ec241 | 1090 | ((TIM_REMAP) == TIM8_ADC2_AWDG3) ||\ |
mbed_official | 155:8435094ec241 | 1091 | ((TIM_REMAP) == TIM8_ADC3_AWDG1) ||\ |
mbed_official | 155:8435094ec241 | 1092 | ((TIM_REMAP) == TIM8_ADC3_AWDG2) ||\ |
mbed_official | 155:8435094ec241 | 1093 | ((TIM_REMAP) == TIM8_ADC3_AWDG3)) |
mbed_official | 155:8435094ec241 | 1094 | |
mbed_official | 155:8435094ec241 | 1095 | /** |
mbed_official | 155:8435094ec241 | 1096 | * @} |
mbed_official | 155:8435094ec241 | 1097 | */ |
mbed_official | 155:8435094ec241 | 1098 | /** @defgroup TIM_Flags |
mbed_official | 155:8435094ec241 | 1099 | * @{ |
mbed_official | 155:8435094ec241 | 1100 | */ |
mbed_official | 155:8435094ec241 | 1101 | |
mbed_official | 155:8435094ec241 | 1102 | #define TIM_FLAG_Update ((uint32_t)0x00001) |
mbed_official | 155:8435094ec241 | 1103 | #define TIM_FLAG_CC1 ((uint32_t)0x00002) |
mbed_official | 155:8435094ec241 | 1104 | #define TIM_FLAG_CC2 ((uint32_t)0x00004) |
mbed_official | 155:8435094ec241 | 1105 | #define TIM_FLAG_CC3 ((uint32_t)0x00008) |
mbed_official | 155:8435094ec241 | 1106 | #define TIM_FLAG_CC4 ((uint32_t)0x00010) |
mbed_official | 155:8435094ec241 | 1107 | #define TIM_FLAG_COM ((uint32_t)0x00020) |
mbed_official | 155:8435094ec241 | 1108 | #define TIM_FLAG_Trigger ((uint32_t)0x00040) |
mbed_official | 155:8435094ec241 | 1109 | #define TIM_FLAG_Break ((uint32_t)0x00080) |
mbed_official | 155:8435094ec241 | 1110 | #define TIM_FLAG_Break2 ((uint32_t)0x00100) |
mbed_official | 155:8435094ec241 | 1111 | #define TIM_FLAG_CC1OF ((uint32_t)0x00200) |
mbed_official | 155:8435094ec241 | 1112 | #define TIM_FLAG_CC2OF ((uint32_t)0x00400) |
mbed_official | 155:8435094ec241 | 1113 | #define TIM_FLAG_CC3OF ((uint32_t)0x00800) |
mbed_official | 155:8435094ec241 | 1114 | #define TIM_FLAG_CC4OF ((uint32_t)0x01000) |
mbed_official | 155:8435094ec241 | 1115 | #define TIM_FLAG_CC5 ((uint32_t)0x10000) |
mbed_official | 155:8435094ec241 | 1116 | #define TIM_FLAG_CC6 ((uint32_t)0x20000) |
mbed_official | 155:8435094ec241 | 1117 | #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \ |
mbed_official | 155:8435094ec241 | 1118 | ((FLAG) == TIM_FLAG_CC1) || \ |
mbed_official | 155:8435094ec241 | 1119 | ((FLAG) == TIM_FLAG_CC2) || \ |
mbed_official | 155:8435094ec241 | 1120 | ((FLAG) == TIM_FLAG_CC3) || \ |
mbed_official | 155:8435094ec241 | 1121 | ((FLAG) == TIM_FLAG_CC4) || \ |
mbed_official | 155:8435094ec241 | 1122 | ((FLAG) == TIM_FLAG_COM) || \ |
mbed_official | 155:8435094ec241 | 1123 | ((FLAG) == TIM_FLAG_Trigger) || \ |
mbed_official | 155:8435094ec241 | 1124 | ((FLAG) == TIM_FLAG_Break) || \ |
mbed_official | 155:8435094ec241 | 1125 | ((FLAG) == TIM_FLAG_Break2) || \ |
mbed_official | 155:8435094ec241 | 1126 | ((FLAG) == TIM_FLAG_CC1OF) || \ |
mbed_official | 155:8435094ec241 | 1127 | ((FLAG) == TIM_FLAG_CC2OF) || \ |
mbed_official | 155:8435094ec241 | 1128 | ((FLAG) == TIM_FLAG_CC3OF) || \ |
mbed_official | 155:8435094ec241 | 1129 | ((FLAG) == TIM_FLAG_CC4OF) ||\ |
mbed_official | 155:8435094ec241 | 1130 | ((FLAG) == TIM_FLAG_CC5) ||\ |
mbed_official | 155:8435094ec241 | 1131 | ((FLAG) == TIM_FLAG_CC6)) |
mbed_official | 155:8435094ec241 | 1132 | |
mbed_official | 155:8435094ec241 | 1133 | #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint32_t)0xE000) == 0x0000) && ((TIM_FLAG) != 0x0000)) |
mbed_official | 155:8435094ec241 | 1134 | /** |
mbed_official | 155:8435094ec241 | 1135 | * @} |
mbed_official | 155:8435094ec241 | 1136 | */ |
mbed_official | 155:8435094ec241 | 1137 | |
mbed_official | 155:8435094ec241 | 1138 | /** @defgroup TIM_OCReferenceClear |
mbed_official | 155:8435094ec241 | 1139 | * @{ |
mbed_official | 155:8435094ec241 | 1140 | */ |
mbed_official | 155:8435094ec241 | 1141 | #define TIM_OCReferenceClear_ETRF ((uint16_t)0x0008) |
mbed_official | 155:8435094ec241 | 1142 | #define TIM_OCReferenceClear_OCREFCLR ((uint16_t)0x0000) |
mbed_official | 155:8435094ec241 | 1143 | #define TIM_OCREFERENCECECLEAR_SOURCE(SOURCE) (((SOURCE) == TIM_OCReferenceClear_ETRF) || \ |
mbed_official | 155:8435094ec241 | 1144 | ((SOURCE) == TIM_OCReferenceClear_OCREFCLR)) |
mbed_official | 155:8435094ec241 | 1145 | |
mbed_official | 155:8435094ec241 | 1146 | /** @defgroup TIM_Input_Capture_Filer_Value |
mbed_official | 155:8435094ec241 | 1147 | * @{ |
mbed_official | 155:8435094ec241 | 1148 | */ |
mbed_official | 155:8435094ec241 | 1149 | |
mbed_official | 155:8435094ec241 | 1150 | #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) |
mbed_official | 155:8435094ec241 | 1151 | /** |
mbed_official | 155:8435094ec241 | 1152 | * @} |
mbed_official | 155:8435094ec241 | 1153 | */ |
mbed_official | 155:8435094ec241 | 1154 | |
mbed_official | 155:8435094ec241 | 1155 | /** @defgroup TIM_External_Trigger_Filter |
mbed_official | 155:8435094ec241 | 1156 | * @{ |
mbed_official | 155:8435094ec241 | 1157 | */ |
mbed_official | 155:8435094ec241 | 1158 | |
mbed_official | 155:8435094ec241 | 1159 | #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF) |
mbed_official | 155:8435094ec241 | 1160 | /** |
mbed_official | 155:8435094ec241 | 1161 | * @} |
mbed_official | 155:8435094ec241 | 1162 | */ |
mbed_official | 155:8435094ec241 | 1163 | |
mbed_official | 155:8435094ec241 | 1164 | /** @defgroup TIM_Legacy |
mbed_official | 155:8435094ec241 | 1165 | * @{ |
mbed_official | 155:8435094ec241 | 1166 | */ |
mbed_official | 155:8435094ec241 | 1167 | |
mbed_official | 155:8435094ec241 | 1168 | #define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer |
mbed_official | 155:8435094ec241 | 1169 | #define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers |
mbed_official | 155:8435094ec241 | 1170 | #define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers |
mbed_official | 155:8435094ec241 | 1171 | #define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers |
mbed_official | 155:8435094ec241 | 1172 | #define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers |
mbed_official | 155:8435094ec241 | 1173 | #define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers |
mbed_official | 155:8435094ec241 | 1174 | #define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers |
mbed_official | 155:8435094ec241 | 1175 | #define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers |
mbed_official | 155:8435094ec241 | 1176 | #define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers |
mbed_official | 155:8435094ec241 | 1177 | #define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers |
mbed_official | 155:8435094ec241 | 1178 | #define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers |
mbed_official | 155:8435094ec241 | 1179 | #define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers |
mbed_official | 155:8435094ec241 | 1180 | #define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers |
mbed_official | 155:8435094ec241 | 1181 | #define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers |
mbed_official | 155:8435094ec241 | 1182 | #define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers |
mbed_official | 155:8435094ec241 | 1183 | #define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers |
mbed_official | 155:8435094ec241 | 1184 | #define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers |
mbed_official | 155:8435094ec241 | 1185 | #define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers |
mbed_official | 155:8435094ec241 | 1186 | /** |
mbed_official | 155:8435094ec241 | 1187 | * @} |
mbed_official | 155:8435094ec241 | 1188 | */ |
mbed_official | 155:8435094ec241 | 1189 | |
mbed_official | 155:8435094ec241 | 1190 | /** |
mbed_official | 155:8435094ec241 | 1191 | * @} |
mbed_official | 155:8435094ec241 | 1192 | */ |
mbed_official | 155:8435094ec241 | 1193 | |
mbed_official | 155:8435094ec241 | 1194 | /* Exported macro ------------------------------------------------------------*/ |
mbed_official | 155:8435094ec241 | 1195 | /* Exported functions --------------------------------------------------------*/ |
mbed_official | 155:8435094ec241 | 1196 | |
mbed_official | 155:8435094ec241 | 1197 | /* TimeBase management ********************************************************/ |
mbed_official | 155:8435094ec241 | 1198 | void TIM_DeInit(TIM_TypeDef* TIMx); |
mbed_official | 155:8435094ec241 | 1199 | void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); |
mbed_official | 155:8435094ec241 | 1200 | void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); |
mbed_official | 155:8435094ec241 | 1201 | void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode); |
mbed_official | 155:8435094ec241 | 1202 | void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode); |
mbed_official | 155:8435094ec241 | 1203 | void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter); |
mbed_official | 155:8435094ec241 | 1204 | void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload); |
mbed_official | 155:8435094ec241 | 1205 | uint32_t TIM_GetCounter(TIM_TypeDef* TIMx); |
mbed_official | 155:8435094ec241 | 1206 | uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx); |
mbed_official | 155:8435094ec241 | 1207 | void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1208 | void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource); |
mbed_official | 155:8435094ec241 | 1209 | void TIM_UIFRemap(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1210 | void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1211 | void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode); |
mbed_official | 155:8435094ec241 | 1212 | void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD); |
mbed_official | 155:8435094ec241 | 1213 | void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1214 | |
mbed_official | 155:8435094ec241 | 1215 | /* Output Compare management **************************************************/ |
mbed_official | 155:8435094ec241 | 1216 | void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 155:8435094ec241 | 1217 | void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 155:8435094ec241 | 1218 | void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 155:8435094ec241 | 1219 | void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 155:8435094ec241 | 1220 | void TIM_OC5Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 155:8435094ec241 | 1221 | void TIM_OC6Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 155:8435094ec241 | 1222 | void TIM_SelectGC5C1(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1223 | void TIM_SelectGC5C2(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1224 | void TIM_SelectGC5C3(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1225 | void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 155:8435094ec241 | 1226 | void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint32_t TIM_OCMode); |
mbed_official | 155:8435094ec241 | 1227 | void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1); |
mbed_official | 155:8435094ec241 | 1228 | void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2); |
mbed_official | 155:8435094ec241 | 1229 | void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3); |
mbed_official | 155:8435094ec241 | 1230 | void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4); |
mbed_official | 155:8435094ec241 | 1231 | void TIM_SetCompare5(TIM_TypeDef* TIMx, uint32_t Compare5); |
mbed_official | 155:8435094ec241 | 1232 | void TIM_SetCompare6(TIM_TypeDef* TIMx, uint32_t Compare6); |
mbed_official | 155:8435094ec241 | 1233 | void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 155:8435094ec241 | 1234 | void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 155:8435094ec241 | 1235 | void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 155:8435094ec241 | 1236 | void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 155:8435094ec241 | 1237 | void TIM_ForcedOC5Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 155:8435094ec241 | 1238 | void TIM_ForcedOC6Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 155:8435094ec241 | 1239 | void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 155:8435094ec241 | 1240 | void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 155:8435094ec241 | 1241 | void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 155:8435094ec241 | 1242 | void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 155:8435094ec241 | 1243 | void TIM_OC5PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 155:8435094ec241 | 1244 | void TIM_OC6PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 155:8435094ec241 | 1245 | void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 155:8435094ec241 | 1246 | void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 155:8435094ec241 | 1247 | void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 155:8435094ec241 | 1248 | void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 155:8435094ec241 | 1249 | void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 155:8435094ec241 | 1250 | void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 155:8435094ec241 | 1251 | void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 155:8435094ec241 | 1252 | void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 155:8435094ec241 | 1253 | void TIM_ClearOC5Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 155:8435094ec241 | 1254 | void TIM_ClearOC6Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 155:8435094ec241 | 1255 | void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear); |
mbed_official | 155:8435094ec241 | 1256 | void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 155:8435094ec241 | 1257 | void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); |
mbed_official | 155:8435094ec241 | 1258 | void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 155:8435094ec241 | 1259 | void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); |
mbed_official | 155:8435094ec241 | 1260 | void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 155:8435094ec241 | 1261 | void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); |
mbed_official | 155:8435094ec241 | 1262 | void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 155:8435094ec241 | 1263 | void TIM_OC5PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 155:8435094ec241 | 1264 | void TIM_OC6PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 155:8435094ec241 | 1265 | void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx); |
mbed_official | 155:8435094ec241 | 1266 | void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN); |
mbed_official | 155:8435094ec241 | 1267 | |
mbed_official | 155:8435094ec241 | 1268 | /* Input Capture management ***************************************************/ |
mbed_official | 155:8435094ec241 | 1269 | void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); |
mbed_official | 155:8435094ec241 | 1270 | void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct); |
mbed_official | 155:8435094ec241 | 1271 | void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); |
mbed_official | 155:8435094ec241 | 1272 | uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx); |
mbed_official | 155:8435094ec241 | 1273 | uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx); |
mbed_official | 155:8435094ec241 | 1274 | uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx); |
mbed_official | 155:8435094ec241 | 1275 | uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx); |
mbed_official | 155:8435094ec241 | 1276 | void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 155:8435094ec241 | 1277 | void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 155:8435094ec241 | 1278 | void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 155:8435094ec241 | 1279 | void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 155:8435094ec241 | 1280 | |
mbed_official | 155:8435094ec241 | 1281 | /* Advanced-control timers (TIM1 and TIM8) specific features ******************/ |
mbed_official | 155:8435094ec241 | 1282 | void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct); |
mbed_official | 155:8435094ec241 | 1283 | void TIM_Break1Config(TIM_TypeDef* TIMx, uint32_t TIM_Break1Polarity, uint8_t TIM_Break1Filter); |
mbed_official | 155:8435094ec241 | 1284 | void TIM_Break2Config(TIM_TypeDef* TIMx, uint32_t TIM_Break2Polarity, uint8_t TIM_Break2Filter); |
mbed_official | 155:8435094ec241 | 1285 | void TIM_Break1Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1286 | void TIM_Break2Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1287 | void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct); |
mbed_official | 155:8435094ec241 | 1288 | void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1289 | void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1290 | void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1291 | |
mbed_official | 155:8435094ec241 | 1292 | /* Interrupts, DMA and flags management ***************************************/ |
mbed_official | 155:8435094ec241 | 1293 | void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1294 | void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); |
mbed_official | 155:8435094ec241 | 1295 | FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint32_t TIM_FLAG); |
mbed_official | 155:8435094ec241 | 1296 | void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); |
mbed_official | 155:8435094ec241 | 1297 | ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT); |
mbed_official | 155:8435094ec241 | 1298 | void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT); |
mbed_official | 155:8435094ec241 | 1299 | void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength); |
mbed_official | 155:8435094ec241 | 1300 | void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1301 | void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1302 | |
mbed_official | 155:8435094ec241 | 1303 | /* Clocks management **********************************************************/ |
mbed_official | 155:8435094ec241 | 1304 | void TIM_InternalClockConfig(TIM_TypeDef* TIMx); |
mbed_official | 155:8435094ec241 | 1305 | void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); |
mbed_official | 155:8435094ec241 | 1306 | void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, |
mbed_official | 155:8435094ec241 | 1307 | uint16_t TIM_ICPolarity, uint16_t ICFilter); |
mbed_official | 155:8435094ec241 | 1308 | void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, |
mbed_official | 155:8435094ec241 | 1309 | uint16_t ExtTRGFilter); |
mbed_official | 155:8435094ec241 | 1310 | void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, |
mbed_official | 155:8435094ec241 | 1311 | uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter); |
mbed_official | 155:8435094ec241 | 1312 | |
mbed_official | 155:8435094ec241 | 1313 | /* Synchronization management *************************************************/ |
mbed_official | 155:8435094ec241 | 1314 | void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); |
mbed_official | 155:8435094ec241 | 1315 | void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource); |
mbed_official | 155:8435094ec241 | 1316 | void TIM_SelectOutputTrigger2(TIM_TypeDef* TIMx, uint32_t TIM_TRGO2Source); |
mbed_official | 155:8435094ec241 | 1317 | void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint32_t TIM_SlaveMode); |
mbed_official | 155:8435094ec241 | 1318 | void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode); |
mbed_official | 155:8435094ec241 | 1319 | void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, |
mbed_official | 155:8435094ec241 | 1320 | uint16_t ExtTRGFilter); |
mbed_official | 155:8435094ec241 | 1321 | |
mbed_official | 155:8435094ec241 | 1322 | /* Specific interface management **********************************************/ |
mbed_official | 155:8435094ec241 | 1323 | void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, |
mbed_official | 155:8435094ec241 | 1324 | uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity); |
mbed_official | 155:8435094ec241 | 1325 | void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 155:8435094ec241 | 1326 | |
mbed_official | 155:8435094ec241 | 1327 | /* Specific remapping management **********************************************/ |
mbed_official | 155:8435094ec241 | 1328 | void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap); |
mbed_official | 155:8435094ec241 | 1329 | |
mbed_official | 155:8435094ec241 | 1330 | #ifdef __cplusplus |
mbed_official | 155:8435094ec241 | 1331 | } |
mbed_official | 155:8435094ec241 | 1332 | #endif |
mbed_official | 155:8435094ec241 | 1333 | |
mbed_official | 155:8435094ec241 | 1334 | #endif /*__STM32F30x_TIM_H */ |
mbed_official | 155:8435094ec241 | 1335 | |
mbed_official | 155:8435094ec241 | 1336 | /** |
mbed_official | 155:8435094ec241 | 1337 | * @} |
mbed_official | 155:8435094ec241 | 1338 | */ |
mbed_official | 155:8435094ec241 | 1339 | |
mbed_official | 155:8435094ec241 | 1340 | /** |
mbed_official | 155:8435094ec241 | 1341 | * @} |
mbed_official | 155:8435094ec241 | 1342 | */ |
mbed_official | 155:8435094ec241 | 1343 | |
mbed_official | 155:8435094ec241 | 1344 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |