Janek Mann / mbed-src-openwear

mbed library sources modified for open wear

Dependents:   openwear-lifelogger-example

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC43XX/spi_api.c@227:7bd0639b8911, 2014-06-11 (annotated)

Committer:
mbed_official
Date:
Wed Jun 11 16:00:09 2014 +0100
Revision:
227:7bd0639b8911
Parent:
81:a9456fdf72fa
Child:
250:a49055e7a707
Synchronized with git revision d58d532ebc0e0a96f4fffb8edefc082b71b964af



Full URL: https://github.com/mbedmicro/mbed/commit/d58d532ebc0e0a96f4fffb8edefc082b71b964af/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library
bogdanm 20:4263a77256ae 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 20:4263a77256ae 5 * you may not use this file except in compliance with the License.
bogdanm 20:4263a77256ae 6 * You may obtain a copy of the License at
bogdanm 20:4263a77256ae 7 *
bogdanm 20:4263a77256ae 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 20:4263a77256ae 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 20:4263a77256ae 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 20:4263a77256ae 13 * See the License for the specific language governing permissions and
bogdanm 20:4263a77256ae 14 * limitations under the License.
bogdanm 20:4263a77256ae 15 *
bogdanm 20:4263a77256ae 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
bogdanm 20:4263a77256ae 17 */
mbed_official 227:7bd0639b8911 18 #include "mbed_assert.h"
bogdanm 20:4263a77256ae 19 #include <math.h>
bogdanm 20:4263a77256ae 20
bogdanm 20:4263a77256ae 21 #include "spi_api.h"
bogdanm 20:4263a77256ae 22 #include "cmsis.h"
bogdanm 20:4263a77256ae 23 #include "pinmap.h"
bogdanm 20:4263a77256ae 24 #include "error.h"
bogdanm 20:4263a77256ae 25
bogdanm 20:4263a77256ae 26 static const PinMap PinMap_SPI_SCLK[] = {
bogdanm 20:4263a77256ae 27 {P3_0 , SPI_0, (SCU_PINIO_FAST | 2)},
bogdanm 20:4263a77256ae 28 {PF_4 , SPI_1, (SCU_PINIO_FAST | 2)},
bogdanm 20:4263a77256ae 29 {NC , NC , 0}
bogdanm 20:4263a77256ae 30 };
bogdanm 20:4263a77256ae 31
bogdanm 20:4263a77256ae 32 static const PinMap PinMap_SPI_MOSI[] = {
bogdanm 20:4263a77256ae 33 {P1_2 , SPI_0, (SCU_PINIO_FAST | 2)},
bogdanm 20:4263a77256ae 34 {P1_4 , SPI_1, (SCU_PINIO_FAST | 2)},
bogdanm 20:4263a77256ae 35 {NC , NC , 0}
bogdanm 20:4263a77256ae 36 };
bogdanm 20:4263a77256ae 37
bogdanm 20:4263a77256ae 38 static const PinMap PinMap_SPI_MISO[] = {
bogdanm 20:4263a77256ae 39 {P1_1 , SPI_0, (SCU_PINIO_FAST | 2)},
bogdanm 20:4263a77256ae 40 {P1_3 , SPI_1, (SCU_PINIO_FAST | 2)},
bogdanm 20:4263a77256ae 41 {NC , NC , 0}
bogdanm 20:4263a77256ae 42 };
bogdanm 20:4263a77256ae 43
bogdanm 20:4263a77256ae 44 static const PinMap PinMap_SPI_SSEL[] = {
bogdanm 20:4263a77256ae 45 {P1_0 , SPI_0, (SCU_PINIO_FAST | 2)},
bogdanm 20:4263a77256ae 46 {P1_5 , SPI_1, (SCU_PINIO_FAST | 2)},
bogdanm 20:4263a77256ae 47 {NC , NC , 0}
bogdanm 20:4263a77256ae 48 };
bogdanm 20:4263a77256ae 49
bogdanm 20:4263a77256ae 50 static inline int ssp_disable(spi_t *obj);
bogdanm 20:4263a77256ae 51 static inline int ssp_enable(spi_t *obj);
bogdanm 20:4263a77256ae 52
bogdanm 20:4263a77256ae 53 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
bogdanm 20:4263a77256ae 54 // determine the SPI to use
bogdanm 20:4263a77256ae 55 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
bogdanm 20:4263a77256ae 56 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
bogdanm 20:4263a77256ae 57 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
bogdanm 20:4263a77256ae 58 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
bogdanm 20:4263a77256ae 59 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
bogdanm 20:4263a77256ae 60 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
bogdanm 20:4263a77256ae 61
bogdanm 20:4263a77256ae 62 obj->spi = (LPC_SSP_T*)pinmap_merge(spi_data, spi_cntl);
mbed_official 227:7bd0639b8911 63 MBED_ASSERT((int)obj->spi != NC);
bogdanm 20:4263a77256ae 64
bogdanm 20:4263a77256ae 65 // set default format and frequency
bogdanm 20:4263a77256ae 66 if (ssel == NC) {
bogdanm 20:4263a77256ae 67 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
bogdanm 20:4263a77256ae 68 } else {
bogdanm 20:4263a77256ae 69 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
bogdanm 20:4263a77256ae 70 }
bogdanm 20:4263a77256ae 71 spi_frequency(obj, 1000000);
bogdanm 20:4263a77256ae 72
bogdanm 20:4263a77256ae 73 // enable the ssp channel
bogdanm 20:4263a77256ae 74 ssp_enable(obj);
bogdanm 20:4263a77256ae 75
bogdanm 20:4263a77256ae 76 // pin out the spi pins
bogdanm 20:4263a77256ae 77 pinmap_pinout(mosi, PinMap_SPI_MOSI);
bogdanm 20:4263a77256ae 78 pinmap_pinout(miso, PinMap_SPI_MISO);
bogdanm 20:4263a77256ae 79 pinmap_pinout(sclk, PinMap_SPI_SCLK);
bogdanm 20:4263a77256ae 80 if (ssel != NC) {
bogdanm 20:4263a77256ae 81 pinmap_pinout(ssel, PinMap_SPI_SSEL);
bogdanm 20:4263a77256ae 82 }
bogdanm 20:4263a77256ae 83 }
bogdanm 20:4263a77256ae 84
bogdanm 20:4263a77256ae 85 void spi_free(spi_t *obj) {}
bogdanm 20:4263a77256ae 86
bogdanm 20:4263a77256ae 87 void spi_format(spi_t *obj, int bits, int mode, int slave) {
mbed_official 227:7bd0639b8911 88 MBED_ASSERT(((bits >= 4) && (bits <= 16)) || ((mode >= 0) && (mode <= 3)));
bogdanm 20:4263a77256ae 89 ssp_disable(obj);
bogdanm 20:4263a77256ae 90
bogdanm 20:4263a77256ae 91 int polarity = (mode & 0x2) ? 1 : 0;
bogdanm 20:4263a77256ae 92 int phase = (mode & 0x1) ? 1 : 0;
bogdanm 20:4263a77256ae 93
bogdanm 20:4263a77256ae 94 // set it up
bogdanm 20:4263a77256ae 95 int DSS = bits - 1; // DSS (data select size)
bogdanm 20:4263a77256ae 96 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
bogdanm 20:4263a77256ae 97 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
bogdanm 20:4263a77256ae 98
bogdanm 20:4263a77256ae 99 int FRF = 0; // FRF (frame format) = SPI
bogdanm 20:4263a77256ae 100 uint32_t tmp = obj->spi->CR0;
bogdanm 20:4263a77256ae 101 tmp &= ~(0xFFFF);
bogdanm 20:4263a77256ae 102 tmp |= DSS << 0
bogdanm 20:4263a77256ae 103 | FRF << 4
bogdanm 20:4263a77256ae 104 | SPO << 6
bogdanm 20:4263a77256ae 105 | SPH << 7;
bogdanm 20:4263a77256ae 106 obj->spi->CR0 = tmp;
bogdanm 20:4263a77256ae 107
bogdanm 20:4263a77256ae 108 tmp = obj->spi->CR1;
bogdanm 20:4263a77256ae 109 tmp &= ~(0xD);
bogdanm 20:4263a77256ae 110 tmp |= 0 << 0 // LBM - loop back mode - off
bogdanm 20:4263a77256ae 111 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
bogdanm 20:4263a77256ae 112 | 0 << 3; // SOD - slave output disable - na
bogdanm 20:4263a77256ae 113 obj->spi->CR1 = tmp;
bogdanm 20:4263a77256ae 114 ssp_enable(obj);
bogdanm 20:4263a77256ae 115 }
bogdanm 20:4263a77256ae 116
bogdanm 20:4263a77256ae 117 void spi_frequency(spi_t *obj, int hz) {
bogdanm 20:4263a77256ae 118 ssp_disable(obj);
bogdanm 20:4263a77256ae 119
bogdanm 20:4263a77256ae 120 uint32_t PCLK = SystemCoreClock;
bogdanm 20:4263a77256ae 121
bogdanm 20:4263a77256ae 122 int prescaler;
bogdanm 20:4263a77256ae 123
bogdanm 20:4263a77256ae 124 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
bogdanm 20:4263a77256ae 125 int prescale_hz = PCLK / prescaler;
bogdanm 20:4263a77256ae 126
bogdanm 20:4263a77256ae 127 // calculate the divider
bogdanm 20:4263a77256ae 128 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
bogdanm 20:4263a77256ae 129
bogdanm 20:4263a77256ae 130 // check we can support the divider
bogdanm 20:4263a77256ae 131 if (divider < 256) {
bogdanm 20:4263a77256ae 132 // prescaler
bogdanm 20:4263a77256ae 133 obj->spi->CPSR = prescaler;
bogdanm 20:4263a77256ae 134
bogdanm 20:4263a77256ae 135 // divider
bogdanm 20:4263a77256ae 136 obj->spi->CR0 &= ~(0xFFFF << 8);
bogdanm 20:4263a77256ae 137 obj->spi->CR0 |= (divider - 1) << 8;
bogdanm 20:4263a77256ae 138 ssp_enable(obj);
bogdanm 20:4263a77256ae 139 return;
bogdanm 20:4263a77256ae 140 }
bogdanm 20:4263a77256ae 141 }
bogdanm 20:4263a77256ae 142 error("Couldn't setup requested SPI frequency");
bogdanm 20:4263a77256ae 143 }
bogdanm 20:4263a77256ae 144
bogdanm 20:4263a77256ae 145 static inline int ssp_disable(spi_t *obj) {
bogdanm 20:4263a77256ae 146 return obj->spi->CR1 &= ~(1 << 1);
bogdanm 20:4263a77256ae 147 }
bogdanm 20:4263a77256ae 148
bogdanm 20:4263a77256ae 149 static inline int ssp_enable(spi_t *obj) {
bogdanm 20:4263a77256ae 150 return obj->spi->CR1 |= (1 << 1);
bogdanm 20:4263a77256ae 151 }
bogdanm 20:4263a77256ae 152
bogdanm 20:4263a77256ae 153 static inline int ssp_readable(spi_t *obj) {
bogdanm 20:4263a77256ae 154 return obj->spi->SR & (1 << 2);
bogdanm 20:4263a77256ae 155 }
bogdanm 20:4263a77256ae 156
bogdanm 20:4263a77256ae 157 static inline int ssp_writeable(spi_t *obj) {
bogdanm 20:4263a77256ae 158 return obj->spi->SR & (1 << 1);
bogdanm 20:4263a77256ae 159 }
bogdanm 20:4263a77256ae 160
bogdanm 20:4263a77256ae 161 static inline void ssp_write(spi_t *obj, int value) {
bogdanm 20:4263a77256ae 162 while (!ssp_writeable(obj));
bogdanm 20:4263a77256ae 163 obj->spi->DR = value;
bogdanm 20:4263a77256ae 164 }
bogdanm 20:4263a77256ae 165
bogdanm 20:4263a77256ae 166 static inline int ssp_read(spi_t *obj) {
bogdanm 20:4263a77256ae 167 while (!ssp_readable(obj));
bogdanm 20:4263a77256ae 168 return obj->spi->DR;
bogdanm 20:4263a77256ae 169 }
bogdanm 20:4263a77256ae 170
bogdanm 20:4263a77256ae 171 static inline int ssp_busy(spi_t *obj) {
bogdanm 20:4263a77256ae 172 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
bogdanm 20:4263a77256ae 173 }
bogdanm 20:4263a77256ae 174
bogdanm 20:4263a77256ae 175 int spi_master_write(spi_t *obj, int value) {
bogdanm 20:4263a77256ae 176 ssp_write(obj, value);
bogdanm 20:4263a77256ae 177 return ssp_read(obj);
bogdanm 20:4263a77256ae 178 }
bogdanm 20:4263a77256ae 179
bogdanm 20:4263a77256ae 180 int spi_slave_receive(spi_t *obj) {
bogdanm 20:4263a77256ae 181 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
mbed_official 81:a9456fdf72fa 182 }
bogdanm 20:4263a77256ae 183
bogdanm 20:4263a77256ae 184 int spi_slave_read(spi_t *obj) {
bogdanm 20:4263a77256ae 185 return obj->spi->DR;
bogdanm 20:4263a77256ae 186 }
bogdanm 20:4263a77256ae 187
bogdanm 20:4263a77256ae 188 void spi_slave_write(spi_t *obj, int value) {
bogdanm 20:4263a77256ae 189 while (ssp_writeable(obj) == 0) ;
bogdanm 20:4263a77256ae 190 obj->spi->DR = value;
bogdanm 20:4263a77256ae 191 }
bogdanm 20:4263a77256ae 192
bogdanm 20:4263a77256ae 193 int spi_busy(spi_t *obj) {
bogdanm 20:4263a77256ae 194 return ssp_busy(obj);
bogdanm 20:4263a77256ae 195 }