mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_STM32F407VG/stm32f4xx_hal_hash.c@310:6188e0254baa, 2014-09-16 (annotated)
- Committer:
- janekm
- Date:
- Tue Sep 16 22:42:01 2014 +0000
- Revision:
- 310:6188e0254baa
- Parent:
- 297:ec1b66a3d094
N/A
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 133:d4dda5c437f0 | 1 | /** |
mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_hash.c |
mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
mbed_official | 242:7074e42da0b2 | 5 | * @version V1.1.0RC2 |
mbed_official | 242:7074e42da0b2 | 6 | * @date 14-May-2014 |
mbed_official | 133:d4dda5c437f0 | 7 | * @brief HASH HAL module driver. |
mbed_official | 133:d4dda5c437f0 | 8 | * This file provides firmware functions to manage the following |
mbed_official | 133:d4dda5c437f0 | 9 | * functionalities of the HASH peripheral: |
mbed_official | 133:d4dda5c437f0 | 10 | * + Initialization and de-initialization functions |
mbed_official | 133:d4dda5c437f0 | 11 | * + HASH/HMAC Processing functions by algorithm using polling mode |
mbed_official | 133:d4dda5c437f0 | 12 | * + HASH/HMAC functions by algorithm using interrupt mode |
mbed_official | 133:d4dda5c437f0 | 13 | * + HASH/HMAC functions by algorithm using DMA mode |
mbed_official | 133:d4dda5c437f0 | 14 | * + Peripheral State functions |
mbed_official | 133:d4dda5c437f0 | 15 | * |
mbed_official | 133:d4dda5c437f0 | 16 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 17 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 18 | ##### How to use this driver ##### |
mbed_official | 133:d4dda5c437f0 | 19 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 20 | [..] |
mbed_official | 133:d4dda5c437f0 | 21 | The HASH HAL driver can be used as follows: |
mbed_official | 133:d4dda5c437f0 | 22 | (#)Initialize the HASH low level resources by implementing the HAL_HASH_MspInit(): |
mbed_official | 133:d4dda5c437f0 | 23 | (##) Enable the HASH interface clock using __HASH_CLK_ENABLE() |
mbed_official | 133:d4dda5c437f0 | 24 | (##) In case of using processing APIs based on interrupts (e.g. HAL_HMAC_SHA1_Start_IT()) |
mbed_official | 133:d4dda5c437f0 | 25 | (+++) Configure the HASH interrupt priority using HAL_NVIC_SetPriority() |
mbed_official | 133:d4dda5c437f0 | 26 | (+++) Enable the HASH IRQ handler using HAL_NVIC_EnableIRQ() |
mbed_official | 133:d4dda5c437f0 | 27 | (+++) In HASH IRQ handler, call HAL_HASH_IRQHandler() |
mbed_official | 133:d4dda5c437f0 | 28 | (##) In case of using DMA to control data transfer (e.g. HAL_HMAC_SHA1_Start_DMA()) |
mbed_official | 133:d4dda5c437f0 | 29 | (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE() |
mbed_official | 133:d4dda5c437f0 | 30 | (+++) Configure and enable one DMA stream one for managing data transfer from |
mbed_official | 133:d4dda5c437f0 | 31 | memory to peripheral (input stream). Managing data transfer from |
mbed_official | 133:d4dda5c437f0 | 32 | peripheral to memory can be performed only using CPU |
mbed_official | 133:d4dda5c437f0 | 33 | (+++) Associate the initialized DMA handle to the HASH DMA handle |
mbed_official | 133:d4dda5c437f0 | 34 | using __HAL_LINKDMA() |
mbed_official | 133:d4dda5c437f0 | 35 | (+++) Configure the priority and enable the NVIC for the transfer complete |
mbed_official | 133:d4dda5c437f0 | 36 | interrupt on the DMA Stream using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ() |
mbed_official | 133:d4dda5c437f0 | 37 | (#)Initialize the HASH HAL using HAL_HASH_Init(). This function configures mainly: |
mbed_official | 133:d4dda5c437f0 | 38 | (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit. |
mbed_official | 133:d4dda5c437f0 | 39 | (##) For HMAC, the encryption key. |
mbed_official | 133:d4dda5c437f0 | 40 | (##) For HMAC, the key size used for encryption. |
mbed_official | 133:d4dda5c437f0 | 41 | (#)Three processing functions are available: |
mbed_official | 133:d4dda5c437f0 | 42 | (##) Polling mode: processing APIs are blocking functions |
mbed_official | 133:d4dda5c437f0 | 43 | i.e. they process the data and wait till the digest computation is finished |
mbed_official | 133:d4dda5c437f0 | 44 | e.g. HAL_HASH_SHA1_Start() |
mbed_official | 133:d4dda5c437f0 | 45 | (##) Interrupt mode: encryption and decryption APIs are not blocking functions |
mbed_official | 133:d4dda5c437f0 | 46 | i.e. they process the data under interrupt |
mbed_official | 133:d4dda5c437f0 | 47 | e.g. HAL_HASH_SHA1_Start_IT() |
mbed_official | 133:d4dda5c437f0 | 48 | (##) DMA mode: processing APIs are not blocking functions and the CPU is |
mbed_official | 133:d4dda5c437f0 | 49 | not used for data transfer i.e. the data transfer is ensured by DMA |
mbed_official | 133:d4dda5c437f0 | 50 | e.g. HAL_HASH_SHA1_Start_DMA() |
mbed_official | 133:d4dda5c437f0 | 51 | (#)When the processing function is called at first time after HAL_HASH_Init() |
mbed_official | 133:d4dda5c437f0 | 52 | the HASH peripheral is initialized and processes the buffer in input. |
mbed_official | 133:d4dda5c437f0 | 53 | After that, the digest computation is started. |
mbed_official | 133:d4dda5c437f0 | 54 | When processing multi-buffer use the accumulate function to write the |
mbed_official | 133:d4dda5c437f0 | 55 | data in the peripheral without starting the digest computation. In last |
mbed_official | 133:d4dda5c437f0 | 56 | buffer use the start function to input the last buffer ans start the digest |
mbed_official | 133:d4dda5c437f0 | 57 | computation. |
mbed_official | 133:d4dda5c437f0 | 58 | (##) e.g. HAL_HASH_SHA1_Accumulate() : write 1st data buffer in the peripheral without starting the digest computation |
mbed_official | 133:d4dda5c437f0 | 59 | (##) write (n-1)th data buffer in the peripheral without starting the digest computation |
mbed_official | 133:d4dda5c437f0 | 60 | (##) HAL_HASH_SHA1_Start() : write (n)th data buffer in the peripheral and start the digest computation |
mbed_official | 133:d4dda5c437f0 | 61 | (#)In HMAC mode, there is no Accumulate API. Only Start API is available. |
mbed_official | 133:d4dda5c437f0 | 62 | (#)In case of using DMA, call the DMA start processing e.g. HAL_HASH_SHA1_Start_DMA(). |
mbed_official | 133:d4dda5c437f0 | 63 | After that, call the finish function in order to get the digest value |
mbed_official | 133:d4dda5c437f0 | 64 | e.g. HAL_HASH_SHA1_Finish() |
mbed_official | 133:d4dda5c437f0 | 65 | (#)Call HAL_HASH_DeInit() to deinitialize the HASH peripheral. |
mbed_official | 133:d4dda5c437f0 | 66 | |
mbed_official | 133:d4dda5c437f0 | 67 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 68 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 69 | * @attention |
mbed_official | 133:d4dda5c437f0 | 70 | * |
mbed_official | 133:d4dda5c437f0 | 71 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 133:d4dda5c437f0 | 72 | * |
mbed_official | 133:d4dda5c437f0 | 73 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 133:d4dda5c437f0 | 74 | * are permitted provided that the following conditions are met: |
mbed_official | 133:d4dda5c437f0 | 75 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 76 | * this list of conditions and the following disclaimer. |
mbed_official | 133:d4dda5c437f0 | 77 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 78 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 133:d4dda5c437f0 | 79 | * and/or other materials provided with the distribution. |
mbed_official | 133:d4dda5c437f0 | 80 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 133:d4dda5c437f0 | 81 | * may be used to endorse or promote products derived from this software |
mbed_official | 133:d4dda5c437f0 | 82 | * without specific prior written permission. |
mbed_official | 133:d4dda5c437f0 | 83 | * |
mbed_official | 133:d4dda5c437f0 | 84 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 133:d4dda5c437f0 | 85 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 133:d4dda5c437f0 | 86 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 133:d4dda5c437f0 | 87 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 133:d4dda5c437f0 | 88 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 133:d4dda5c437f0 | 89 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 133:d4dda5c437f0 | 90 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 133:d4dda5c437f0 | 91 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 133:d4dda5c437f0 | 92 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 133:d4dda5c437f0 | 93 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 133:d4dda5c437f0 | 94 | * |
mbed_official | 133:d4dda5c437f0 | 95 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 96 | */ |
mbed_official | 133:d4dda5c437f0 | 97 | |
mbed_official | 133:d4dda5c437f0 | 98 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 99 | #include "stm32f4xx_hal.h" |
mbed_official | 133:d4dda5c437f0 | 100 | |
mbed_official | 133:d4dda5c437f0 | 101 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 133:d4dda5c437f0 | 102 | * @{ |
mbed_official | 133:d4dda5c437f0 | 103 | */ |
mbed_official | 133:d4dda5c437f0 | 104 | |
mbed_official | 133:d4dda5c437f0 | 105 | /** @defgroup HASH |
mbed_official | 133:d4dda5c437f0 | 106 | * @brief HASH HAL module driver. |
mbed_official | 133:d4dda5c437f0 | 107 | * @{ |
mbed_official | 133:d4dda5c437f0 | 108 | */ |
mbed_official | 133:d4dda5c437f0 | 109 | |
mbed_official | 133:d4dda5c437f0 | 110 | #ifdef HAL_HASH_MODULE_ENABLED |
mbed_official | 133:d4dda5c437f0 | 111 | |
mbed_official | 133:d4dda5c437f0 | 112 | #if defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F437xx) || defined(STM32F439xx) |
mbed_official | 133:d4dda5c437f0 | 113 | |
mbed_official | 133:d4dda5c437f0 | 114 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 115 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 116 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 117 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 118 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 119 | static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 120 | static void HASH_DMAError(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 121 | static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size); |
mbed_official | 133:d4dda5c437f0 | 122 | static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size); |
mbed_official | 133:d4dda5c437f0 | 123 | |
mbed_official | 133:d4dda5c437f0 | 124 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 125 | |
mbed_official | 133:d4dda5c437f0 | 126 | /** @defgroup HASH_Private_Functions |
mbed_official | 133:d4dda5c437f0 | 127 | * @{ |
mbed_official | 133:d4dda5c437f0 | 128 | */ |
mbed_official | 133:d4dda5c437f0 | 129 | |
mbed_official | 133:d4dda5c437f0 | 130 | /** @defgroup HASH_Group1 Initialization and de-initialization functions |
mbed_official | 133:d4dda5c437f0 | 131 | * @brief Initialization and Configuration functions. |
mbed_official | 133:d4dda5c437f0 | 132 | * |
mbed_official | 133:d4dda5c437f0 | 133 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 134 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 135 | ##### Initialization and de-initialization functions ##### |
mbed_official | 133:d4dda5c437f0 | 136 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 137 | [..] This section provides functions allowing to: |
mbed_official | 133:d4dda5c437f0 | 138 | (+) Initialize the HASH according to the specified parameters |
mbed_official | 133:d4dda5c437f0 | 139 | in the HASH_InitTypeDef and creates the associated handle. |
mbed_official | 133:d4dda5c437f0 | 140 | (+) DeInitialize the HASH peripheral. |
mbed_official | 133:d4dda5c437f0 | 141 | (+) Initialize the HASH MSP. |
mbed_official | 133:d4dda5c437f0 | 142 | (+) DeInitialize HASH MSP. |
mbed_official | 133:d4dda5c437f0 | 143 | |
mbed_official | 133:d4dda5c437f0 | 144 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 145 | * @{ |
mbed_official | 133:d4dda5c437f0 | 146 | */ |
mbed_official | 133:d4dda5c437f0 | 147 | |
mbed_official | 133:d4dda5c437f0 | 148 | /** |
mbed_official | 133:d4dda5c437f0 | 149 | * @brief Initializes the HASH according to the specified parameters in the |
mbed_official | 133:d4dda5c437f0 | 150 | HASH_HandleTypeDef and creates the associated handle. |
mbed_official | 242:7074e42da0b2 | 151 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 152 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 153 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 154 | */ |
mbed_official | 133:d4dda5c437f0 | 155 | HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash) |
mbed_official | 133:d4dda5c437f0 | 156 | { |
mbed_official | 133:d4dda5c437f0 | 157 | /* Check the hash handle allocation */ |
mbed_official | 133:d4dda5c437f0 | 158 | if(hhash == NULL) |
mbed_official | 133:d4dda5c437f0 | 159 | { |
mbed_official | 133:d4dda5c437f0 | 160 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 161 | } |
mbed_official | 133:d4dda5c437f0 | 162 | |
mbed_official | 133:d4dda5c437f0 | 163 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 164 | assert_param(IS_HASH_DATATYPE(hhash->Init.DataType)); |
mbed_official | 133:d4dda5c437f0 | 165 | |
mbed_official | 133:d4dda5c437f0 | 166 | if(hhash->State == HAL_HASH_STATE_RESET) |
mbed_official | 133:d4dda5c437f0 | 167 | { |
mbed_official | 133:d4dda5c437f0 | 168 | /* Init the low level hardware */ |
mbed_official | 133:d4dda5c437f0 | 169 | HAL_HASH_MspInit(hhash); |
mbed_official | 133:d4dda5c437f0 | 170 | } |
mbed_official | 133:d4dda5c437f0 | 171 | |
mbed_official | 133:d4dda5c437f0 | 172 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 173 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 174 | |
mbed_official | 133:d4dda5c437f0 | 175 | /* Reset HashInCount, HashBuffSize and HashITCounter */ |
mbed_official | 133:d4dda5c437f0 | 176 | hhash->HashInCount = 0; |
mbed_official | 133:d4dda5c437f0 | 177 | hhash->HashBuffSize = 0; |
mbed_official | 133:d4dda5c437f0 | 178 | hhash->HashITCounter = 0; |
mbed_official | 133:d4dda5c437f0 | 179 | |
mbed_official | 133:d4dda5c437f0 | 180 | /* Set the data type */ |
mbed_official | 133:d4dda5c437f0 | 181 | HASH->CR |= (uint32_t) (hhash->Init.DataType); |
mbed_official | 133:d4dda5c437f0 | 182 | |
mbed_official | 133:d4dda5c437f0 | 183 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 184 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 185 | |
mbed_official | 133:d4dda5c437f0 | 186 | /* Set the default HASH phase */ |
mbed_official | 133:d4dda5c437f0 | 187 | hhash->Phase = HAL_HASH_PHASE_READY; |
mbed_official | 133:d4dda5c437f0 | 188 | |
mbed_official | 133:d4dda5c437f0 | 189 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 190 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 191 | } |
mbed_official | 133:d4dda5c437f0 | 192 | |
mbed_official | 133:d4dda5c437f0 | 193 | /** |
mbed_official | 133:d4dda5c437f0 | 194 | * @brief DeInitializes the HASH peripheral. |
mbed_official | 133:d4dda5c437f0 | 195 | * @note This API must be called before starting a new processing. |
mbed_official | 242:7074e42da0b2 | 196 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 197 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 198 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 199 | */ |
mbed_official | 133:d4dda5c437f0 | 200 | HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash) |
mbed_official | 133:d4dda5c437f0 | 201 | { |
mbed_official | 133:d4dda5c437f0 | 202 | /* Check the HASH handle allocation */ |
mbed_official | 133:d4dda5c437f0 | 203 | if(hhash == NULL) |
mbed_official | 133:d4dda5c437f0 | 204 | { |
mbed_official | 133:d4dda5c437f0 | 205 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 206 | } |
mbed_official | 133:d4dda5c437f0 | 207 | |
mbed_official | 133:d4dda5c437f0 | 208 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 209 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 210 | |
mbed_official | 133:d4dda5c437f0 | 211 | /* Set the default HASH phase */ |
mbed_official | 133:d4dda5c437f0 | 212 | hhash->Phase = HAL_HASH_PHASE_READY; |
mbed_official | 133:d4dda5c437f0 | 213 | |
mbed_official | 133:d4dda5c437f0 | 214 | /* Reset HashInCount, HashBuffSize and HashITCounter */ |
mbed_official | 133:d4dda5c437f0 | 215 | hhash->HashInCount = 0; |
mbed_official | 133:d4dda5c437f0 | 216 | hhash->HashBuffSize = 0; |
mbed_official | 133:d4dda5c437f0 | 217 | hhash->HashITCounter = 0; |
mbed_official | 133:d4dda5c437f0 | 218 | |
mbed_official | 133:d4dda5c437f0 | 219 | /* DeInit the low level hardware */ |
mbed_official | 133:d4dda5c437f0 | 220 | HAL_HASH_MspDeInit(hhash); |
mbed_official | 133:d4dda5c437f0 | 221 | |
mbed_official | 133:d4dda5c437f0 | 222 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 223 | hhash->State = HAL_HASH_STATE_RESET; |
mbed_official | 133:d4dda5c437f0 | 224 | |
mbed_official | 133:d4dda5c437f0 | 225 | /* Release Lock */ |
mbed_official | 133:d4dda5c437f0 | 226 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 227 | |
mbed_official | 133:d4dda5c437f0 | 228 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 229 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 230 | } |
mbed_official | 133:d4dda5c437f0 | 231 | |
mbed_official | 133:d4dda5c437f0 | 232 | /** |
mbed_official | 133:d4dda5c437f0 | 233 | * @brief Initializes the HASH MSP. |
mbed_official | 242:7074e42da0b2 | 234 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 235 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 236 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 237 | */ |
mbed_official | 133:d4dda5c437f0 | 238 | __weak void HAL_HASH_MspInit(HASH_HandleTypeDef *hhash) |
mbed_official | 133:d4dda5c437f0 | 239 | { |
mbed_official | 133:d4dda5c437f0 | 240 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 241 | the HAL_HASH_MspInit could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 242 | */ |
mbed_official | 133:d4dda5c437f0 | 243 | } |
mbed_official | 133:d4dda5c437f0 | 244 | |
mbed_official | 133:d4dda5c437f0 | 245 | /** |
mbed_official | 133:d4dda5c437f0 | 246 | * @brief DeInitializes HASH MSP. |
mbed_official | 242:7074e42da0b2 | 247 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 248 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 249 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 250 | */ |
mbed_official | 133:d4dda5c437f0 | 251 | __weak void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash) |
mbed_official | 133:d4dda5c437f0 | 252 | { |
mbed_official | 133:d4dda5c437f0 | 253 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 254 | the HAL_HASH_MspDeInit could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 255 | */ |
mbed_official | 133:d4dda5c437f0 | 256 | } |
mbed_official | 133:d4dda5c437f0 | 257 | |
mbed_official | 133:d4dda5c437f0 | 258 | /** |
mbed_official | 133:d4dda5c437f0 | 259 | * @brief Input data transfer complete callback. |
mbed_official | 242:7074e42da0b2 | 260 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 261 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 262 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 263 | */ |
mbed_official | 133:d4dda5c437f0 | 264 | __weak void HAL_HASH_InCpltCallback(HASH_HandleTypeDef *hhash) |
mbed_official | 133:d4dda5c437f0 | 265 | { |
mbed_official | 133:d4dda5c437f0 | 266 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 267 | the HAL_HASH_InCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 268 | */ |
mbed_official | 133:d4dda5c437f0 | 269 | } |
mbed_official | 133:d4dda5c437f0 | 270 | |
mbed_official | 133:d4dda5c437f0 | 271 | /** |
mbed_official | 133:d4dda5c437f0 | 272 | * @brief Data transfer Error callback. |
mbed_official | 242:7074e42da0b2 | 273 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 274 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 275 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 276 | */ |
mbed_official | 133:d4dda5c437f0 | 277 | __weak void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash) |
mbed_official | 133:d4dda5c437f0 | 278 | { |
mbed_official | 133:d4dda5c437f0 | 279 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 280 | the HAL_HASH_ErrorCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 281 | */ |
mbed_official | 133:d4dda5c437f0 | 282 | } |
mbed_official | 133:d4dda5c437f0 | 283 | |
mbed_official | 133:d4dda5c437f0 | 284 | /** |
mbed_official | 133:d4dda5c437f0 | 285 | * @brief Digest computation complete callback. It is used only with interrupt. |
mbed_official | 133:d4dda5c437f0 | 286 | * @note This callback is not relevant with DMA. |
mbed_official | 242:7074e42da0b2 | 287 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 288 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 289 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 290 | */ |
mbed_official | 133:d4dda5c437f0 | 291 | __weak void HAL_HASH_DgstCpltCallback(HASH_HandleTypeDef *hhash) |
mbed_official | 133:d4dda5c437f0 | 292 | { |
mbed_official | 133:d4dda5c437f0 | 293 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 294 | the HAL_HASH_DgstCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 295 | */ |
mbed_official | 133:d4dda5c437f0 | 296 | } |
mbed_official | 133:d4dda5c437f0 | 297 | |
mbed_official | 133:d4dda5c437f0 | 298 | /** |
mbed_official | 133:d4dda5c437f0 | 299 | * @} |
mbed_official | 133:d4dda5c437f0 | 300 | */ |
mbed_official | 133:d4dda5c437f0 | 301 | |
mbed_official | 133:d4dda5c437f0 | 302 | /** @defgroup HASH_Group2 HASH processing functions using polling mode |
mbed_official | 133:d4dda5c437f0 | 303 | * @brief processing functions using polling mode |
mbed_official | 133:d4dda5c437f0 | 304 | * |
mbed_official | 133:d4dda5c437f0 | 305 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 306 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 307 | ##### HASH processing using polling mode functions##### |
mbed_official | 133:d4dda5c437f0 | 308 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 309 | [..] This section provides functions allowing to calculate in polling mode |
mbed_official | 133:d4dda5c437f0 | 310 | the hash value using one of the following algorithms: |
mbed_official | 133:d4dda5c437f0 | 311 | (+) MD5 |
mbed_official | 133:d4dda5c437f0 | 312 | (+) SHA1 |
mbed_official | 133:d4dda5c437f0 | 313 | |
mbed_official | 133:d4dda5c437f0 | 314 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 315 | * @{ |
mbed_official | 133:d4dda5c437f0 | 316 | */ |
mbed_official | 133:d4dda5c437f0 | 317 | |
mbed_official | 133:d4dda5c437f0 | 318 | /** |
mbed_official | 133:d4dda5c437f0 | 319 | * @brief Initializes the HASH peripheral in MD5 mode then processes pInBuffer. |
mbed_official | 133:d4dda5c437f0 | 320 | The digest is available in pOutBuffer. |
mbed_official | 242:7074e42da0b2 | 321 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 322 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 323 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 324 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 325 | * If the Size is multiple of 64 bytes, appending the input buffer is possible. |
mbed_official | 133:d4dda5c437f0 | 326 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware |
mbed_official | 133:d4dda5c437f0 | 327 | * and appending the input buffer is no more possible. |
mbed_official | 133:d4dda5c437f0 | 328 | * @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes. |
mbed_official | 133:d4dda5c437f0 | 329 | * @param Timeout: Timeout value |
mbed_official | 133:d4dda5c437f0 | 330 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 331 | */ |
mbed_official | 133:d4dda5c437f0 | 332 | HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 333 | { |
mbed_official | 133:d4dda5c437f0 | 334 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 335 | |
mbed_official | 133:d4dda5c437f0 | 336 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 337 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 338 | |
mbed_official | 133:d4dda5c437f0 | 339 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 340 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 341 | |
mbed_official | 133:d4dda5c437f0 | 342 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 343 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 344 | { |
mbed_official | 133:d4dda5c437f0 | 345 | /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute |
mbed_official | 133:d4dda5c437f0 | 346 | the message digest of a new message */ |
mbed_official | 133:d4dda5c437f0 | 347 | HASH->CR |= HASH_AlgoSelection_MD5 | HASH_CR_INIT; |
mbed_official | 133:d4dda5c437f0 | 348 | } |
mbed_official | 133:d4dda5c437f0 | 349 | |
mbed_official | 133:d4dda5c437f0 | 350 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 351 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 352 | |
mbed_official | 133:d4dda5c437f0 | 353 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 354 | __HAL_HASH_SET_NBVALIDBITS(Size); |
mbed_official | 133:d4dda5c437f0 | 355 | |
mbed_official | 133:d4dda5c437f0 | 356 | /* Write input buffer in data register */ |
mbed_official | 133:d4dda5c437f0 | 357 | HASH_WriteData(pInBuffer, Size); |
mbed_official | 133:d4dda5c437f0 | 358 | |
mbed_official | 133:d4dda5c437f0 | 359 | /* Start the digest calculation */ |
mbed_official | 133:d4dda5c437f0 | 360 | __HAL_HASH_START_DIGEST(); |
mbed_official | 133:d4dda5c437f0 | 361 | |
mbed_official | 133:d4dda5c437f0 | 362 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 363 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 364 | |
mbed_official | 133:d4dda5c437f0 | 365 | while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 366 | { |
mbed_official | 133:d4dda5c437f0 | 367 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 368 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 369 | { |
mbed_official | 133:d4dda5c437f0 | 370 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 371 | { |
mbed_official | 133:d4dda5c437f0 | 372 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 373 | hhash->State = HAL_HASH_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 374 | |
mbed_official | 133:d4dda5c437f0 | 375 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 376 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 377 | |
mbed_official | 133:d4dda5c437f0 | 378 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 379 | } |
mbed_official | 133:d4dda5c437f0 | 380 | } |
mbed_official | 133:d4dda5c437f0 | 381 | } |
mbed_official | 133:d4dda5c437f0 | 382 | |
mbed_official | 133:d4dda5c437f0 | 383 | /* Read the message digest */ |
mbed_official | 133:d4dda5c437f0 | 384 | HASH_GetDigest(pOutBuffer, 16); |
mbed_official | 133:d4dda5c437f0 | 385 | |
mbed_official | 133:d4dda5c437f0 | 386 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 387 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 388 | |
mbed_official | 133:d4dda5c437f0 | 389 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 390 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 391 | |
mbed_official | 133:d4dda5c437f0 | 392 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 393 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 394 | } |
mbed_official | 133:d4dda5c437f0 | 395 | |
mbed_official | 133:d4dda5c437f0 | 396 | /** |
mbed_official | 133:d4dda5c437f0 | 397 | * @brief Initializes the HASH peripheral in MD5 mode then writes the pInBuffer. |
mbed_official | 242:7074e42da0b2 | 398 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 399 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 400 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 401 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 402 | * If the Size is multiple of 64 bytes, appending the input buffer is possible. |
mbed_official | 133:d4dda5c437f0 | 403 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware |
mbed_official | 133:d4dda5c437f0 | 404 | * and appending the input buffer is no more possible. |
mbed_official | 133:d4dda5c437f0 | 405 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 406 | */ |
mbed_official | 133:d4dda5c437f0 | 407 | HAL_StatusTypeDef HAL_HASH_MD5_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) |
mbed_official | 133:d4dda5c437f0 | 408 | { |
mbed_official | 133:d4dda5c437f0 | 409 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 410 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 411 | |
mbed_official | 133:d4dda5c437f0 | 412 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 413 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 414 | |
mbed_official | 133:d4dda5c437f0 | 415 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 416 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 417 | { |
mbed_official | 133:d4dda5c437f0 | 418 | /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute |
mbed_official | 133:d4dda5c437f0 | 419 | the message digest of a new message */ |
mbed_official | 133:d4dda5c437f0 | 420 | HASH->CR |= HASH_AlgoSelection_MD5 | HASH_CR_INIT; |
mbed_official | 133:d4dda5c437f0 | 421 | } |
mbed_official | 133:d4dda5c437f0 | 422 | |
mbed_official | 133:d4dda5c437f0 | 423 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 424 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 425 | |
mbed_official | 133:d4dda5c437f0 | 426 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 427 | __HAL_HASH_SET_NBVALIDBITS(Size); |
mbed_official | 133:d4dda5c437f0 | 428 | |
mbed_official | 133:d4dda5c437f0 | 429 | /* Write input buffer in data register */ |
mbed_official | 133:d4dda5c437f0 | 430 | HASH_WriteData(pInBuffer, Size); |
mbed_official | 133:d4dda5c437f0 | 431 | |
mbed_official | 133:d4dda5c437f0 | 432 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 433 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 434 | |
mbed_official | 133:d4dda5c437f0 | 435 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 436 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 437 | |
mbed_official | 133:d4dda5c437f0 | 438 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 439 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 440 | } |
mbed_official | 133:d4dda5c437f0 | 441 | |
mbed_official | 133:d4dda5c437f0 | 442 | /** |
mbed_official | 133:d4dda5c437f0 | 443 | * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer. |
mbed_official | 133:d4dda5c437f0 | 444 | The digest is available in pOutBuffer. |
mbed_official | 242:7074e42da0b2 | 445 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 446 | * the configuration information for HASH module |
mbed_official | 242:7074e42da0b2 | 447 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 448 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 449 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware. |
mbed_official | 133:d4dda5c437f0 | 450 | * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes. |
mbed_official | 133:d4dda5c437f0 | 451 | * @param Timeout: Timeout value |
mbed_official | 133:d4dda5c437f0 | 452 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 453 | */ |
mbed_official | 133:d4dda5c437f0 | 454 | HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 455 | { |
mbed_official | 133:d4dda5c437f0 | 456 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 457 | |
mbed_official | 133:d4dda5c437f0 | 458 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 459 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 460 | |
mbed_official | 133:d4dda5c437f0 | 461 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 462 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 463 | |
mbed_official | 133:d4dda5c437f0 | 464 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 465 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 466 | { |
mbed_official | 133:d4dda5c437f0 | 467 | /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute |
mbed_official | 133:d4dda5c437f0 | 468 | the message digest of a new message */ |
mbed_official | 133:d4dda5c437f0 | 469 | HASH->CR |= HASH_AlgoSelection_SHA1 | HASH_CR_INIT; |
mbed_official | 133:d4dda5c437f0 | 470 | } |
mbed_official | 133:d4dda5c437f0 | 471 | |
mbed_official | 133:d4dda5c437f0 | 472 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 473 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 474 | |
mbed_official | 133:d4dda5c437f0 | 475 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 476 | __HAL_HASH_SET_NBVALIDBITS(Size); |
mbed_official | 133:d4dda5c437f0 | 477 | |
mbed_official | 133:d4dda5c437f0 | 478 | /* Write input buffer in data register */ |
mbed_official | 133:d4dda5c437f0 | 479 | HASH_WriteData(pInBuffer, Size); |
mbed_official | 133:d4dda5c437f0 | 480 | |
mbed_official | 133:d4dda5c437f0 | 481 | /* Start the digest calculation */ |
mbed_official | 133:d4dda5c437f0 | 482 | __HAL_HASH_START_DIGEST(); |
mbed_official | 133:d4dda5c437f0 | 483 | |
mbed_official | 133:d4dda5c437f0 | 484 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 485 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 486 | |
mbed_official | 133:d4dda5c437f0 | 487 | while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 488 | { |
mbed_official | 133:d4dda5c437f0 | 489 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 490 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 491 | { |
mbed_official | 133:d4dda5c437f0 | 492 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 493 | { |
mbed_official | 133:d4dda5c437f0 | 494 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 495 | hhash->State = HAL_HASH_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 496 | |
mbed_official | 133:d4dda5c437f0 | 497 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 498 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 499 | |
mbed_official | 133:d4dda5c437f0 | 500 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 501 | } |
mbed_official | 133:d4dda5c437f0 | 502 | } |
mbed_official | 133:d4dda5c437f0 | 503 | } |
mbed_official | 133:d4dda5c437f0 | 504 | |
mbed_official | 133:d4dda5c437f0 | 505 | /* Read the message digest */ |
mbed_official | 133:d4dda5c437f0 | 506 | HASH_GetDigest(pOutBuffer, 20); |
mbed_official | 133:d4dda5c437f0 | 507 | |
mbed_official | 133:d4dda5c437f0 | 508 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 509 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 510 | |
mbed_official | 133:d4dda5c437f0 | 511 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 512 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 513 | |
mbed_official | 133:d4dda5c437f0 | 514 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 515 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 516 | } |
mbed_official | 133:d4dda5c437f0 | 517 | |
mbed_official | 133:d4dda5c437f0 | 518 | /** |
mbed_official | 133:d4dda5c437f0 | 519 | * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer. |
mbed_official | 133:d4dda5c437f0 | 520 | The digest is available in pOutBuffer. |
mbed_official | 242:7074e42da0b2 | 521 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 522 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 523 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 524 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 525 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware. |
mbed_official | 133:d4dda5c437f0 | 526 | * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes. |
mbed_official | 133:d4dda5c437f0 | 527 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 528 | */ |
mbed_official | 133:d4dda5c437f0 | 529 | HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) |
mbed_official | 133:d4dda5c437f0 | 530 | { |
mbed_official | 133:d4dda5c437f0 | 531 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 532 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 533 | |
mbed_official | 133:d4dda5c437f0 | 534 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 535 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 536 | |
mbed_official | 133:d4dda5c437f0 | 537 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 538 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 539 | { |
mbed_official | 133:d4dda5c437f0 | 540 | /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute |
mbed_official | 133:d4dda5c437f0 | 541 | the message digest of a new message */ |
mbed_official | 133:d4dda5c437f0 | 542 | HASH->CR |= HASH_AlgoSelection_SHA1 | HASH_CR_INIT; |
mbed_official | 133:d4dda5c437f0 | 543 | } |
mbed_official | 133:d4dda5c437f0 | 544 | |
mbed_official | 133:d4dda5c437f0 | 545 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 546 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 547 | |
mbed_official | 133:d4dda5c437f0 | 548 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 549 | __HAL_HASH_SET_NBVALIDBITS(Size); |
mbed_official | 133:d4dda5c437f0 | 550 | |
mbed_official | 133:d4dda5c437f0 | 551 | /* Write input buffer in data register */ |
mbed_official | 133:d4dda5c437f0 | 552 | HASH_WriteData(pInBuffer, Size); |
mbed_official | 133:d4dda5c437f0 | 553 | |
mbed_official | 133:d4dda5c437f0 | 554 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 555 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 556 | |
mbed_official | 133:d4dda5c437f0 | 557 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 558 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 559 | |
mbed_official | 133:d4dda5c437f0 | 560 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 561 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 562 | } |
mbed_official | 133:d4dda5c437f0 | 563 | |
mbed_official | 133:d4dda5c437f0 | 564 | /** |
mbed_official | 133:d4dda5c437f0 | 565 | * @} |
mbed_official | 133:d4dda5c437f0 | 566 | */ |
mbed_official | 133:d4dda5c437f0 | 567 | |
mbed_official | 133:d4dda5c437f0 | 568 | /** @defgroup HASH_Group3 HASH processing functions using interrupt mode |
mbed_official | 133:d4dda5c437f0 | 569 | * @brief processing functions using interrupt mode. |
mbed_official | 133:d4dda5c437f0 | 570 | * |
mbed_official | 133:d4dda5c437f0 | 571 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 572 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 573 | ##### HASH processing using interrupt mode functions ##### |
mbed_official | 133:d4dda5c437f0 | 574 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 575 | [..] This section provides functions allowing to calculate in interrupt mode |
mbed_official | 133:d4dda5c437f0 | 576 | the hash value using one of the following algorithms: |
mbed_official | 133:d4dda5c437f0 | 577 | (+) MD5 |
mbed_official | 133:d4dda5c437f0 | 578 | (+) SHA1 |
mbed_official | 133:d4dda5c437f0 | 579 | |
mbed_official | 133:d4dda5c437f0 | 580 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 581 | * @{ |
mbed_official | 133:d4dda5c437f0 | 582 | */ |
mbed_official | 133:d4dda5c437f0 | 583 | |
mbed_official | 133:d4dda5c437f0 | 584 | /** |
mbed_official | 133:d4dda5c437f0 | 585 | * @brief Initializes the HASH peripheral in MD5 mode then processes pInBuffer. |
mbed_official | 133:d4dda5c437f0 | 586 | * The digest is available in pOutBuffer. |
mbed_official | 242:7074e42da0b2 | 587 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 588 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 589 | * @param pOutBuffer: Pointer to the Output buffer (hashed buffer). |
mbed_official | 133:d4dda5c437f0 | 590 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 591 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware. |
mbed_official | 133:d4dda5c437f0 | 592 | * @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes. |
mbed_official | 133:d4dda5c437f0 | 593 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 594 | */ |
mbed_official | 133:d4dda5c437f0 | 595 | HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer) |
mbed_official | 133:d4dda5c437f0 | 596 | { |
mbed_official | 133:d4dda5c437f0 | 597 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 598 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 599 | uint32_t buffercounter; |
mbed_official | 133:d4dda5c437f0 | 600 | uint32_t inputcounter; |
mbed_official | 133:d4dda5c437f0 | 601 | |
mbed_official | 133:d4dda5c437f0 | 602 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 603 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 604 | |
mbed_official | 133:d4dda5c437f0 | 605 | if(hhash->HashITCounter == 0) |
mbed_official | 133:d4dda5c437f0 | 606 | { |
mbed_official | 133:d4dda5c437f0 | 607 | hhash->HashITCounter = 1; |
mbed_official | 133:d4dda5c437f0 | 608 | } |
mbed_official | 133:d4dda5c437f0 | 609 | else |
mbed_official | 133:d4dda5c437f0 | 610 | { |
mbed_official | 133:d4dda5c437f0 | 611 | hhash->HashITCounter = 0; |
mbed_official | 133:d4dda5c437f0 | 612 | } |
mbed_official | 133:d4dda5c437f0 | 613 | if(hhash->State == HAL_HASH_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 614 | { |
mbed_official | 133:d4dda5c437f0 | 615 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 616 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 617 | |
mbed_official | 133:d4dda5c437f0 | 618 | hhash->HashInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 619 | hhash->pHashInBuffPtr = pInBuffer; |
mbed_official | 133:d4dda5c437f0 | 620 | hhash->pHashOutBuffPtr = pOutBuffer; |
mbed_official | 133:d4dda5c437f0 | 621 | |
mbed_official | 133:d4dda5c437f0 | 622 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 623 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 624 | { |
mbed_official | 133:d4dda5c437f0 | 625 | /* Select the SHA1 mode */ |
mbed_official | 133:d4dda5c437f0 | 626 | HASH->CR |= HASH_AlgoSelection_MD5; |
mbed_official | 133:d4dda5c437f0 | 627 | /* Reset the HASH processor core, so that the HASH will be ready to compute |
mbed_official | 133:d4dda5c437f0 | 628 | the message digest of a new message */ |
mbed_official | 133:d4dda5c437f0 | 629 | HASH->CR |= HASH_CR_INIT; |
mbed_official | 133:d4dda5c437f0 | 630 | } |
mbed_official | 133:d4dda5c437f0 | 631 | |
mbed_official | 133:d4dda5c437f0 | 632 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 633 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 634 | |
mbed_official | 133:d4dda5c437f0 | 635 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 636 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 637 | |
mbed_official | 133:d4dda5c437f0 | 638 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 639 | HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI); |
mbed_official | 133:d4dda5c437f0 | 640 | |
mbed_official | 133:d4dda5c437f0 | 641 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 642 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 643 | } |
mbed_official | 133:d4dda5c437f0 | 644 | if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS)) |
mbed_official | 133:d4dda5c437f0 | 645 | { |
mbed_official | 133:d4dda5c437f0 | 646 | outputaddr = (uint32_t)hhash->pHashOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 647 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 648 | *(uint32_t*)(outputaddr) = __REV(HASH->HR[0]); |
mbed_official | 133:d4dda5c437f0 | 649 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 650 | *(uint32_t*)(outputaddr) = __REV(HASH->HR[1]); |
mbed_official | 133:d4dda5c437f0 | 651 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 652 | *(uint32_t*)(outputaddr) = __REV(HASH->HR[2]); |
mbed_official | 133:d4dda5c437f0 | 653 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 654 | *(uint32_t*)(outputaddr) = __REV(HASH->HR[3]); |
mbed_official | 133:d4dda5c437f0 | 655 | |
mbed_official | 133:d4dda5c437f0 | 656 | if(hhash->HashInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 657 | { |
mbed_official | 133:d4dda5c437f0 | 658 | /* Disable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 659 | HASH->IMR = 0; |
mbed_official | 133:d4dda5c437f0 | 660 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 661 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 662 | /* Call digest computation complete callback */ |
mbed_official | 133:d4dda5c437f0 | 663 | HAL_HASH_DgstCpltCallback(hhash); |
mbed_official | 133:d4dda5c437f0 | 664 | } |
mbed_official | 133:d4dda5c437f0 | 665 | } |
mbed_official | 133:d4dda5c437f0 | 666 | if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS)) |
mbed_official | 133:d4dda5c437f0 | 667 | { |
mbed_official | 133:d4dda5c437f0 | 668 | if(hhash->HashInCount > 64) |
mbed_official | 133:d4dda5c437f0 | 669 | { |
mbed_official | 133:d4dda5c437f0 | 670 | inputaddr = (uint32_t)hhash->pHashInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 671 | /* Write the Input block in the Data IN register */ |
mbed_official | 133:d4dda5c437f0 | 672 | for(buffercounter = 0; buffercounter < 64; buffercounter+=4) |
mbed_official | 133:d4dda5c437f0 | 673 | { |
mbed_official | 133:d4dda5c437f0 | 674 | HASH->DIN = *(uint32_t*)inputaddr; |
mbed_official | 133:d4dda5c437f0 | 675 | } |
mbed_official | 133:d4dda5c437f0 | 676 | if(hhash->HashITCounter == 0) |
mbed_official | 133:d4dda5c437f0 | 677 | { |
mbed_official | 133:d4dda5c437f0 | 678 | HASH->DIN = *(uint32_t*)inputaddr; |
mbed_official | 133:d4dda5c437f0 | 679 | |
mbed_official | 133:d4dda5c437f0 | 680 | if(hhash->HashInCount >= 68) |
mbed_official | 133:d4dda5c437f0 | 681 | { |
mbed_official | 133:d4dda5c437f0 | 682 | /* Decrement buffer counter */ |
mbed_official | 133:d4dda5c437f0 | 683 | hhash->HashInCount -= 68; |
mbed_official | 133:d4dda5c437f0 | 684 | hhash->pHashInBuffPtr+= 68; |
mbed_official | 133:d4dda5c437f0 | 685 | } |
mbed_official | 133:d4dda5c437f0 | 686 | else |
mbed_official | 133:d4dda5c437f0 | 687 | { |
mbed_official | 133:d4dda5c437f0 | 688 | hhash->HashInCount -= 64; |
mbed_official | 133:d4dda5c437f0 | 689 | } |
mbed_official | 133:d4dda5c437f0 | 690 | } |
mbed_official | 133:d4dda5c437f0 | 691 | else |
mbed_official | 133:d4dda5c437f0 | 692 | { |
mbed_official | 133:d4dda5c437f0 | 693 | /* Decrement buffer counter */ |
mbed_official | 133:d4dda5c437f0 | 694 | hhash->HashInCount -= 64; |
mbed_official | 133:d4dda5c437f0 | 695 | hhash->pHashInBuffPtr+= 64; |
mbed_official | 133:d4dda5c437f0 | 696 | } |
mbed_official | 133:d4dda5c437f0 | 697 | } |
mbed_official | 133:d4dda5c437f0 | 698 | else |
mbed_official | 133:d4dda5c437f0 | 699 | { |
mbed_official | 133:d4dda5c437f0 | 700 | /* Get the buffer address */ |
mbed_official | 133:d4dda5c437f0 | 701 | inputaddr = (uint32_t)hhash->pHashInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 702 | /* Get the buffer counter */ |
mbed_official | 133:d4dda5c437f0 | 703 | inputcounter = hhash->HashInCount; |
mbed_official | 133:d4dda5c437f0 | 704 | /* Disable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 705 | HASH->IMR &= ~(HASH_IT_DINI); |
mbed_official | 133:d4dda5c437f0 | 706 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 707 | __HAL_HASH_SET_NBVALIDBITS(inputcounter); |
mbed_official | 133:d4dda5c437f0 | 708 | |
mbed_official | 133:d4dda5c437f0 | 709 | if((inputcounter > 4) && (inputcounter%4)) |
mbed_official | 133:d4dda5c437f0 | 710 | { |
mbed_official | 133:d4dda5c437f0 | 711 | inputcounter = (inputcounter+4-inputcounter%4); |
mbed_official | 133:d4dda5c437f0 | 712 | } |
mbed_official | 133:d4dda5c437f0 | 713 | |
mbed_official | 133:d4dda5c437f0 | 714 | /* Write the Input block in the Data IN register */ |
mbed_official | 133:d4dda5c437f0 | 715 | for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++) |
mbed_official | 133:d4dda5c437f0 | 716 | { |
mbed_official | 133:d4dda5c437f0 | 717 | HASH->DIN = *(uint32_t*)inputaddr; |
mbed_official | 133:d4dda5c437f0 | 718 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 719 | } |
mbed_official | 133:d4dda5c437f0 | 720 | /* Start the digest calculation */ |
mbed_official | 133:d4dda5c437f0 | 721 | __HAL_HASH_START_DIGEST(); |
mbed_official | 133:d4dda5c437f0 | 722 | /* Reset buffer counter */ |
mbed_official | 133:d4dda5c437f0 | 723 | hhash->HashInCount = 0; |
mbed_official | 133:d4dda5c437f0 | 724 | } |
mbed_official | 133:d4dda5c437f0 | 725 | /* Call Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 726 | HAL_HASH_InCpltCallback(hhash); |
mbed_official | 133:d4dda5c437f0 | 727 | } |
mbed_official | 133:d4dda5c437f0 | 728 | |
mbed_official | 133:d4dda5c437f0 | 729 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 730 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 731 | |
mbed_official | 133:d4dda5c437f0 | 732 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 733 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 734 | } |
mbed_official | 133:d4dda5c437f0 | 735 | |
mbed_official | 133:d4dda5c437f0 | 736 | /** |
mbed_official | 133:d4dda5c437f0 | 737 | * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer. |
mbed_official | 133:d4dda5c437f0 | 738 | * The digest is available in pOutBuffer. |
mbed_official | 242:7074e42da0b2 | 739 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 740 | * the configuration information for HASH module |
mbed_official | 242:7074e42da0b2 | 741 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 742 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 743 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware. |
mbed_official | 133:d4dda5c437f0 | 744 | * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes. |
mbed_official | 133:d4dda5c437f0 | 745 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 746 | */ |
mbed_official | 133:d4dda5c437f0 | 747 | HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer) |
mbed_official | 133:d4dda5c437f0 | 748 | { |
mbed_official | 133:d4dda5c437f0 | 749 | uint32_t inputaddr; |
mbed_official | 133:d4dda5c437f0 | 750 | uint32_t outputaddr; |
mbed_official | 133:d4dda5c437f0 | 751 | uint32_t buffercounter; |
mbed_official | 133:d4dda5c437f0 | 752 | uint32_t inputcounter; |
mbed_official | 133:d4dda5c437f0 | 753 | |
mbed_official | 133:d4dda5c437f0 | 754 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 755 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 756 | |
mbed_official | 133:d4dda5c437f0 | 757 | if(hhash->HashITCounter == 0) |
mbed_official | 133:d4dda5c437f0 | 758 | { |
mbed_official | 133:d4dda5c437f0 | 759 | hhash->HashITCounter = 1; |
mbed_official | 133:d4dda5c437f0 | 760 | } |
mbed_official | 133:d4dda5c437f0 | 761 | else |
mbed_official | 133:d4dda5c437f0 | 762 | { |
mbed_official | 133:d4dda5c437f0 | 763 | hhash->HashITCounter = 0; |
mbed_official | 133:d4dda5c437f0 | 764 | } |
mbed_official | 133:d4dda5c437f0 | 765 | if(hhash->State == HAL_HASH_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 766 | { |
mbed_official | 133:d4dda5c437f0 | 767 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 768 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 769 | |
mbed_official | 133:d4dda5c437f0 | 770 | hhash->HashInCount = Size; |
mbed_official | 133:d4dda5c437f0 | 771 | hhash->pHashInBuffPtr = pInBuffer; |
mbed_official | 133:d4dda5c437f0 | 772 | hhash->pHashOutBuffPtr = pOutBuffer; |
mbed_official | 133:d4dda5c437f0 | 773 | |
mbed_official | 133:d4dda5c437f0 | 774 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 775 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 776 | { |
mbed_official | 133:d4dda5c437f0 | 777 | /* Select the SHA1 mode */ |
mbed_official | 133:d4dda5c437f0 | 778 | HASH->CR |= HASH_AlgoSelection_SHA1; |
mbed_official | 133:d4dda5c437f0 | 779 | /* Reset the HASH processor core, so that the HASH will be ready to compute |
mbed_official | 133:d4dda5c437f0 | 780 | the message digest of a new message */ |
mbed_official | 133:d4dda5c437f0 | 781 | HASH->CR |= HASH_CR_INIT; |
mbed_official | 133:d4dda5c437f0 | 782 | } |
mbed_official | 133:d4dda5c437f0 | 783 | |
mbed_official | 133:d4dda5c437f0 | 784 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 785 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 786 | |
mbed_official | 133:d4dda5c437f0 | 787 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 788 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 789 | |
mbed_official | 133:d4dda5c437f0 | 790 | /* Enable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 791 | HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI); |
mbed_official | 133:d4dda5c437f0 | 792 | |
mbed_official | 133:d4dda5c437f0 | 793 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 794 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 795 | } |
mbed_official | 133:d4dda5c437f0 | 796 | if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS)) |
mbed_official | 133:d4dda5c437f0 | 797 | { |
mbed_official | 133:d4dda5c437f0 | 798 | outputaddr = (uint32_t)hhash->pHashOutBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 799 | /* Read the Output block from the Output FIFO */ |
mbed_official | 133:d4dda5c437f0 | 800 | *(uint32_t*)(outputaddr) = __REV(HASH->HR[0]); |
mbed_official | 133:d4dda5c437f0 | 801 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 802 | *(uint32_t*)(outputaddr) = __REV(HASH->HR[1]); |
mbed_official | 133:d4dda5c437f0 | 803 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 804 | *(uint32_t*)(outputaddr) = __REV(HASH->HR[2]); |
mbed_official | 133:d4dda5c437f0 | 805 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 806 | *(uint32_t*)(outputaddr) = __REV(HASH->HR[3]); |
mbed_official | 133:d4dda5c437f0 | 807 | outputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 808 | *(uint32_t*)(outputaddr) = __REV(HASH->HR[4]); |
mbed_official | 133:d4dda5c437f0 | 809 | if(hhash->HashInCount == 0) |
mbed_official | 133:d4dda5c437f0 | 810 | { |
mbed_official | 133:d4dda5c437f0 | 811 | /* Disable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 812 | HASH->IMR = 0; |
mbed_official | 133:d4dda5c437f0 | 813 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 814 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 815 | /* Call digest computation complete callback */ |
mbed_official | 133:d4dda5c437f0 | 816 | HAL_HASH_DgstCpltCallback(hhash); |
mbed_official | 133:d4dda5c437f0 | 817 | } |
mbed_official | 133:d4dda5c437f0 | 818 | } |
mbed_official | 133:d4dda5c437f0 | 819 | if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS)) |
mbed_official | 133:d4dda5c437f0 | 820 | { |
mbed_official | 133:d4dda5c437f0 | 821 | if(hhash->HashInCount > 64) |
mbed_official | 133:d4dda5c437f0 | 822 | { |
mbed_official | 133:d4dda5c437f0 | 823 | inputaddr = (uint32_t)hhash->pHashInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 824 | /* Write the Input block in the Data IN register */ |
mbed_official | 133:d4dda5c437f0 | 825 | for(buffercounter = 0; buffercounter < 64; buffercounter+=4) |
mbed_official | 133:d4dda5c437f0 | 826 | { |
mbed_official | 133:d4dda5c437f0 | 827 | HASH->DIN = *(uint32_t*)inputaddr; |
mbed_official | 133:d4dda5c437f0 | 828 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 829 | } |
mbed_official | 133:d4dda5c437f0 | 830 | if(hhash->HashITCounter == 0) |
mbed_official | 133:d4dda5c437f0 | 831 | { |
mbed_official | 133:d4dda5c437f0 | 832 | HASH->DIN = *(uint32_t*)inputaddr; |
mbed_official | 133:d4dda5c437f0 | 833 | |
mbed_official | 133:d4dda5c437f0 | 834 | if(hhash->HashInCount >= 68) |
mbed_official | 133:d4dda5c437f0 | 835 | { |
mbed_official | 133:d4dda5c437f0 | 836 | /* Decrement buffer counter */ |
mbed_official | 133:d4dda5c437f0 | 837 | hhash->HashInCount -= 68; |
mbed_official | 133:d4dda5c437f0 | 838 | hhash->pHashInBuffPtr+= 68; |
mbed_official | 133:d4dda5c437f0 | 839 | } |
mbed_official | 133:d4dda5c437f0 | 840 | else |
mbed_official | 133:d4dda5c437f0 | 841 | { |
mbed_official | 133:d4dda5c437f0 | 842 | hhash->HashInCount -= 64; |
mbed_official | 133:d4dda5c437f0 | 843 | } |
mbed_official | 133:d4dda5c437f0 | 844 | } |
mbed_official | 133:d4dda5c437f0 | 845 | else |
mbed_official | 133:d4dda5c437f0 | 846 | { |
mbed_official | 133:d4dda5c437f0 | 847 | /* Decrement buffer counter */ |
mbed_official | 133:d4dda5c437f0 | 848 | hhash->HashInCount -= 64; |
mbed_official | 133:d4dda5c437f0 | 849 | hhash->pHashInBuffPtr+= 64; |
mbed_official | 133:d4dda5c437f0 | 850 | } |
mbed_official | 133:d4dda5c437f0 | 851 | } |
mbed_official | 133:d4dda5c437f0 | 852 | else |
mbed_official | 133:d4dda5c437f0 | 853 | { |
mbed_official | 133:d4dda5c437f0 | 854 | /* Get the buffer address */ |
mbed_official | 133:d4dda5c437f0 | 855 | inputaddr = (uint32_t)hhash->pHashInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 856 | /* Get the buffer counter */ |
mbed_official | 133:d4dda5c437f0 | 857 | inputcounter = hhash->HashInCount; |
mbed_official | 133:d4dda5c437f0 | 858 | /* Disable Interrupts */ |
mbed_official | 133:d4dda5c437f0 | 859 | HASH->IMR &= ~(HASH_IT_DINI); |
mbed_official | 133:d4dda5c437f0 | 860 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 861 | __HAL_HASH_SET_NBVALIDBITS(inputcounter); |
mbed_official | 133:d4dda5c437f0 | 862 | |
mbed_official | 133:d4dda5c437f0 | 863 | if((inputcounter > 4) && (inputcounter%4)) |
mbed_official | 133:d4dda5c437f0 | 864 | { |
mbed_official | 133:d4dda5c437f0 | 865 | inputcounter = (inputcounter+4-inputcounter%4); |
mbed_official | 133:d4dda5c437f0 | 866 | } |
mbed_official | 133:d4dda5c437f0 | 867 | |
mbed_official | 133:d4dda5c437f0 | 868 | /* Write the Input block in the Data IN register */ |
mbed_official | 133:d4dda5c437f0 | 869 | for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++) |
mbed_official | 133:d4dda5c437f0 | 870 | { |
mbed_official | 133:d4dda5c437f0 | 871 | HASH->DIN = *(uint32_t*)inputaddr; |
mbed_official | 133:d4dda5c437f0 | 872 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 873 | } |
mbed_official | 133:d4dda5c437f0 | 874 | /* Start the digest calculation */ |
mbed_official | 133:d4dda5c437f0 | 875 | __HAL_HASH_START_DIGEST(); |
mbed_official | 133:d4dda5c437f0 | 876 | /* Reset buffer counter */ |
mbed_official | 133:d4dda5c437f0 | 877 | hhash->HashInCount = 0; |
mbed_official | 133:d4dda5c437f0 | 878 | } |
mbed_official | 133:d4dda5c437f0 | 879 | /* Call Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 880 | HAL_HASH_InCpltCallback(hhash); |
mbed_official | 133:d4dda5c437f0 | 881 | } |
mbed_official | 133:d4dda5c437f0 | 882 | |
mbed_official | 133:d4dda5c437f0 | 883 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 884 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 885 | |
mbed_official | 133:d4dda5c437f0 | 886 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 887 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 888 | } |
mbed_official | 133:d4dda5c437f0 | 889 | |
mbed_official | 133:d4dda5c437f0 | 890 | /** |
mbed_official | 133:d4dda5c437f0 | 891 | * @brief This function handles HASH interrupt request. |
mbed_official | 242:7074e42da0b2 | 892 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 893 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 894 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 895 | */ |
mbed_official | 133:d4dda5c437f0 | 896 | void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash) |
mbed_official | 133:d4dda5c437f0 | 897 | { |
mbed_official | 133:d4dda5c437f0 | 898 | switch(HASH->CR & HASH_CR_ALGO) |
mbed_official | 133:d4dda5c437f0 | 899 | { |
mbed_official | 133:d4dda5c437f0 | 900 | case HASH_AlgoSelection_MD5: |
mbed_official | 133:d4dda5c437f0 | 901 | HAL_HASH_MD5_Start_IT(hhash, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 902 | break; |
mbed_official | 133:d4dda5c437f0 | 903 | |
mbed_official | 133:d4dda5c437f0 | 904 | case HASH_AlgoSelection_SHA1: |
mbed_official | 133:d4dda5c437f0 | 905 | HAL_HASH_SHA1_Start_IT(hhash, NULL, 0, NULL); |
mbed_official | 133:d4dda5c437f0 | 906 | break; |
mbed_official | 133:d4dda5c437f0 | 907 | |
mbed_official | 133:d4dda5c437f0 | 908 | default: |
mbed_official | 133:d4dda5c437f0 | 909 | break; |
mbed_official | 133:d4dda5c437f0 | 910 | } |
mbed_official | 133:d4dda5c437f0 | 911 | } |
mbed_official | 133:d4dda5c437f0 | 912 | |
mbed_official | 133:d4dda5c437f0 | 913 | /** |
mbed_official | 133:d4dda5c437f0 | 914 | * @} |
mbed_official | 133:d4dda5c437f0 | 915 | */ |
mbed_official | 133:d4dda5c437f0 | 916 | |
mbed_official | 133:d4dda5c437f0 | 917 | /** @defgroup HASH_Group4 HASH processing functions using DMA mode |
mbed_official | 133:d4dda5c437f0 | 918 | * @brief processing functions using DMA mode. |
mbed_official | 133:d4dda5c437f0 | 919 | * |
mbed_official | 133:d4dda5c437f0 | 920 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 921 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 922 | ##### HASH processing using DMA mode functions ##### |
mbed_official | 133:d4dda5c437f0 | 923 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 924 | [..] This section provides functions allowing to calculate in DMA mode |
mbed_official | 133:d4dda5c437f0 | 925 | the hash value using one of the following algorithms: |
mbed_official | 133:d4dda5c437f0 | 926 | (+) MD5 |
mbed_official | 133:d4dda5c437f0 | 927 | (+) SHA1 |
mbed_official | 133:d4dda5c437f0 | 928 | |
mbed_official | 133:d4dda5c437f0 | 929 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 930 | * @{ |
mbed_official | 133:d4dda5c437f0 | 931 | */ |
mbed_official | 133:d4dda5c437f0 | 932 | |
mbed_official | 133:d4dda5c437f0 | 933 | /** |
mbed_official | 133:d4dda5c437f0 | 934 | * @brief Initializes the HASH peripheral in MD5 mode then enables DMA to |
mbed_official | 133:d4dda5c437f0 | 935 | control data transfer. Use HAL_HASH_MD5_Finish() to get the digest. |
mbed_official | 242:7074e42da0b2 | 936 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 937 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 938 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 939 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 940 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware. |
mbed_official | 133:d4dda5c437f0 | 941 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 942 | */ |
mbed_official | 133:d4dda5c437f0 | 943 | HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) |
mbed_official | 133:d4dda5c437f0 | 944 | { |
mbed_official | 133:d4dda5c437f0 | 945 | uint32_t inputaddr = (uint32_t)pInBuffer; |
mbed_official | 133:d4dda5c437f0 | 946 | |
mbed_official | 133:d4dda5c437f0 | 947 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 948 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 949 | |
mbed_official | 133:d4dda5c437f0 | 950 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 951 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 952 | |
mbed_official | 133:d4dda5c437f0 | 953 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 954 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 955 | { |
mbed_official | 133:d4dda5c437f0 | 956 | /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute |
mbed_official | 133:d4dda5c437f0 | 957 | the message digest of a new message */ |
mbed_official | 133:d4dda5c437f0 | 958 | HASH->CR |= HASH_AlgoSelection_MD5 | HASH_CR_INIT; |
mbed_official | 133:d4dda5c437f0 | 959 | } |
mbed_official | 133:d4dda5c437f0 | 960 | |
mbed_official | 133:d4dda5c437f0 | 961 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 962 | __HAL_HASH_SET_NBVALIDBITS(Size); |
mbed_official | 133:d4dda5c437f0 | 963 | |
mbed_official | 133:d4dda5c437f0 | 964 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 965 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 966 | |
mbed_official | 133:d4dda5c437f0 | 967 | /* Set the HASH DMA transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 968 | hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt; |
mbed_official | 133:d4dda5c437f0 | 969 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 970 | hhash->hdmain->XferErrorCallback = HASH_DMAError; |
mbed_official | 133:d4dda5c437f0 | 971 | |
mbed_official | 133:d4dda5c437f0 | 972 | /* Enable the DMA In DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 973 | HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4)); |
mbed_official | 133:d4dda5c437f0 | 974 | |
mbed_official | 133:d4dda5c437f0 | 975 | /* Enable DMA requests */ |
mbed_official | 133:d4dda5c437f0 | 976 | HASH->CR |= (HASH_CR_DMAE); |
mbed_official | 133:d4dda5c437f0 | 977 | |
mbed_official | 133:d4dda5c437f0 | 978 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 979 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 980 | |
mbed_official | 133:d4dda5c437f0 | 981 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 982 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 983 | } |
mbed_official | 133:d4dda5c437f0 | 984 | |
mbed_official | 133:d4dda5c437f0 | 985 | /** |
mbed_official | 133:d4dda5c437f0 | 986 | * @brief Returns the computed digest in MD5 mode |
mbed_official | 242:7074e42da0b2 | 987 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 988 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 989 | * @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes. |
mbed_official | 133:d4dda5c437f0 | 990 | * @param Timeout: Timeout value |
mbed_official | 133:d4dda5c437f0 | 991 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 992 | */ |
mbed_official | 133:d4dda5c437f0 | 993 | HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 994 | { |
mbed_official | 133:d4dda5c437f0 | 995 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 996 | |
mbed_official | 133:d4dda5c437f0 | 997 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 998 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 999 | |
mbed_official | 133:d4dda5c437f0 | 1000 | /* Change HASH peripheral state */ |
mbed_official | 133:d4dda5c437f0 | 1001 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1002 | |
mbed_official | 133:d4dda5c437f0 | 1003 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1004 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 1005 | |
mbed_official | 133:d4dda5c437f0 | 1006 | while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS)) |
mbed_official | 133:d4dda5c437f0 | 1007 | { |
mbed_official | 133:d4dda5c437f0 | 1008 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1009 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 1010 | { |
mbed_official | 133:d4dda5c437f0 | 1011 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1012 | { |
mbed_official | 133:d4dda5c437f0 | 1013 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1014 | hhash->State = HAL_HASH_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1015 | |
mbed_official | 133:d4dda5c437f0 | 1016 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1017 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1018 | |
mbed_official | 133:d4dda5c437f0 | 1019 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1020 | } |
mbed_official | 133:d4dda5c437f0 | 1021 | } |
mbed_official | 133:d4dda5c437f0 | 1022 | } |
mbed_official | 133:d4dda5c437f0 | 1023 | |
mbed_official | 133:d4dda5c437f0 | 1024 | /* Read the message digest */ |
mbed_official | 133:d4dda5c437f0 | 1025 | HASH_GetDigest(pOutBuffer, 16); |
mbed_official | 133:d4dda5c437f0 | 1026 | |
mbed_official | 133:d4dda5c437f0 | 1027 | /* Change HASH peripheral state */ |
mbed_official | 133:d4dda5c437f0 | 1028 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1029 | |
mbed_official | 133:d4dda5c437f0 | 1030 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1031 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1032 | |
mbed_official | 133:d4dda5c437f0 | 1033 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1034 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1035 | } |
mbed_official | 133:d4dda5c437f0 | 1036 | |
mbed_official | 133:d4dda5c437f0 | 1037 | /** |
mbed_official | 133:d4dda5c437f0 | 1038 | * @brief Initializes the HASH peripheral in SHA1 mode then enables DMA to |
mbed_official | 133:d4dda5c437f0 | 1039 | control data transfer. Use HAL_HASH_SHA1_Finish() to get the digest. |
mbed_official | 242:7074e42da0b2 | 1040 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1041 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 1042 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 1043 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 1044 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware. |
mbed_official | 133:d4dda5c437f0 | 1045 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1046 | */ |
mbed_official | 133:d4dda5c437f0 | 1047 | HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) |
mbed_official | 133:d4dda5c437f0 | 1048 | { |
mbed_official | 133:d4dda5c437f0 | 1049 | uint32_t inputaddr = (uint32_t)pInBuffer; |
mbed_official | 133:d4dda5c437f0 | 1050 | |
mbed_official | 133:d4dda5c437f0 | 1051 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1052 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1053 | |
mbed_official | 133:d4dda5c437f0 | 1054 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 1055 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1056 | |
mbed_official | 133:d4dda5c437f0 | 1057 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1058 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1059 | { |
mbed_official | 133:d4dda5c437f0 | 1060 | /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute |
mbed_official | 133:d4dda5c437f0 | 1061 | the message digest of a new message */ |
mbed_official | 133:d4dda5c437f0 | 1062 | HASH->CR |= HASH_AlgoSelection_SHA1; |
mbed_official | 133:d4dda5c437f0 | 1063 | HASH->CR |= HASH_CR_INIT; |
mbed_official | 133:d4dda5c437f0 | 1064 | } |
mbed_official | 133:d4dda5c437f0 | 1065 | |
mbed_official | 133:d4dda5c437f0 | 1066 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 1067 | __HAL_HASH_SET_NBVALIDBITS(Size); |
mbed_official | 133:d4dda5c437f0 | 1068 | |
mbed_official | 133:d4dda5c437f0 | 1069 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1070 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1071 | |
mbed_official | 133:d4dda5c437f0 | 1072 | /* Set the HASH DMA transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1073 | hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt; |
mbed_official | 133:d4dda5c437f0 | 1074 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 1075 | hhash->hdmain->XferErrorCallback = HASH_DMAError; |
mbed_official | 133:d4dda5c437f0 | 1076 | |
mbed_official | 133:d4dda5c437f0 | 1077 | /* Enable the DMA In DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 1078 | HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4)); |
mbed_official | 133:d4dda5c437f0 | 1079 | |
mbed_official | 133:d4dda5c437f0 | 1080 | /* Enable DMA requests */ |
mbed_official | 133:d4dda5c437f0 | 1081 | HASH->CR |= (HASH_CR_DMAE); |
mbed_official | 133:d4dda5c437f0 | 1082 | |
mbed_official | 133:d4dda5c437f0 | 1083 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1084 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1085 | |
mbed_official | 133:d4dda5c437f0 | 1086 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1087 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1088 | } |
mbed_official | 133:d4dda5c437f0 | 1089 | |
mbed_official | 133:d4dda5c437f0 | 1090 | /** |
mbed_official | 133:d4dda5c437f0 | 1091 | * @brief Returns the computed digest in SHA1 mode. |
mbed_official | 242:7074e42da0b2 | 1092 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1093 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 1094 | * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes. |
mbed_official | 133:d4dda5c437f0 | 1095 | * @param Timeout: Timeout value |
mbed_official | 133:d4dda5c437f0 | 1096 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1097 | */ |
mbed_official | 133:d4dda5c437f0 | 1098 | HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 1099 | { |
mbed_official | 133:d4dda5c437f0 | 1100 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 1101 | |
mbed_official | 133:d4dda5c437f0 | 1102 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1103 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1104 | |
mbed_official | 133:d4dda5c437f0 | 1105 | /* Change HASH peripheral state */ |
mbed_official | 133:d4dda5c437f0 | 1106 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1107 | |
mbed_official | 133:d4dda5c437f0 | 1108 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1109 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 1110 | while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS)) |
mbed_official | 133:d4dda5c437f0 | 1111 | { |
mbed_official | 133:d4dda5c437f0 | 1112 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1113 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 1114 | { |
mbed_official | 133:d4dda5c437f0 | 1115 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1116 | { |
mbed_official | 133:d4dda5c437f0 | 1117 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1118 | hhash->State = HAL_HASH_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1119 | |
mbed_official | 133:d4dda5c437f0 | 1120 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1121 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1122 | |
mbed_official | 133:d4dda5c437f0 | 1123 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1124 | } |
mbed_official | 133:d4dda5c437f0 | 1125 | } |
mbed_official | 133:d4dda5c437f0 | 1126 | } |
mbed_official | 133:d4dda5c437f0 | 1127 | |
mbed_official | 133:d4dda5c437f0 | 1128 | /* Read the message digest */ |
mbed_official | 133:d4dda5c437f0 | 1129 | HASH_GetDigest(pOutBuffer, 20); |
mbed_official | 133:d4dda5c437f0 | 1130 | |
mbed_official | 133:d4dda5c437f0 | 1131 | /* Change HASH peripheral state */ |
mbed_official | 133:d4dda5c437f0 | 1132 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1133 | |
mbed_official | 133:d4dda5c437f0 | 1134 | /* Process UnLock */ |
mbed_official | 133:d4dda5c437f0 | 1135 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1136 | |
mbed_official | 133:d4dda5c437f0 | 1137 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1138 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1139 | } |
mbed_official | 133:d4dda5c437f0 | 1140 | |
mbed_official | 133:d4dda5c437f0 | 1141 | |
mbed_official | 133:d4dda5c437f0 | 1142 | /** |
mbed_official | 133:d4dda5c437f0 | 1143 | * @} |
mbed_official | 133:d4dda5c437f0 | 1144 | */ |
mbed_official | 133:d4dda5c437f0 | 1145 | |
mbed_official | 133:d4dda5c437f0 | 1146 | /** @defgroup HASH_Group5 HASH-MAC (HMAC) processing functions using polling mode |
mbed_official | 133:d4dda5c437f0 | 1147 | * @brief HMAC processing functions using polling mode . |
mbed_official | 133:d4dda5c437f0 | 1148 | * |
mbed_official | 133:d4dda5c437f0 | 1149 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 1150 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 1151 | ##### HMAC processing using polling mode functions ##### |
mbed_official | 133:d4dda5c437f0 | 1152 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 1153 | [..] This section provides functions allowing to calculate in polling mode |
mbed_official | 133:d4dda5c437f0 | 1154 | the HMAC value using one of the following algorithms: |
mbed_official | 133:d4dda5c437f0 | 1155 | (+) MD5 |
mbed_official | 133:d4dda5c437f0 | 1156 | (+) SHA1 |
mbed_official | 133:d4dda5c437f0 | 1157 | |
mbed_official | 133:d4dda5c437f0 | 1158 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 1159 | * @{ |
mbed_official | 133:d4dda5c437f0 | 1160 | */ |
mbed_official | 133:d4dda5c437f0 | 1161 | |
mbed_official | 133:d4dda5c437f0 | 1162 | /** |
mbed_official | 133:d4dda5c437f0 | 1163 | * @brief Initializes the HASH peripheral in HMAC MD5 mode |
mbed_official | 133:d4dda5c437f0 | 1164 | * then processes pInBuffer. The digest is available in pOutBuffer |
mbed_official | 242:7074e42da0b2 | 1165 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1166 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 1167 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 1168 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 1169 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware. |
mbed_official | 133:d4dda5c437f0 | 1170 | * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes. |
mbed_official | 133:d4dda5c437f0 | 1171 | * @param Timeout: Timeout value |
mbed_official | 133:d4dda5c437f0 | 1172 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1173 | */ |
mbed_official | 133:d4dda5c437f0 | 1174 | HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 1175 | { |
mbed_official | 133:d4dda5c437f0 | 1176 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 1177 | |
mbed_official | 133:d4dda5c437f0 | 1178 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1179 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1180 | |
mbed_official | 133:d4dda5c437f0 | 1181 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 1182 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1183 | |
mbed_official | 133:d4dda5c437f0 | 1184 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1185 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1186 | { |
mbed_official | 133:d4dda5c437f0 | 1187 | /* Check if key size is greater than 64 bytes */ |
mbed_official | 133:d4dda5c437f0 | 1188 | if(hhash->Init.KeySize > 64) |
mbed_official | 133:d4dda5c437f0 | 1189 | { |
mbed_official | 133:d4dda5c437f0 | 1190 | /* Select the HMAC MD5 mode */ |
mbed_official | 133:d4dda5c437f0 | 1191 | HASH->CR |= (HASH_AlgoSelection_MD5 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT); |
mbed_official | 133:d4dda5c437f0 | 1192 | } |
mbed_official | 133:d4dda5c437f0 | 1193 | else |
mbed_official | 133:d4dda5c437f0 | 1194 | { |
mbed_official | 133:d4dda5c437f0 | 1195 | /* Select the HMAC MD5 mode */ |
mbed_official | 133:d4dda5c437f0 | 1196 | HASH->CR |= (HASH_AlgoSelection_MD5 | HASH_AlgoMode_HMAC | HASH_CR_INIT); |
mbed_official | 133:d4dda5c437f0 | 1197 | } |
mbed_official | 133:d4dda5c437f0 | 1198 | } |
mbed_official | 133:d4dda5c437f0 | 1199 | |
mbed_official | 133:d4dda5c437f0 | 1200 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1201 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1202 | |
mbed_official | 133:d4dda5c437f0 | 1203 | /************************** STEP 1 ******************************************/ |
mbed_official | 133:d4dda5c437f0 | 1204 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 1205 | __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1206 | |
mbed_official | 133:d4dda5c437f0 | 1207 | /* Write input buffer in data register */ |
mbed_official | 133:d4dda5c437f0 | 1208 | HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1209 | |
mbed_official | 133:d4dda5c437f0 | 1210 | /* Start the digest calculation */ |
mbed_official | 133:d4dda5c437f0 | 1211 | __HAL_HASH_START_DIGEST(); |
mbed_official | 133:d4dda5c437f0 | 1212 | |
mbed_official | 133:d4dda5c437f0 | 1213 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1214 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 1215 | |
mbed_official | 133:d4dda5c437f0 | 1216 | while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 1217 | { |
mbed_official | 133:d4dda5c437f0 | 1218 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1219 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 1220 | { |
mbed_official | 133:d4dda5c437f0 | 1221 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1222 | { |
mbed_official | 133:d4dda5c437f0 | 1223 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1224 | hhash->State = HAL_HASH_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1225 | |
mbed_official | 133:d4dda5c437f0 | 1226 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1227 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1228 | |
mbed_official | 133:d4dda5c437f0 | 1229 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1230 | } |
mbed_official | 133:d4dda5c437f0 | 1231 | } |
mbed_official | 133:d4dda5c437f0 | 1232 | } |
mbed_official | 133:d4dda5c437f0 | 1233 | /************************** STEP 2 ******************************************/ |
mbed_official | 133:d4dda5c437f0 | 1234 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 1235 | __HAL_HASH_SET_NBVALIDBITS(Size); |
mbed_official | 133:d4dda5c437f0 | 1236 | |
mbed_official | 133:d4dda5c437f0 | 1237 | /* Write input buffer in data register */ |
mbed_official | 133:d4dda5c437f0 | 1238 | HASH_WriteData(pInBuffer, Size); |
mbed_official | 133:d4dda5c437f0 | 1239 | |
mbed_official | 133:d4dda5c437f0 | 1240 | /* Start the digest calculation */ |
mbed_official | 133:d4dda5c437f0 | 1241 | __HAL_HASH_START_DIGEST(); |
mbed_official | 133:d4dda5c437f0 | 1242 | |
mbed_official | 133:d4dda5c437f0 | 1243 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1244 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 1245 | |
mbed_official | 133:d4dda5c437f0 | 1246 | while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 1247 | { |
mbed_official | 133:d4dda5c437f0 | 1248 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1249 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 1250 | { |
mbed_official | 133:d4dda5c437f0 | 1251 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1252 | { |
mbed_official | 133:d4dda5c437f0 | 1253 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1254 | hhash->State = HAL_HASH_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1255 | |
mbed_official | 133:d4dda5c437f0 | 1256 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1257 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1258 | |
mbed_official | 133:d4dda5c437f0 | 1259 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1260 | } |
mbed_official | 133:d4dda5c437f0 | 1261 | } |
mbed_official | 133:d4dda5c437f0 | 1262 | } |
mbed_official | 133:d4dda5c437f0 | 1263 | /************************** STEP 3 ******************************************/ |
mbed_official | 133:d4dda5c437f0 | 1264 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 1265 | __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1266 | |
mbed_official | 133:d4dda5c437f0 | 1267 | /* Write input buffer in data register */ |
mbed_official | 133:d4dda5c437f0 | 1268 | HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1269 | |
mbed_official | 133:d4dda5c437f0 | 1270 | /* Start the digest calculation */ |
mbed_official | 133:d4dda5c437f0 | 1271 | __HAL_HASH_START_DIGEST(); |
mbed_official | 133:d4dda5c437f0 | 1272 | |
mbed_official | 133:d4dda5c437f0 | 1273 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1274 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 1275 | |
mbed_official | 133:d4dda5c437f0 | 1276 | while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 1277 | { |
mbed_official | 133:d4dda5c437f0 | 1278 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1279 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 1280 | { |
mbed_official | 133:d4dda5c437f0 | 1281 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1282 | { |
mbed_official | 133:d4dda5c437f0 | 1283 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1284 | hhash->State = HAL_HASH_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1285 | |
mbed_official | 133:d4dda5c437f0 | 1286 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1287 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1288 | |
mbed_official | 133:d4dda5c437f0 | 1289 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1290 | } |
mbed_official | 133:d4dda5c437f0 | 1291 | } |
mbed_official | 133:d4dda5c437f0 | 1292 | } |
mbed_official | 133:d4dda5c437f0 | 1293 | |
mbed_official | 133:d4dda5c437f0 | 1294 | /* Read the message digest */ |
mbed_official | 133:d4dda5c437f0 | 1295 | HASH_GetDigest(pOutBuffer, 16); |
mbed_official | 133:d4dda5c437f0 | 1296 | |
mbed_official | 133:d4dda5c437f0 | 1297 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 1298 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1299 | |
mbed_official | 133:d4dda5c437f0 | 1300 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1301 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1302 | |
mbed_official | 133:d4dda5c437f0 | 1303 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1304 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1305 | } |
mbed_official | 133:d4dda5c437f0 | 1306 | |
mbed_official | 133:d4dda5c437f0 | 1307 | /** |
mbed_official | 133:d4dda5c437f0 | 1308 | * @brief Initializes the HASH peripheral in HMAC SHA1 mode |
mbed_official | 133:d4dda5c437f0 | 1309 | * then processes pInBuffer. The digest is available in pOutBuffer. |
mbed_official | 242:7074e42da0b2 | 1310 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1311 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 1312 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 1313 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 1314 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware. |
mbed_official | 133:d4dda5c437f0 | 1315 | * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes. |
mbed_official | 133:d4dda5c437f0 | 1316 | * @param Timeout: Timeout value |
mbed_official | 133:d4dda5c437f0 | 1317 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1318 | */ |
mbed_official | 133:d4dda5c437f0 | 1319 | HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 1320 | { |
mbed_official | 133:d4dda5c437f0 | 1321 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 1322 | |
mbed_official | 133:d4dda5c437f0 | 1323 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1324 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1325 | |
mbed_official | 133:d4dda5c437f0 | 1326 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 1327 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1328 | |
mbed_official | 133:d4dda5c437f0 | 1329 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1330 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1331 | { |
mbed_official | 133:d4dda5c437f0 | 1332 | /* Check if key size is greater than 64 bytes */ |
mbed_official | 133:d4dda5c437f0 | 1333 | if(hhash->Init.KeySize > 64) |
mbed_official | 133:d4dda5c437f0 | 1334 | { |
mbed_official | 133:d4dda5c437f0 | 1335 | /* Select the HMAC SHA1 mode */ |
mbed_official | 133:d4dda5c437f0 | 1336 | HASH->CR |= (HASH_AlgoSelection_SHA1 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT); |
mbed_official | 133:d4dda5c437f0 | 1337 | } |
mbed_official | 133:d4dda5c437f0 | 1338 | else |
mbed_official | 133:d4dda5c437f0 | 1339 | { |
mbed_official | 133:d4dda5c437f0 | 1340 | /* Select the HMAC SHA1 mode */ |
mbed_official | 133:d4dda5c437f0 | 1341 | HASH->CR |= (HASH_AlgoSelection_SHA1 | HASH_AlgoMode_HMAC | HASH_CR_INIT); |
mbed_official | 133:d4dda5c437f0 | 1342 | } |
mbed_official | 133:d4dda5c437f0 | 1343 | } |
mbed_official | 133:d4dda5c437f0 | 1344 | |
mbed_official | 133:d4dda5c437f0 | 1345 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1346 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1347 | |
mbed_official | 133:d4dda5c437f0 | 1348 | /************************** STEP 1 ******************************************/ |
mbed_official | 133:d4dda5c437f0 | 1349 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 1350 | __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1351 | |
mbed_official | 133:d4dda5c437f0 | 1352 | /* Write input buffer in data register */ |
mbed_official | 133:d4dda5c437f0 | 1353 | HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1354 | |
mbed_official | 133:d4dda5c437f0 | 1355 | /* Start the digest calculation */ |
mbed_official | 133:d4dda5c437f0 | 1356 | __HAL_HASH_START_DIGEST(); |
mbed_official | 133:d4dda5c437f0 | 1357 | |
mbed_official | 133:d4dda5c437f0 | 1358 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1359 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 1360 | |
mbed_official | 133:d4dda5c437f0 | 1361 | while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 1362 | { |
mbed_official | 133:d4dda5c437f0 | 1363 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1364 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 1365 | { |
mbed_official | 133:d4dda5c437f0 | 1366 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1367 | { |
mbed_official | 133:d4dda5c437f0 | 1368 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1369 | hhash->State = HAL_HASH_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1370 | |
mbed_official | 133:d4dda5c437f0 | 1371 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1372 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1373 | |
mbed_official | 133:d4dda5c437f0 | 1374 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1375 | } |
mbed_official | 133:d4dda5c437f0 | 1376 | } |
mbed_official | 133:d4dda5c437f0 | 1377 | } |
mbed_official | 133:d4dda5c437f0 | 1378 | /************************** STEP 2 ******************************************/ |
mbed_official | 133:d4dda5c437f0 | 1379 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 1380 | __HAL_HASH_SET_NBVALIDBITS(Size); |
mbed_official | 133:d4dda5c437f0 | 1381 | |
mbed_official | 133:d4dda5c437f0 | 1382 | /* Write input buffer in data register */ |
mbed_official | 133:d4dda5c437f0 | 1383 | HASH_WriteData(pInBuffer, Size); |
mbed_official | 133:d4dda5c437f0 | 1384 | |
mbed_official | 133:d4dda5c437f0 | 1385 | /* Start the digest calculation */ |
mbed_official | 133:d4dda5c437f0 | 1386 | __HAL_HASH_START_DIGEST(); |
mbed_official | 133:d4dda5c437f0 | 1387 | |
mbed_official | 133:d4dda5c437f0 | 1388 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1389 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 1390 | |
mbed_official | 133:d4dda5c437f0 | 1391 | while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 1392 | { |
mbed_official | 133:d4dda5c437f0 | 1393 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1394 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 1395 | { |
mbed_official | 133:d4dda5c437f0 | 1396 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1397 | { |
mbed_official | 133:d4dda5c437f0 | 1398 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1399 | hhash->State = HAL_HASH_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1400 | |
mbed_official | 133:d4dda5c437f0 | 1401 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1402 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1403 | |
mbed_official | 133:d4dda5c437f0 | 1404 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1405 | } |
mbed_official | 133:d4dda5c437f0 | 1406 | } |
mbed_official | 133:d4dda5c437f0 | 1407 | } |
mbed_official | 133:d4dda5c437f0 | 1408 | /************************** STEP 3 ******************************************/ |
mbed_official | 133:d4dda5c437f0 | 1409 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 1410 | __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1411 | |
mbed_official | 133:d4dda5c437f0 | 1412 | /* Write input buffer in data register */ |
mbed_official | 133:d4dda5c437f0 | 1413 | HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1414 | |
mbed_official | 133:d4dda5c437f0 | 1415 | /* Start the digest calculation */ |
mbed_official | 133:d4dda5c437f0 | 1416 | __HAL_HASH_START_DIGEST(); |
mbed_official | 133:d4dda5c437f0 | 1417 | |
mbed_official | 133:d4dda5c437f0 | 1418 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 1419 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 1420 | |
mbed_official | 133:d4dda5c437f0 | 1421 | while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY)) |
mbed_official | 133:d4dda5c437f0 | 1422 | { |
mbed_official | 133:d4dda5c437f0 | 1423 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 1424 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 1425 | { |
mbed_official | 133:d4dda5c437f0 | 1426 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 1427 | { |
mbed_official | 133:d4dda5c437f0 | 1428 | /* Change state */ |
mbed_official | 133:d4dda5c437f0 | 1429 | hhash->State = HAL_HASH_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1430 | |
mbed_official | 133:d4dda5c437f0 | 1431 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1432 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1433 | |
mbed_official | 133:d4dda5c437f0 | 1434 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1435 | } |
mbed_official | 133:d4dda5c437f0 | 1436 | } |
mbed_official | 133:d4dda5c437f0 | 1437 | } |
mbed_official | 133:d4dda5c437f0 | 1438 | /* Read the message digest */ |
mbed_official | 133:d4dda5c437f0 | 1439 | HASH_GetDigest(pOutBuffer, 20); |
mbed_official | 133:d4dda5c437f0 | 1440 | |
mbed_official | 133:d4dda5c437f0 | 1441 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 1442 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1443 | |
mbed_official | 133:d4dda5c437f0 | 1444 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1445 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1446 | |
mbed_official | 133:d4dda5c437f0 | 1447 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1448 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1449 | } |
mbed_official | 133:d4dda5c437f0 | 1450 | |
mbed_official | 133:d4dda5c437f0 | 1451 | |
mbed_official | 133:d4dda5c437f0 | 1452 | |
mbed_official | 133:d4dda5c437f0 | 1453 | |
mbed_official | 133:d4dda5c437f0 | 1454 | /** |
mbed_official | 133:d4dda5c437f0 | 1455 | * @} |
mbed_official | 133:d4dda5c437f0 | 1456 | */ |
mbed_official | 133:d4dda5c437f0 | 1457 | |
mbed_official | 133:d4dda5c437f0 | 1458 | /** @defgroup HASH_Group6 HASH-MAC (HMAC) processing functions using DMA mode |
mbed_official | 133:d4dda5c437f0 | 1459 | * @brief HMAC processing functions using DMA mode . |
mbed_official | 133:d4dda5c437f0 | 1460 | * |
mbed_official | 133:d4dda5c437f0 | 1461 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 1462 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 1463 | ##### HMAC processing using DMA mode functions ##### |
mbed_official | 133:d4dda5c437f0 | 1464 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 1465 | [..] This section provides functions allowing to calculate in DMA mode |
mbed_official | 133:d4dda5c437f0 | 1466 | the HMAC value using one of the following algorithms: |
mbed_official | 133:d4dda5c437f0 | 1467 | (+) MD5 |
mbed_official | 133:d4dda5c437f0 | 1468 | (+) SHA1 |
mbed_official | 133:d4dda5c437f0 | 1469 | |
mbed_official | 133:d4dda5c437f0 | 1470 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 1471 | * @{ |
mbed_official | 133:d4dda5c437f0 | 1472 | */ |
mbed_official | 133:d4dda5c437f0 | 1473 | |
mbed_official | 133:d4dda5c437f0 | 1474 | /** |
mbed_official | 133:d4dda5c437f0 | 1475 | * @brief Initializes the HASH peripheral in HMAC MD5 mode |
mbed_official | 133:d4dda5c437f0 | 1476 | * then enables DMA to control data transfer. |
mbed_official | 242:7074e42da0b2 | 1477 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1478 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 1479 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 1480 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 1481 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware. |
mbed_official | 133:d4dda5c437f0 | 1482 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1483 | */ |
mbed_official | 133:d4dda5c437f0 | 1484 | HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) |
mbed_official | 133:d4dda5c437f0 | 1485 | { |
mbed_official | 133:d4dda5c437f0 | 1486 | uint32_t inputaddr = 0; |
mbed_official | 133:d4dda5c437f0 | 1487 | |
mbed_official | 133:d4dda5c437f0 | 1488 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1489 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1490 | |
mbed_official | 133:d4dda5c437f0 | 1491 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 1492 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1493 | |
mbed_official | 133:d4dda5c437f0 | 1494 | /* Save buffer pointer and size in handle */ |
mbed_official | 133:d4dda5c437f0 | 1495 | hhash->pHashInBuffPtr = pInBuffer; |
mbed_official | 133:d4dda5c437f0 | 1496 | hhash->HashBuffSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1497 | hhash->HashInCount = 0; |
mbed_official | 133:d4dda5c437f0 | 1498 | |
mbed_official | 133:d4dda5c437f0 | 1499 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1500 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1501 | { |
mbed_official | 133:d4dda5c437f0 | 1502 | /* Check if key size is greater than 64 bytes */ |
mbed_official | 133:d4dda5c437f0 | 1503 | if(hhash->Init.KeySize > 64) |
mbed_official | 133:d4dda5c437f0 | 1504 | { |
mbed_official | 133:d4dda5c437f0 | 1505 | /* Select the HMAC MD5 mode */ |
mbed_official | 133:d4dda5c437f0 | 1506 | HASH->CR |= (HASH_AlgoSelection_MD5 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT); |
mbed_official | 133:d4dda5c437f0 | 1507 | } |
mbed_official | 133:d4dda5c437f0 | 1508 | else |
mbed_official | 133:d4dda5c437f0 | 1509 | { |
mbed_official | 133:d4dda5c437f0 | 1510 | /* Select the HMAC MD5 mode */ |
mbed_official | 133:d4dda5c437f0 | 1511 | HASH->CR |= (HASH_AlgoSelection_MD5 | HASH_AlgoMode_HMAC | HASH_CR_INIT); |
mbed_official | 133:d4dda5c437f0 | 1512 | } |
mbed_official | 133:d4dda5c437f0 | 1513 | } |
mbed_official | 133:d4dda5c437f0 | 1514 | |
mbed_official | 133:d4dda5c437f0 | 1515 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1516 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1517 | |
mbed_official | 133:d4dda5c437f0 | 1518 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 1519 | __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1520 | |
mbed_official | 133:d4dda5c437f0 | 1521 | /* Get the key address */ |
mbed_official | 133:d4dda5c437f0 | 1522 | inputaddr = (uint32_t)(hhash->Init.pKey); |
mbed_official | 133:d4dda5c437f0 | 1523 | |
mbed_official | 133:d4dda5c437f0 | 1524 | /* Set the HASH DMA transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1525 | hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt; |
mbed_official | 133:d4dda5c437f0 | 1526 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 1527 | hhash->hdmain->XferErrorCallback = HASH_DMAError; |
mbed_official | 133:d4dda5c437f0 | 1528 | |
mbed_official | 133:d4dda5c437f0 | 1529 | /* Enable the DMA In DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 1530 | HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4)); |
mbed_official | 133:d4dda5c437f0 | 1531 | /* Enable DMA requests */ |
mbed_official | 133:d4dda5c437f0 | 1532 | HASH->CR |= (HASH_CR_DMAE); |
mbed_official | 133:d4dda5c437f0 | 1533 | |
mbed_official | 133:d4dda5c437f0 | 1534 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1535 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1536 | |
mbed_official | 133:d4dda5c437f0 | 1537 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1538 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1539 | } |
mbed_official | 133:d4dda5c437f0 | 1540 | |
mbed_official | 133:d4dda5c437f0 | 1541 | /** |
mbed_official | 133:d4dda5c437f0 | 1542 | * @brief Initializes the HASH peripheral in HMAC SHA1 mode |
mbed_official | 133:d4dda5c437f0 | 1543 | * then enables DMA to control data transfer. |
mbed_official | 242:7074e42da0b2 | 1544 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1545 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 1546 | * @param pInBuffer: Pointer to the input buffer (buffer to be hashed). |
mbed_official | 133:d4dda5c437f0 | 1547 | * @param Size: Length of the input buffer in bytes. |
mbed_official | 133:d4dda5c437f0 | 1548 | * If the Size is not multiple of 64 bytes, the padding is managed by hardware. |
mbed_official | 133:d4dda5c437f0 | 1549 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1550 | */ |
mbed_official | 133:d4dda5c437f0 | 1551 | HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) |
mbed_official | 133:d4dda5c437f0 | 1552 | { |
mbed_official | 133:d4dda5c437f0 | 1553 | uint32_t inputaddr = 0; |
mbed_official | 133:d4dda5c437f0 | 1554 | |
mbed_official | 133:d4dda5c437f0 | 1555 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1556 | __HAL_LOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1557 | |
mbed_official | 133:d4dda5c437f0 | 1558 | /* Change the HASH state */ |
mbed_official | 133:d4dda5c437f0 | 1559 | hhash->State = HAL_HASH_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1560 | |
mbed_official | 133:d4dda5c437f0 | 1561 | /* Save buffer pointer and size in handle */ |
mbed_official | 133:d4dda5c437f0 | 1562 | hhash->pHashInBuffPtr = pInBuffer; |
mbed_official | 133:d4dda5c437f0 | 1563 | hhash->HashBuffSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1564 | hhash->HashInCount = 0; |
mbed_official | 133:d4dda5c437f0 | 1565 | |
mbed_official | 133:d4dda5c437f0 | 1566 | /* Check if initialization phase has already been performed */ |
mbed_official | 133:d4dda5c437f0 | 1567 | if(hhash->Phase == HAL_HASH_PHASE_READY) |
mbed_official | 133:d4dda5c437f0 | 1568 | { |
mbed_official | 133:d4dda5c437f0 | 1569 | /* Check if key size is greater than 64 bytes */ |
mbed_official | 133:d4dda5c437f0 | 1570 | if(hhash->Init.KeySize > 64) |
mbed_official | 133:d4dda5c437f0 | 1571 | { |
mbed_official | 133:d4dda5c437f0 | 1572 | /* Select the HMAC SHA1 mode */ |
mbed_official | 133:d4dda5c437f0 | 1573 | HASH->CR |= (HASH_AlgoSelection_SHA1 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT); |
mbed_official | 133:d4dda5c437f0 | 1574 | } |
mbed_official | 133:d4dda5c437f0 | 1575 | else |
mbed_official | 133:d4dda5c437f0 | 1576 | { |
mbed_official | 133:d4dda5c437f0 | 1577 | /* Select the HMAC SHA1 mode */ |
mbed_official | 133:d4dda5c437f0 | 1578 | HASH->CR |= (HASH_AlgoSelection_SHA1 | HASH_AlgoMode_HMAC | HASH_CR_INIT); |
mbed_official | 133:d4dda5c437f0 | 1579 | } |
mbed_official | 133:d4dda5c437f0 | 1580 | } |
mbed_official | 133:d4dda5c437f0 | 1581 | |
mbed_official | 133:d4dda5c437f0 | 1582 | /* Set the phase */ |
mbed_official | 133:d4dda5c437f0 | 1583 | hhash->Phase = HAL_HASH_PHASE_PROCESS; |
mbed_official | 133:d4dda5c437f0 | 1584 | |
mbed_official | 133:d4dda5c437f0 | 1585 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 1586 | __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize); |
mbed_official | 133:d4dda5c437f0 | 1587 | |
mbed_official | 133:d4dda5c437f0 | 1588 | /* Get the key address */ |
mbed_official | 133:d4dda5c437f0 | 1589 | inputaddr = (uint32_t)(hhash->Init.pKey); |
mbed_official | 133:d4dda5c437f0 | 1590 | |
mbed_official | 133:d4dda5c437f0 | 1591 | /* Set the HASH DMA transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1592 | hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt; |
mbed_official | 133:d4dda5c437f0 | 1593 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 1594 | hhash->hdmain->XferErrorCallback = HASH_DMAError; |
mbed_official | 133:d4dda5c437f0 | 1595 | |
mbed_official | 133:d4dda5c437f0 | 1596 | /* Enable the DMA In DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 1597 | HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4)); |
mbed_official | 133:d4dda5c437f0 | 1598 | /* Enable DMA requests */ |
mbed_official | 133:d4dda5c437f0 | 1599 | HASH->CR |= (HASH_CR_DMAE); |
mbed_official | 133:d4dda5c437f0 | 1600 | |
mbed_official | 133:d4dda5c437f0 | 1601 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1602 | __HAL_UNLOCK(hhash); |
mbed_official | 133:d4dda5c437f0 | 1603 | |
mbed_official | 133:d4dda5c437f0 | 1604 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1605 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1606 | } |
mbed_official | 133:d4dda5c437f0 | 1607 | |
mbed_official | 133:d4dda5c437f0 | 1608 | /** |
mbed_official | 133:d4dda5c437f0 | 1609 | * @} |
mbed_official | 133:d4dda5c437f0 | 1610 | */ |
mbed_official | 133:d4dda5c437f0 | 1611 | |
mbed_official | 133:d4dda5c437f0 | 1612 | /** @defgroup HASH_Group7 Peripheral State functions |
mbed_official | 133:d4dda5c437f0 | 1613 | * @brief Peripheral State functions. |
mbed_official | 133:d4dda5c437f0 | 1614 | * |
mbed_official | 133:d4dda5c437f0 | 1615 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 1616 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 1617 | ##### Peripheral State functions ##### |
mbed_official | 133:d4dda5c437f0 | 1618 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 1619 | [..] |
mbed_official | 133:d4dda5c437f0 | 1620 | This subsection permits to get in run-time the status of the peripheral. |
mbed_official | 133:d4dda5c437f0 | 1621 | |
mbed_official | 133:d4dda5c437f0 | 1622 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 1623 | * @{ |
mbed_official | 133:d4dda5c437f0 | 1624 | */ |
mbed_official | 133:d4dda5c437f0 | 1625 | |
mbed_official | 133:d4dda5c437f0 | 1626 | /** |
mbed_official | 133:d4dda5c437f0 | 1627 | * @brief return the HASH state |
mbed_official | 242:7074e42da0b2 | 1628 | * @param hhash: pointer to a HASH_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1629 | * the configuration information for HASH module |
mbed_official | 133:d4dda5c437f0 | 1630 | * @retval HAL state |
mbed_official | 133:d4dda5c437f0 | 1631 | */ |
mbed_official | 133:d4dda5c437f0 | 1632 | HAL_HASH_STATETypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash) |
mbed_official | 133:d4dda5c437f0 | 1633 | { |
mbed_official | 133:d4dda5c437f0 | 1634 | return hhash->State; |
mbed_official | 133:d4dda5c437f0 | 1635 | } |
mbed_official | 133:d4dda5c437f0 | 1636 | |
mbed_official | 133:d4dda5c437f0 | 1637 | /** |
mbed_official | 133:d4dda5c437f0 | 1638 | * @} |
mbed_official | 133:d4dda5c437f0 | 1639 | */ |
mbed_official | 133:d4dda5c437f0 | 1640 | |
mbed_official | 133:d4dda5c437f0 | 1641 | /** |
mbed_official | 133:d4dda5c437f0 | 1642 | * @brief DMA HASH Input Data complete callback. |
mbed_official | 133:d4dda5c437f0 | 1643 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 1644 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 1645 | */ |
mbed_official | 133:d4dda5c437f0 | 1646 | static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 1647 | { |
mbed_official | 133:d4dda5c437f0 | 1648 | HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 1649 | uint32_t inputaddr = 0; |
mbed_official | 133:d4dda5c437f0 | 1650 | uint32_t buffersize = 0; |
mbed_official | 133:d4dda5c437f0 | 1651 | |
mbed_official | 133:d4dda5c437f0 | 1652 | if((HASH->CR & HASH_CR_MODE) != HASH_CR_MODE) |
mbed_official | 133:d4dda5c437f0 | 1653 | { |
mbed_official | 133:d4dda5c437f0 | 1654 | /* Disable the DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 1655 | HASH->CR &= (uint32_t)(~HASH_CR_DMAE); |
mbed_official | 133:d4dda5c437f0 | 1656 | |
mbed_official | 133:d4dda5c437f0 | 1657 | /* Change HASH peripheral state */ |
mbed_official | 133:d4dda5c437f0 | 1658 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1659 | |
mbed_official | 133:d4dda5c437f0 | 1660 | /* Call Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1661 | HAL_HASH_InCpltCallback(hhash); |
mbed_official | 133:d4dda5c437f0 | 1662 | } |
mbed_official | 133:d4dda5c437f0 | 1663 | else |
mbed_official | 133:d4dda5c437f0 | 1664 | { |
mbed_official | 133:d4dda5c437f0 | 1665 | /* Increment Interrupt counter */ |
mbed_official | 133:d4dda5c437f0 | 1666 | hhash->HashInCount++; |
mbed_official | 133:d4dda5c437f0 | 1667 | /* Disable the DMA transfer before starting the next transfer */ |
mbed_official | 133:d4dda5c437f0 | 1668 | HASH->CR &= (uint32_t)(~HASH_CR_DMAE); |
mbed_official | 133:d4dda5c437f0 | 1669 | |
mbed_official | 133:d4dda5c437f0 | 1670 | if(hhash->HashInCount <= 2) |
mbed_official | 133:d4dda5c437f0 | 1671 | { |
mbed_official | 133:d4dda5c437f0 | 1672 | /* In case HashInCount = 1, set the DMA to transfer data to HASH DIN register */ |
mbed_official | 133:d4dda5c437f0 | 1673 | if(hhash->HashInCount == 1) |
mbed_official | 133:d4dda5c437f0 | 1674 | { |
mbed_official | 133:d4dda5c437f0 | 1675 | inputaddr = (uint32_t)hhash->pHashInBuffPtr; |
mbed_official | 133:d4dda5c437f0 | 1676 | buffersize = hhash->HashBuffSize; |
mbed_official | 133:d4dda5c437f0 | 1677 | } |
mbed_official | 133:d4dda5c437f0 | 1678 | /* In case HashInCount = 2, set the DMA to transfer key to HASH DIN register */ |
mbed_official | 133:d4dda5c437f0 | 1679 | else if(hhash->HashInCount == 2) |
mbed_official | 133:d4dda5c437f0 | 1680 | { |
mbed_official | 133:d4dda5c437f0 | 1681 | inputaddr = (uint32_t)hhash->Init.pKey; |
mbed_official | 133:d4dda5c437f0 | 1682 | buffersize = hhash->Init.KeySize; |
mbed_official | 133:d4dda5c437f0 | 1683 | } |
mbed_official | 133:d4dda5c437f0 | 1684 | /* Configure the number of valid bits in last word of the message */ |
mbed_official | 133:d4dda5c437f0 | 1685 | HASH->STR |= 8 * (buffersize % 4); |
mbed_official | 133:d4dda5c437f0 | 1686 | |
mbed_official | 133:d4dda5c437f0 | 1687 | /* Set the HASH DMA transfer complete */ |
mbed_official | 133:d4dda5c437f0 | 1688 | hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt; |
mbed_official | 133:d4dda5c437f0 | 1689 | |
mbed_official | 133:d4dda5c437f0 | 1690 | /* Enable the DMA In DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 1691 | HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (buffersize%4 ? (buffersize+3)/4:buffersize/4)); |
mbed_official | 133:d4dda5c437f0 | 1692 | |
mbed_official | 133:d4dda5c437f0 | 1693 | /* Enable DMA requests */ |
mbed_official | 133:d4dda5c437f0 | 1694 | HASH->CR |= (HASH_CR_DMAE); |
mbed_official | 133:d4dda5c437f0 | 1695 | } |
mbed_official | 133:d4dda5c437f0 | 1696 | else |
mbed_official | 133:d4dda5c437f0 | 1697 | { |
mbed_official | 133:d4dda5c437f0 | 1698 | /* Disable the DMA transfer */ |
mbed_official | 133:d4dda5c437f0 | 1699 | HASH->CR &= (uint32_t)(~HASH_CR_DMAE); |
mbed_official | 133:d4dda5c437f0 | 1700 | |
mbed_official | 133:d4dda5c437f0 | 1701 | /* Reset the InCount */ |
mbed_official | 133:d4dda5c437f0 | 1702 | hhash->HashInCount = 0; |
mbed_official | 133:d4dda5c437f0 | 1703 | |
mbed_official | 133:d4dda5c437f0 | 1704 | /* Change HASH peripheral state */ |
mbed_official | 133:d4dda5c437f0 | 1705 | hhash->State = HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1706 | |
mbed_official | 133:d4dda5c437f0 | 1707 | /* Call Input data transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1708 | HAL_HASH_InCpltCallback(hhash); |
mbed_official | 133:d4dda5c437f0 | 1709 | } |
mbed_official | 133:d4dda5c437f0 | 1710 | } |
mbed_official | 133:d4dda5c437f0 | 1711 | } |
mbed_official | 133:d4dda5c437f0 | 1712 | |
mbed_official | 133:d4dda5c437f0 | 1713 | /** |
mbed_official | 133:d4dda5c437f0 | 1714 | * @brief DMA HASH communication error callback. |
mbed_official | 133:d4dda5c437f0 | 1715 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 1716 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 1717 | */ |
mbed_official | 133:d4dda5c437f0 | 1718 | static void HASH_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 1719 | { |
mbed_official | 133:d4dda5c437f0 | 1720 | HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 1721 | hhash->State= HAL_HASH_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1722 | HAL_HASH_ErrorCallback(hhash); |
mbed_official | 133:d4dda5c437f0 | 1723 | } |
mbed_official | 133:d4dda5c437f0 | 1724 | |
mbed_official | 133:d4dda5c437f0 | 1725 | /** |
mbed_official | 133:d4dda5c437f0 | 1726 | * @brief Writes the input buffer in data register. |
mbed_official | 133:d4dda5c437f0 | 1727 | * @param pInBuffer: Pointer to input buffer |
mbed_official | 133:d4dda5c437f0 | 1728 | * @param Size: The size of input buffer |
mbed_official | 133:d4dda5c437f0 | 1729 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 1730 | */ |
mbed_official | 133:d4dda5c437f0 | 1731 | static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size) |
mbed_official | 133:d4dda5c437f0 | 1732 | { |
mbed_official | 133:d4dda5c437f0 | 1733 | uint32_t buffercounter; |
mbed_official | 133:d4dda5c437f0 | 1734 | uint32_t inputaddr = (uint32_t) pInBuffer; |
mbed_official | 133:d4dda5c437f0 | 1735 | |
mbed_official | 133:d4dda5c437f0 | 1736 | for(buffercounter = 0; buffercounter < Size; buffercounter+=4) |
mbed_official | 133:d4dda5c437f0 | 1737 | { |
mbed_official | 133:d4dda5c437f0 | 1738 | HASH->DIN = *(uint32_t*)inputaddr; |
mbed_official | 133:d4dda5c437f0 | 1739 | inputaddr+=4; |
mbed_official | 133:d4dda5c437f0 | 1740 | } |
mbed_official | 133:d4dda5c437f0 | 1741 | } |
mbed_official | 133:d4dda5c437f0 | 1742 | |
mbed_official | 133:d4dda5c437f0 | 1743 | /** |
mbed_official | 133:d4dda5c437f0 | 1744 | * @brief Provides the message digest result. |
mbed_official | 133:d4dda5c437f0 | 1745 | * @param pMsgDigest: Pointer to the message digest |
mbed_official | 133:d4dda5c437f0 | 1746 | * @param Size: The size of the message digest in bytes |
mbed_official | 133:d4dda5c437f0 | 1747 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 1748 | */ |
mbed_official | 133:d4dda5c437f0 | 1749 | static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size) |
mbed_official | 133:d4dda5c437f0 | 1750 | { |
mbed_official | 133:d4dda5c437f0 | 1751 | uint32_t msgdigest = (uint32_t)pMsgDigest; |
mbed_official | 133:d4dda5c437f0 | 1752 | |
mbed_official | 133:d4dda5c437f0 | 1753 | switch(Size) |
mbed_official | 133:d4dda5c437f0 | 1754 | { |
mbed_official | 133:d4dda5c437f0 | 1755 | case 16: |
mbed_official | 133:d4dda5c437f0 | 1756 | /* Read the message digest */ |
mbed_official | 133:d4dda5c437f0 | 1757 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]); |
mbed_official | 133:d4dda5c437f0 | 1758 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1759 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]); |
mbed_official | 133:d4dda5c437f0 | 1760 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1761 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]); |
mbed_official | 133:d4dda5c437f0 | 1762 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1763 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]); |
mbed_official | 133:d4dda5c437f0 | 1764 | break; |
mbed_official | 133:d4dda5c437f0 | 1765 | case 20: |
mbed_official | 133:d4dda5c437f0 | 1766 | /* Read the message digest */ |
mbed_official | 133:d4dda5c437f0 | 1767 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]); |
mbed_official | 133:d4dda5c437f0 | 1768 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1769 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]); |
mbed_official | 133:d4dda5c437f0 | 1770 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1771 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]); |
mbed_official | 133:d4dda5c437f0 | 1772 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1773 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]); |
mbed_official | 133:d4dda5c437f0 | 1774 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1775 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]); |
mbed_official | 133:d4dda5c437f0 | 1776 | break; |
mbed_official | 133:d4dda5c437f0 | 1777 | case 28: |
mbed_official | 133:d4dda5c437f0 | 1778 | /* Read the message digest */ |
mbed_official | 133:d4dda5c437f0 | 1779 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]); |
mbed_official | 133:d4dda5c437f0 | 1780 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1781 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]); |
mbed_official | 133:d4dda5c437f0 | 1782 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1783 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]); |
mbed_official | 133:d4dda5c437f0 | 1784 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1785 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]); |
mbed_official | 133:d4dda5c437f0 | 1786 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1787 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]); |
mbed_official | 133:d4dda5c437f0 | 1788 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1789 | *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]); |
mbed_official | 133:d4dda5c437f0 | 1790 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1791 | *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]); |
mbed_official | 133:d4dda5c437f0 | 1792 | break; |
mbed_official | 133:d4dda5c437f0 | 1793 | case 32: |
mbed_official | 133:d4dda5c437f0 | 1794 | /* Read the message digest */ |
mbed_official | 133:d4dda5c437f0 | 1795 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]); |
mbed_official | 133:d4dda5c437f0 | 1796 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1797 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]); |
mbed_official | 133:d4dda5c437f0 | 1798 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1799 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]); |
mbed_official | 133:d4dda5c437f0 | 1800 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1801 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]); |
mbed_official | 133:d4dda5c437f0 | 1802 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1803 | *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]); |
mbed_official | 133:d4dda5c437f0 | 1804 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1805 | *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]); |
mbed_official | 133:d4dda5c437f0 | 1806 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1807 | *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]); |
mbed_official | 133:d4dda5c437f0 | 1808 | msgdigest+=4; |
mbed_official | 133:d4dda5c437f0 | 1809 | *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[7]); |
mbed_official | 133:d4dda5c437f0 | 1810 | break; |
mbed_official | 133:d4dda5c437f0 | 1811 | default: |
mbed_official | 133:d4dda5c437f0 | 1812 | break; |
mbed_official | 133:d4dda5c437f0 | 1813 | } |
mbed_official | 133:d4dda5c437f0 | 1814 | } |
mbed_official | 133:d4dda5c437f0 | 1815 | |
mbed_official | 133:d4dda5c437f0 | 1816 | /** |
mbed_official | 133:d4dda5c437f0 | 1817 | * @} |
mbed_official | 133:d4dda5c437f0 | 1818 | */ |
mbed_official | 133:d4dda5c437f0 | 1819 | #endif /* STM32F415xx || STM32F417xx || STM32F437xx || STM32F439xx */ |
mbed_official | 133:d4dda5c437f0 | 1820 | #endif /* HAL_HASH_MODULE_ENABLED */ |
mbed_official | 133:d4dda5c437f0 | 1821 | /** |
mbed_official | 133:d4dda5c437f0 | 1822 | * @} |
mbed_official | 133:d4dda5c437f0 | 1823 | */ |
mbed_official | 133:d4dda5c437f0 | 1824 | |
mbed_official | 133:d4dda5c437f0 | 1825 | /** |
mbed_official | 133:d4dda5c437f0 | 1826 | * @} |
mbed_official | 133:d4dda5c437f0 | 1827 | */ |
mbed_official | 133:d4dda5c437f0 | 1828 | |
mbed_official | 133:d4dda5c437f0 | 1829 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |