Janek Mann / mbed-src-openwear

mbed library sources modified for open wear

Dependents:   openwear-lifelogger-example

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F407VG/stm32f4xx_hal_adc_ex.h@310:6188e0254baa, 2014-09-16 (annotated)

Committer:
janekm
Date:
Tue Sep 16 22:42:01 2014 +0000
Revision:
310:6188e0254baa
Parent:
297:ec1b66a3d094 
N/A

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_adc.h
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 242:7074e42da0b2 5 * @version V1.1.0RC2
mbed_official 242:7074e42da0b2 6 * @date 14-May-2014
mbed_official 133:d4dda5c437f0 7 * @brief Header file of ADC HAL module.
mbed_official 133:d4dda5c437f0 8 ******************************************************************************
mbed_official 133:d4dda5c437f0 9 * @attention
mbed_official 133:d4dda5c437f0 10 *
mbed_official 133:d4dda5c437f0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 12 *
mbed_official 133:d4dda5c437f0 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 14 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 16 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 19 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 21 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 22 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 23 *
mbed_official 133:d4dda5c437f0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 34 *
mbed_official 133:d4dda5c437f0 35 ******************************************************************************
mbed_official 133:d4dda5c437f0 36 */
mbed_official 133:d4dda5c437f0 37
mbed_official 133:d4dda5c437f0 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 133:d4dda5c437f0 39 #ifndef __STM32F4xx_ADC_EX_H
mbed_official 133:d4dda5c437f0 40 #define __STM32F4xx_ADC_EX_H
mbed_official 133:d4dda5c437f0 41
mbed_official 133:d4dda5c437f0 42 #ifdef __cplusplus
mbed_official 133:d4dda5c437f0 43 extern "C" {
mbed_official 133:d4dda5c437f0 44 #endif
mbed_official 133:d4dda5c437f0 45
mbed_official 133:d4dda5c437f0 46 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 47 #include "stm32f4xx_hal_def.h"
mbed_official 133:d4dda5c437f0 48
mbed_official 133:d4dda5c437f0 49 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 133:d4dda5c437f0 50 * @{
mbed_official 133:d4dda5c437f0 51 */
mbed_official 133:d4dda5c437f0 52
mbed_official 133:d4dda5c437f0 53 /** @addtogroup ADCEx
mbed_official 133:d4dda5c437f0 54 * @{
mbed_official 133:d4dda5c437f0 55 */
mbed_official 133:d4dda5c437f0 56
mbed_official 133:d4dda5c437f0 57 /* Exported types ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 58
mbed_official 133:d4dda5c437f0 59 /**
mbed_official 133:d4dda5c437f0 60 * @brief ADC Configuration injected Channel structure definition
mbed_official 133:d4dda5c437f0 61 */
mbed_official 133:d4dda5c437f0 62 typedef struct
mbed_official 133:d4dda5c437f0 63 {
mbed_official 242:7074e42da0b2 64 uint32_t InjectedChannel; /*!< Configure the ADC injected channel.
mbed_official 242:7074e42da0b2 65 This parameter can be a value of @ref ADC_channels */
mbed_official 133:d4dda5c437f0 66 uint32_t InjectedRank; /*!< The rank in the injected group sequencer
mbed_official 133:d4dda5c437f0 67 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
mbed_official 133:d4dda5c437f0 68 uint32_t InjectedSamplingTime; /*!< The sample time value to be set for the selected channel.
mbed_official 133:d4dda5c437f0 69 This parameter can be a value of @ref ADC_sampling_times */
mbed_official 133:d4dda5c437f0 70 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data when convert injected channels.
mbed_official 133:d4dda5c437f0 71 This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
mbed_official 133:d4dda5c437f0 72 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ADC conversions that will be done using the sequencer for
mbed_official 133:d4dda5c437f0 73 injected channel group.
mbed_official 133:d4dda5c437f0 74 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
mbed_official 133:d4dda5c437f0 75 uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group
mbed_official 133:d4dda5c437f0 76 conversion after regular one */
mbed_official 133:d4dda5c437f0 77 uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversion is performed in Discontinuous mode or not for injected channels.
mbed_official 133:d4dda5c437f0 78 This parameter can be set to ENABLE or DISABLE. */
mbed_official 133:d4dda5c437f0 79 uint32_t ExternalTrigInjecConvEdge; /*!< Select the external trigger edge and enable the trigger of an injected channels.
mbed_official 242:7074e42da0b2 80 This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected */
mbed_official 133:d4dda5c437f0 81 uint32_t ExternalTrigInjecConv; /*!< Select the external event used to trigger the start of conversion of a injected channels.
mbed_official 242:7074e42da0b2 82 This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected */
mbed_official 133:d4dda5c437f0 83 }ADC_InjectionConfTypeDef;
mbed_official 133:d4dda5c437f0 84
mbed_official 133:d4dda5c437f0 85 /**
mbed_official 133:d4dda5c437f0 86 * @brief ADC Configuration multi-mode structure definition
mbed_official 133:d4dda5c437f0 87 */
mbed_official 133:d4dda5c437f0 88 typedef struct
mbed_official 133:d4dda5c437f0 89 {
mbed_official 133:d4dda5c437f0 90 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
mbed_official 242:7074e42da0b2 91 This parameter can be a value of @ref ADCEx_Common_mode */
mbed_official 133:d4dda5c437f0 92 uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
mbed_official 242:7074e42da0b2 93 This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
mbed_official 133:d4dda5c437f0 94 uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
mbed_official 242:7074e42da0b2 95 This parameter can be a value of @ref ADCEx_delay_between_2_sampling_phases */
mbed_official 133:d4dda5c437f0 96 }ADC_MultiModeTypeDef;
mbed_official 133:d4dda5c437f0 97
mbed_official 133:d4dda5c437f0 98 /* Exported constants --------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 99
mbed_official 133:d4dda5c437f0 100 /** @defgroup ADCEx_Exported_Constants
mbed_official 133:d4dda5c437f0 101 * @{
mbed_official 133:d4dda5c437f0 102 */
mbed_official 133:d4dda5c437f0 103
mbed_official 133:d4dda5c437f0 104
mbed_official 133:d4dda5c437f0 105 /** @defgroup ADCEx_Common_mode
mbed_official 133:d4dda5c437f0 106 * @{
mbed_official 133:d4dda5c437f0 107 */
mbed_official 133:d4dda5c437f0 108 #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000)
mbed_official 133:d4dda5c437f0 109 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
mbed_official 133:d4dda5c437f0 110 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
mbed_official 133:d4dda5c437f0 111 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
mbed_official 133:d4dda5c437f0 112 #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
mbed_official 133:d4dda5c437f0 113 #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
mbed_official 133:d4dda5c437f0 114 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
mbed_official 133:d4dda5c437f0 115 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
mbed_official 133:d4dda5c437f0 116 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
mbed_official 133:d4dda5c437f0 117 #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
mbed_official 133:d4dda5c437f0 118 #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
mbed_official 133:d4dda5c437f0 119 #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
mbed_official 133:d4dda5c437f0 120 #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
mbed_official 133:d4dda5c437f0 121
mbed_official 133:d4dda5c437f0 122 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
mbed_official 133:d4dda5c437f0 123 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
mbed_official 133:d4dda5c437f0 124 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
mbed_official 133:d4dda5c437f0 125 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
mbed_official 133:d4dda5c437f0 126 ((MODE) == ADC_DUALMODE_REGSIMULT) || \
mbed_official 133:d4dda5c437f0 127 ((MODE) == ADC_DUALMODE_INTERL) || \
mbed_official 133:d4dda5c437f0 128 ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
mbed_official 133:d4dda5c437f0 129 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
mbed_official 133:d4dda5c437f0 130 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
mbed_official 133:d4dda5c437f0 131 ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
mbed_official 133:d4dda5c437f0 132 ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
mbed_official 133:d4dda5c437f0 133 ((MODE) == ADC_TRIPLEMODE_INTERL) || \
mbed_official 133:d4dda5c437f0 134 ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
mbed_official 133:d4dda5c437f0 135 /**
mbed_official 133:d4dda5c437f0 136 * @}
mbed_official 133:d4dda5c437f0 137 */
mbed_official 133:d4dda5c437f0 138
mbed_official 133:d4dda5c437f0 139 /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode
mbed_official 133:d4dda5c437f0 140 * @{
mbed_official 133:d4dda5c437f0 141 */
mbed_official 133:d4dda5c437f0 142 #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /*!< DMA mode disabled */
mbed_official 133:d4dda5c437f0 143 #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
mbed_official 133:d4dda5c437f0 144 #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
mbed_official 133:d4dda5c437f0 145 #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
mbed_official 133:d4dda5c437f0 146
mbed_official 133:d4dda5c437f0 147 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
mbed_official 133:d4dda5c437f0 148 ((MODE) == ADC_DMAACCESSMODE_1) || \
mbed_official 133:d4dda5c437f0 149 ((MODE) == ADC_DMAACCESSMODE_2) || \
mbed_official 133:d4dda5c437f0 150 ((MODE) == ADC_DMAACCESSMODE_3))
mbed_official 133:d4dda5c437f0 151 /**
mbed_official 133:d4dda5c437f0 152 * @}
mbed_official 133:d4dda5c437f0 153 */
mbed_official 133:d4dda5c437f0 154
mbed_official 242:7074e42da0b2 155 /** @defgroup ADCEx_delay_between_2_sampling_phases
mbed_official 242:7074e42da0b2 156 * @{
mbed_official 242:7074e42da0b2 157 */
mbed_official 242:7074e42da0b2 158 #define ADC_TWOSAMPLINGDELAY_5CYCLES ((uint32_t)0x00000000)
mbed_official 242:7074e42da0b2 159 #define ADC_TWOSAMPLINGDELAY_6CYCLES ((uint32_t)ADC_CCR_DELAY_0)
mbed_official 242:7074e42da0b2 160 #define ADC_TWOSAMPLINGDELAY_7CYCLES ((uint32_t)ADC_CCR_DELAY_1)
mbed_official 242:7074e42da0b2 161 #define ADC_TWOSAMPLINGDELAY_8CYCLES ((uint32_t)(ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
mbed_official 242:7074e42da0b2 162 #define ADC_TWOSAMPLINGDELAY_9CYCLES ((uint32_t)ADC_CCR_DELAY_2)
mbed_official 242:7074e42da0b2 163 #define ADC_TWOSAMPLINGDELAY_10CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0))
mbed_official 242:7074e42da0b2 164 #define ADC_TWOSAMPLINGDELAY_11CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1))
mbed_official 242:7074e42da0b2 165 #define ADC_TWOSAMPLINGDELAY_12CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
mbed_official 242:7074e42da0b2 166 #define ADC_TWOSAMPLINGDELAY_13CYCLES ((uint32_t)ADC_CCR_DELAY_3)
mbed_official 242:7074e42da0b2 167 #define ADC_TWOSAMPLINGDELAY_14CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_0))
mbed_official 242:7074e42da0b2 168 #define ADC_TWOSAMPLINGDELAY_15CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1))
mbed_official 242:7074e42da0b2 169 #define ADC_TWOSAMPLINGDELAY_16CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
mbed_official 242:7074e42da0b2 170 #define ADC_TWOSAMPLINGDELAY_17CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2))
mbed_official 242:7074e42da0b2 171 #define ADC_TWOSAMPLINGDELAY_18CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0))
mbed_official 242:7074e42da0b2 172 #define ADC_TWOSAMPLINGDELAY_19CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1))
mbed_official 242:7074e42da0b2 173 #define ADC_TWOSAMPLINGDELAY_20CYCLES ((uint32_t)ADC_CCR_DELAY)
mbed_official 242:7074e42da0b2 174
mbed_official 242:7074e42da0b2 175 #define IS_ADC_SAMPLING_DELAY(DELAY) (((DELAY) == ADC_TWOSAMPLINGDELAY_5CYCLES) || \
mbed_official 242:7074e42da0b2 176 ((DELAY) == ADC_TWOSAMPLINGDELAY_6CYCLES) || \
mbed_official 242:7074e42da0b2 177 ((DELAY) == ADC_TWOSAMPLINGDELAY_7CYCLES) || \
mbed_official 242:7074e42da0b2 178 ((DELAY) == ADC_TWOSAMPLINGDELAY_8CYCLES) || \
mbed_official 242:7074e42da0b2 179 ((DELAY) == ADC_TWOSAMPLINGDELAY_9CYCLES) || \
mbed_official 242:7074e42da0b2 180 ((DELAY) == ADC_TWOSAMPLINGDELAY_10CYCLES) || \
mbed_official 242:7074e42da0b2 181 ((DELAY) == ADC_TWOSAMPLINGDELAY_11CYCLES) || \
mbed_official 242:7074e42da0b2 182 ((DELAY) == ADC_TWOSAMPLINGDELAY_12CYCLES) || \
mbed_official 242:7074e42da0b2 183 ((DELAY) == ADC_TWOSAMPLINGDELAY_13CYCLES) || \
mbed_official 242:7074e42da0b2 184 ((DELAY) == ADC_TWOSAMPLINGDELAY_14CYCLES) || \
mbed_official 242:7074e42da0b2 185 ((DELAY) == ADC_TWOSAMPLINGDELAY_15CYCLES) || \
mbed_official 242:7074e42da0b2 186 ((DELAY) == ADC_TWOSAMPLINGDELAY_16CYCLES) || \
mbed_official 242:7074e42da0b2 187 ((DELAY) == ADC_TWOSAMPLINGDELAY_17CYCLES) || \
mbed_official 242:7074e42da0b2 188 ((DELAY) == ADC_TWOSAMPLINGDELAY_18CYCLES) || \
mbed_official 242:7074e42da0b2 189 ((DELAY) == ADC_TWOSAMPLINGDELAY_19CYCLES) || \
mbed_official 242:7074e42da0b2 190 ((DELAY) == ADC_TWOSAMPLINGDELAY_20CYCLES))
mbed_official 242:7074e42da0b2 191 /**
mbed_official 242:7074e42da0b2 192 * @}
mbed_official 242:7074e42da0b2 193 */
mbed_official 242:7074e42da0b2 194
mbed_official 133:d4dda5c437f0 195 /** @defgroup ADCEx_External_trigger_edge_Injected
mbed_official 133:d4dda5c437f0 196 * @{
mbed_official 133:d4dda5c437f0 197 */
mbed_official 133:d4dda5c437f0 198 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000)
mbed_official 133:d4dda5c437f0 199 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
mbed_official 133:d4dda5c437f0 200 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
mbed_official 133:d4dda5c437f0 201 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
mbed_official 133:d4dda5c437f0 202
mbed_official 133:d4dda5c437f0 203 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
mbed_official 133:d4dda5c437f0 204 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
mbed_official 133:d4dda5c437f0 205 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
mbed_official 133:d4dda5c437f0 206 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
mbed_official 133:d4dda5c437f0 207 /**
mbed_official 133:d4dda5c437f0 208 * @}
mbed_official 133:d4dda5c437f0 209 */
mbed_official 133:d4dda5c437f0 210
mbed_official 133:d4dda5c437f0 211 /** @defgroup ADCEx_External_trigger_Source_Injected
mbed_official 133:d4dda5c437f0 212 * @{
mbed_official 133:d4dda5c437f0 213 */
mbed_official 133:d4dda5c437f0 214 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000)
mbed_official 133:d4dda5c437f0 215 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
mbed_official 133:d4dda5c437f0 216 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
mbed_official 133:d4dda5c437f0 217 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
mbed_official 133:d4dda5c437f0 218 #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
mbed_official 133:d4dda5c437f0 219 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
mbed_official 133:d4dda5c437f0 220 #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
mbed_official 133:d4dda5c437f0 221 #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
mbed_official 133:d4dda5c437f0 222 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
mbed_official 133:d4dda5c437f0 223 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
mbed_official 133:d4dda5c437f0 224 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
mbed_official 133:d4dda5c437f0 225 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
mbed_official 133:d4dda5c437f0 226 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
mbed_official 133:d4dda5c437f0 227 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
mbed_official 133:d4dda5c437f0 228 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
mbed_official 133:d4dda5c437f0 229 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
mbed_official 133:d4dda5c437f0 230
mbed_official 133:d4dda5c437f0 231 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
mbed_official 133:d4dda5c437f0 232 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
mbed_official 133:d4dda5c437f0 233 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
mbed_official 133:d4dda5c437f0 234 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
mbed_official 133:d4dda5c437f0 235 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
mbed_official 133:d4dda5c437f0 236 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
mbed_official 133:d4dda5c437f0 237 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
mbed_official 133:d4dda5c437f0 238 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
mbed_official 133:d4dda5c437f0 239 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
mbed_official 133:d4dda5c437f0 240 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
mbed_official 133:d4dda5c437f0 241 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
mbed_official 133:d4dda5c437f0 242 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
mbed_official 133:d4dda5c437f0 243 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
mbed_official 133:d4dda5c437f0 244 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
mbed_official 133:d4dda5c437f0 245 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
mbed_official 133:d4dda5c437f0 246 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15))
mbed_official 133:d4dda5c437f0 247 /**
mbed_official 133:d4dda5c437f0 248 * @}
mbed_official 133:d4dda5c437f0 249 */
mbed_official 133:d4dda5c437f0 250
mbed_official 133:d4dda5c437f0 251 /** @defgroup ADCEx_injected_channel_selection
mbed_official 133:d4dda5c437f0 252 * @{
mbed_official 133:d4dda5c437f0 253 */
mbed_official 133:d4dda5c437f0 254 #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001)
mbed_official 133:d4dda5c437f0 255 #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002)
mbed_official 133:d4dda5c437f0 256 #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003)
mbed_official 133:d4dda5c437f0 257 #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004)
mbed_official 133:d4dda5c437f0 258
mbed_official 133:d4dda5c437f0 259 /**
mbed_official 133:d4dda5c437f0 260 * @}
mbed_official 133:d4dda5c437f0 261 */
mbed_official 133:d4dda5c437f0 262
mbed_official 133:d4dda5c437f0 263 /** @defgroup ADCEx_injected_length
mbed_official 133:d4dda5c437f0 264 * @{
mbed_official 133:d4dda5c437f0 265 */
mbed_official 133:d4dda5c437f0 266 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
mbed_official 133:d4dda5c437f0 267 /**
mbed_official 133:d4dda5c437f0 268 * @}
mbed_official 133:d4dda5c437f0 269 */
mbed_official 133:d4dda5c437f0 270
mbed_official 133:d4dda5c437f0 271 /** @defgroup ADCEx_injected_rank
mbed_official 133:d4dda5c437f0 272 * @{
mbed_official 133:d4dda5c437f0 273 */
mbed_official 133:d4dda5c437f0 274 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4)))
mbed_official 133:d4dda5c437f0 275 /**
mbed_official 133:d4dda5c437f0 276 * @}
mbed_official 133:d4dda5c437f0 277 */
mbed_official 133:d4dda5c437f0 278
mbed_official 133:d4dda5c437f0 279 /**
mbed_official 133:d4dda5c437f0 280 * @}
mbed_official 133:d4dda5c437f0 281 */
mbed_official 133:d4dda5c437f0 282
mbed_official 133:d4dda5c437f0 283 /* Exported macro ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 284
mbed_official 133:d4dda5c437f0 285 /**
mbed_official 133:d4dda5c437f0 286 * @brief Set the selected injected Channel rank.
mbed_official 133:d4dda5c437f0 287 * @param _CHANNELNB_: Channel number.
mbed_official 133:d4dda5c437f0 288 * @param _RANKNB_: Rank number.
mbed_official 133:d4dda5c437f0 289 * @param _JSQR_JL_: Sequence length.
mbed_official 133:d4dda5c437f0 290 * @retval None
mbed_official 133:d4dda5c437f0 291 */
mbed_official 133:d4dda5c437f0 292 #define __HAL_ADC_JSQR(_CHANNELNB_, _RANKNB_,_JSQR_JL_) \
mbed_official 133:d4dda5c437f0 293 ((_CHANNELNB_) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))
mbed_official 133:d4dda5c437f0 294
mbed_official 133:d4dda5c437f0 295 /* Exported functions --------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 296
mbed_official 133:d4dda5c437f0 297 /* I/O operation functions ******************************************************/
mbed_official 133:d4dda5c437f0 298 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
mbed_official 133:d4dda5c437f0 299 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
mbed_official 133:d4dda5c437f0 300 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
mbed_official 133:d4dda5c437f0 301 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
mbed_official 133:d4dda5c437f0 302 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
mbed_official 133:d4dda5c437f0 303 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
mbed_official 133:d4dda5c437f0 304 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
mbed_official 133:d4dda5c437f0 305 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
mbed_official 133:d4dda5c437f0 306 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
mbed_official 133:d4dda5c437f0 307 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
mbed_official 133:d4dda5c437f0 308
mbed_official 133:d4dda5c437f0 309 /* Peripheral Control functions *************************************************/
mbed_official 133:d4dda5c437f0 310 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
mbed_official 133:d4dda5c437f0 311 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
mbed_official 133:d4dda5c437f0 312
mbed_official 133:d4dda5c437f0 313 /**
mbed_official 133:d4dda5c437f0 314 * @}
mbed_official 133:d4dda5c437f0 315 */
mbed_official 133:d4dda5c437f0 316
mbed_official 133:d4dda5c437f0 317 /**
mbed_official 133:d4dda5c437f0 318 * @}
mbed_official 133:d4dda5c437f0 319 */
mbed_official 133:d4dda5c437f0 320
mbed_official 133:d4dda5c437f0 321 #ifdef __cplusplus
mbed_official 133:d4dda5c437f0 322 }
mbed_official 133:d4dda5c437f0 323 #endif
mbed_official 133:d4dda5c437f0 324
mbed_official 133:d4dda5c437f0 325 #endif /*__STM32F4xx_ADC_EX_H */
mbed_official 133:d4dda5c437f0 326
mbed_official 133:d4dda5c437f0 327
mbed_official 133:d4dda5c437f0 328 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/