mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_STM32F407VG/stm32f4xx_hal_adc.c@310:6188e0254baa, 2014-09-16 (annotated)
- Committer:
- janekm
- Date:
- Tue Sep 16 22:42:01 2014 +0000
- Revision:
- 310:6188e0254baa
- Parent:
- 297:ec1b66a3d094
N/A
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 133:d4dda5c437f0 | 1 | /** |
mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_adc.c |
mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
mbed_official | 242:7074e42da0b2 | 5 | * @version V1.1.0RC2 |
mbed_official | 242:7074e42da0b2 | 6 | * @date 14-May-2014 |
mbed_official | 133:d4dda5c437f0 | 7 | * @brief This file provides firmware functions to manage the following |
mbed_official | 133:d4dda5c437f0 | 8 | * functionalities of the Analog to Digital Convertor (ADC) peripheral: |
mbed_official | 133:d4dda5c437f0 | 9 | * + Initialization and de-initialization functions |
mbed_official | 133:d4dda5c437f0 | 10 | * + IO operation functions |
mbed_official | 133:d4dda5c437f0 | 11 | * + State and errors functions |
mbed_official | 133:d4dda5c437f0 | 12 | * |
mbed_official | 133:d4dda5c437f0 | 13 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 14 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 15 | ##### ADC Peripheral features ##### |
mbed_official | 133:d4dda5c437f0 | 16 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 17 | [..] |
mbed_official | 133:d4dda5c437f0 | 18 | (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution. |
mbed_official | 133:d4dda5c437f0 | 19 | (#) Interrupt generation at the end of conversion, end of injected conversion, |
mbed_official | 133:d4dda5c437f0 | 20 | and in case of analog watchdog or overrun events |
mbed_official | 133:d4dda5c437f0 | 21 | (#) Single and continuous conversion modes. |
mbed_official | 133:d4dda5c437f0 | 22 | (#) Scan mode for automatic conversion of channel 0 to channel x. |
mbed_official | 133:d4dda5c437f0 | 23 | (#) Data alignment with in-built data coherency. |
mbed_official | 133:d4dda5c437f0 | 24 | (#) Channel-wise programmable sampling time. |
mbed_official | 133:d4dda5c437f0 | 25 | (#) External trigger option with configurable polarity for both regular and |
mbed_official | 133:d4dda5c437f0 | 26 | injected conversion. |
mbed_official | 133:d4dda5c437f0 | 27 | (#) Dual/Triple mode (on devices with 2 ADCs or more). |
mbed_official | 133:d4dda5c437f0 | 28 | (#) Configurable DMA data storage in Dual/Triple ADC mode. |
mbed_official | 133:d4dda5c437f0 | 29 | (#) Configurable delay between conversions in Dual/Triple interleaved mode. |
mbed_official | 133:d4dda5c437f0 | 30 | (#) ADC conversion type (refer to the datasheets). |
mbed_official | 133:d4dda5c437f0 | 31 | (#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at |
mbed_official | 133:d4dda5c437f0 | 32 | slower speed. |
mbed_official | 133:d4dda5c437f0 | 33 | (#) ADC input range: VREF(minus) = VIN = VREF(plus). |
mbed_official | 133:d4dda5c437f0 | 34 | (#) DMA request generation during regular channel conversion. |
mbed_official | 133:d4dda5c437f0 | 35 | |
mbed_official | 133:d4dda5c437f0 | 36 | |
mbed_official | 133:d4dda5c437f0 | 37 | ##### How to use this driver ##### |
mbed_official | 133:d4dda5c437f0 | 38 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 39 | [..] |
mbed_official | 133:d4dda5c437f0 | 40 | (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit(): |
mbed_official | 133:d4dda5c437f0 | 41 | (##) Enable the ADC interface clock using __ADC_CLK_ENABLE() |
mbed_official | 133:d4dda5c437f0 | 42 | (##) ADC pins configuration |
mbed_official | 133:d4dda5c437f0 | 43 | (+++) Enable the clock for the ADC GPIOs using the following function: |
mbed_official | 133:d4dda5c437f0 | 44 | __GPIOx_CLK_ENABLE() |
mbed_official | 133:d4dda5c437f0 | 45 | (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init() |
mbed_official | 133:d4dda5c437f0 | 46 | (##) In case of using interrupts (e.g. HAL_ADC_Start_IT()) |
mbed_official | 133:d4dda5c437f0 | 47 | (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority() |
mbed_official | 133:d4dda5c437f0 | 48 | (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ() |
mbed_official | 133:d4dda5c437f0 | 49 | (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler() |
mbed_official | 133:d4dda5c437f0 | 50 | (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA()) |
mbed_official | 133:d4dda5c437f0 | 51 | (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE() |
mbed_official | 133:d4dda5c437f0 | 52 | (+++) Configure and enable two DMA streams stream for managing data |
mbed_official | 133:d4dda5c437f0 | 53 | transfer from peripheral to memory (output stream) |
mbed_official | 133:d4dda5c437f0 | 54 | (+++) Associate the initilalized DMA handle to the CRYP DMA handle |
mbed_official | 133:d4dda5c437f0 | 55 | using __HAL_LINKDMA() |
mbed_official | 133:d4dda5c437f0 | 56 | (+++) Configure the priority and enable the NVIC for the transfer complete |
mbed_official | 133:d4dda5c437f0 | 57 | interrupt on the two DMA Streams. The output stream should have higher |
mbed_official | 133:d4dda5c437f0 | 58 | priority than the input stream. |
mbed_official | 133:d4dda5c437f0 | 59 | |
mbed_official | 133:d4dda5c437f0 | 60 | (#) Configure the ADC Prescaler, conversion resolution and data alignment |
mbed_official | 133:d4dda5c437f0 | 61 | using the HAL_ADC_Init() function. |
mbed_official | 133:d4dda5c437f0 | 62 | |
mbed_official | 133:d4dda5c437f0 | 63 | (#) Configure the ADC regular channels group features, use HAL_ADC_Init() |
mbed_official | 133:d4dda5c437f0 | 64 | and HAL_ADC_ConfigChannel() functions. |
mbed_official | 133:d4dda5c437f0 | 65 | |
mbed_official | 242:7074e42da0b2 | 66 | (#) Three operation modes are available within this driver : |
mbed_official | 133:d4dda5c437f0 | 67 | |
mbed_official | 133:d4dda5c437f0 | 68 | *** Polling mode IO operation *** |
mbed_official | 133:d4dda5c437f0 | 69 | ================================= |
mbed_official | 133:d4dda5c437f0 | 70 | [..] |
mbed_official | 133:d4dda5c437f0 | 71 | (+) Start the ADC peripheral using HAL_ADC_Start() |
mbed_official | 133:d4dda5c437f0 | 72 | (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage |
mbed_official | 133:d4dda5c437f0 | 73 | user can specify the value of timeout according to his end application |
mbed_official | 133:d4dda5c437f0 | 74 | (+) To read the ADC converted values, use the HAL_ADC_GetValue() function. |
mbed_official | 133:d4dda5c437f0 | 75 | (+) Stop the ADC peripheral using HAL_ADC_Stop() |
mbed_official | 133:d4dda5c437f0 | 76 | |
mbed_official | 133:d4dda5c437f0 | 77 | *** Interrupt mode IO operation *** |
mbed_official | 133:d4dda5c437f0 | 78 | =================================== |
mbed_official | 133:d4dda5c437f0 | 79 | [..] |
mbed_official | 133:d4dda5c437f0 | 80 | (+) Start the ADC peripheral using HAL_ADC_Start_IT() |
mbed_official | 133:d4dda5c437f0 | 81 | (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine |
mbed_official | 133:d4dda5c437f0 | 82 | (+) At ADC end of conversion HAL_ADC_ConvCpltCallback() function is executed and user can |
mbed_official | 133:d4dda5c437f0 | 83 | add his own code by customization of function pointer HAL_ADC_ConvCpltCallback |
mbed_official | 133:d4dda5c437f0 | 84 | (+) In case of ADC Error, HAL_ADC_ErrorCallback() function is executed and user can |
mbed_official | 133:d4dda5c437f0 | 85 | add his own code by customization of function pointer HAL_ADC_ErrorCallback |
mbed_official | 133:d4dda5c437f0 | 86 | (+) Stop the ADC peripheral using HAL_ADC_Stop_IT() |
mbed_official | 133:d4dda5c437f0 | 87 | |
mbed_official | 133:d4dda5c437f0 | 88 | *** DMA mode IO operation *** |
mbed_official | 133:d4dda5c437f0 | 89 | ============================== |
mbed_official | 133:d4dda5c437f0 | 90 | [..] |
mbed_official | 133:d4dda5c437f0 | 91 | (+) Start the ADC peripheral using HAL_ADC_Start_DMA(), at this stage the user specify the length |
mbed_official | 242:7074e42da0b2 | 92 | of data to be transferred at each end of conversion |
mbed_official | 133:d4dda5c437f0 | 93 | (+) At The end of data transfer by HAL_ADC_ConvCpltCallback() function is executed and user can |
mbed_official | 133:d4dda5c437f0 | 94 | add his own code by customization of function pointer HAL_ADC_ConvCpltCallback |
mbed_official | 133:d4dda5c437f0 | 95 | (+) In case of transfer Error, HAL_ADC_ErrorCallback() function is executed and user can |
mbed_official | 133:d4dda5c437f0 | 96 | add his own code by customization of function pointer HAL_ADC_ErrorCallback |
mbed_official | 133:d4dda5c437f0 | 97 | (+) Stop the ADC peripheral using HAL_ADC_Stop_DMA() |
mbed_official | 133:d4dda5c437f0 | 98 | |
mbed_official | 133:d4dda5c437f0 | 99 | *** ADC HAL driver macros list *** |
mbed_official | 133:d4dda5c437f0 | 100 | ============================================= |
mbed_official | 133:d4dda5c437f0 | 101 | [..] |
mbed_official | 133:d4dda5c437f0 | 102 | Below the list of most used macros in ADC HAL driver. |
mbed_official | 133:d4dda5c437f0 | 103 | |
mbed_official | 133:d4dda5c437f0 | 104 | (+) __HAL_ADC_ENABLE : Enable the ADC peripheral |
mbed_official | 133:d4dda5c437f0 | 105 | (+) __HAL_ADC_DISABLE : Disable the ADC peripheral |
mbed_official | 133:d4dda5c437f0 | 106 | (+) __HAL_ADC_ENABLE_IT: Enable the ADC end of conversion interrupt |
mbed_official | 133:d4dda5c437f0 | 107 | (+) __HAL_ADC_DISABLE_IT: Disable the ADC end of conversion interrupt |
mbed_official | 133:d4dda5c437f0 | 108 | (+) __HAL_ADC_GET_IT_SOURCE: Check if the specified ADC interrupt source is enabled or disabled |
mbed_official | 133:d4dda5c437f0 | 109 | (+) __HAL_ADC_CLEAR_FLAG: Clear the ADC's pending flags |
mbed_official | 133:d4dda5c437f0 | 110 | (+) __HAL_ADC_GET_FLAG: Get the selected ADC's flag status |
mbed_official | 133:d4dda5c437f0 | 111 | (+) __HAL_ADC_GET_RESOLUTION: Return resolution bits in CR1 register |
mbed_official | 133:d4dda5c437f0 | 112 | |
mbed_official | 133:d4dda5c437f0 | 113 | [..] |
mbed_official | 133:d4dda5c437f0 | 114 | (@) You can refer to the ADC HAL driver header file for more useful macros |
mbed_official | 133:d4dda5c437f0 | 115 | |
mbed_official | 133:d4dda5c437f0 | 116 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 117 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 118 | * @attention |
mbed_official | 133:d4dda5c437f0 | 119 | * |
mbed_official | 133:d4dda5c437f0 | 120 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 133:d4dda5c437f0 | 121 | * |
mbed_official | 133:d4dda5c437f0 | 122 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 133:d4dda5c437f0 | 123 | * are permitted provided that the following conditions are met: |
mbed_official | 133:d4dda5c437f0 | 124 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 125 | * this list of conditions and the following disclaimer. |
mbed_official | 133:d4dda5c437f0 | 126 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 127 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 133:d4dda5c437f0 | 128 | * and/or other materials provided with the distribution. |
mbed_official | 133:d4dda5c437f0 | 129 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 133:d4dda5c437f0 | 130 | * may be used to endorse or promote products derived from this software |
mbed_official | 133:d4dda5c437f0 | 131 | * without specific prior written permission. |
mbed_official | 133:d4dda5c437f0 | 132 | * |
mbed_official | 133:d4dda5c437f0 | 133 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 133:d4dda5c437f0 | 134 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 133:d4dda5c437f0 | 135 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 133:d4dda5c437f0 | 136 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 133:d4dda5c437f0 | 137 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 133:d4dda5c437f0 | 138 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 133:d4dda5c437f0 | 139 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 133:d4dda5c437f0 | 140 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 133:d4dda5c437f0 | 141 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 133:d4dda5c437f0 | 142 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 133:d4dda5c437f0 | 143 | * |
mbed_official | 133:d4dda5c437f0 | 144 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 145 | */ |
mbed_official | 133:d4dda5c437f0 | 146 | |
mbed_official | 133:d4dda5c437f0 | 147 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 148 | #include "stm32f4xx_hal.h" |
mbed_official | 133:d4dda5c437f0 | 149 | |
mbed_official | 133:d4dda5c437f0 | 150 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 133:d4dda5c437f0 | 151 | * @{ |
mbed_official | 133:d4dda5c437f0 | 152 | */ |
mbed_official | 133:d4dda5c437f0 | 153 | |
mbed_official | 133:d4dda5c437f0 | 154 | /** @defgroup ADC |
mbed_official | 133:d4dda5c437f0 | 155 | * @brief ADC driver modules |
mbed_official | 133:d4dda5c437f0 | 156 | * @{ |
mbed_official | 133:d4dda5c437f0 | 157 | */ |
mbed_official | 133:d4dda5c437f0 | 158 | |
mbed_official | 133:d4dda5c437f0 | 159 | #ifdef HAL_ADC_MODULE_ENABLED |
mbed_official | 133:d4dda5c437f0 | 160 | |
mbed_official | 133:d4dda5c437f0 | 161 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 162 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 163 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 164 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 165 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 166 | static void ADC_Init(ADC_HandleTypeDef* hadc); |
mbed_official | 133:d4dda5c437f0 | 167 | static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 168 | static void ADC_DMAError(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 169 | static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 170 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 171 | |
mbed_official | 133:d4dda5c437f0 | 172 | /** @defgroup ADC_Private_Functions |
mbed_official | 133:d4dda5c437f0 | 173 | * @{ |
mbed_official | 133:d4dda5c437f0 | 174 | */ |
mbed_official | 133:d4dda5c437f0 | 175 | |
mbed_official | 133:d4dda5c437f0 | 176 | /** @defgroup ADC_Group1 Initialization and de-initialization functions |
mbed_official | 133:d4dda5c437f0 | 177 | * @brief Initialization and Configuration functions |
mbed_official | 133:d4dda5c437f0 | 178 | * |
mbed_official | 133:d4dda5c437f0 | 179 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 180 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 181 | ##### Initialization and de-initialization functions ##### |
mbed_official | 133:d4dda5c437f0 | 182 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 183 | [..] This section provides functions allowing to: |
mbed_official | 133:d4dda5c437f0 | 184 | (+) Initialize and configure the ADC. |
mbed_official | 133:d4dda5c437f0 | 185 | (+) De-initialize the ADC. |
mbed_official | 133:d4dda5c437f0 | 186 | |
mbed_official | 133:d4dda5c437f0 | 187 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 188 | * @{ |
mbed_official | 133:d4dda5c437f0 | 189 | */ |
mbed_official | 133:d4dda5c437f0 | 190 | |
mbed_official | 133:d4dda5c437f0 | 191 | /** |
mbed_official | 133:d4dda5c437f0 | 192 | * @brief Initializes the ADCx peripheral according to the specified parameters |
mbed_official | 133:d4dda5c437f0 | 193 | * in the ADC_InitStruct and initializes the ADC MSP. |
mbed_official | 133:d4dda5c437f0 | 194 | * |
mbed_official | 133:d4dda5c437f0 | 195 | * @note This function is used to configure the global features of the ADC ( |
mbed_official | 133:d4dda5c437f0 | 196 | * ClockPrescaler, Resolution, Data Alignment and number of conversion), however, |
mbed_official | 133:d4dda5c437f0 | 197 | * the rest of the configuration parameters are specific to the regular |
mbed_official | 133:d4dda5c437f0 | 198 | * channels group (scan mode activation, continuous mode activation, |
mbed_official | 133:d4dda5c437f0 | 199 | * External trigger source and edge, DMA continuous request after the |
mbed_official | 133:d4dda5c437f0 | 200 | * last transfer and End of conversion selection). |
mbed_official | 133:d4dda5c437f0 | 201 | * |
mbed_official | 133:d4dda5c437f0 | 202 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 203 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 204 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 205 | */ |
mbed_official | 133:d4dda5c437f0 | 206 | HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 207 | { |
mbed_official | 133:d4dda5c437f0 | 208 | /* Check ADC handle */ |
mbed_official | 133:d4dda5c437f0 | 209 | if(hadc == NULL) |
mbed_official | 133:d4dda5c437f0 | 210 | { |
mbed_official | 133:d4dda5c437f0 | 211 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 212 | } |
mbed_official | 133:d4dda5c437f0 | 213 | |
mbed_official | 133:d4dda5c437f0 | 214 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 215 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 133:d4dda5c437f0 | 216 | assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); |
mbed_official | 133:d4dda5c437f0 | 217 | assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); |
mbed_official | 133:d4dda5c437f0 | 218 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ScanConvMode)); |
mbed_official | 133:d4dda5c437f0 | 219 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
mbed_official | 133:d4dda5c437f0 | 220 | assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); |
mbed_official | 133:d4dda5c437f0 | 221 | assert_param(IS_ADC_EXT_TRIG(hadc->Init.ExternalTrigConv)); |
mbed_official | 133:d4dda5c437f0 | 222 | assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); |
mbed_official | 133:d4dda5c437f0 | 223 | assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion)); |
mbed_official | 133:d4dda5c437f0 | 224 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); |
mbed_official | 133:d4dda5c437f0 | 225 | assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection)); |
mbed_official | 133:d4dda5c437f0 | 226 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); |
mbed_official | 133:d4dda5c437f0 | 227 | |
mbed_official | 133:d4dda5c437f0 | 228 | if(hadc->State == HAL_ADC_STATE_RESET) |
mbed_official | 133:d4dda5c437f0 | 229 | { |
mbed_official | 133:d4dda5c437f0 | 230 | /* Init the low level hardware */ |
mbed_official | 133:d4dda5c437f0 | 231 | HAL_ADC_MspInit(hadc); |
mbed_official | 133:d4dda5c437f0 | 232 | } |
mbed_official | 133:d4dda5c437f0 | 233 | |
mbed_official | 133:d4dda5c437f0 | 234 | /* Initialize the ADC state */ |
mbed_official | 133:d4dda5c437f0 | 235 | hadc->State = HAL_ADC_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 236 | |
mbed_official | 133:d4dda5c437f0 | 237 | /* Set ADC parameters */ |
mbed_official | 133:d4dda5c437f0 | 238 | ADC_Init(hadc); |
mbed_official | 133:d4dda5c437f0 | 239 | |
mbed_official | 133:d4dda5c437f0 | 240 | /* Set ADC error code to none */ |
mbed_official | 133:d4dda5c437f0 | 241 | hadc->ErrorCode = HAL_ADC_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 242 | |
mbed_official | 133:d4dda5c437f0 | 243 | /* Initialize the ADC state */ |
mbed_official | 133:d4dda5c437f0 | 244 | hadc->State = HAL_ADC_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 245 | |
mbed_official | 133:d4dda5c437f0 | 246 | /* Release Lock */ |
mbed_official | 133:d4dda5c437f0 | 247 | __HAL_UNLOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 248 | |
mbed_official | 133:d4dda5c437f0 | 249 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 250 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 251 | } |
mbed_official | 133:d4dda5c437f0 | 252 | |
mbed_official | 133:d4dda5c437f0 | 253 | /** |
mbed_official | 133:d4dda5c437f0 | 254 | * @brief Deinitializes the ADCx peripheral registers to their default reset values. |
mbed_official | 133:d4dda5c437f0 | 255 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 256 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 257 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 258 | */ |
mbed_official | 133:d4dda5c437f0 | 259 | HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 260 | { |
mbed_official | 133:d4dda5c437f0 | 261 | /* Check ADC handle */ |
mbed_official | 133:d4dda5c437f0 | 262 | if(hadc == NULL) |
mbed_official | 133:d4dda5c437f0 | 263 | { |
mbed_official | 133:d4dda5c437f0 | 264 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 265 | } |
mbed_official | 133:d4dda5c437f0 | 266 | |
mbed_official | 133:d4dda5c437f0 | 267 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 268 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 133:d4dda5c437f0 | 269 | |
mbed_official | 133:d4dda5c437f0 | 270 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 271 | hadc->State = HAL_ADC_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 272 | |
mbed_official | 133:d4dda5c437f0 | 273 | /* DeInit the low level hardware */ |
mbed_official | 133:d4dda5c437f0 | 274 | HAL_ADC_MspDeInit(hadc); |
mbed_official | 133:d4dda5c437f0 | 275 | |
mbed_official | 133:d4dda5c437f0 | 276 | /* Set ADC error code to none */ |
mbed_official | 133:d4dda5c437f0 | 277 | hadc->ErrorCode = HAL_ADC_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 278 | |
mbed_official | 133:d4dda5c437f0 | 279 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 280 | hadc->State = HAL_ADC_STATE_RESET; |
mbed_official | 133:d4dda5c437f0 | 281 | |
mbed_official | 133:d4dda5c437f0 | 282 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 283 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 284 | } |
mbed_official | 133:d4dda5c437f0 | 285 | |
mbed_official | 133:d4dda5c437f0 | 286 | /** |
mbed_official | 133:d4dda5c437f0 | 287 | * @brief Initializes the ADC MSP. |
mbed_official | 133:d4dda5c437f0 | 288 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 289 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 290 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 291 | */ |
mbed_official | 133:d4dda5c437f0 | 292 | __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 293 | { |
mbed_official | 133:d4dda5c437f0 | 294 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 295 | the HAL_ADC_MspInit could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 296 | */ |
mbed_official | 133:d4dda5c437f0 | 297 | } |
mbed_official | 133:d4dda5c437f0 | 298 | |
mbed_official | 133:d4dda5c437f0 | 299 | /** |
mbed_official | 133:d4dda5c437f0 | 300 | * @brief DeInitializes the ADC MSP. |
mbed_official | 133:d4dda5c437f0 | 301 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 302 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 303 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 304 | */ |
mbed_official | 133:d4dda5c437f0 | 305 | __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 306 | { |
mbed_official | 133:d4dda5c437f0 | 307 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 308 | the HAL_ADC_MspDeInit could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 309 | */ |
mbed_official | 133:d4dda5c437f0 | 310 | } |
mbed_official | 133:d4dda5c437f0 | 311 | |
mbed_official | 133:d4dda5c437f0 | 312 | /** |
mbed_official | 133:d4dda5c437f0 | 313 | * @} |
mbed_official | 133:d4dda5c437f0 | 314 | */ |
mbed_official | 133:d4dda5c437f0 | 315 | |
mbed_official | 133:d4dda5c437f0 | 316 | /** @defgroup ADC_Group2 IO operation functions |
mbed_official | 133:d4dda5c437f0 | 317 | * @brief IO operation functions |
mbed_official | 133:d4dda5c437f0 | 318 | * |
mbed_official | 133:d4dda5c437f0 | 319 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 320 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 321 | ##### IO operation functions ##### |
mbed_official | 133:d4dda5c437f0 | 322 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 323 | [..] This section provides functions allowing to: |
mbed_official | 133:d4dda5c437f0 | 324 | (+) Start conversion of regular channel. |
mbed_official | 133:d4dda5c437f0 | 325 | (+) Stop conversion of regular channel. |
mbed_official | 133:d4dda5c437f0 | 326 | (+) Start conversion of regular channel and enable interrupt. |
mbed_official | 133:d4dda5c437f0 | 327 | (+) Stop conversion of regular channel and disable interrupt. |
mbed_official | 133:d4dda5c437f0 | 328 | (+) Start conversion of regular channel and enable DMA transfer. |
mbed_official | 133:d4dda5c437f0 | 329 | (+) Stop conversion of regular channel and disable DMA transfer. |
mbed_official | 133:d4dda5c437f0 | 330 | (+) Handle ADC interrupt request. |
mbed_official | 133:d4dda5c437f0 | 331 | |
mbed_official | 133:d4dda5c437f0 | 332 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 333 | * @{ |
mbed_official | 133:d4dda5c437f0 | 334 | */ |
mbed_official | 133:d4dda5c437f0 | 335 | |
mbed_official | 133:d4dda5c437f0 | 336 | /** |
mbed_official | 133:d4dda5c437f0 | 337 | * @brief Enables ADC and starts conversion of the regular channels. |
mbed_official | 133:d4dda5c437f0 | 338 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 339 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 340 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 341 | */ |
mbed_official | 133:d4dda5c437f0 | 342 | HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 343 | { |
mbed_official | 133:d4dda5c437f0 | 344 | uint16_t i = 0; |
mbed_official | 133:d4dda5c437f0 | 345 | |
mbed_official | 133:d4dda5c437f0 | 346 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 347 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
mbed_official | 133:d4dda5c437f0 | 348 | assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); |
mbed_official | 133:d4dda5c437f0 | 349 | |
mbed_official | 133:d4dda5c437f0 | 350 | /* Process locked */ |
mbed_official | 133:d4dda5c437f0 | 351 | __HAL_LOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 352 | |
mbed_official | 133:d4dda5c437f0 | 353 | /* Check if an injected conversion is ongoing */ |
mbed_official | 133:d4dda5c437f0 | 354 | if(hadc->State == HAL_ADC_STATE_BUSY_INJ) |
mbed_official | 133:d4dda5c437f0 | 355 | { |
mbed_official | 133:d4dda5c437f0 | 356 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 357 | hadc->State = HAL_ADC_STATE_BUSY_INJ_REG; |
mbed_official | 133:d4dda5c437f0 | 358 | } |
mbed_official | 133:d4dda5c437f0 | 359 | else |
mbed_official | 133:d4dda5c437f0 | 360 | { |
mbed_official | 133:d4dda5c437f0 | 361 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 362 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
mbed_official | 133:d4dda5c437f0 | 363 | } |
mbed_official | 133:d4dda5c437f0 | 364 | |
mbed_official | 133:d4dda5c437f0 | 365 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
mbed_official | 133:d4dda5c437f0 | 366 | Tstab time the ADC's stabilization */ |
mbed_official | 133:d4dda5c437f0 | 367 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
mbed_official | 133:d4dda5c437f0 | 368 | { |
mbed_official | 133:d4dda5c437f0 | 369 | /* Enable the Peripheral */ |
mbed_official | 133:d4dda5c437f0 | 370 | __HAL_ADC_ENABLE(hadc); |
mbed_official | 133:d4dda5c437f0 | 371 | |
mbed_official | 133:d4dda5c437f0 | 372 | /* Delay inserted to wait during Tstab time the ADC's stabilazation */ |
mbed_official | 133:d4dda5c437f0 | 373 | for(; i <= 540; i++) |
mbed_official | 133:d4dda5c437f0 | 374 | { |
mbed_official | 133:d4dda5c437f0 | 375 | __NOP(); |
mbed_official | 133:d4dda5c437f0 | 376 | } |
mbed_official | 133:d4dda5c437f0 | 377 | } |
mbed_official | 133:d4dda5c437f0 | 378 | |
mbed_official | 133:d4dda5c437f0 | 379 | /* Check if Multimode enabled */ |
mbed_official | 133:d4dda5c437f0 | 380 | if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI)) |
mbed_official | 133:d4dda5c437f0 | 381 | { |
mbed_official | 133:d4dda5c437f0 | 382 | /* if no external trigger present enable software conversion of regular channels */ |
mbed_official | 133:d4dda5c437f0 | 383 | if(hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE) |
mbed_official | 133:d4dda5c437f0 | 384 | { |
mbed_official | 133:d4dda5c437f0 | 385 | /* Enable the selected ADC software conversion for regular group */ |
mbed_official | 133:d4dda5c437f0 | 386 | hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; |
mbed_official | 133:d4dda5c437f0 | 387 | } |
mbed_official | 133:d4dda5c437f0 | 388 | } |
mbed_official | 133:d4dda5c437f0 | 389 | else |
mbed_official | 133:d4dda5c437f0 | 390 | { |
mbed_official | 133:d4dda5c437f0 | 391 | /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */ |
mbed_official | 133:d4dda5c437f0 | 392 | if((hadc->Instance == ADC1) && (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE)) |
mbed_official | 133:d4dda5c437f0 | 393 | { |
mbed_official | 133:d4dda5c437f0 | 394 | /* Enable the selected ADC software conversion for regular group */ |
mbed_official | 133:d4dda5c437f0 | 395 | hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; |
mbed_official | 133:d4dda5c437f0 | 396 | } |
mbed_official | 133:d4dda5c437f0 | 397 | } |
mbed_official | 133:d4dda5c437f0 | 398 | |
mbed_official | 133:d4dda5c437f0 | 399 | /* Process unlocked */ |
mbed_official | 133:d4dda5c437f0 | 400 | __HAL_UNLOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 401 | |
mbed_official | 133:d4dda5c437f0 | 402 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 403 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 404 | } |
mbed_official | 133:d4dda5c437f0 | 405 | |
mbed_official | 133:d4dda5c437f0 | 406 | /** |
mbed_official | 133:d4dda5c437f0 | 407 | * @brief Disables ADC and stop conversion of regular channels. |
mbed_official | 133:d4dda5c437f0 | 408 | * |
mbed_official | 133:d4dda5c437f0 | 409 | * @note Caution: This function will stop also injected channels. |
mbed_official | 133:d4dda5c437f0 | 410 | * |
mbed_official | 133:d4dda5c437f0 | 411 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 412 | * the configuration information for the specified ADC. |
mbed_official | 242:7074e42da0b2 | 413 | * |
mbed_official | 133:d4dda5c437f0 | 414 | * @retval HAL status. |
mbed_official | 133:d4dda5c437f0 | 415 | */ |
mbed_official | 133:d4dda5c437f0 | 416 | HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 417 | { |
mbed_official | 133:d4dda5c437f0 | 418 | /* Disable the Peripheral */ |
mbed_official | 133:d4dda5c437f0 | 419 | __HAL_ADC_DISABLE(hadc); |
mbed_official | 133:d4dda5c437f0 | 420 | |
mbed_official | 133:d4dda5c437f0 | 421 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 422 | hadc->State = HAL_ADC_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 423 | |
mbed_official | 133:d4dda5c437f0 | 424 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 425 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 426 | } |
mbed_official | 133:d4dda5c437f0 | 427 | |
mbed_official | 133:d4dda5c437f0 | 428 | /** |
mbed_official | 133:d4dda5c437f0 | 429 | * @brief Poll for regular conversion complete |
mbed_official | 133:d4dda5c437f0 | 430 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 431 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 432 | * @param Timeout: Timeout value in millisecond. |
mbed_official | 133:d4dda5c437f0 | 433 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 434 | */ |
mbed_official | 133:d4dda5c437f0 | 435 | HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 436 | { |
mbed_official | 133:d4dda5c437f0 | 437 | uint32_t timeout; |
mbed_official | 133:d4dda5c437f0 | 438 | |
mbed_official | 133:d4dda5c437f0 | 439 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 440 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 441 | |
mbed_official | 133:d4dda5c437f0 | 442 | /* Check End of conversion flag */ |
mbed_official | 133:d4dda5c437f0 | 443 | while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC))) |
mbed_official | 133:d4dda5c437f0 | 444 | { |
mbed_official | 133:d4dda5c437f0 | 445 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 446 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 447 | { |
mbed_official | 133:d4dda5c437f0 | 448 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 449 | { |
mbed_official | 133:d4dda5c437f0 | 450 | hadc->State= HAL_ADC_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 451 | /* Process unlocked */ |
mbed_official | 133:d4dda5c437f0 | 452 | __HAL_UNLOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 453 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 454 | } |
mbed_official | 133:d4dda5c437f0 | 455 | } |
mbed_official | 133:d4dda5c437f0 | 456 | } |
mbed_official | 133:d4dda5c437f0 | 457 | |
mbed_official | 133:d4dda5c437f0 | 458 | /* Check if an injected conversion is ready */ |
mbed_official | 133:d4dda5c437f0 | 459 | if(hadc->State == HAL_ADC_STATE_EOC_INJ) |
mbed_official | 133:d4dda5c437f0 | 460 | { |
mbed_official | 133:d4dda5c437f0 | 461 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 462 | hadc->State = HAL_ADC_STATE_EOC_INJ_REG; |
mbed_official | 133:d4dda5c437f0 | 463 | } |
mbed_official | 133:d4dda5c437f0 | 464 | else |
mbed_official | 133:d4dda5c437f0 | 465 | { |
mbed_official | 133:d4dda5c437f0 | 466 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 467 | hadc->State = HAL_ADC_STATE_EOC_REG; |
mbed_official | 133:d4dda5c437f0 | 468 | } |
mbed_official | 133:d4dda5c437f0 | 469 | |
mbed_official | 133:d4dda5c437f0 | 470 | /* Return ADC state */ |
mbed_official | 133:d4dda5c437f0 | 471 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 472 | } |
mbed_official | 133:d4dda5c437f0 | 473 | |
mbed_official | 133:d4dda5c437f0 | 474 | /** |
mbed_official | 133:d4dda5c437f0 | 475 | * @brief Poll for conversion event |
mbed_official | 133:d4dda5c437f0 | 476 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 477 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 478 | * @param EventType: the ADC event type. |
mbed_official | 133:d4dda5c437f0 | 479 | * This parameter can be one of the following values: |
mbed_official | 133:d4dda5c437f0 | 480 | * @arg AWD_EVENT: ADC Analog watch Dog event. |
mbed_official | 133:d4dda5c437f0 | 481 | * @arg OVR_EVENT: ADC Overrun event. |
mbed_official | 133:d4dda5c437f0 | 482 | * @param Timeout: Timeout value in millisecond. |
mbed_official | 133:d4dda5c437f0 | 483 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 484 | */ |
mbed_official | 133:d4dda5c437f0 | 485 | HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 486 | { |
mbed_official | 133:d4dda5c437f0 | 487 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 488 | assert_param(IS_ADC_EVENT_TYPE(EventType)); |
mbed_official | 133:d4dda5c437f0 | 489 | |
mbed_official | 133:d4dda5c437f0 | 490 | uint32_t timeout; |
mbed_official | 133:d4dda5c437f0 | 491 | |
mbed_official | 133:d4dda5c437f0 | 492 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 493 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 494 | |
mbed_official | 133:d4dda5c437f0 | 495 | /* Check selected event flag */ |
mbed_official | 133:d4dda5c437f0 | 496 | while(!(__HAL_ADC_GET_FLAG(hadc,EventType))) |
mbed_official | 133:d4dda5c437f0 | 497 | { |
mbed_official | 133:d4dda5c437f0 | 498 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 499 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 500 | { |
mbed_official | 133:d4dda5c437f0 | 501 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 502 | { |
mbed_official | 133:d4dda5c437f0 | 503 | hadc->State= HAL_ADC_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 504 | /* Process unlocked */ |
mbed_official | 133:d4dda5c437f0 | 505 | __HAL_UNLOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 506 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 507 | } |
mbed_official | 133:d4dda5c437f0 | 508 | } |
mbed_official | 133:d4dda5c437f0 | 509 | } |
mbed_official | 133:d4dda5c437f0 | 510 | |
mbed_official | 133:d4dda5c437f0 | 511 | /* Check analog watchdog flag */ |
mbed_official | 133:d4dda5c437f0 | 512 | if(EventType == AWD_EVENT) |
mbed_official | 133:d4dda5c437f0 | 513 | { |
mbed_official | 133:d4dda5c437f0 | 514 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 515 | hadc->State = HAL_ADC_STATE_AWD; |
mbed_official | 133:d4dda5c437f0 | 516 | |
mbed_official | 133:d4dda5c437f0 | 517 | /* Clear the ADCx's analog watchdog flag */ |
mbed_official | 133:d4dda5c437f0 | 518 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); |
mbed_official | 133:d4dda5c437f0 | 519 | } |
mbed_official | 133:d4dda5c437f0 | 520 | else |
mbed_official | 133:d4dda5c437f0 | 521 | { |
mbed_official | 133:d4dda5c437f0 | 522 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 523 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 133:d4dda5c437f0 | 524 | |
mbed_official | 133:d4dda5c437f0 | 525 | /* Clear the ADCx's Overrun flag */ |
mbed_official | 133:d4dda5c437f0 | 526 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); |
mbed_official | 133:d4dda5c437f0 | 527 | } |
mbed_official | 133:d4dda5c437f0 | 528 | |
mbed_official | 133:d4dda5c437f0 | 529 | /* Return ADC state */ |
mbed_official | 133:d4dda5c437f0 | 530 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 531 | } |
mbed_official | 133:d4dda5c437f0 | 532 | |
mbed_official | 133:d4dda5c437f0 | 533 | |
mbed_official | 133:d4dda5c437f0 | 534 | /** |
mbed_official | 133:d4dda5c437f0 | 535 | * @brief Enables the interrupt and starts ADC conversion of regular channels. |
mbed_official | 133:d4dda5c437f0 | 536 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 537 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 538 | * @retval HAL status. |
mbed_official | 133:d4dda5c437f0 | 539 | */ |
mbed_official | 133:d4dda5c437f0 | 540 | HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 541 | { |
mbed_official | 133:d4dda5c437f0 | 542 | uint16_t i = 0; |
mbed_official | 133:d4dda5c437f0 | 543 | |
mbed_official | 133:d4dda5c437f0 | 544 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 545 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
mbed_official | 133:d4dda5c437f0 | 546 | assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); |
mbed_official | 133:d4dda5c437f0 | 547 | |
mbed_official | 133:d4dda5c437f0 | 548 | /* Process locked */ |
mbed_official | 133:d4dda5c437f0 | 549 | __HAL_LOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 550 | |
mbed_official | 133:d4dda5c437f0 | 551 | /* Check if an injected conversion is ongoing */ |
mbed_official | 133:d4dda5c437f0 | 552 | if(hadc->State == HAL_ADC_STATE_BUSY_INJ) |
mbed_official | 133:d4dda5c437f0 | 553 | { |
mbed_official | 133:d4dda5c437f0 | 554 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 555 | hadc->State = HAL_ADC_STATE_BUSY_INJ_REG; |
mbed_official | 133:d4dda5c437f0 | 556 | } |
mbed_official | 133:d4dda5c437f0 | 557 | else |
mbed_official | 133:d4dda5c437f0 | 558 | { |
mbed_official | 133:d4dda5c437f0 | 559 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 560 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
mbed_official | 133:d4dda5c437f0 | 561 | } |
mbed_official | 133:d4dda5c437f0 | 562 | |
mbed_official | 133:d4dda5c437f0 | 563 | /* Set ADC error code to none */ |
mbed_official | 133:d4dda5c437f0 | 564 | hadc->ErrorCode = HAL_ADC_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 565 | |
mbed_official | 133:d4dda5c437f0 | 566 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
mbed_official | 133:d4dda5c437f0 | 567 | Tstab time the ADC's stabilization */ |
mbed_official | 133:d4dda5c437f0 | 568 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
mbed_official | 133:d4dda5c437f0 | 569 | { |
mbed_official | 133:d4dda5c437f0 | 570 | /* Enable the Peripheral */ |
mbed_official | 133:d4dda5c437f0 | 571 | __HAL_ADC_ENABLE(hadc); |
mbed_official | 133:d4dda5c437f0 | 572 | |
mbed_official | 133:d4dda5c437f0 | 573 | /* Delay inserted to wait during Tstab time the ADC's stabilazation */ |
mbed_official | 133:d4dda5c437f0 | 574 | for(; i <= 540; i++) |
mbed_official | 133:d4dda5c437f0 | 575 | { |
mbed_official | 133:d4dda5c437f0 | 576 | __NOP(); |
mbed_official | 133:d4dda5c437f0 | 577 | } |
mbed_official | 133:d4dda5c437f0 | 578 | } |
mbed_official | 133:d4dda5c437f0 | 579 | |
mbed_official | 133:d4dda5c437f0 | 580 | /* Enable the ADC overrun interrupt */ |
mbed_official | 133:d4dda5c437f0 | 581 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
mbed_official | 133:d4dda5c437f0 | 582 | |
mbed_official | 133:d4dda5c437f0 | 583 | /* Enable the ADC end of conversion interrupt for regular group */ |
mbed_official | 133:d4dda5c437f0 | 584 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC); |
mbed_official | 133:d4dda5c437f0 | 585 | |
mbed_official | 133:d4dda5c437f0 | 586 | /* Check if Multimode enabled */ |
mbed_official | 133:d4dda5c437f0 | 587 | if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI)) |
mbed_official | 133:d4dda5c437f0 | 588 | { |
mbed_official | 133:d4dda5c437f0 | 589 | /* if no externel trigger present enable software conversion of regular channels */ |
mbed_official | 133:d4dda5c437f0 | 590 | if (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE) |
mbed_official | 133:d4dda5c437f0 | 591 | { |
mbed_official | 133:d4dda5c437f0 | 592 | /* Enable the selected ADC software conversion for regular group */ |
mbed_official | 133:d4dda5c437f0 | 593 | hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; |
mbed_official | 133:d4dda5c437f0 | 594 | } |
mbed_official | 133:d4dda5c437f0 | 595 | } |
mbed_official | 133:d4dda5c437f0 | 596 | else |
mbed_official | 133:d4dda5c437f0 | 597 | { |
mbed_official | 133:d4dda5c437f0 | 598 | /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */ |
mbed_official | 133:d4dda5c437f0 | 599 | if ((hadc->Instance == (ADC_TypeDef*)0x40012000) && (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE)) |
mbed_official | 133:d4dda5c437f0 | 600 | { |
mbed_official | 133:d4dda5c437f0 | 601 | /* Enable the selected ADC software conversion for regular group */ |
mbed_official | 133:d4dda5c437f0 | 602 | hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; |
mbed_official | 133:d4dda5c437f0 | 603 | } |
mbed_official | 133:d4dda5c437f0 | 604 | } |
mbed_official | 133:d4dda5c437f0 | 605 | |
mbed_official | 133:d4dda5c437f0 | 606 | /* Process unlocked */ |
mbed_official | 133:d4dda5c437f0 | 607 | __HAL_UNLOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 608 | |
mbed_official | 133:d4dda5c437f0 | 609 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 610 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 611 | } |
mbed_official | 133:d4dda5c437f0 | 612 | |
mbed_official | 133:d4dda5c437f0 | 613 | /** |
mbed_official | 133:d4dda5c437f0 | 614 | * @brief Disables the interrupt and stop ADC conversion of regular channels. |
mbed_official | 133:d4dda5c437f0 | 615 | * |
mbed_official | 133:d4dda5c437f0 | 616 | * @note Caution: This function will stop also injected channels. |
mbed_official | 133:d4dda5c437f0 | 617 | * |
mbed_official | 133:d4dda5c437f0 | 618 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 619 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 620 | * @retval HAL status. |
mbed_official | 133:d4dda5c437f0 | 621 | */ |
mbed_official | 133:d4dda5c437f0 | 622 | HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 623 | { |
mbed_official | 133:d4dda5c437f0 | 624 | /* Disable the ADC end of conversion interrupt for regular group */ |
mbed_official | 133:d4dda5c437f0 | 625 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); |
mbed_official | 133:d4dda5c437f0 | 626 | |
mbed_official | 133:d4dda5c437f0 | 627 | /* Disable the ADC end of conversion interrupt for injected group */ |
mbed_official | 133:d4dda5c437f0 | 628 | __HAL_ADC_DISABLE_IT(hadc, ADC_CR1_JEOCIE); |
mbed_official | 133:d4dda5c437f0 | 629 | |
mbed_official | 133:d4dda5c437f0 | 630 | /* Enable the Periphral */ |
mbed_official | 133:d4dda5c437f0 | 631 | __HAL_ADC_DISABLE(hadc); |
mbed_official | 133:d4dda5c437f0 | 632 | |
mbed_official | 133:d4dda5c437f0 | 633 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 634 | hadc->State = HAL_ADC_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 635 | |
mbed_official | 133:d4dda5c437f0 | 636 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 637 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 638 | } |
mbed_official | 133:d4dda5c437f0 | 639 | |
mbed_official | 133:d4dda5c437f0 | 640 | /** |
mbed_official | 133:d4dda5c437f0 | 641 | * @brief Handles ADC interrupt request |
mbed_official | 133:d4dda5c437f0 | 642 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 643 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 644 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 645 | */ |
mbed_official | 133:d4dda5c437f0 | 646 | void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 647 | { |
mbed_official | 133:d4dda5c437f0 | 648 | uint32_t tmp1 = 0, tmp2 = 0; |
mbed_official | 133:d4dda5c437f0 | 649 | |
mbed_official | 133:d4dda5c437f0 | 650 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 651 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
mbed_official | 133:d4dda5c437f0 | 652 | assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion)); |
mbed_official | 133:d4dda5c437f0 | 653 | assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection)); |
mbed_official | 133:d4dda5c437f0 | 654 | |
mbed_official | 133:d4dda5c437f0 | 655 | tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC); |
mbed_official | 133:d4dda5c437f0 | 656 | tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC); |
mbed_official | 133:d4dda5c437f0 | 657 | /* Check End of conversion flag for regular channels */ |
mbed_official | 133:d4dda5c437f0 | 658 | if(tmp1 && tmp2) |
mbed_official | 133:d4dda5c437f0 | 659 | { |
mbed_official | 133:d4dda5c437f0 | 660 | /* Check if an injected conversion is ready */ |
mbed_official | 133:d4dda5c437f0 | 661 | if(hadc->State == HAL_ADC_STATE_EOC_INJ) |
mbed_official | 133:d4dda5c437f0 | 662 | { |
mbed_official | 133:d4dda5c437f0 | 663 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 664 | hadc->State = HAL_ADC_STATE_EOC_INJ_REG; |
mbed_official | 133:d4dda5c437f0 | 665 | } |
mbed_official | 133:d4dda5c437f0 | 666 | else |
mbed_official | 133:d4dda5c437f0 | 667 | { |
mbed_official | 133:d4dda5c437f0 | 668 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 669 | hadc->State = HAL_ADC_STATE_EOC_REG; |
mbed_official | 133:d4dda5c437f0 | 670 | } |
mbed_official | 133:d4dda5c437f0 | 671 | |
mbed_official | 133:d4dda5c437f0 | 672 | if((hadc->Init.ContinuousConvMode == DISABLE) && (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE)) |
mbed_official | 133:d4dda5c437f0 | 673 | { |
mbed_official | 133:d4dda5c437f0 | 674 | if(hadc->Init.EOCSelection == EOC_SEQ_CONV) |
mbed_official | 133:d4dda5c437f0 | 675 | { |
mbed_official | 133:d4dda5c437f0 | 676 | /* DISABLE the ADC end of conversion interrupt for regular group */ |
mbed_official | 133:d4dda5c437f0 | 677 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); |
mbed_official | 133:d4dda5c437f0 | 678 | |
mbed_official | 133:d4dda5c437f0 | 679 | /* DISABLE the ADC overrun interrupt */ |
mbed_official | 133:d4dda5c437f0 | 680 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); |
mbed_official | 133:d4dda5c437f0 | 681 | } |
mbed_official | 133:d4dda5c437f0 | 682 | else |
mbed_official | 133:d4dda5c437f0 | 683 | { |
mbed_official | 133:d4dda5c437f0 | 684 | if (hadc->NbrOfCurrentConversionRank == 0) |
mbed_official | 133:d4dda5c437f0 | 685 | { |
mbed_official | 133:d4dda5c437f0 | 686 | hadc->NbrOfCurrentConversionRank = hadc->Init.NbrOfConversion; |
mbed_official | 133:d4dda5c437f0 | 687 | } |
mbed_official | 133:d4dda5c437f0 | 688 | |
mbed_official | 133:d4dda5c437f0 | 689 | /* Decrement the number of conversion when an interrupt occurs */ |
mbed_official | 133:d4dda5c437f0 | 690 | hadc->NbrOfCurrentConversionRank--; |
mbed_official | 133:d4dda5c437f0 | 691 | |
mbed_official | 133:d4dda5c437f0 | 692 | /* Check if all conversions are finished */ |
mbed_official | 133:d4dda5c437f0 | 693 | if(hadc->NbrOfCurrentConversionRank == 0) |
mbed_official | 133:d4dda5c437f0 | 694 | { |
mbed_official | 133:d4dda5c437f0 | 695 | /* DISABLE the ADC end of conversion interrupt for regular group */ |
mbed_official | 133:d4dda5c437f0 | 696 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); |
mbed_official | 133:d4dda5c437f0 | 697 | |
mbed_official | 133:d4dda5c437f0 | 698 | /* DISABLE the ADC overrun interrupt */ |
mbed_official | 133:d4dda5c437f0 | 699 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); |
mbed_official | 133:d4dda5c437f0 | 700 | } |
mbed_official | 133:d4dda5c437f0 | 701 | } |
mbed_official | 133:d4dda5c437f0 | 702 | } |
mbed_official | 133:d4dda5c437f0 | 703 | |
mbed_official | 133:d4dda5c437f0 | 704 | /* Conversion complete callback */ |
mbed_official | 133:d4dda5c437f0 | 705 | HAL_ADC_ConvCpltCallback(hadc); |
mbed_official | 133:d4dda5c437f0 | 706 | |
mbed_official | 133:d4dda5c437f0 | 707 | /* Clear the ADCx flag for regular end of conversion */ |
mbed_official | 133:d4dda5c437f0 | 708 | __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_EOC); |
mbed_official | 133:d4dda5c437f0 | 709 | } |
mbed_official | 133:d4dda5c437f0 | 710 | |
mbed_official | 133:d4dda5c437f0 | 711 | tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC); |
mbed_official | 133:d4dda5c437f0 | 712 | tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC); |
mbed_official | 133:d4dda5c437f0 | 713 | /* Check End of conversion flag for injected channels */ |
mbed_official | 133:d4dda5c437f0 | 714 | if(tmp1 && tmp2) |
mbed_official | 133:d4dda5c437f0 | 715 | { |
mbed_official | 133:d4dda5c437f0 | 716 | /* Check if a regular conversion is ready */ |
mbed_official | 133:d4dda5c437f0 | 717 | if(hadc->State == HAL_ADC_STATE_EOC_REG) |
mbed_official | 133:d4dda5c437f0 | 718 | { |
mbed_official | 133:d4dda5c437f0 | 719 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 720 | hadc->State = HAL_ADC_STATE_EOC_INJ_REG; |
mbed_official | 133:d4dda5c437f0 | 721 | } |
mbed_official | 133:d4dda5c437f0 | 722 | else |
mbed_official | 133:d4dda5c437f0 | 723 | { |
mbed_official | 133:d4dda5c437f0 | 724 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 725 | hadc->State = HAL_ADC_STATE_EOC_INJ; |
mbed_official | 133:d4dda5c437f0 | 726 | } |
mbed_official | 133:d4dda5c437f0 | 727 | |
mbed_official | 133:d4dda5c437f0 | 728 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
mbed_official | 133:d4dda5c437f0 | 729 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
mbed_official | 133:d4dda5c437f0 | 730 | if(((hadc->Init.ContinuousConvMode == DISABLE) || tmp1) && tmp2) |
mbed_official | 133:d4dda5c437f0 | 731 | { |
mbed_official | 133:d4dda5c437f0 | 732 | /* DISABLE the ADC end of conversion interrupt for injected group */ |
mbed_official | 133:d4dda5c437f0 | 733 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); |
mbed_official | 133:d4dda5c437f0 | 734 | } |
mbed_official | 133:d4dda5c437f0 | 735 | |
mbed_official | 133:d4dda5c437f0 | 736 | /* Conversion complete callback */ |
mbed_official | 133:d4dda5c437f0 | 737 | HAL_ADCEx_InjectedConvCpltCallback(hadc); |
mbed_official | 133:d4dda5c437f0 | 738 | |
mbed_official | 133:d4dda5c437f0 | 739 | /* Clear the ADCx flag for injected end of conversion */ |
mbed_official | 133:d4dda5c437f0 | 740 | __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_JEOC); |
mbed_official | 133:d4dda5c437f0 | 741 | } |
mbed_official | 133:d4dda5c437f0 | 742 | |
mbed_official | 133:d4dda5c437f0 | 743 | tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD); |
mbed_official | 133:d4dda5c437f0 | 744 | tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD); |
mbed_official | 133:d4dda5c437f0 | 745 | /* Check Analog watchdog flag */ |
mbed_official | 133:d4dda5c437f0 | 746 | if(tmp1 && tmp2) |
mbed_official | 133:d4dda5c437f0 | 747 | { |
mbed_official | 133:d4dda5c437f0 | 748 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 749 | hadc->State = HAL_ADC_STATE_AWD; |
mbed_official | 133:d4dda5c437f0 | 750 | |
mbed_official | 133:d4dda5c437f0 | 751 | /* Clear the ADCx's Analog watchdog flag */ |
mbed_official | 133:d4dda5c437f0 | 752 | __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_AWD); |
mbed_official | 133:d4dda5c437f0 | 753 | |
mbed_official | 133:d4dda5c437f0 | 754 | /* Level out of window callback */ |
mbed_official | 133:d4dda5c437f0 | 755 | HAL_ADC_LevelOutOfWindowCallback(hadc); |
mbed_official | 133:d4dda5c437f0 | 756 | } |
mbed_official | 133:d4dda5c437f0 | 757 | |
mbed_official | 133:d4dda5c437f0 | 758 | tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR); |
mbed_official | 133:d4dda5c437f0 | 759 | tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR); |
mbed_official | 133:d4dda5c437f0 | 760 | /* Check Overrun flag */ |
mbed_official | 133:d4dda5c437f0 | 761 | if(tmp1 && tmp2) |
mbed_official | 133:d4dda5c437f0 | 762 | { |
mbed_official | 133:d4dda5c437f0 | 763 | /* Change ADC state to overrun state */ |
mbed_official | 133:d4dda5c437f0 | 764 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 133:d4dda5c437f0 | 765 | |
mbed_official | 133:d4dda5c437f0 | 766 | /* Set ADC error code to overrun */ |
mbed_official | 133:d4dda5c437f0 | 767 | hadc->ErrorCode |= HAL_ADC_ERROR_OVR; |
mbed_official | 133:d4dda5c437f0 | 768 | |
mbed_official | 133:d4dda5c437f0 | 769 | /* Clear the Overrun flag */ |
mbed_official | 133:d4dda5c437f0 | 770 | __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_OVR); |
mbed_official | 133:d4dda5c437f0 | 771 | |
mbed_official | 133:d4dda5c437f0 | 772 | /* Error callback */ |
mbed_official | 133:d4dda5c437f0 | 773 | HAL_ADC_ErrorCallback(hadc); |
mbed_official | 133:d4dda5c437f0 | 774 | } |
mbed_official | 133:d4dda5c437f0 | 775 | } |
mbed_official | 133:d4dda5c437f0 | 776 | |
mbed_official | 133:d4dda5c437f0 | 777 | /** |
mbed_official | 133:d4dda5c437f0 | 778 | * @brief Enables ADC DMA request after last transfer (Single-ADC mode) and enables ADC peripheral |
mbed_official | 133:d4dda5c437f0 | 779 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 780 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 781 | * @param pData: The destination Buffer address. |
mbed_official | 133:d4dda5c437f0 | 782 | * @param Length: The length of data to be transferred from ADC peripheral to memory. |
mbed_official | 242:7074e42da0b2 | 783 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 784 | */ |
mbed_official | 133:d4dda5c437f0 | 785 | HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) |
mbed_official | 133:d4dda5c437f0 | 786 | { |
mbed_official | 133:d4dda5c437f0 | 787 | uint16_t i = 0; |
mbed_official | 133:d4dda5c437f0 | 788 | |
mbed_official | 133:d4dda5c437f0 | 789 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 790 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
mbed_official | 133:d4dda5c437f0 | 791 | assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); |
mbed_official | 133:d4dda5c437f0 | 792 | |
mbed_official | 133:d4dda5c437f0 | 793 | /* Process locked */ |
mbed_official | 133:d4dda5c437f0 | 794 | __HAL_LOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 795 | |
mbed_official | 133:d4dda5c437f0 | 796 | /* Enable ADC overrun interrupt */ |
mbed_official | 133:d4dda5c437f0 | 797 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
mbed_official | 133:d4dda5c437f0 | 798 | |
mbed_official | 133:d4dda5c437f0 | 799 | /* Enable ADC DMA mode */ |
mbed_official | 133:d4dda5c437f0 | 800 | hadc->Instance->CR2 |= ADC_CR2_DMA; |
mbed_official | 133:d4dda5c437f0 | 801 | |
mbed_official | 133:d4dda5c437f0 | 802 | /* Set the DMA transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 803 | hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; |
mbed_official | 133:d4dda5c437f0 | 804 | |
mbed_official | 133:d4dda5c437f0 | 805 | /* Set the DMA half transfer complete callback */ |
mbed_official | 133:d4dda5c437f0 | 806 | hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; |
mbed_official | 133:d4dda5c437f0 | 807 | |
mbed_official | 133:d4dda5c437f0 | 808 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 809 | hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ; |
mbed_official | 133:d4dda5c437f0 | 810 | |
mbed_official | 133:d4dda5c437f0 | 811 | /* Enable the DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 812 | HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); |
mbed_official | 133:d4dda5c437f0 | 813 | |
mbed_official | 133:d4dda5c437f0 | 814 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 815 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
mbed_official | 133:d4dda5c437f0 | 816 | |
mbed_official | 133:d4dda5c437f0 | 817 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
mbed_official | 133:d4dda5c437f0 | 818 | Tstab time the ADC's stabilization */ |
mbed_official | 133:d4dda5c437f0 | 819 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
mbed_official | 133:d4dda5c437f0 | 820 | { |
mbed_official | 133:d4dda5c437f0 | 821 | /* Enable the Peripheral */ |
mbed_official | 133:d4dda5c437f0 | 822 | __HAL_ADC_ENABLE(hadc); |
mbed_official | 133:d4dda5c437f0 | 823 | |
mbed_official | 133:d4dda5c437f0 | 824 | /* Delay inserted to wait during Tstab time the ADC's stabilazation */ |
mbed_official | 133:d4dda5c437f0 | 825 | for(; i <= 540; i++) |
mbed_official | 133:d4dda5c437f0 | 826 | { |
mbed_official | 133:d4dda5c437f0 | 827 | __NOP(); |
mbed_official | 133:d4dda5c437f0 | 828 | } |
mbed_official | 133:d4dda5c437f0 | 829 | } |
mbed_official | 133:d4dda5c437f0 | 830 | |
mbed_official | 133:d4dda5c437f0 | 831 | /* if no external trigger present enable software conversion of regular channels */ |
mbed_official | 133:d4dda5c437f0 | 832 | if (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE) |
mbed_official | 133:d4dda5c437f0 | 833 | { |
mbed_official | 133:d4dda5c437f0 | 834 | /* Enable the selected ADC software conversion for regular group */ |
mbed_official | 133:d4dda5c437f0 | 835 | hadc->Instance->CR2 |= ADC_CR2_SWSTART; |
mbed_official | 133:d4dda5c437f0 | 836 | } |
mbed_official | 133:d4dda5c437f0 | 837 | |
mbed_official | 133:d4dda5c437f0 | 838 | /* Process unlocked */ |
mbed_official | 133:d4dda5c437f0 | 839 | __HAL_UNLOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 840 | |
mbed_official | 133:d4dda5c437f0 | 841 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 842 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 843 | } |
mbed_official | 133:d4dda5c437f0 | 844 | |
mbed_official | 133:d4dda5c437f0 | 845 | /** |
mbed_official | 133:d4dda5c437f0 | 846 | * @brief Disables ADC DMA (Single-ADC mode) and disables ADC peripheral |
mbed_official | 133:d4dda5c437f0 | 847 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 848 | * the configuration information for the specified ADC. |
mbed_official | 242:7074e42da0b2 | 849 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 850 | */ |
mbed_official | 133:d4dda5c437f0 | 851 | HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 852 | { |
mbed_official | 133:d4dda5c437f0 | 853 | /* Disable the Periphral */ |
mbed_official | 133:d4dda5c437f0 | 854 | __HAL_ADC_DISABLE(hadc); |
mbed_official | 133:d4dda5c437f0 | 855 | |
mbed_official | 133:d4dda5c437f0 | 856 | /* Disable ADC overrun interrupt */ |
mbed_official | 133:d4dda5c437f0 | 857 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); |
mbed_official | 133:d4dda5c437f0 | 858 | |
mbed_official | 133:d4dda5c437f0 | 859 | /* Disable the selected ADC DMA mode */ |
mbed_official | 133:d4dda5c437f0 | 860 | hadc->Instance->CR2 &= ~ADC_CR2_DMA; |
mbed_official | 133:d4dda5c437f0 | 861 | |
mbed_official | 133:d4dda5c437f0 | 862 | /* Disable the ADC DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 863 | HAL_DMA_Abort(hadc->DMA_Handle); |
mbed_official | 133:d4dda5c437f0 | 864 | |
mbed_official | 133:d4dda5c437f0 | 865 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 866 | hadc->State = HAL_ADC_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 867 | |
mbed_official | 133:d4dda5c437f0 | 868 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 869 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 870 | } |
mbed_official | 133:d4dda5c437f0 | 871 | |
mbed_official | 133:d4dda5c437f0 | 872 | /** |
mbed_official | 133:d4dda5c437f0 | 873 | * @brief Gets the converted value from data register of regular channel. |
mbed_official | 133:d4dda5c437f0 | 874 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 875 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 876 | * @retval Converted value |
mbed_official | 133:d4dda5c437f0 | 877 | */ |
mbed_official | 133:d4dda5c437f0 | 878 | uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 879 | { |
mbed_official | 133:d4dda5c437f0 | 880 | /* Return the selected ADC converted value */ |
mbed_official | 133:d4dda5c437f0 | 881 | return hadc->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 882 | } |
mbed_official | 133:d4dda5c437f0 | 883 | |
mbed_official | 133:d4dda5c437f0 | 884 | /** |
mbed_official | 133:d4dda5c437f0 | 885 | * @brief Regular conversion complete callback in non blocking mode |
mbed_official | 133:d4dda5c437f0 | 886 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 887 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 888 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 889 | */ |
mbed_official | 133:d4dda5c437f0 | 890 | __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 891 | { |
mbed_official | 133:d4dda5c437f0 | 892 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 893 | the HAL_ADC_ConvCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 894 | */ |
mbed_official | 133:d4dda5c437f0 | 895 | } |
mbed_official | 133:d4dda5c437f0 | 896 | |
mbed_official | 133:d4dda5c437f0 | 897 | /** |
mbed_official | 133:d4dda5c437f0 | 898 | * @brief Regular conversion half DMA transfer callback in non blocking mode |
mbed_official | 133:d4dda5c437f0 | 899 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 900 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 901 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 902 | */ |
mbed_official | 133:d4dda5c437f0 | 903 | __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 904 | { |
mbed_official | 133:d4dda5c437f0 | 905 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 906 | the HAL_ADC_ConvHalfCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 907 | */ |
mbed_official | 133:d4dda5c437f0 | 908 | } |
mbed_official | 133:d4dda5c437f0 | 909 | |
mbed_official | 133:d4dda5c437f0 | 910 | /** |
mbed_official | 133:d4dda5c437f0 | 911 | * @brief Analog watchdog callback in non blocking mode |
mbed_official | 133:d4dda5c437f0 | 912 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 913 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 914 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 915 | */ |
mbed_official | 133:d4dda5c437f0 | 916 | __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 917 | { |
mbed_official | 133:d4dda5c437f0 | 918 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 919 | the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 920 | */ |
mbed_official | 133:d4dda5c437f0 | 921 | } |
mbed_official | 133:d4dda5c437f0 | 922 | |
mbed_official | 133:d4dda5c437f0 | 923 | /** |
mbed_official | 133:d4dda5c437f0 | 924 | * @brief Error ADC callback. |
mbed_official | 133:d4dda5c437f0 | 925 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 926 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 927 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 928 | */ |
mbed_official | 133:d4dda5c437f0 | 929 | __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) |
mbed_official | 133:d4dda5c437f0 | 930 | { |
mbed_official | 133:d4dda5c437f0 | 931 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 932 | the HAL_ADC_ErrorCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 933 | */ |
mbed_official | 133:d4dda5c437f0 | 934 | } |
mbed_official | 133:d4dda5c437f0 | 935 | |
mbed_official | 133:d4dda5c437f0 | 936 | /** |
mbed_official | 133:d4dda5c437f0 | 937 | * @} |
mbed_official | 133:d4dda5c437f0 | 938 | */ |
mbed_official | 133:d4dda5c437f0 | 939 | |
mbed_official | 133:d4dda5c437f0 | 940 | /** @defgroup ADC_Group3 Peripheral Control functions |
mbed_official | 133:d4dda5c437f0 | 941 | * @brief Peripheral Control functions |
mbed_official | 133:d4dda5c437f0 | 942 | * |
mbed_official | 133:d4dda5c437f0 | 943 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 944 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 945 | ##### Peripheral Control functions ##### |
mbed_official | 133:d4dda5c437f0 | 946 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 947 | [..] This section provides functions allowing to: |
mbed_official | 133:d4dda5c437f0 | 948 | (+) Configure regular channels. |
mbed_official | 133:d4dda5c437f0 | 949 | (+) Configure injected channels. |
mbed_official | 133:d4dda5c437f0 | 950 | (+) Configure multimode. |
mbed_official | 133:d4dda5c437f0 | 951 | (+) Configure the analog watch dog. |
mbed_official | 133:d4dda5c437f0 | 952 | |
mbed_official | 133:d4dda5c437f0 | 953 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 954 | * @{ |
mbed_official | 133:d4dda5c437f0 | 955 | */ |
mbed_official | 133:d4dda5c437f0 | 956 | |
mbed_official | 133:d4dda5c437f0 | 957 | /** |
mbed_official | 133:d4dda5c437f0 | 958 | * @brief Configures for the selected ADC regular channel its corresponding |
mbed_official | 133:d4dda5c437f0 | 959 | * rank in the sequencer and its sample time. |
mbed_official | 133:d4dda5c437f0 | 960 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 961 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 962 | * @param sConfig: ADC configuration structure. |
mbed_official | 133:d4dda5c437f0 | 963 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 964 | */ |
mbed_official | 133:d4dda5c437f0 | 965 | HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) |
mbed_official | 133:d4dda5c437f0 | 966 | { |
mbed_official | 133:d4dda5c437f0 | 967 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 968 | assert_param(IS_ADC_CHANNEL(sConfig->Channel)); |
mbed_official | 133:d4dda5c437f0 | 969 | assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); |
mbed_official | 133:d4dda5c437f0 | 970 | assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); |
mbed_official | 133:d4dda5c437f0 | 971 | |
mbed_official | 133:d4dda5c437f0 | 972 | /* Process locked */ |
mbed_official | 133:d4dda5c437f0 | 973 | __HAL_LOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 974 | |
mbed_official | 133:d4dda5c437f0 | 975 | /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ |
mbed_official | 133:d4dda5c437f0 | 976 | if (sConfig->Channel > ADC_CHANNEL_9) |
mbed_official | 133:d4dda5c437f0 | 977 | { |
mbed_official | 133:d4dda5c437f0 | 978 | /* Clear the old sample time */ |
mbed_official | 133:d4dda5c437f0 | 979 | hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel); |
mbed_official | 133:d4dda5c437f0 | 980 | |
mbed_official | 133:d4dda5c437f0 | 981 | /* Set the new sample time */ |
mbed_official | 133:d4dda5c437f0 | 982 | hadc->Instance->SMPR1 |= __HAL_ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel); |
mbed_official | 133:d4dda5c437f0 | 983 | } |
mbed_official | 133:d4dda5c437f0 | 984 | else /* ADC_Channel include in ADC_Channel_[0..9] */ |
mbed_official | 133:d4dda5c437f0 | 985 | { |
mbed_official | 133:d4dda5c437f0 | 986 | /* Clear the old sample time */ |
mbed_official | 133:d4dda5c437f0 | 987 | hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel); |
mbed_official | 133:d4dda5c437f0 | 988 | |
mbed_official | 133:d4dda5c437f0 | 989 | /* Set the new sample time */ |
mbed_official | 133:d4dda5c437f0 | 990 | hadc->Instance->SMPR2 |= __HAL_ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel); |
mbed_official | 133:d4dda5c437f0 | 991 | } |
mbed_official | 133:d4dda5c437f0 | 992 | |
mbed_official | 133:d4dda5c437f0 | 993 | /* For Rank 1 to 6 */ |
mbed_official | 133:d4dda5c437f0 | 994 | if (sConfig->Rank < 7) |
mbed_official | 133:d4dda5c437f0 | 995 | { |
mbed_official | 133:d4dda5c437f0 | 996 | /* Clear the old SQx bits for the selected rank */ |
mbed_official | 133:d4dda5c437f0 | 997 | hadc->Instance->SQR3 &= ~__HAL_ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank); |
mbed_official | 133:d4dda5c437f0 | 998 | |
mbed_official | 133:d4dda5c437f0 | 999 | /* Set the SQx bits for the selected rank */ |
mbed_official | 133:d4dda5c437f0 | 1000 | hadc->Instance->SQR3 |= __HAL_ADC_SQR3_RK(sConfig->Channel, sConfig->Rank); |
mbed_official | 133:d4dda5c437f0 | 1001 | } |
mbed_official | 133:d4dda5c437f0 | 1002 | /* For Rank 7 to 12 */ |
mbed_official | 133:d4dda5c437f0 | 1003 | else if (sConfig->Rank < 13) |
mbed_official | 133:d4dda5c437f0 | 1004 | { |
mbed_official | 133:d4dda5c437f0 | 1005 | /* Clear the old SQx bits for the selected rank */ |
mbed_official | 133:d4dda5c437f0 | 1006 | hadc->Instance->SQR2 &= ~__HAL_ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank); |
mbed_official | 133:d4dda5c437f0 | 1007 | |
mbed_official | 133:d4dda5c437f0 | 1008 | /* Set the SQx bits for the selected rank */ |
mbed_official | 133:d4dda5c437f0 | 1009 | hadc->Instance->SQR2 |= __HAL_ADC_SQR2_RK(sConfig->Channel, sConfig->Rank); |
mbed_official | 133:d4dda5c437f0 | 1010 | } |
mbed_official | 133:d4dda5c437f0 | 1011 | /* For Rank 13 to 16 */ |
mbed_official | 133:d4dda5c437f0 | 1012 | else |
mbed_official | 133:d4dda5c437f0 | 1013 | { |
mbed_official | 133:d4dda5c437f0 | 1014 | /* Clear the old SQx bits for the selected rank */ |
mbed_official | 133:d4dda5c437f0 | 1015 | hadc->Instance->SQR1 &= ~__HAL_ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank); |
mbed_official | 133:d4dda5c437f0 | 1016 | |
mbed_official | 133:d4dda5c437f0 | 1017 | /* Set the SQx bits for the selected rank */ |
mbed_official | 133:d4dda5c437f0 | 1018 | hadc->Instance->SQR1 |= __HAL_ADC_SQR1_RK(sConfig->Channel, sConfig->Rank); |
mbed_official | 133:d4dda5c437f0 | 1019 | } |
mbed_official | 133:d4dda5c437f0 | 1020 | |
mbed_official | 133:d4dda5c437f0 | 1021 | /* if ADC1 Channel_18 is selected enable VBAT Channel */ |
mbed_official | 133:d4dda5c437f0 | 1022 | if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT)) |
mbed_official | 133:d4dda5c437f0 | 1023 | { |
mbed_official | 133:d4dda5c437f0 | 1024 | /* Enable the VBAT channel*/ |
mbed_official | 133:d4dda5c437f0 | 1025 | ADC->CCR |= ADC_CCR_VBATE; |
mbed_official | 133:d4dda5c437f0 | 1026 | } |
mbed_official | 133:d4dda5c437f0 | 1027 | |
mbed_official | 133:d4dda5c437f0 | 1028 | /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */ |
mbed_official | 133:d4dda5c437f0 | 1029 | if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT))) |
mbed_official | 133:d4dda5c437f0 | 1030 | { |
mbed_official | 133:d4dda5c437f0 | 1031 | /* Enable the TSVREFE channel*/ |
mbed_official | 133:d4dda5c437f0 | 1032 | ADC->CCR |= ADC_CCR_TSVREFE; |
mbed_official | 133:d4dda5c437f0 | 1033 | } |
mbed_official | 133:d4dda5c437f0 | 1034 | |
mbed_official | 133:d4dda5c437f0 | 1035 | /* Process unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1036 | __HAL_UNLOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 1037 | |
mbed_official | 133:d4dda5c437f0 | 1038 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1039 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1040 | } |
mbed_official | 133:d4dda5c437f0 | 1041 | |
mbed_official | 133:d4dda5c437f0 | 1042 | /** |
mbed_official | 133:d4dda5c437f0 | 1043 | * @brief Configures the analog watchdog. |
mbed_official | 133:d4dda5c437f0 | 1044 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 1045 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 1046 | * @param AnalogWDGConfig : pointer to an ADC_AnalogWDGConfTypeDef structure |
mbed_official | 133:d4dda5c437f0 | 1047 | * that contains the configuration information of ADC analog watchdog. |
mbed_official | 133:d4dda5c437f0 | 1048 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1049 | */ |
mbed_official | 133:d4dda5c437f0 | 1050 | HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig) |
mbed_official | 133:d4dda5c437f0 | 1051 | { |
mbed_official | 133:d4dda5c437f0 | 1052 | #ifdef USE_FULL_ASSERT |
mbed_official | 133:d4dda5c437f0 | 1053 | uint32_t tmp = 0; |
mbed_official | 133:d4dda5c437f0 | 1054 | #endif /* USE_FULL_ASSERT */ |
mbed_official | 133:d4dda5c437f0 | 1055 | |
mbed_official | 133:d4dda5c437f0 | 1056 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 1057 | assert_param(IS_ADC_ANALOG_WATCHDOG(AnalogWDGConfig->WatchdogMode)); |
mbed_official | 133:d4dda5c437f0 | 1058 | assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); |
mbed_official | 133:d4dda5c437f0 | 1059 | assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); |
mbed_official | 133:d4dda5c437f0 | 1060 | |
mbed_official | 133:d4dda5c437f0 | 1061 | #ifdef USE_FULL_ASSERT |
mbed_official | 133:d4dda5c437f0 | 1062 | tmp = __HAL_ADC_GET_RESOLUTION(hadc); |
mbed_official | 133:d4dda5c437f0 | 1063 | assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->HighThreshold)); |
mbed_official | 133:d4dda5c437f0 | 1064 | assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->LowThreshold)); |
mbed_official | 133:d4dda5c437f0 | 1065 | #endif /* USE_FULL_ASSERT */ |
mbed_official | 133:d4dda5c437f0 | 1066 | |
mbed_official | 133:d4dda5c437f0 | 1067 | /* Process locked */ |
mbed_official | 133:d4dda5c437f0 | 1068 | __HAL_LOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 1069 | |
mbed_official | 133:d4dda5c437f0 | 1070 | if(AnalogWDGConfig->ITMode == ENABLE) |
mbed_official | 133:d4dda5c437f0 | 1071 | { |
mbed_official | 133:d4dda5c437f0 | 1072 | /* Enable the ADC Analog watchdog interrupt */ |
mbed_official | 133:d4dda5c437f0 | 1073 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD); |
mbed_official | 133:d4dda5c437f0 | 1074 | } |
mbed_official | 133:d4dda5c437f0 | 1075 | else |
mbed_official | 133:d4dda5c437f0 | 1076 | { |
mbed_official | 133:d4dda5c437f0 | 1077 | /* Disable the ADC Analog watchdog interrupt */ |
mbed_official | 133:d4dda5c437f0 | 1078 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD); |
mbed_official | 133:d4dda5c437f0 | 1079 | } |
mbed_official | 133:d4dda5c437f0 | 1080 | |
mbed_official | 133:d4dda5c437f0 | 1081 | /* Clear AWDEN, JAWDEN and AWDSGL bits */ |
mbed_official | 133:d4dda5c437f0 | 1082 | hadc->Instance->CR1 &= ~(ADC_CR1_AWDSGL | ADC_CR1_JAWDEN | ADC_CR1_AWDEN); |
mbed_official | 133:d4dda5c437f0 | 1083 | |
mbed_official | 133:d4dda5c437f0 | 1084 | /* Set the analog watchdog enable mode */ |
mbed_official | 133:d4dda5c437f0 | 1085 | hadc->Instance->CR1 |= AnalogWDGConfig->WatchdogMode; |
mbed_official | 133:d4dda5c437f0 | 1086 | |
mbed_official | 133:d4dda5c437f0 | 1087 | /* Set the high threshold */ |
mbed_official | 133:d4dda5c437f0 | 1088 | hadc->Instance->HTR = AnalogWDGConfig->HighThreshold; |
mbed_official | 133:d4dda5c437f0 | 1089 | |
mbed_official | 133:d4dda5c437f0 | 1090 | /* Set the low threshold */ |
mbed_official | 133:d4dda5c437f0 | 1091 | hadc->Instance->LTR = AnalogWDGConfig->LowThreshold; |
mbed_official | 133:d4dda5c437f0 | 1092 | |
mbed_official | 133:d4dda5c437f0 | 1093 | /* Clear the Analog watchdog channel select bits */ |
mbed_official | 133:d4dda5c437f0 | 1094 | hadc->Instance->CR1 &= ~ADC_CR1_AWDCH; |
mbed_official | 133:d4dda5c437f0 | 1095 | |
mbed_official | 133:d4dda5c437f0 | 1096 | /* Set the Analog watchdog channel */ |
mbed_official | 133:d4dda5c437f0 | 1097 | hadc->Instance->CR1 |= AnalogWDGConfig->Channel; |
mbed_official | 133:d4dda5c437f0 | 1098 | |
mbed_official | 133:d4dda5c437f0 | 1099 | /* Process unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1100 | __HAL_UNLOCK(hadc); |
mbed_official | 133:d4dda5c437f0 | 1101 | |
mbed_official | 133:d4dda5c437f0 | 1102 | /* Return function status */ |
mbed_official | 133:d4dda5c437f0 | 1103 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1104 | } |
mbed_official | 133:d4dda5c437f0 | 1105 | |
mbed_official | 133:d4dda5c437f0 | 1106 | /** |
mbed_official | 133:d4dda5c437f0 | 1107 | * @} |
mbed_official | 133:d4dda5c437f0 | 1108 | */ |
mbed_official | 133:d4dda5c437f0 | 1109 | |
mbed_official | 133:d4dda5c437f0 | 1110 | /** @defgroup ADC_Group4 ADC Peripheral State functions |
mbed_official | 133:d4dda5c437f0 | 1111 | * @brief ADC Peripheral State functions |
mbed_official | 133:d4dda5c437f0 | 1112 | * |
mbed_official | 133:d4dda5c437f0 | 1113 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 1114 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 1115 | ##### Peripheral State and errors functions ##### |
mbed_official | 133:d4dda5c437f0 | 1116 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 1117 | [..] |
mbed_official | 133:d4dda5c437f0 | 1118 | This subsection provides functions allowing to |
mbed_official | 133:d4dda5c437f0 | 1119 | (+) Check the ADC state |
mbed_official | 133:d4dda5c437f0 | 1120 | (+) Check the ADC Error |
mbed_official | 133:d4dda5c437f0 | 1121 | |
mbed_official | 133:d4dda5c437f0 | 1122 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 1123 | * @{ |
mbed_official | 133:d4dda5c437f0 | 1124 | */ |
mbed_official | 133:d4dda5c437f0 | 1125 | |
mbed_official | 133:d4dda5c437f0 | 1126 | /** |
mbed_official | 133:d4dda5c437f0 | 1127 | * @brief return the ADC state |
mbed_official | 133:d4dda5c437f0 | 1128 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 1129 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 1130 | * @retval HAL state |
mbed_official | 133:d4dda5c437f0 | 1131 | */ |
mbed_official | 133:d4dda5c437f0 | 1132 | HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 1133 | { |
mbed_official | 133:d4dda5c437f0 | 1134 | /* Return ADC state */ |
mbed_official | 133:d4dda5c437f0 | 1135 | return hadc->State; |
mbed_official | 133:d4dda5c437f0 | 1136 | } |
mbed_official | 133:d4dda5c437f0 | 1137 | |
mbed_official | 133:d4dda5c437f0 | 1138 | /** |
mbed_official | 133:d4dda5c437f0 | 1139 | * @brief Return the ADC error code |
mbed_official | 133:d4dda5c437f0 | 1140 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 1141 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 1142 | * @retval ADC Error Code |
mbed_official | 133:d4dda5c437f0 | 1143 | */ |
mbed_official | 133:d4dda5c437f0 | 1144 | uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) |
mbed_official | 133:d4dda5c437f0 | 1145 | { |
mbed_official | 133:d4dda5c437f0 | 1146 | return hadc->ErrorCode; |
mbed_official | 133:d4dda5c437f0 | 1147 | } |
mbed_official | 133:d4dda5c437f0 | 1148 | |
mbed_official | 133:d4dda5c437f0 | 1149 | /** |
mbed_official | 133:d4dda5c437f0 | 1150 | * @} |
mbed_official | 133:d4dda5c437f0 | 1151 | */ |
mbed_official | 133:d4dda5c437f0 | 1152 | |
mbed_official | 133:d4dda5c437f0 | 1153 | /** |
mbed_official | 133:d4dda5c437f0 | 1154 | * @brief Initializes the ADCx peripheral according to the specified parameters |
mbed_official | 133:d4dda5c437f0 | 1155 | * in the ADC_InitStruct without initializing the ADC MSP. |
mbed_official | 133:d4dda5c437f0 | 1156 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 1157 | * the configuration information for the specified ADC. |
mbed_official | 133:d4dda5c437f0 | 1158 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 1159 | */ |
mbed_official | 133:d4dda5c437f0 | 1160 | static void ADC_Init(ADC_HandleTypeDef* hadc) |
mbed_official | 133:d4dda5c437f0 | 1161 | { |
mbed_official | 133:d4dda5c437f0 | 1162 | |
mbed_official | 133:d4dda5c437f0 | 1163 | /* Set ADC parameters */ |
mbed_official | 133:d4dda5c437f0 | 1164 | /* Set the ADC clock prescaler */ |
mbed_official | 133:d4dda5c437f0 | 1165 | ADC->CCR &= ~(ADC_CCR_ADCPRE); |
mbed_official | 133:d4dda5c437f0 | 1166 | ADC->CCR |= hadc->Init.ClockPrescaler; |
mbed_official | 133:d4dda5c437f0 | 1167 | |
mbed_official | 133:d4dda5c437f0 | 1168 | /* Set ADC scan mode */ |
mbed_official | 133:d4dda5c437f0 | 1169 | hadc->Instance->CR1 &= ~(ADC_CR1_SCAN); |
mbed_official | 133:d4dda5c437f0 | 1170 | hadc->Instance->CR1 |= __HAL_ADC_CR1_SCANCONV(hadc->Init.ScanConvMode); |
mbed_official | 133:d4dda5c437f0 | 1171 | |
mbed_official | 133:d4dda5c437f0 | 1172 | /* Set ADC resolution */ |
mbed_official | 133:d4dda5c437f0 | 1173 | hadc->Instance->CR1 &= ~(ADC_CR1_RES); |
mbed_official | 133:d4dda5c437f0 | 1174 | hadc->Instance->CR1 |= hadc->Init.Resolution; |
mbed_official | 133:d4dda5c437f0 | 1175 | |
mbed_official | 133:d4dda5c437f0 | 1176 | /* Set ADC data alignment */ |
mbed_official | 133:d4dda5c437f0 | 1177 | hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN); |
mbed_official | 133:d4dda5c437f0 | 1178 | hadc->Instance->CR2 |= hadc->Init.DataAlign; |
mbed_official | 133:d4dda5c437f0 | 1179 | |
mbed_official | 133:d4dda5c437f0 | 1180 | /* Select external trigger to start conversion */ |
mbed_official | 133:d4dda5c437f0 | 1181 | hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL); |
mbed_official | 133:d4dda5c437f0 | 1182 | hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv; |
mbed_official | 133:d4dda5c437f0 | 1183 | |
mbed_official | 133:d4dda5c437f0 | 1184 | /* Select external trigger polarity */ |
mbed_official | 133:d4dda5c437f0 | 1185 | hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN); |
mbed_official | 133:d4dda5c437f0 | 1186 | hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge; |
mbed_official | 133:d4dda5c437f0 | 1187 | |
mbed_official | 133:d4dda5c437f0 | 1188 | /* Enable or disable ADC continuous conversion mode */ |
mbed_official | 133:d4dda5c437f0 | 1189 | hadc->Instance->CR2 &= ~(ADC_CR2_CONT); |
mbed_official | 133:d4dda5c437f0 | 1190 | hadc->Instance->CR2 |= __HAL_ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode); |
mbed_official | 133:d4dda5c437f0 | 1191 | |
mbed_official | 133:d4dda5c437f0 | 1192 | if (hadc->Init.DiscontinuousConvMode != DISABLE) |
mbed_official | 133:d4dda5c437f0 | 1193 | { |
mbed_official | 133:d4dda5c437f0 | 1194 | assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion)); |
mbed_official | 133:d4dda5c437f0 | 1195 | |
mbed_official | 133:d4dda5c437f0 | 1196 | /* Enable the selected ADC regular discontinuous mode */ |
mbed_official | 133:d4dda5c437f0 | 1197 | hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN; |
mbed_official | 133:d4dda5c437f0 | 1198 | |
mbed_official | 133:d4dda5c437f0 | 1199 | /* Set the number of channels to be converted in discontinuous mode */ |
mbed_official | 133:d4dda5c437f0 | 1200 | hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM); |
mbed_official | 133:d4dda5c437f0 | 1201 | hadc->Instance->CR1 |= __HAL_ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion); |
mbed_official | 133:d4dda5c437f0 | 1202 | } |
mbed_official | 133:d4dda5c437f0 | 1203 | else |
mbed_official | 133:d4dda5c437f0 | 1204 | { |
mbed_official | 133:d4dda5c437f0 | 1205 | /* Disable the selected ADC regular discontinuous mode */ |
mbed_official | 133:d4dda5c437f0 | 1206 | hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN); |
mbed_official | 133:d4dda5c437f0 | 1207 | } |
mbed_official | 133:d4dda5c437f0 | 1208 | |
mbed_official | 133:d4dda5c437f0 | 1209 | /* Set ADC number of conversion */ |
mbed_official | 133:d4dda5c437f0 | 1210 | hadc->Instance->SQR1 &= ~(ADC_SQR1_L); |
mbed_official | 133:d4dda5c437f0 | 1211 | hadc->Instance->SQR1 |= __HAL_ADC_SQR1(hadc->Init.NbrOfConversion); |
mbed_official | 133:d4dda5c437f0 | 1212 | |
mbed_official | 133:d4dda5c437f0 | 1213 | /* Enable or disable ADC DMA continuous request */ |
mbed_official | 133:d4dda5c437f0 | 1214 | hadc->Instance->CR2 &= ~(ADC_CR2_DDS); |
mbed_official | 133:d4dda5c437f0 | 1215 | hadc->Instance->CR2 |= __HAL_ADC_CR2_DMAContReq(hadc->Init.DMAContinuousRequests); |
mbed_official | 133:d4dda5c437f0 | 1216 | |
mbed_official | 133:d4dda5c437f0 | 1217 | /* Enable or disable ADC end of conversion selection */ |
mbed_official | 133:d4dda5c437f0 | 1218 | hadc->Instance->CR2 &= ~(ADC_CR2_EOCS); |
mbed_official | 133:d4dda5c437f0 | 1219 | hadc->Instance->CR2 |= __HAL_ADC_CR2_EOCSelection(hadc->Init.EOCSelection); |
mbed_official | 133:d4dda5c437f0 | 1220 | } |
mbed_official | 133:d4dda5c437f0 | 1221 | |
mbed_official | 133:d4dda5c437f0 | 1222 | /** |
mbed_official | 133:d4dda5c437f0 | 1223 | * @brief DMA transfer complete callback. |
mbed_official | 242:7074e42da0b2 | 1224 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1225 | * the configuration information for the specified DMA module. |
mbed_official | 133:d4dda5c437f0 | 1226 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 1227 | */ |
mbed_official | 133:d4dda5c437f0 | 1228 | static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 1229 | { |
mbed_official | 133:d4dda5c437f0 | 1230 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 1231 | |
mbed_official | 133:d4dda5c437f0 | 1232 | /* Check if an injected conversion is ready */ |
mbed_official | 133:d4dda5c437f0 | 1233 | if(hadc->State == HAL_ADC_STATE_EOC_INJ) |
mbed_official | 133:d4dda5c437f0 | 1234 | { |
mbed_official | 133:d4dda5c437f0 | 1235 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 1236 | hadc->State = HAL_ADC_STATE_EOC_INJ_REG; |
mbed_official | 133:d4dda5c437f0 | 1237 | } |
mbed_official | 133:d4dda5c437f0 | 1238 | else |
mbed_official | 133:d4dda5c437f0 | 1239 | { |
mbed_official | 133:d4dda5c437f0 | 1240 | /* Change ADC state */ |
mbed_official | 133:d4dda5c437f0 | 1241 | hadc->State = HAL_ADC_STATE_EOC_REG; |
mbed_official | 133:d4dda5c437f0 | 1242 | } |
mbed_official | 133:d4dda5c437f0 | 1243 | |
mbed_official | 133:d4dda5c437f0 | 1244 | HAL_ADC_ConvCpltCallback(hadc); |
mbed_official | 133:d4dda5c437f0 | 1245 | } |
mbed_official | 133:d4dda5c437f0 | 1246 | |
mbed_official | 133:d4dda5c437f0 | 1247 | /** |
mbed_official | 133:d4dda5c437f0 | 1248 | * @brief DMA half transfer complete callback. |
mbed_official | 242:7074e42da0b2 | 1249 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1250 | * the configuration information for the specified DMA module. |
mbed_official | 133:d4dda5c437f0 | 1251 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 1252 | */ |
mbed_official | 133:d4dda5c437f0 | 1253 | static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 1254 | { |
mbed_official | 133:d4dda5c437f0 | 1255 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 1256 | /* Conversion complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1257 | HAL_ADC_ConvHalfCpltCallback(hadc); |
mbed_official | 133:d4dda5c437f0 | 1258 | } |
mbed_official | 133:d4dda5c437f0 | 1259 | |
mbed_official | 133:d4dda5c437f0 | 1260 | /** |
mbed_official | 133:d4dda5c437f0 | 1261 | * @brief DMA error callback |
mbed_official | 242:7074e42da0b2 | 1262 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1263 | * the configuration information for the specified DMA module. |
mbed_official | 133:d4dda5c437f0 | 1264 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 1265 | */ |
mbed_official | 133:d4dda5c437f0 | 1266 | static void ADC_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 1267 | { |
mbed_official | 133:d4dda5c437f0 | 1268 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 1269 | hadc->State= HAL_ADC_STATE_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1270 | /* Set ADC error code to DMA error */ |
mbed_official | 133:d4dda5c437f0 | 1271 | hadc->ErrorCode |= HAL_ADC_ERROR_DMA; |
mbed_official | 133:d4dda5c437f0 | 1272 | HAL_ADC_ErrorCallback(hadc); |
mbed_official | 133:d4dda5c437f0 | 1273 | } |
mbed_official | 133:d4dda5c437f0 | 1274 | |
mbed_official | 133:d4dda5c437f0 | 1275 | |
mbed_official | 133:d4dda5c437f0 | 1276 | /** |
mbed_official | 133:d4dda5c437f0 | 1277 | * @} |
mbed_official | 133:d4dda5c437f0 | 1278 | */ |
mbed_official | 133:d4dda5c437f0 | 1279 | |
mbed_official | 133:d4dda5c437f0 | 1280 | #endif /* HAL_ADC_MODULE_ENABLED */ |
mbed_official | 133:d4dda5c437f0 | 1281 | /** |
mbed_official | 133:d4dda5c437f0 | 1282 | * @} |
mbed_official | 133:d4dda5c437f0 | 1283 | */ |
mbed_official | 133:d4dda5c437f0 | 1284 | |
mbed_official | 133:d4dda5c437f0 | 1285 | /** |
mbed_official | 133:d4dda5c437f0 | 1286 | * @} |
mbed_official | 133:d4dda5c437f0 | 1287 | */ |
mbed_official | 133:d4dda5c437f0 | 1288 | |
mbed_official | 133:d4dda5c437f0 | 1289 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |