Janek Mann
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L053R8/stm32l0xx_hal_lptim.h@310:6188e0254baa, 2014-09-16 (annotated)
- Committer:
- janekm
- Date:
- Tue Sep 16 22:42:01 2014 +0000
- Revision:
- 310:6188e0254baa
- Parent:
- 181:a4cbdfbbd2f4
N/A
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 181:a4cbdfbbd2f4 | 1 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 2 | ****************************************************************************** |
| mbed_official | 181:a4cbdfbbd2f4 | 3 | * @file stm32l0xx_hal_lptim.h |
| mbed_official | 181:a4cbdfbbd2f4 | 4 | * @author MCD Application Team |
| mbed_official | 181:a4cbdfbbd2f4 | 5 | * @version V1.0.0 |
| mbed_official | 181:a4cbdfbbd2f4 | 6 | * @date 22-April-2014 |
| mbed_official | 181:a4cbdfbbd2f4 | 7 | * @brief Header file of LPTIM HAL module. |
| mbed_official | 181:a4cbdfbbd2f4 | 8 | ****************************************************************************** |
| mbed_official | 181:a4cbdfbbd2f4 | 9 | * @attention |
| mbed_official | 181:a4cbdfbbd2f4 | 10 | * |
| mbed_official | 181:a4cbdfbbd2f4 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 181:a4cbdfbbd2f4 | 12 | * |
| mbed_official | 181:a4cbdfbbd2f4 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 181:a4cbdfbbd2f4 | 14 | * are permitted provided that the following conditions are met: |
| mbed_official | 181:a4cbdfbbd2f4 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 181:a4cbdfbbd2f4 | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 181:a4cbdfbbd2f4 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 181:a4cbdfbbd2f4 | 18 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 181:a4cbdfbbd2f4 | 19 | * and/or other materials provided with the distribution. |
| mbed_official | 181:a4cbdfbbd2f4 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 181:a4cbdfbbd2f4 | 21 | * may be used to endorse or promote products derived from this software |
| mbed_official | 181:a4cbdfbbd2f4 | 22 | * without specific prior written permission. |
| mbed_official | 181:a4cbdfbbd2f4 | 23 | * |
| mbed_official | 181:a4cbdfbbd2f4 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 181:a4cbdfbbd2f4 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 181:a4cbdfbbd2f4 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 181:a4cbdfbbd2f4 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 181:a4cbdfbbd2f4 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 181:a4cbdfbbd2f4 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 181:a4cbdfbbd2f4 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 181:a4cbdfbbd2f4 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 181:a4cbdfbbd2f4 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 181:a4cbdfbbd2f4 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 181:a4cbdfbbd2f4 | 34 | * |
| mbed_official | 181:a4cbdfbbd2f4 | 35 | ****************************************************************************** |
| mbed_official | 181:a4cbdfbbd2f4 | 36 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 37 | |
| mbed_official | 181:a4cbdfbbd2f4 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 39 | #ifndef __STM32L0xx_HAL_LPTIM_H |
| mbed_official | 181:a4cbdfbbd2f4 | 40 | #define __STM32L0xx_HAL_LPTIM_H |
| mbed_official | 181:a4cbdfbbd2f4 | 41 | |
| mbed_official | 181:a4cbdfbbd2f4 | 42 | #ifdef __cplusplus |
| mbed_official | 181:a4cbdfbbd2f4 | 43 | extern "C" { |
| mbed_official | 181:a4cbdfbbd2f4 | 44 | #endif |
| mbed_official | 181:a4cbdfbbd2f4 | 45 | |
| mbed_official | 181:a4cbdfbbd2f4 | 46 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 47 | #include "stm32l0xx_hal_def.h" |
| mbed_official | 181:a4cbdfbbd2f4 | 48 | |
| mbed_official | 181:a4cbdfbbd2f4 | 49 | /** @addtogroup STM32L0xx_HAL_Driver |
| mbed_official | 181:a4cbdfbbd2f4 | 50 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 51 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 52 | |
| mbed_official | 181:a4cbdfbbd2f4 | 53 | /** @addtogroup LPTIM |
| mbed_official | 181:a4cbdfbbd2f4 | 54 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 55 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 56 | |
| mbed_official | 181:a4cbdfbbd2f4 | 57 | /* Exported types ------------------------------------------------------------*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 58 | |
| mbed_official | 181:a4cbdfbbd2f4 | 59 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 60 | * @brief LPTIM Clock configuration definition |
| mbed_official | 181:a4cbdfbbd2f4 | 61 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 62 | typedef struct |
| mbed_official | 181:a4cbdfbbd2f4 | 63 | { |
| mbed_official | 181:a4cbdfbbd2f4 | 64 | uint32_t Source; /*!< Selects the clock source. |
| mbed_official | 181:a4cbdfbbd2f4 | 65 | This parameter can be a value of @ref LPTIM_Clock_Source */ |
| mbed_official | 181:a4cbdfbbd2f4 | 66 | |
| mbed_official | 181:a4cbdfbbd2f4 | 67 | uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. |
| mbed_official | 181:a4cbdfbbd2f4 | 68 | This parameter can be a value of @ref LPTIM_Clock_Prescaler */ |
| mbed_official | 181:a4cbdfbbd2f4 | 69 | |
| mbed_official | 181:a4cbdfbbd2f4 | 70 | }LPTIM_ClockConfigTypeDef; |
| mbed_official | 181:a4cbdfbbd2f4 | 71 | |
| mbed_official | 181:a4cbdfbbd2f4 | 72 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 73 | * @brief LPTIM Clock configuration definition |
| mbed_official | 181:a4cbdfbbd2f4 | 74 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 75 | typedef struct |
| mbed_official | 181:a4cbdfbbd2f4 | 76 | { |
| mbed_official | 181:a4cbdfbbd2f4 | 77 | uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit |
| mbed_official | 181:a4cbdfbbd2f4 | 78 | if the ULPTIM input is selected. |
| mbed_official | 181:a4cbdfbbd2f4 | 79 | Note: This parameter is used only when Ultra low power clock source is used. |
| mbed_official | 181:a4cbdfbbd2f4 | 80 | Note: If the polarity is configured on 'both edges', an auxiliary clock |
| mbed_official | 181:a4cbdfbbd2f4 | 81 | (one of the Low power oscillator) must be active. |
| mbed_official | 181:a4cbdfbbd2f4 | 82 | This parameter can be a value of @ref LPTIM_Clock_Polarity */ |
| mbed_official | 181:a4cbdfbbd2f4 | 83 | |
| mbed_official | 181:a4cbdfbbd2f4 | 84 | uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. |
| mbed_official | 181:a4cbdfbbd2f4 | 85 | Note: This parameter is used only when Ultra low power clock source is used. |
| mbed_official | 181:a4cbdfbbd2f4 | 86 | This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ |
| mbed_official | 181:a4cbdfbbd2f4 | 87 | |
| mbed_official | 181:a4cbdfbbd2f4 | 88 | }LPTIM_ULPClockConfigTypeDef; |
| mbed_official | 181:a4cbdfbbd2f4 | 89 | |
| mbed_official | 181:a4cbdfbbd2f4 | 90 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 91 | * @brief LPTIM Trigger configuration definition |
| mbed_official | 181:a4cbdfbbd2f4 | 92 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 93 | typedef struct |
| mbed_official | 181:a4cbdfbbd2f4 | 94 | { |
| mbed_official | 181:a4cbdfbbd2f4 | 95 | uint32_t Source; /*!< Selects the Trigger source. |
| mbed_official | 181:a4cbdfbbd2f4 | 96 | This parameter can be a value of @ref LPTIM_Trigger_Source */ |
| mbed_official | 181:a4cbdfbbd2f4 | 97 | |
| mbed_official | 181:a4cbdfbbd2f4 | 98 | uint32_t ActiveEdge; /*!< Selects the Trigger active edge. |
| mbed_official | 181:a4cbdfbbd2f4 | 99 | Note: This parameter is used only when an external trigger is used. |
| mbed_official | 181:a4cbdfbbd2f4 | 100 | This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ |
| mbed_official | 181:a4cbdfbbd2f4 | 101 | |
| mbed_official | 181:a4cbdfbbd2f4 | 102 | uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. |
| mbed_official | 181:a4cbdfbbd2f4 | 103 | Note: This parameter is used only when an external trigger is used. |
| mbed_official | 181:a4cbdfbbd2f4 | 104 | This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ |
| mbed_official | 181:a4cbdfbbd2f4 | 105 | }LPTIM_TriggerConfigTypeDef; |
| mbed_official | 181:a4cbdfbbd2f4 | 106 | |
| mbed_official | 181:a4cbdfbbd2f4 | 107 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 108 | * @brief LPTIM Initialization Structure definition |
| mbed_official | 181:a4cbdfbbd2f4 | 109 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 110 | typedef struct |
| mbed_official | 181:a4cbdfbbd2f4 | 111 | { |
| mbed_official | 181:a4cbdfbbd2f4 | 112 | LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ |
| mbed_official | 181:a4cbdfbbd2f4 | 113 | |
| mbed_official | 181:a4cbdfbbd2f4 | 114 | LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */ |
| mbed_official | 181:a4cbdfbbd2f4 | 115 | |
| mbed_official | 181:a4cbdfbbd2f4 | 116 | LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ |
| mbed_official | 181:a4cbdfbbd2f4 | 117 | |
| mbed_official | 181:a4cbdfbbd2f4 | 118 | uint32_t OutputPolarity; /*!< Specifies the Output polarity. |
| mbed_official | 181:a4cbdfbbd2f4 | 119 | This parameter can be a value of @ref LPTIM_Output_Polarity */ |
| mbed_official | 181:a4cbdfbbd2f4 | 120 | |
| mbed_official | 181:a4cbdfbbd2f4 | 121 | uint32_t UpdateMode; /*!< Specifies whether the update of the autorelaod and the compare |
| mbed_official | 181:a4cbdfbbd2f4 | 122 | values is done immediately or after the end of current period. |
| mbed_official | 181:a4cbdfbbd2f4 | 123 | This parameter can be a value of @ref LPTIM_Updating_Mode */ |
| mbed_official | 181:a4cbdfbbd2f4 | 124 | |
| mbed_official | 181:a4cbdfbbd2f4 | 125 | uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event |
| mbed_official | 181:a4cbdfbbd2f4 | 126 | or each external event. |
| mbed_official | 181:a4cbdfbbd2f4 | 127 | This parameter can be a value of @ref LPTIM_Counter_Source */ |
| mbed_official | 181:a4cbdfbbd2f4 | 128 | |
| mbed_official | 181:a4cbdfbbd2f4 | 129 | }LPTIM_InitTypeDef; |
| mbed_official | 181:a4cbdfbbd2f4 | 130 | |
| mbed_official | 181:a4cbdfbbd2f4 | 131 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 132 | * @brief HAL LPTIM State structure definition |
| mbed_official | 181:a4cbdfbbd2f4 | 133 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 134 | typedef enum __HAL_LPTIM_StateTypeDef |
| mbed_official | 181:a4cbdfbbd2f4 | 135 | { |
| mbed_official | 181:a4cbdfbbd2f4 | 136 | HAL_LPTIM_STATE_RESET = 0x00, /*!< Peripheral not yet initialized or disabled */ |
| mbed_official | 181:a4cbdfbbd2f4 | 137 | HAL_LPTIM_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| mbed_official | 181:a4cbdfbbd2f4 | 138 | HAL_LPTIM_STATE_BUSY = 0x02, /*!< An internal process is ongoing */ |
| mbed_official | 181:a4cbdfbbd2f4 | 139 | HAL_LPTIM_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| mbed_official | 181:a4cbdfbbd2f4 | 140 | HAL_LPTIM_STATE_ERROR = 0x04 /*!< Internal Process is ongoing */ |
| mbed_official | 181:a4cbdfbbd2f4 | 141 | }HAL_LPTIM_StateTypeDef; |
| mbed_official | 181:a4cbdfbbd2f4 | 142 | |
| mbed_official | 181:a4cbdfbbd2f4 | 143 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 144 | * @brief LPTIM handle Structure definition |
| mbed_official | 181:a4cbdfbbd2f4 | 145 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 146 | typedef struct |
| mbed_official | 181:a4cbdfbbd2f4 | 147 | { |
| mbed_official | 181:a4cbdfbbd2f4 | 148 | LPTIM_TypeDef *Instance; /*!< Register base address */ |
| mbed_official | 181:a4cbdfbbd2f4 | 149 | |
| mbed_official | 181:a4cbdfbbd2f4 | 150 | LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ |
| mbed_official | 181:a4cbdfbbd2f4 | 151 | |
| mbed_official | 181:a4cbdfbbd2f4 | 152 | HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ |
| mbed_official | 181:a4cbdfbbd2f4 | 153 | |
| mbed_official | 181:a4cbdfbbd2f4 | 154 | HAL_LockTypeDef Lock; /*!< LPTIM locking object */ |
| mbed_official | 181:a4cbdfbbd2f4 | 155 | |
| mbed_official | 181:a4cbdfbbd2f4 | 156 | __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ |
| mbed_official | 181:a4cbdfbbd2f4 | 157 | |
| mbed_official | 181:a4cbdfbbd2f4 | 158 | }LPTIM_HandleTypeDef; |
| mbed_official | 181:a4cbdfbbd2f4 | 159 | |
| mbed_official | 181:a4cbdfbbd2f4 | 160 | /* Exported constants --------------------------------------------------------*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 161 | |
| mbed_official | 181:a4cbdfbbd2f4 | 162 | /** @defgroup LPTIM_Exported_Constants |
| mbed_official | 181:a4cbdfbbd2f4 | 163 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 164 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 165 | |
| mbed_official | 181:a4cbdfbbd2f4 | 166 | /** @defgroup LPTIM_Autorelaod_Value |
| mbed_official | 181:a4cbdfbbd2f4 | 167 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 168 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 169 | #define IS_LPTIM_AUTORELOAD(AUTORELOAD) ((AUTORELOAD) <= 0x0000FFFF) |
| mbed_official | 181:a4cbdfbbd2f4 | 170 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 171 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 172 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 173 | |
| mbed_official | 181:a4cbdfbbd2f4 | 174 | /** @defgroup LPTIM_Compare_Value |
| mbed_official | 181:a4cbdfbbd2f4 | 175 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 176 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 177 | #define IS_LPTIM_COMPARE(COMPARE) ((COMPARE) <= 0x0000FFFF) |
| mbed_official | 181:a4cbdfbbd2f4 | 178 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 179 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 180 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 181 | |
| mbed_official | 181:a4cbdfbbd2f4 | 182 | /** @defgroup LPTIM_Clock_Source |
| mbed_official | 181:a4cbdfbbd2f4 | 183 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 184 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 185 | #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC ((uint32_t)0x00) |
| mbed_official | 181:a4cbdfbbd2f4 | 186 | #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL |
| mbed_official | 181:a4cbdfbbd2f4 | 187 | |
| mbed_official | 181:a4cbdfbbd2f4 | 188 | #define IS_LPTIM_CLOCK_SOURCE(SOURCE) (((SOURCE) == LPTIM_CLOCKSOURCE_ULPTIM) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 189 | ((SOURCE) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) |
| mbed_official | 181:a4cbdfbbd2f4 | 190 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 191 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 192 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 193 | |
| mbed_official | 181:a4cbdfbbd2f4 | 194 | /** @defgroup LPTIM_Clock_Prescaler |
| mbed_official | 181:a4cbdfbbd2f4 | 195 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 196 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 197 | #define LPTIM_PRESCALER_DIV1 ((uint32_t)0x000000) |
| mbed_official | 181:a4cbdfbbd2f4 | 198 | #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 |
| mbed_official | 181:a4cbdfbbd2f4 | 199 | #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 |
| mbed_official | 181:a4cbdfbbd2f4 | 200 | #define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1)) |
| mbed_official | 181:a4cbdfbbd2f4 | 201 | #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 |
| mbed_official | 181:a4cbdfbbd2f4 | 202 | #define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2)) |
| mbed_official | 181:a4cbdfbbd2f4 | 203 | #define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2)) |
| mbed_official | 181:a4cbdfbbd2f4 | 204 | #define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC) |
| mbed_official | 181:a4cbdfbbd2f4 | 205 | |
| mbed_official | 181:a4cbdfbbd2f4 | 206 | #define IS_LPTIM_CLOCK_PRESCALER(PRESCALER) (((PRESCALER) == LPTIM_PRESCALER_DIV1 ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 207 | ((PRESCALER) == LPTIM_PRESCALER_DIV2 ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 208 | ((PRESCALER) == LPTIM_PRESCALER_DIV4 ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 209 | ((PRESCALER) == LPTIM_PRESCALER_DIV8 ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 210 | ((PRESCALER) == LPTIM_PRESCALER_DIV16 ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 211 | ((PRESCALER) == LPTIM_PRESCALER_DIV32 ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 212 | ((PRESCALER) == LPTIM_PRESCALER_DIV64 ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 213 | ((PRESCALER) == LPTIM_PRESCALER_DIV128)) |
| mbed_official | 181:a4cbdfbbd2f4 | 214 | #define IS_LPTIM_CLOCK_PRESCALERDIV1(PRESCALER) ((PRESCALER) == LPTIM_PRESCALER_DIV1) |
| mbed_official | 181:a4cbdfbbd2f4 | 215 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 216 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 217 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 218 | |
| mbed_official | 181:a4cbdfbbd2f4 | 219 | /** @defgroup LPTIM_Output_Polarity |
| mbed_official | 181:a4cbdfbbd2f4 | 220 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 221 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 222 | |
| mbed_official | 181:a4cbdfbbd2f4 | 223 | #define LPTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000) |
| mbed_official | 181:a4cbdfbbd2f4 | 224 | #define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL) |
| mbed_official | 181:a4cbdfbbd2f4 | 225 | #define IS_LPTIM_OUTPUT_POLARITY(POLARITY) (((POLARITY) == LPTIM_OUTPUTPOLARITY_LOW ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 226 | ((POLARITY) == LPTIM_OUTPUTPOLARITY_HIGH)) |
| mbed_official | 181:a4cbdfbbd2f4 | 227 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 228 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 229 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 230 | |
| mbed_official | 181:a4cbdfbbd2f4 | 231 | /** @defgroup LPTIM_Clock_Sample_Time |
| mbed_official | 181:a4cbdfbbd2f4 | 232 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 233 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 234 | #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION ((uint32_t)0x00000000) |
| mbed_official | 181:a4cbdfbbd2f4 | 235 | #define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CFGR_CKFLT_0 |
| mbed_official | 181:a4cbdfbbd2f4 | 236 | #define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CFGR_CKFLT_1 |
| mbed_official | 181:a4cbdfbbd2f4 | 237 | #define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CFGR_CKFLT |
| mbed_official | 181:a4cbdfbbd2f4 | 238 | #define IS_LPTIM_CLOCK_SAMPLE_TIME(SAMPLETIME) (((SAMPLETIME) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 239 | ((SAMPLETIME) == LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 240 | ((SAMPLETIME) == LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 241 | ((SAMPLETIME) == LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS)) |
| mbed_official | 181:a4cbdfbbd2f4 | 242 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 243 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 244 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 245 | |
| mbed_official | 181:a4cbdfbbd2f4 | 246 | /** @defgroup LPTIM_Clock_Polarity |
| mbed_official | 181:a4cbdfbbd2f4 | 247 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 248 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 249 | |
| mbed_official | 181:a4cbdfbbd2f4 | 250 | #define LPTIM_CLOCKPOLARITY_RISINGEDGE ((uint32_t)0x00000000) |
| mbed_official | 181:a4cbdfbbd2f4 | 251 | #define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CFGR_CKPOL_0 |
| mbed_official | 181:a4cbdfbbd2f4 | 252 | #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CFGR_CKPOL_1 |
| mbed_official | 181:a4cbdfbbd2f4 | 253 | #define IS_LPTIM_CLOCK_POLARITY(POLARITY) (((POLARITY) == LPTIM_CLOCKPOLARITY_RISINGEDGE) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 254 | ((POLARITY) == LPTIM_CLOCKPOLARITY_FALLINGEDGE) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 255 | ((POLARITY) == LPTIM_CLOCKPOLARITY_BOTHEDGES)) |
| mbed_official | 181:a4cbdfbbd2f4 | 256 | |
| mbed_official | 181:a4cbdfbbd2f4 | 257 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 258 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 259 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 260 | |
| mbed_official | 181:a4cbdfbbd2f4 | 261 | /** @defgroup LPTIM_Trigger_Source |
| mbed_official | 181:a4cbdfbbd2f4 | 262 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 263 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 264 | #define LPTIM_TRIGSOURCE_SOFTWARE ((uint32_t)0x0000FFFF) |
| mbed_official | 181:a4cbdfbbd2f4 | 265 | #define LPTIM_TRIGSOURCE_0 ((uint32_t)0x00000000) |
| mbed_official | 181:a4cbdfbbd2f4 | 266 | #define LPTIM_TRIGSOURCE_1 ((uint32_t)LPTIM_CFGR_TRIGSEL_0) |
| mbed_official | 181:a4cbdfbbd2f4 | 267 | #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 |
| mbed_official | 181:a4cbdfbbd2f4 | 268 | #define LPTIM_TRIGSOURCE_3 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) |
| mbed_official | 181:a4cbdfbbd2f4 | 269 | #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 |
| mbed_official | 181:a4cbdfbbd2f4 | 270 | #define LPTIM_TRIGSOURCE_6 ((uint32_t)LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) |
| mbed_official | 181:a4cbdfbbd2f4 | 271 | #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL |
| mbed_official | 181:a4cbdfbbd2f4 | 272 | #define IS_LPTIM_TRG_SOURCE(TRIG) (((TRIG) == LPTIM_TRIGSOURCE_SOFTWARE) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 273 | ((TRIG) == LPTIM_TRIGSOURCE_0) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 274 | ((TRIG) == LPTIM_TRIGSOURCE_1) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 275 | ((TRIG) == LPTIM_TRIGSOURCE_2) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 276 | ((TRIG) == LPTIM_TRIGSOURCE_3) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 277 | ((TRIG) == LPTIM_TRIGSOURCE_4) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 278 | ((TRIG) == LPTIM_TRIGSOURCE_6) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 279 | ((TRIG) == LPTIM_TRIGSOURCE_7)) |
| mbed_official | 181:a4cbdfbbd2f4 | 280 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 281 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 282 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 283 | |
| mbed_official | 181:a4cbdfbbd2f4 | 284 | /** @defgroup LPTIM_External_Trigger_Polarity |
| mbed_official | 181:a4cbdfbbd2f4 | 285 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 286 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 287 | #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 |
| mbed_official | 181:a4cbdfbbd2f4 | 288 | #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 |
| mbed_official | 181:a4cbdfbbd2f4 | 289 | #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN |
| mbed_official | 181:a4cbdfbbd2f4 | 290 | #define IS_LPTIM_EXT_TRG_POLARITY(POLAR) (((POLAR) == LPTIM_ACTIVEEDGE_RISING ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 291 | ((POLAR) == LPTIM_ACTIVEEDGE_FALLING ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 292 | ((POLAR) == LPTIM_ACTIVEEDGE_RISING_FALLING )) |
| mbed_official | 181:a4cbdfbbd2f4 | 293 | |
| mbed_official | 181:a4cbdfbbd2f4 | 294 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 295 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 296 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 297 | |
| mbed_official | 181:a4cbdfbbd2f4 | 298 | /** @defgroup LPTIM_Trigger_Sample_Time |
| mbed_official | 181:a4cbdfbbd2f4 | 299 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 300 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 301 | #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION ((uint32_t)0x00000000) |
| mbed_official | 181:a4cbdfbbd2f4 | 302 | #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_CFGR_TRGFLT_0 |
| mbed_official | 181:a4cbdfbbd2f4 | 303 | #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_CFGR_TRGFLT_1 |
| mbed_official | 181:a4cbdfbbd2f4 | 304 | #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_CFGR_TRGFLT |
| mbed_official | 181:a4cbdfbbd2f4 | 305 | #define IS_LPTIM_TRIG_SAMPLE_TIME(SAMPLETIME) (((SAMPLETIME) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 306 | ((SAMPLETIME) == LPTIM_TRIGSAMPLETIME_2TRANSISTIONS ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 307 | ((SAMPLETIME) == LPTIM_TRIGSAMPLETIME_4TRANSISTIONS ) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 308 | ((SAMPLETIME) == LPTIM_TRIGSAMPLETIME_8TRANSISTIONS )) |
| mbed_official | 181:a4cbdfbbd2f4 | 309 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 310 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 311 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 312 | |
| mbed_official | 181:a4cbdfbbd2f4 | 313 | /** @defgroup LPTIM_Updating_Mode |
| mbed_official | 181:a4cbdfbbd2f4 | 314 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 315 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 316 | |
| mbed_official | 181:a4cbdfbbd2f4 | 317 | #define LPTIM_UPDATE_IMMEDIATE ((uint32_t)0x00000000) |
| mbed_official | 181:a4cbdfbbd2f4 | 318 | #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD |
| mbed_official | 181:a4cbdfbbd2f4 | 319 | #define IS_LPTIM_UPDATE_MODE(MODE) (((MODE) == LPTIM_UPDATE_IMMEDIATE) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 320 | ((MODE) == LPTIM_UPDATE_ENDOFPERIOD)) |
| mbed_official | 181:a4cbdfbbd2f4 | 321 | |
| mbed_official | 181:a4cbdfbbd2f4 | 322 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 323 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 324 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 325 | |
| mbed_official | 181:a4cbdfbbd2f4 | 326 | /** @defgroup LPTIM_Counter_Source |
| mbed_official | 181:a4cbdfbbd2f4 | 327 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 328 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 329 | |
| mbed_official | 181:a4cbdfbbd2f4 | 330 | #define LPTIM_COUNTERSOURCE_INTERNAL ((uint32_t)0x00000000) |
| mbed_official | 181:a4cbdfbbd2f4 | 331 | #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE |
| mbed_official | 181:a4cbdfbbd2f4 | 332 | #define IS_LPTIM_COUNTER_SOURCE(SOURCE) (((SOURCE) == LPTIM_COUNTERSOURCE_INTERNAL) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 333 | ((SOURCE) == LPTIM_COUNTERSOURCE_EXTERNAL)) |
| mbed_official | 181:a4cbdfbbd2f4 | 334 | |
| mbed_official | 181:a4cbdfbbd2f4 | 335 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 336 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 337 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 338 | |
| mbed_official | 181:a4cbdfbbd2f4 | 339 | /** @defgroup LPTIM_Autorelaod_Value |
| mbed_official | 181:a4cbdfbbd2f4 | 340 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 341 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 342 | #define IS_LPTIM_PERIOD(PERIOD) ((PERIOD) <= 0x0000FFFF) |
| mbed_official | 181:a4cbdfbbd2f4 | 343 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 344 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 345 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 346 | |
| mbed_official | 181:a4cbdfbbd2f4 | 347 | /** @defgroup LPTIM_Compare_Value |
| mbed_official | 181:a4cbdfbbd2f4 | 348 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 349 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 350 | #define IS_LPTIM_PULSE(PULSE) ((PULSE) <= 0x0000FFFF) |
| mbed_official | 181:a4cbdfbbd2f4 | 351 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 352 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 353 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 354 | |
| mbed_official | 181:a4cbdfbbd2f4 | 355 | /** @defgroup LPTIM_Flag_Definition |
| mbed_official | 181:a4cbdfbbd2f4 | 356 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 357 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 358 | |
| mbed_official | 181:a4cbdfbbd2f4 | 359 | #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN |
| mbed_official | 181:a4cbdfbbd2f4 | 360 | #define LPTIM_FLAG_UP LPTIM_ISR_UP |
| mbed_official | 181:a4cbdfbbd2f4 | 361 | #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK |
| mbed_official | 181:a4cbdfbbd2f4 | 362 | #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK |
| mbed_official | 181:a4cbdfbbd2f4 | 363 | #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG |
| mbed_official | 181:a4cbdfbbd2f4 | 364 | #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM |
| mbed_official | 181:a4cbdfbbd2f4 | 365 | #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM |
| mbed_official | 181:a4cbdfbbd2f4 | 366 | #define IS_LPTIM_FLAG_(FLAG) (((FLAG) == LPTIM_FLAG_DOWN) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 367 | ((FLAG) == LPTIM_FLAG_UP) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 368 | ((FLAG) == LPTIM_FLAG_ARROK) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 369 | ((FLAG) == LPTIM_FLAG_CMPOK) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 370 | ((FLAG) == LPTIM_FLAG_EXTTRIG) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 371 | ((FLAG) == LPTIM_FLAG_ARRM) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 372 | ((FLAG) == LPTIM_FLAG_CMPM)) |
| mbed_official | 181:a4cbdfbbd2f4 | 373 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 374 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 375 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 376 | /** @defgroup LPTIM_Interrupts_Definition |
| mbed_official | 181:a4cbdfbbd2f4 | 377 | * @{ |
| mbed_official | 181:a4cbdfbbd2f4 | 378 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 379 | |
| mbed_official | 181:a4cbdfbbd2f4 | 380 | #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE |
| mbed_official | 181:a4cbdfbbd2f4 | 381 | #define LPTIM_IT_UP LPTIM_IER_UPIE |
| mbed_official | 181:a4cbdfbbd2f4 | 382 | #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE |
| mbed_official | 181:a4cbdfbbd2f4 | 383 | #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE |
| mbed_official | 181:a4cbdfbbd2f4 | 384 | #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE |
| mbed_official | 181:a4cbdfbbd2f4 | 385 | #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE |
| mbed_official | 181:a4cbdfbbd2f4 | 386 | #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE |
| mbed_official | 181:a4cbdfbbd2f4 | 387 | #define IS_LPTIM_IT(IT) (((IT) == LPTIM_IT_DOWN) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 388 | ((IT) == LPTIM_IT_UP) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 389 | ((IT) == LPTIM_IT_ARROK) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 390 | ((IT) == LPTIM_IT_CMPOK) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 391 | ((IT) == LPTIM_IT_EXTTRIG) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 392 | ((IT) == LPTIM_IT_ARRM) || \ |
| mbed_official | 181:a4cbdfbbd2f4 | 393 | ((IT) == LPTIM_IT_CMPM)) |
| mbed_official | 181:a4cbdfbbd2f4 | 394 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 395 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 396 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 397 | |
| mbed_official | 181:a4cbdfbbd2f4 | 398 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 399 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 400 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 401 | |
| mbed_official | 181:a4cbdfbbd2f4 | 402 | /* Exported macro ------------------------------------------------------------*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 403 | |
| mbed_official | 181:a4cbdfbbd2f4 | 404 | /** @brief Reset LPTIM handle state |
| mbed_official | 181:a4cbdfbbd2f4 | 405 | * @param __HANDLE__: LPTIM handle |
| mbed_official | 181:a4cbdfbbd2f4 | 406 | * @retval None |
| mbed_official | 181:a4cbdfbbd2f4 | 407 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 408 | #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET) |
| mbed_official | 181:a4cbdfbbd2f4 | 409 | |
| mbed_official | 181:a4cbdfbbd2f4 | 410 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 411 | * @brief Enable/Disable the LPTIM peripheral. |
| mbed_official | 181:a4cbdfbbd2f4 | 412 | * @param __HANDLE__: LPTIM handle |
| mbed_official | 181:a4cbdfbbd2f4 | 413 | * @retval None |
| mbed_official | 181:a4cbdfbbd2f4 | 414 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 415 | #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) |
| mbed_official | 181:a4cbdfbbd2f4 | 416 | #define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE)) |
| mbed_official | 181:a4cbdfbbd2f4 | 417 | |
| mbed_official | 181:a4cbdfbbd2f4 | 418 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 419 | * @brief Starts the LPTIM peripheral in Continuous or in single mode. |
| mbed_official | 181:a4cbdfbbd2f4 | 420 | * @param __HANDLE__: DMA handle |
| mbed_official | 181:a4cbdfbbd2f4 | 421 | * @retval None |
| mbed_official | 181:a4cbdfbbd2f4 | 422 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 423 | #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) |
| mbed_official | 181:a4cbdfbbd2f4 | 424 | #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) |
| mbed_official | 181:a4cbdfbbd2f4 | 425 | |
| mbed_official | 181:a4cbdfbbd2f4 | 426 | |
| mbed_official | 181:a4cbdfbbd2f4 | 427 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 428 | * @brief Writes the passed parameter in the Autoreload register. |
| mbed_official | 181:a4cbdfbbd2f4 | 429 | * @param __HANDLE__: LPTIM handle |
| mbed_official | 181:a4cbdfbbd2f4 | 430 | * @param __VALUE__ : Autoreload value |
| mbed_official | 181:a4cbdfbbd2f4 | 431 | * @retval None |
| mbed_official | 181:a4cbdfbbd2f4 | 432 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 433 | #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) |
| mbed_official | 181:a4cbdfbbd2f4 | 434 | |
| mbed_official | 181:a4cbdfbbd2f4 | 435 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 436 | * @brief Writes the passed parameter in the Compare register. |
| mbed_official | 181:a4cbdfbbd2f4 | 437 | * @param __HANDLE__: LPTIM handle |
| mbed_official | 181:a4cbdfbbd2f4 | 438 | * @param __VALUE__ : Compare value |
| mbed_official | 181:a4cbdfbbd2f4 | 439 | * @retval None |
| mbed_official | 181:a4cbdfbbd2f4 | 440 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 441 | #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__)) |
| mbed_official | 181:a4cbdfbbd2f4 | 442 | |
| mbed_official | 181:a4cbdfbbd2f4 | 443 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 444 | * @brief Checks whether the specified LPTIM flag is set or not. |
| mbed_official | 181:a4cbdfbbd2f4 | 445 | * @param __HANDLE__: LPTIM handle |
| mbed_official | 181:a4cbdfbbd2f4 | 446 | * @param __FLAG__ : LPTIM flag to check |
| mbed_official | 181:a4cbdfbbd2f4 | 447 | * This parameter can be a value of: |
| mbed_official | 181:a4cbdfbbd2f4 | 448 | * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 449 | * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 450 | * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 451 | * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 452 | * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 453 | * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 454 | * @arg LPTIM_FLAG_CMPM : Compare match Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 455 | * @retval The state of the specified flag (SET or RESET). |
| mbed_official | 181:a4cbdfbbd2f4 | 456 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 457 | #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) |
| mbed_official | 181:a4cbdfbbd2f4 | 458 | |
| mbed_official | 181:a4cbdfbbd2f4 | 459 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 460 | * @brief Clears the specified LPTIM flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 461 | * @param __HANDLE__: LPTIM handle. |
| mbed_official | 181:a4cbdfbbd2f4 | 462 | * @param __FLAG__ : LPTIM flag to clear. |
| mbed_official | 181:a4cbdfbbd2f4 | 463 | * This parameter can be a value of: |
| mbed_official | 181:a4cbdfbbd2f4 | 464 | * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 465 | * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 466 | * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 467 | * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 468 | * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 469 | * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 470 | * @arg LPTIM_FLAG_CMPM : Compare match Flag. |
| mbed_official | 181:a4cbdfbbd2f4 | 471 | * @retval None. |
| mbed_official | 181:a4cbdfbbd2f4 | 472 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 473 | #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR |= (__FLAG__)) |
| mbed_official | 181:a4cbdfbbd2f4 | 474 | |
| mbed_official | 181:a4cbdfbbd2f4 | 475 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 476 | * @brief Enable the specified LPTIM interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 477 | * @param __HANDLE__ : LPTIM handle. |
| mbed_official | 181:a4cbdfbbd2f4 | 478 | * @param __INTERRUPT__ : LPTIM interrupt to set. |
| mbed_official | 181:a4cbdfbbd2f4 | 479 | * This parameter can be a value of: |
| mbed_official | 181:a4cbdfbbd2f4 | 480 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 481 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 482 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 483 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 484 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 485 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 486 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 487 | * @retval None. |
| mbed_official | 181:a4cbdfbbd2f4 | 488 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 489 | #define __HAL_LPTIM_ENABLE_INTERRUPT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
| mbed_official | 181:a4cbdfbbd2f4 | 490 | |
| mbed_official | 181:a4cbdfbbd2f4 | 491 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 492 | * @brief Disable the specified LPTIM interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 493 | * @param __HANDLE__ : LPTIM handle. |
| mbed_official | 181:a4cbdfbbd2f4 | 494 | * @param __INTERRUPT__ : LPTIM interrupt to set. |
| mbed_official | 181:a4cbdfbbd2f4 | 495 | * This parameter can be a value of: |
| mbed_official | 181:a4cbdfbbd2f4 | 496 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 497 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 498 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 499 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 500 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 501 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 502 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 503 | * @retval None. |
| mbed_official | 181:a4cbdfbbd2f4 | 504 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 505 | #define __HAL_LPTIM_DISABLE_INTERRUPT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) |
| mbed_official | 181:a4cbdfbbd2f4 | 506 | |
| mbed_official | 181:a4cbdfbbd2f4 | 507 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 508 | * @brief Checks whether the specified LPTIM interrupt is set or not. |
| mbed_official | 181:a4cbdfbbd2f4 | 509 | * @param __HANDLE__ : LPTIM handle. |
| mbed_official | 181:a4cbdfbbd2f4 | 510 | * @param __INTERRUPT__ : LPTIM interrupt to check. |
| mbed_official | 181:a4cbdfbbd2f4 | 511 | * This parameter can be a value of: |
| mbed_official | 181:a4cbdfbbd2f4 | 512 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 513 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 514 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 515 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 516 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 517 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 518 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| mbed_official | 181:a4cbdfbbd2f4 | 519 | * @retval Interrupt status. |
| mbed_official | 181:a4cbdfbbd2f4 | 520 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 521 | |
| mbed_official | 181:a4cbdfbbd2f4 | 522 | #define __HAL_LPTIM_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| mbed_official | 181:a4cbdfbbd2f4 | 523 | /* Exported functions --------------------------------------------------------*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 524 | /* Initialization/de-initialization functions ********************************/ |
| mbed_official | 181:a4cbdfbbd2f4 | 525 | HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 526 | HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 527 | |
| mbed_official | 181:a4cbdfbbd2f4 | 528 | /* MSP functions *************************************************************/ |
| mbed_official | 181:a4cbdfbbd2f4 | 529 | void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 530 | void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 531 | |
| mbed_official | 181:a4cbdfbbd2f4 | 532 | /* Start/Stop operation functions *********************************************/ |
| mbed_official | 181:a4cbdfbbd2f4 | 533 | /* ################################# PWM Mode ################################*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 534 | /* Blocking mode: Polling */ |
| mbed_official | 181:a4cbdfbbd2f4 | 535 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| mbed_official | 181:a4cbdfbbd2f4 | 536 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 537 | /* Non-Blocking mode: Interrupt */ |
| mbed_official | 181:a4cbdfbbd2f4 | 538 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| mbed_official | 181:a4cbdfbbd2f4 | 539 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 540 | |
| mbed_official | 181:a4cbdfbbd2f4 | 541 | /* ############################# One Pulse Mode ##############################*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 542 | /* Blocking mode: Polling */ |
| mbed_official | 181:a4cbdfbbd2f4 | 543 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| mbed_official | 181:a4cbdfbbd2f4 | 544 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 545 | /* Non-Blocking mode: Interrupt */ |
| mbed_official | 181:a4cbdfbbd2f4 | 546 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| mbed_official | 181:a4cbdfbbd2f4 | 547 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 548 | |
| mbed_official | 181:a4cbdfbbd2f4 | 549 | /* ############################## Set once Mode ##############################*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 550 | /* Blocking mode: Polling */ |
| mbed_official | 181:a4cbdfbbd2f4 | 551 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| mbed_official | 181:a4cbdfbbd2f4 | 552 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 553 | /* Non-Blocking mode: Interrupt */ |
| mbed_official | 181:a4cbdfbbd2f4 | 554 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| mbed_official | 181:a4cbdfbbd2f4 | 555 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 556 | |
| mbed_official | 181:a4cbdfbbd2f4 | 557 | /* ############################### Encoder Mode ##############################*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 558 | /* Blocking mode: Polling */ |
| mbed_official | 181:a4cbdfbbd2f4 | 559 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| mbed_official | 181:a4cbdfbbd2f4 | 560 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 561 | /* Non-Blocking mode: Interrupt */ |
| mbed_official | 181:a4cbdfbbd2f4 | 562 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| mbed_official | 181:a4cbdfbbd2f4 | 563 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 564 | |
| mbed_official | 181:a4cbdfbbd2f4 | 565 | /* ############################# Time out Mode ##############################*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 566 | /* Blocking mode: Polling */ |
| mbed_official | 181:a4cbdfbbd2f4 | 567 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
| mbed_official | 181:a4cbdfbbd2f4 | 568 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 569 | /* Non-Blocking mode: Interrupt */ |
| mbed_official | 181:a4cbdfbbd2f4 | 570 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
| mbed_official | 181:a4cbdfbbd2f4 | 571 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 572 | |
| mbed_official | 181:a4cbdfbbd2f4 | 573 | /* ############################## Counter Mode ###############################*/ |
| mbed_official | 181:a4cbdfbbd2f4 | 574 | /* Blocking mode: Polling */ |
| mbed_official | 181:a4cbdfbbd2f4 | 575 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| mbed_official | 181:a4cbdfbbd2f4 | 576 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 577 | /* Non-Blocking mode: Interrupt */ |
| mbed_official | 181:a4cbdfbbd2f4 | 578 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| mbed_official | 181:a4cbdfbbd2f4 | 579 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 580 | |
| mbed_official | 181:a4cbdfbbd2f4 | 581 | /* Reading operation functions ************************************************/ |
| mbed_official | 181:a4cbdfbbd2f4 | 582 | uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 583 | uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 584 | uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 585 | |
| mbed_official | 181:a4cbdfbbd2f4 | 586 | /* LPTIM IRQ functions *******************************************************/ |
| mbed_official | 181:a4cbdfbbd2f4 | 587 | void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 588 | |
| mbed_official | 181:a4cbdfbbd2f4 | 589 | /* CallBack functions ********************************************************/ |
| mbed_official | 181:a4cbdfbbd2f4 | 590 | void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 591 | void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 592 | void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 593 | void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 594 | void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 595 | void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 596 | void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 597 | |
| mbed_official | 181:a4cbdfbbd2f4 | 598 | /* Peripheral State functions ************************************************/ |
| mbed_official | 181:a4cbdfbbd2f4 | 599 | HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim); |
| mbed_official | 181:a4cbdfbbd2f4 | 600 | |
| mbed_official | 181:a4cbdfbbd2f4 | 601 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 602 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 603 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 604 | |
| mbed_official | 181:a4cbdfbbd2f4 | 605 | /** |
| mbed_official | 181:a4cbdfbbd2f4 | 606 | * @} |
| mbed_official | 181:a4cbdfbbd2f4 | 607 | */ |
| mbed_official | 181:a4cbdfbbd2f4 | 608 | |
| mbed_official | 181:a4cbdfbbd2f4 | 609 | #ifdef __cplusplus |
| mbed_official | 181:a4cbdfbbd2f4 | 610 | } |
| mbed_official | 181:a4cbdfbbd2f4 | 611 | #endif |
| mbed_official | 181:a4cbdfbbd2f4 | 612 | |
| mbed_official | 181:a4cbdfbbd2f4 | 613 | #endif /* __STM32L0xx_HAL_LPTIM_H */ |
| mbed_official | 181:a4cbdfbbd2f4 | 614 | |
| mbed_official | 181:a4cbdfbbd2f4 | 615 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |