Janek Mann / mbed-src-openwear

mbed library sources modified for open wear

Dependents:   openwear-lifelogger-example

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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_sram.c@310:6188e0254baa, 2014-09-16 (annotated)

Committer:
janekm
Date:
Tue Sep 16 22:42:01 2014 +0000
Revision:
310:6188e0254baa
Parent:
226:b062af740e40 
N/A

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_sram.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 226:b062af740e40 5 * @version V1.1.0RC2
mbed_official 226:b062af740e40 6 * @date 14-May-2014
mbed_official 87:085cde657901 7 * @brief SRAM HAL module driver.
mbed_official 87:085cde657901 8 * This file provides a generic firmware to drive SRAM memories
mbed_official 87:085cde657901 9 * mounted as external device.
mbed_official 87:085cde657901 10 *
mbed_official 87:085cde657901 11 @verbatim
mbed_official 87:085cde657901 12 ==============================================================================
mbed_official 87:085cde657901 13 ##### How to use this driver #####
mbed_official 87:085cde657901 14 ==============================================================================
mbed_official 87:085cde657901 15 [..]
mbed_official 87:085cde657901 16 This driver is a generic layered driver which contains a set of APIs used to
mbed_official 87:085cde657901 17 control SRAM memories. It uses the FMC layer functions to interface
mbed_official 87:085cde657901 18 with SRAM devices.
mbed_official 87:085cde657901 19 The following sequence should be followed to configure the FMC/FSMC to interface
mbed_official 87:085cde657901 20 with SRAM/PSRAM memories:
mbed_official 87:085cde657901 21
mbed_official 87:085cde657901 22 (#) Declare a SRAM_HandleTypeDef handle structure, for example:
mbed_official 87:085cde657901 23 SRAM_HandleTypeDef hsram; and:
mbed_official 87:085cde657901 24
mbed_official 87:085cde657901 25 (++) Fill the SRAM_HandleTypeDef handle "Init" field with the allowed
mbed_official 87:085cde657901 26 values of the structure member.
mbed_official 87:085cde657901 27
mbed_official 87:085cde657901 28 (++) Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined
mbed_official 87:085cde657901 29 base register instance for NOR or SRAM device
mbed_official 87:085cde657901 30
mbed_official 87:085cde657901 31 (++) Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined
mbed_official 87:085cde657901 32 base register instance for NOR or SRAM extended mode
mbed_official 87:085cde657901 33
mbed_official 87:085cde657901 34 (#) Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended
mbed_official 87:085cde657901 35 mode timings; for example:
mbed_official 87:085cde657901 36 FMC_NORSRAM_TimingTypeDef Timing and FMC_NORSRAM_TimingTypeDef ExTiming;
mbed_official 87:085cde657901 37 and fill its fields with the allowed values of the structure member.
mbed_official 87:085cde657901 38
mbed_official 87:085cde657901 39 (#) Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function
mbed_official 87:085cde657901 40 performs the following sequence:
mbed_official 87:085cde657901 41
mbed_official 87:085cde657901 42 (##) MSP hardware layer configuration using the function HAL_SRAM_MspInit()
mbed_official 87:085cde657901 43 (##) Control register configuration using the FMC NORSRAM interface function
mbed_official 87:085cde657901 44 FMC_NORSRAM_Init()
mbed_official 87:085cde657901 45 (##) Timing register configuration using the FMC NORSRAM interface function
mbed_official 87:085cde657901 46 FMC_NORSRAM_Timing_Init()
mbed_official 87:085cde657901 47 (##) Extended mode Timing register configuration using the FMC NORSRAM interface function
mbed_official 87:085cde657901 48 FMC_NORSRAM_Extended_Timing_Init()
mbed_official 87:085cde657901 49 (##) Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE()
mbed_official 87:085cde657901 50
mbed_official 87:085cde657901 51 (#) At this stage you can perform read/write accesses from/to the memory connected
mbed_official 87:085cde657901 52 to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the
mbed_official 87:085cde657901 53 following APIs:
mbed_official 87:085cde657901 54 (++) HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access
mbed_official 87:085cde657901 55 (++) HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer
mbed_official 87:085cde657901 56
mbed_official 87:085cde657901 57 (#) You can also control the SRAM device by calling the control APIs HAL_SRAM_WriteOperation_Enable()/
mbed_official 87:085cde657901 58 HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation
mbed_official 87:085cde657901 59
mbed_official 87:085cde657901 60 (#) You can continuously monitor the SRAM device HAL state by calling the function
mbed_official 87:085cde657901 61 HAL_SRAM_GetState()
mbed_official 87:085cde657901 62
mbed_official 87:085cde657901 63 @endverbatim
mbed_official 87:085cde657901 64 ******************************************************************************
mbed_official 87:085cde657901 65 * @attention
mbed_official 87:085cde657901 66 *
mbed_official 87:085cde657901 67 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 68 *
mbed_official 87:085cde657901 69 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 70 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 71 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 72 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 73 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 74 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 75 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 76 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 77 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 78 * without specific prior written permission.
mbed_official 87:085cde657901 79 *
mbed_official 87:085cde657901 80 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 81 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 82 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 83 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 84 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 85 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 86 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 87 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 88 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 89 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 90 *
mbed_official 87:085cde657901 91 ******************************************************************************
mbed_official 87:085cde657901 92 */
mbed_official 87:085cde657901 93
mbed_official 87:085cde657901 94 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 95 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 96
mbed_official 87:085cde657901 97 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 98 * @{
mbed_official 87:085cde657901 99 */
mbed_official 87:085cde657901 100
mbed_official 87:085cde657901 101 /** @defgroup SRAM
mbed_official 87:085cde657901 102 * @brief SRAM driver modules
mbed_official 87:085cde657901 103 * @{
mbed_official 87:085cde657901 104 */
mbed_official 87:085cde657901 105 #ifdef HAL_SRAM_MODULE_ENABLED
mbed_official 87:085cde657901 106
mbed_official 87:085cde657901 107 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 87:085cde657901 108
mbed_official 87:085cde657901 109 /* Private typedef -----------------------------------------------------------*/
mbed_official 87:085cde657901 110 /* Private define ------------------------------------------------------------*/
mbed_official 87:085cde657901 111 /* Private macro -------------------------------------------------------------*/
mbed_official 87:085cde657901 112 /* Private variables ---------------------------------------------------------*/
mbed_official 87:085cde657901 113 /* Private function prototypes -----------------------------------------------*/
mbed_official 87:085cde657901 114
mbed_official 87:085cde657901 115 /* Private functions ---------------------------------------------------------*/
mbed_official 87:085cde657901 116
mbed_official 87:085cde657901 117 /** @defgroup SRAM_Private_Functions
mbed_official 87:085cde657901 118 * @{
mbed_official 87:085cde657901 119 */
mbed_official 87:085cde657901 120
mbed_official 87:085cde657901 121 /** @defgroup SRAM_Group1 Initialization and de-initialization functions
mbed_official 87:085cde657901 122 * @brief Initialization and Configuration functions
mbed_official 87:085cde657901 123 *
mbed_official 87:085cde657901 124 @verbatim
mbed_official 87:085cde657901 125 ==============================================================================
mbed_official 87:085cde657901 126 ##### SRAM Initialization and de_initialization functions #####
mbed_official 87:085cde657901 127 ==============================================================================
mbed_official 87:085cde657901 128 [..] This section provides functions allowing to initialize/de-initialize
mbed_official 87:085cde657901 129 the SRAM memory
mbed_official 87:085cde657901 130
mbed_official 87:085cde657901 131 @endverbatim
mbed_official 87:085cde657901 132 * @{
mbed_official 87:085cde657901 133 */
mbed_official 87:085cde657901 134
mbed_official 87:085cde657901 135 /**
mbed_official 87:085cde657901 136 * @brief Performs the SRAM device initialization sequence
mbed_official 226:b062af740e40 137 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 138 * the configuration information for SRAM module.
mbed_official 87:085cde657901 139 * @param Timing: Pointer to SRAM control timing structure
mbed_official 87:085cde657901 140 * @param ExtTiming: Pointer to SRAM extended mode timing structure
mbed_official 87:085cde657901 141 * @retval HAL status
mbed_official 87:085cde657901 142 */
mbed_official 87:085cde657901 143 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
mbed_official 87:085cde657901 144 {
mbed_official 87:085cde657901 145 /* Check the SRAM handle parameter */
mbed_official 87:085cde657901 146 if(hsram == NULL)
mbed_official 87:085cde657901 147 {
mbed_official 87:085cde657901 148 return HAL_ERROR;
mbed_official 87:085cde657901 149 }
mbed_official 87:085cde657901 150
mbed_official 87:085cde657901 151 if(hsram->State == HAL_SRAM_STATE_RESET)
mbed_official 87:085cde657901 152 {
mbed_official 87:085cde657901 153 /* Initialize the low level hardware (MSP) */
mbed_official 87:085cde657901 154 HAL_SRAM_MspInit(hsram);
mbed_official 87:085cde657901 155 }
mbed_official 87:085cde657901 156
mbed_official 87:085cde657901 157 /* Initialize SRAM control Interface */
mbed_official 87:085cde657901 158 FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
mbed_official 87:085cde657901 159
mbed_official 87:085cde657901 160 /* Initialize SRAM timing Interface */
mbed_official 87:085cde657901 161 FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
mbed_official 87:085cde657901 162
mbed_official 87:085cde657901 163 /* Initialize SRAM extended mode timing Interface */
mbed_official 87:085cde657901 164 FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, hsram->Init.ExtendedMode);
mbed_official 87:085cde657901 165
mbed_official 87:085cde657901 166 /* Enable the NORSRAM device */
mbed_official 87:085cde657901 167 __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
mbed_official 87:085cde657901 168
mbed_official 87:085cde657901 169 return HAL_OK;
mbed_official 87:085cde657901 170 }
mbed_official 87:085cde657901 171
mbed_official 87:085cde657901 172 /**
mbed_official 87:085cde657901 173 * @brief Performs the SRAM device De-initialization sequence.
mbed_official 226:b062af740e40 174 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 175 * the configuration information for SRAM module.
mbed_official 87:085cde657901 176 * @retval HAL status
mbed_official 87:085cde657901 177 */
mbed_official 87:085cde657901 178 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 179 {
mbed_official 87:085cde657901 180 /* De-Initialize the low level hardware (MSP) */
mbed_official 87:085cde657901 181 HAL_SRAM_MspDeInit(hsram);
mbed_official 87:085cde657901 182
mbed_official 87:085cde657901 183 /* Configure the SRAM registers with their reset values */
mbed_official 87:085cde657901 184 FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank);
mbed_official 106:ced8cbb51063 185
mbed_official 106:ced8cbb51063 186 hsram->State = HAL_SRAM_STATE_RESET;
mbed_official 106:ced8cbb51063 187
mbed_official 106:ced8cbb51063 188 /* Release Lock */
mbed_official 106:ced8cbb51063 189 __HAL_UNLOCK(hsram);
mbed_official 106:ced8cbb51063 190
mbed_official 87:085cde657901 191 return HAL_OK;
mbed_official 87:085cde657901 192 }
mbed_official 87:085cde657901 193
mbed_official 87:085cde657901 194 /**
mbed_official 87:085cde657901 195 * @brief SRAM MSP Init.
mbed_official 226:b062af740e40 196 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 197 * the configuration information for SRAM module.
mbed_official 87:085cde657901 198 * @retval None
mbed_official 87:085cde657901 199 */
mbed_official 87:085cde657901 200 __weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 201 {
mbed_official 87:085cde657901 202 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 203 the HAL_SRAM_MspInit could be implemented in the user file
mbed_official 87:085cde657901 204 */
mbed_official 87:085cde657901 205 }
mbed_official 87:085cde657901 206
mbed_official 87:085cde657901 207 /**
mbed_official 87:085cde657901 208 * @brief SRAM MSP DeInit.
mbed_official 226:b062af740e40 209 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 210 * the configuration information for SRAM module.
mbed_official 87:085cde657901 211 * @retval None
mbed_official 87:085cde657901 212 */
mbed_official 87:085cde657901 213 __weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 214 {
mbed_official 87:085cde657901 215 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 216 the HAL_SRAM_MspDeInit could be implemented in the user file
mbed_official 87:085cde657901 217 */
mbed_official 87:085cde657901 218 }
mbed_official 87:085cde657901 219
mbed_official 87:085cde657901 220 /**
mbed_official 87:085cde657901 221 * @brief DMA transfer complete callback.
mbed_official 226:b062af740e40 222 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 223 * the configuration information for SRAM module.
mbed_official 226:b062af740e40 224 * @retval None
mbed_official 87:085cde657901 225 */
mbed_official 87:085cde657901 226 __weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 227 {
mbed_official 87:085cde657901 228 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 229 the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file
mbed_official 87:085cde657901 230 */
mbed_official 87:085cde657901 231 }
mbed_official 87:085cde657901 232
mbed_official 87:085cde657901 233 /**
mbed_official 87:085cde657901 234 * @brief DMA transfer complete error callback.
mbed_official 226:b062af740e40 235 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 236 * the configuration information for SRAM module.
mbed_official 226:b062af740e40 237 * @retval None
mbed_official 87:085cde657901 238 */
mbed_official 87:085cde657901 239 __weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 240 {
mbed_official 87:085cde657901 241 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 242 the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file
mbed_official 87:085cde657901 243 */
mbed_official 87:085cde657901 244 }
mbed_official 87:085cde657901 245
mbed_official 87:085cde657901 246 /**
mbed_official 87:085cde657901 247 * @}
mbed_official 87:085cde657901 248 */
mbed_official 87:085cde657901 249
mbed_official 87:085cde657901 250 /** @defgroup SRAM_Group2 Input and Output functions
mbed_official 87:085cde657901 251 * @brief Input Output and memory control functions
mbed_official 87:085cde657901 252 *
mbed_official 87:085cde657901 253 @verbatim
mbed_official 87:085cde657901 254 ==============================================================================
mbed_official 87:085cde657901 255 ##### SRAM Input and Output functions #####
mbed_official 87:085cde657901 256 ==============================================================================
mbed_official 87:085cde657901 257 [..]
mbed_official 87:085cde657901 258 This section provides functions allowing to use and control the SRAM memory
mbed_official 87:085cde657901 259
mbed_official 87:085cde657901 260 @endverbatim
mbed_official 87:085cde657901 261 * @{
mbed_official 87:085cde657901 262 */
mbed_official 87:085cde657901 263
mbed_official 87:085cde657901 264 /**
mbed_official 87:085cde657901 265 * @brief Reads 8-bit buffer from SRAM memory.
mbed_official 226:b062af740e40 266 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 267 * the configuration information for SRAM module.
mbed_official 87:085cde657901 268 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 269 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 270 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 271 * @retval HAL status
mbed_official 87:085cde657901 272 */
mbed_official 87:085cde657901 273 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 274 {
mbed_official 87:085cde657901 275 __IO uint8_t * pSramAddress = (uint8_t *)pAddress;
mbed_official 87:085cde657901 276
mbed_official 87:085cde657901 277 /* Process Locked */
mbed_official 87:085cde657901 278 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 279
mbed_official 87:085cde657901 280 /* Update the SRAM controller state */
mbed_official 87:085cde657901 281 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 282
mbed_official 87:085cde657901 283 /* Read data from memory */
mbed_official 87:085cde657901 284 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 285 {
mbed_official 87:085cde657901 286 *pDstBuffer = *(__IO uint8_t *)pSramAddress;
mbed_official 87:085cde657901 287 pDstBuffer++;
mbed_official 87:085cde657901 288 pSramAddress++;
mbed_official 87:085cde657901 289 }
mbed_official 87:085cde657901 290
mbed_official 87:085cde657901 291 /* Update the SRAM controller state */
mbed_official 87:085cde657901 292 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 293
mbed_official 87:085cde657901 294 /* Process unlocked */
mbed_official 87:085cde657901 295 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 296
mbed_official 87:085cde657901 297 return HAL_OK;
mbed_official 87:085cde657901 298 }
mbed_official 87:085cde657901 299
mbed_official 87:085cde657901 300 /**
mbed_official 87:085cde657901 301 * @brief Writes 8-bit buffer to SRAM memory.
mbed_official 226:b062af740e40 302 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 303 * the configuration information for SRAM module.
mbed_official 87:085cde657901 304 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 305 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 306 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 307 * @retval HAL status
mbed_official 87:085cde657901 308 */
mbed_official 87:085cde657901 309 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 310 {
mbed_official 87:085cde657901 311 __IO uint8_t * pSramAddress = (uint8_t *)pAddress;
mbed_official 87:085cde657901 312
mbed_official 87:085cde657901 313 /* Check the SRAM controller state */
mbed_official 87:085cde657901 314 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 87:085cde657901 315 {
mbed_official 87:085cde657901 316 return HAL_ERROR;
mbed_official 87:085cde657901 317 }
mbed_official 87:085cde657901 318
mbed_official 87:085cde657901 319 /* Process Locked */
mbed_official 87:085cde657901 320 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 321
mbed_official 87:085cde657901 322 /* Update the SRAM controller state */
mbed_official 87:085cde657901 323 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 324
mbed_official 87:085cde657901 325 /* Write data to memory */
mbed_official 87:085cde657901 326 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 327 {
mbed_official 87:085cde657901 328 *(__IO uint8_t *)pSramAddress = *pSrcBuffer;
mbed_official 87:085cde657901 329 pSrcBuffer++;
mbed_official 87:085cde657901 330 pSramAddress++;
mbed_official 87:085cde657901 331 }
mbed_official 87:085cde657901 332
mbed_official 87:085cde657901 333 /* Update the SRAM controller state */
mbed_official 87:085cde657901 334 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 335
mbed_official 87:085cde657901 336 /* Process unlocked */
mbed_official 87:085cde657901 337 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 338
mbed_official 87:085cde657901 339 return HAL_OK;
mbed_official 87:085cde657901 340 }
mbed_official 87:085cde657901 341
mbed_official 87:085cde657901 342 /**
mbed_official 87:085cde657901 343 * @brief Reads 16-bit buffer from SRAM memory.
mbed_official 226:b062af740e40 344 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 345 * the configuration information for SRAM module.
mbed_official 87:085cde657901 346 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 347 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 348 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 349 * @retval HAL status
mbed_official 87:085cde657901 350 */
mbed_official 87:085cde657901 351 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 352 {
mbed_official 87:085cde657901 353 __IO uint16_t * pSramAddress = (uint16_t *)pAddress;
mbed_official 87:085cde657901 354
mbed_official 87:085cde657901 355 /* Process Locked */
mbed_official 87:085cde657901 356 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 357
mbed_official 87:085cde657901 358 /* Update the SRAM controller state */
mbed_official 87:085cde657901 359 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 360
mbed_official 87:085cde657901 361 /* Read data from memory */
mbed_official 87:085cde657901 362 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 363 {
mbed_official 87:085cde657901 364 *pDstBuffer = *(__IO uint16_t *)pSramAddress;
mbed_official 87:085cde657901 365 pDstBuffer++;
mbed_official 87:085cde657901 366 pSramAddress++;
mbed_official 87:085cde657901 367 }
mbed_official 87:085cde657901 368
mbed_official 87:085cde657901 369 /* Update the SRAM controller state */
mbed_official 87:085cde657901 370 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 371
mbed_official 87:085cde657901 372 /* Process unlocked */
mbed_official 87:085cde657901 373 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 374
mbed_official 87:085cde657901 375 return HAL_OK;
mbed_official 87:085cde657901 376 }
mbed_official 87:085cde657901 377
mbed_official 87:085cde657901 378 /**
mbed_official 87:085cde657901 379 * @brief Writes 16-bit buffer to SRAM memory.
mbed_official 226:b062af740e40 380 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 381 * the configuration information for SRAM module.
mbed_official 87:085cde657901 382 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 383 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 384 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 385 * @retval HAL status
mbed_official 87:085cde657901 386 */
mbed_official 87:085cde657901 387 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 388 {
mbed_official 87:085cde657901 389 __IO uint16_t * pSramAddress = (uint16_t *)pAddress;
mbed_official 87:085cde657901 390
mbed_official 87:085cde657901 391 /* Check the SRAM controller state */
mbed_official 87:085cde657901 392 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 87:085cde657901 393 {
mbed_official 87:085cde657901 394 return HAL_ERROR;
mbed_official 87:085cde657901 395 }
mbed_official 87:085cde657901 396
mbed_official 87:085cde657901 397 /* Process Locked */
mbed_official 87:085cde657901 398 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 399
mbed_official 87:085cde657901 400 /* Update the SRAM controller state */
mbed_official 87:085cde657901 401 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 402
mbed_official 87:085cde657901 403 /* Write data to memory */
mbed_official 87:085cde657901 404 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 405 {
mbed_official 87:085cde657901 406 *(__IO uint16_t *)pSramAddress = *pSrcBuffer;
mbed_official 87:085cde657901 407 pSrcBuffer++;
mbed_official 87:085cde657901 408 pSramAddress++;
mbed_official 87:085cde657901 409 }
mbed_official 87:085cde657901 410
mbed_official 87:085cde657901 411 /* Update the SRAM controller state */
mbed_official 87:085cde657901 412 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 413
mbed_official 87:085cde657901 414 /* Process unlocked */
mbed_official 87:085cde657901 415 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 416
mbed_official 87:085cde657901 417 return HAL_OK;
mbed_official 87:085cde657901 418 }
mbed_official 87:085cde657901 419
mbed_official 87:085cde657901 420 /**
mbed_official 87:085cde657901 421 * @brief Reads 32-bit buffer from SRAM memory.
mbed_official 226:b062af740e40 422 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 423 * the configuration information for SRAM module.
mbed_official 87:085cde657901 424 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 425 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 426 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 427 * @retval HAL status
mbed_official 87:085cde657901 428 */
mbed_official 87:085cde657901 429 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 430 {
mbed_official 87:085cde657901 431 /* Process Locked */
mbed_official 87:085cde657901 432 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 433
mbed_official 87:085cde657901 434 /* Update the SRAM controller state */
mbed_official 87:085cde657901 435 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 436
mbed_official 87:085cde657901 437 /* Read data from memory */
mbed_official 87:085cde657901 438 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 439 {
mbed_official 87:085cde657901 440 *pDstBuffer = *(__IO uint32_t *)pAddress;
mbed_official 87:085cde657901 441 pDstBuffer++;
mbed_official 87:085cde657901 442 pAddress++;
mbed_official 87:085cde657901 443 }
mbed_official 87:085cde657901 444
mbed_official 87:085cde657901 445 /* Update the SRAM controller state */
mbed_official 87:085cde657901 446 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 447
mbed_official 87:085cde657901 448 /* Process unlocked */
mbed_official 87:085cde657901 449 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 450
mbed_official 87:085cde657901 451 return HAL_OK;
mbed_official 87:085cde657901 452 }
mbed_official 87:085cde657901 453
mbed_official 87:085cde657901 454 /**
mbed_official 87:085cde657901 455 * @brief Writes 32-bit buffer to SRAM memory.
mbed_official 226:b062af740e40 456 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 457 * the configuration information for SRAM module.
mbed_official 87:085cde657901 458 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 459 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 460 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 461 * @retval HAL status
mbed_official 87:085cde657901 462 */
mbed_official 87:085cde657901 463 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 464 {
mbed_official 87:085cde657901 465 /* Check the SRAM controller state */
mbed_official 87:085cde657901 466 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 87:085cde657901 467 {
mbed_official 87:085cde657901 468 return HAL_ERROR;
mbed_official 87:085cde657901 469 }
mbed_official 87:085cde657901 470
mbed_official 87:085cde657901 471 /* Process Locked */
mbed_official 87:085cde657901 472 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 473
mbed_official 87:085cde657901 474 /* Update the SRAM controller state */
mbed_official 87:085cde657901 475 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 476
mbed_official 87:085cde657901 477 /* Write data to memory */
mbed_official 87:085cde657901 478 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 479 {
mbed_official 87:085cde657901 480 *(__IO uint32_t *)pAddress = *pSrcBuffer;
mbed_official 87:085cde657901 481 pSrcBuffer++;
mbed_official 87:085cde657901 482 pAddress++;
mbed_official 87:085cde657901 483 }
mbed_official 87:085cde657901 484
mbed_official 87:085cde657901 485 /* Update the SRAM controller state */
mbed_official 87:085cde657901 486 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 487
mbed_official 87:085cde657901 488 /* Process unlocked */
mbed_official 87:085cde657901 489 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 490
mbed_official 87:085cde657901 491 return HAL_OK;
mbed_official 87:085cde657901 492 }
mbed_official 87:085cde657901 493
mbed_official 87:085cde657901 494 /**
mbed_official 87:085cde657901 495 * @brief Reads a Words data from the SRAM memory using DMA transfer.
mbed_official 226:b062af740e40 496 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 497 * the configuration information for SRAM module.
mbed_official 87:085cde657901 498 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 499 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 500 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 501 * @retval HAL status
mbed_official 87:085cde657901 502 */
mbed_official 87:085cde657901 503 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 504 {
mbed_official 87:085cde657901 505 /* Process Locked */
mbed_official 87:085cde657901 506 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 507
mbed_official 87:085cde657901 508 /* Update the SRAM controller state */
mbed_official 87:085cde657901 509 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 510
mbed_official 87:085cde657901 511 /* Configure DMA user callbacks */
mbed_official 87:085cde657901 512 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
mbed_official 87:085cde657901 513 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
mbed_official 87:085cde657901 514
mbed_official 87:085cde657901 515 /* Enable the DMA Stream */
mbed_official 87:085cde657901 516 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
mbed_official 87:085cde657901 517
mbed_official 87:085cde657901 518 /* Update the SRAM controller state */
mbed_official 87:085cde657901 519 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 520
mbed_official 87:085cde657901 521 /* Process unlocked */
mbed_official 87:085cde657901 522 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 523
mbed_official 87:085cde657901 524 return HAL_OK;
mbed_official 87:085cde657901 525 }
mbed_official 87:085cde657901 526
mbed_official 87:085cde657901 527 /**
mbed_official 87:085cde657901 528 * @brief Writes a Words data buffer to SRAM memory using DMA transfer.
mbed_official 226:b062af740e40 529 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 530 * the configuration information for SRAM module.
mbed_official 87:085cde657901 531 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 532 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 533 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 534 * @retval HAL status
mbed_official 87:085cde657901 535 */
mbed_official 87:085cde657901 536 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 537 {
mbed_official 87:085cde657901 538 /* Check the SRAM controller state */
mbed_official 87:085cde657901 539 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 87:085cde657901 540 {
mbed_official 87:085cde657901 541 return HAL_ERROR;
mbed_official 87:085cde657901 542 }
mbed_official 87:085cde657901 543
mbed_official 87:085cde657901 544 /* Process Locked */
mbed_official 87:085cde657901 545 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 546
mbed_official 87:085cde657901 547 /* Update the SRAM controller state */
mbed_official 87:085cde657901 548 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 549
mbed_official 87:085cde657901 550 /* Configure DMA user callbacks */
mbed_official 87:085cde657901 551 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
mbed_official 87:085cde657901 552 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
mbed_official 87:085cde657901 553
mbed_official 87:085cde657901 554 /* Enable the DMA Stream */
mbed_official 87:085cde657901 555 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
mbed_official 87:085cde657901 556
mbed_official 87:085cde657901 557 /* Update the SRAM controller state */
mbed_official 87:085cde657901 558 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 559
mbed_official 87:085cde657901 560 /* Process unlocked */
mbed_official 87:085cde657901 561 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 562
mbed_official 87:085cde657901 563 return HAL_OK;
mbed_official 87:085cde657901 564 }
mbed_official 87:085cde657901 565
mbed_official 87:085cde657901 566 /**
mbed_official 87:085cde657901 567 * @}
mbed_official 87:085cde657901 568 */
mbed_official 87:085cde657901 569
mbed_official 87:085cde657901 570 /** @defgroup SRAM_Group3 Control functions
mbed_official 87:085cde657901 571 * @brief management functions
mbed_official 87:085cde657901 572 *
mbed_official 87:085cde657901 573 @verbatim
mbed_official 87:085cde657901 574 ==============================================================================
mbed_official 87:085cde657901 575 ##### SRAM Control functions #####
mbed_official 87:085cde657901 576 ==============================================================================
mbed_official 87:085cde657901 577 [..]
mbed_official 87:085cde657901 578 This subsection provides a set of functions allowing to control dynamically
mbed_official 87:085cde657901 579 the SRAM interface.
mbed_official 87:085cde657901 580
mbed_official 87:085cde657901 581 @endverbatim
mbed_official 87:085cde657901 582 * @{
mbed_official 87:085cde657901 583 */
mbed_official 87:085cde657901 584
mbed_official 87:085cde657901 585 /**
mbed_official 87:085cde657901 586 * @brief Enables dynamically SRAM write operation.
mbed_official 226:b062af740e40 587 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 588 * the configuration information for SRAM module.
mbed_official 87:085cde657901 589 * @retval HAL status
mbed_official 87:085cde657901 590 */
mbed_official 87:085cde657901 591 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 592 {
mbed_official 87:085cde657901 593 /* Process Locked */
mbed_official 87:085cde657901 594 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 595
mbed_official 87:085cde657901 596 /* Enable write operation */
mbed_official 87:085cde657901 597 FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank);
mbed_official 87:085cde657901 598
mbed_official 87:085cde657901 599 /* Update the SRAM controller state */
mbed_official 87:085cde657901 600 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 601
mbed_official 87:085cde657901 602 /* Process unlocked */
mbed_official 87:085cde657901 603 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 604
mbed_official 87:085cde657901 605 return HAL_OK;
mbed_official 87:085cde657901 606 }
mbed_official 87:085cde657901 607
mbed_official 87:085cde657901 608 /**
mbed_official 87:085cde657901 609 * @brief Disables dynamically SRAM write operation.
mbed_official 226:b062af740e40 610 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 611 * the configuration information for SRAM module.
mbed_official 87:085cde657901 612 * @retval HAL status
mbed_official 87:085cde657901 613 */
mbed_official 87:085cde657901 614 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 615 {
mbed_official 87:085cde657901 616 /* Process Locked */
mbed_official 87:085cde657901 617 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 618
mbed_official 87:085cde657901 619 /* Update the SRAM controller state */
mbed_official 87:085cde657901 620 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 621
mbed_official 87:085cde657901 622 /* Disable write operation */
mbed_official 87:085cde657901 623 FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank);
mbed_official 87:085cde657901 624
mbed_official 87:085cde657901 625 /* Update the SRAM controller state */
mbed_official 87:085cde657901 626 hsram->State = HAL_SRAM_STATE_PROTECTED;
mbed_official 87:085cde657901 627
mbed_official 87:085cde657901 628 /* Process unlocked */
mbed_official 87:085cde657901 629 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 630
mbed_official 87:085cde657901 631 return HAL_OK;
mbed_official 87:085cde657901 632 }
mbed_official 87:085cde657901 633
mbed_official 87:085cde657901 634 /**
mbed_official 87:085cde657901 635 * @}
mbed_official 87:085cde657901 636 */
mbed_official 87:085cde657901 637
mbed_official 87:085cde657901 638 /** @defgroup SRAM_Group4 State functions
mbed_official 87:085cde657901 639 * @brief Peripheral State functions
mbed_official 87:085cde657901 640 *
mbed_official 87:085cde657901 641 @verbatim
mbed_official 87:085cde657901 642 ==============================================================================
mbed_official 87:085cde657901 643 ##### SRAM State functions #####
mbed_official 87:085cde657901 644 ==============================================================================
mbed_official 87:085cde657901 645 [..]
mbed_official 87:085cde657901 646 This subsection permits to get in run-time the status of the SRAM controller
mbed_official 87:085cde657901 647 and the data flow.
mbed_official 87:085cde657901 648
mbed_official 87:085cde657901 649 @endverbatim
mbed_official 87:085cde657901 650 * @{
mbed_official 87:085cde657901 651 */
mbed_official 87:085cde657901 652
mbed_official 87:085cde657901 653 /**
mbed_official 87:085cde657901 654 * @brief Returns the SRAM controller state
mbed_official 226:b062af740e40 655 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 656 * the configuration information for SRAM module.
mbed_official 226:b062af740e40 657 * @retval HAL state
mbed_official 87:085cde657901 658 */
mbed_official 87:085cde657901 659 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 660 {
mbed_official 87:085cde657901 661 return hsram->State;
mbed_official 87:085cde657901 662 }
mbed_official 87:085cde657901 663
mbed_official 87:085cde657901 664 /**
mbed_official 87:085cde657901 665 * @}
mbed_official 87:085cde657901 666 */
mbed_official 87:085cde657901 667
mbed_official 87:085cde657901 668 /**
mbed_official 87:085cde657901 669 * @}
mbed_official 87:085cde657901 670 */
mbed_official 87:085cde657901 671 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 87:085cde657901 672 #endif /* HAL_SRAM_MODULE_ENABLED */
mbed_official 87:085cde657901 673 /**
mbed_official 87:085cde657901 674 * @}
mbed_official 87:085cde657901 675 */
mbed_official 87:085cde657901 676
mbed_official 87:085cde657901 677 /**
mbed_official 87:085cde657901 678 * @}
mbed_official 87:085cde657901 679 */
mbed_official 87:085cde657901 680
mbed_official 87:085cde657901 681 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/