Janek Mann / mbed-src-openwear

mbed library sources modified for open wear

Dependents:   openwear-lifelogger-example

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_sdram.c@310:6188e0254baa, 2014-09-16 (annotated)

Committer:
janekm
Date:
Tue Sep 16 22:42:01 2014 +0000
Revision:
310:6188e0254baa
Parent:
226:b062af740e40 
N/A

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_sdram.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 226:b062af740e40 5 * @version V1.1.0RC2
mbed_official 226:b062af740e40 6 * @date 14-May-2014
mbed_official 87:085cde657901 7 * @brief SDRAM HAL module driver.
mbed_official 87:085cde657901 8 * This file provides a generic firmware to drive SDRAM memories mounted
mbed_official 87:085cde657901 9 * as external device.
mbed_official 87:085cde657901 10 *
mbed_official 87:085cde657901 11 @verbatim
mbed_official 87:085cde657901 12 ==============================================================================
mbed_official 87:085cde657901 13 ##### How to use this driver #####
mbed_official 87:085cde657901 14 ==============================================================================
mbed_official 87:085cde657901 15 [..]
mbed_official 87:085cde657901 16 This driver is a generic layered driver which contains a set of APIs used to
mbed_official 87:085cde657901 17 control SDRAM memories. It uses the FMC layer functions to interface
mbed_official 87:085cde657901 18 with SDRAM devices.
mbed_official 87:085cde657901 19 The following sequence should be followed to configure the FMC to interface
mbed_official 87:085cde657901 20 with SDRAM memories:
mbed_official 87:085cde657901 21
mbed_official 87:085cde657901 22 (#) Declare a SDRAM_HandleTypeDef handle structure, for example:
mbed_official 226:b062af740e40 23 SDRAM_HandleTypeDef hdsram
mbed_official 87:085cde657901 24
mbed_official 87:085cde657901 25 (++) Fill the SDRAM_HandleTypeDef handle "Init" field with the allowed
mbed_official 87:085cde657901 26 values of the structure member.
mbed_official 87:085cde657901 27
mbed_official 87:085cde657901 28 (++) Fill the SDRAM_HandleTypeDef handle "Instance" field with a predefined
mbed_official 87:085cde657901 29 base register instance for NOR or SDRAM device
mbed_official 87:085cde657901 30
mbed_official 87:085cde657901 31 (#) Declare a FMC_SDRAM_TimingTypeDef structure; for example:
mbed_official 87:085cde657901 32 FMC_SDRAM_TimingTypeDef Timing;
mbed_official 87:085cde657901 33 and fill its fields with the allowed values of the structure member.
mbed_official 87:085cde657901 34
mbed_official 87:085cde657901 35 (#) Initialize the SDRAM Controller by calling the function HAL_SDRAM_Init(). This function
mbed_official 87:085cde657901 36 performs the following sequence:
mbed_official 87:085cde657901 37
mbed_official 87:085cde657901 38 (##) MSP hardware layer configuration using the function HAL_SDRAM_MspInit()
mbed_official 87:085cde657901 39 (##) Control register configuration using the FMC SDRAM interface function
mbed_official 87:085cde657901 40 FMC_SDRAM_Init()
mbed_official 87:085cde657901 41 (##) Timing register configuration using the FMC SDRAM interface function
mbed_official 87:085cde657901 42 FMC_SDRAM_Timing_Init()
mbed_official 87:085cde657901 43 (##) Program the SDRAM external device by applying its initialization sequence
mbed_official 87:085cde657901 44 according to the device plugged in your hardware. This step is mandatory
mbed_official 87:085cde657901 45 for accessing the SDRAM device.
mbed_official 87:085cde657901 46
mbed_official 87:085cde657901 47 (#) At this stage you can perform read/write accesses from/to the memory connected
mbed_official 87:085cde657901 48 to the SDRAM Bank. You can perform either polling or DMA transfer using the
mbed_official 87:085cde657901 49 following APIs:
mbed_official 87:085cde657901 50 (++) HAL_SDRAM_Read()/HAL_SDRAM_Write() for polling read/write access
mbed_official 87:085cde657901 51 (++) HAL_SDRAM_Read_DMA()/HAL_SDRAM_Write_DMA() for DMA read/write transfer
mbed_official 87:085cde657901 52
mbed_official 87:085cde657901 53 (#) You can also control the SDRAM device by calling the control APIs HAL_SDRAM_WriteOperation_Enable()/
mbed_official 87:085cde657901 54 HAL_SDRAM_WriteOperation_Disable() to respectively enable/disable the SDRAM write operation or
mbed_official 87:085cde657901 55 the function HAL_SDRAM_SendCommand() to send a specified command to the SDRAM
mbed_official 87:085cde657901 56 device. The command to be sent must be configured with the FMC_SDRAM_CommandTypeDef
mbed_official 87:085cde657901 57 structure.
mbed_official 87:085cde657901 58
mbed_official 87:085cde657901 59 (#) You can continuously monitor the SDRAM device HAL state by calling the function
mbed_official 87:085cde657901 60 HAL_SDRAM_GetState()
mbed_official 87:085cde657901 61
mbed_official 87:085cde657901 62 @endverbatim
mbed_official 87:085cde657901 63 ******************************************************************************
mbed_official 87:085cde657901 64 * @attention
mbed_official 87:085cde657901 65 *
mbed_official 87:085cde657901 66 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 67 *
mbed_official 87:085cde657901 68 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 69 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 70 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 71 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 72 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 73 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 74 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 75 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 76 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 77 * without specific prior written permission.
mbed_official 87:085cde657901 78 *
mbed_official 87:085cde657901 79 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 80 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 81 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 82 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 83 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 84 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 85 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 86 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 87 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 88 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 89 *
mbed_official 87:085cde657901 90 ******************************************************************************
mbed_official 87:085cde657901 91 */
mbed_official 87:085cde657901 92
mbed_official 87:085cde657901 93 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 94 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 95
mbed_official 87:085cde657901 96 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 97 * @{
mbed_official 87:085cde657901 98 */
mbed_official 87:085cde657901 99
mbed_official 87:085cde657901 100 /** @defgroup SDRAM
mbed_official 87:085cde657901 101 * @brief SDRAM driver modules
mbed_official 87:085cde657901 102 * @{
mbed_official 87:085cde657901 103 */
mbed_official 87:085cde657901 104 #ifdef HAL_SDRAM_MODULE_ENABLED
mbed_official 87:085cde657901 105 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 87:085cde657901 106
mbed_official 87:085cde657901 107 /* Private typedef -----------------------------------------------------------*/
mbed_official 87:085cde657901 108 /* Private define ------------------------------------------------------------*/
mbed_official 87:085cde657901 109 /* Private macro -------------------------------------------------------------*/
mbed_official 87:085cde657901 110 /* Private variables ---------------------------------------------------------*/
mbed_official 87:085cde657901 111 /* Private function prototypes -----------------------------------------------*/
mbed_official 87:085cde657901 112
mbed_official 87:085cde657901 113 /* Private functions ---------------------------------------------------------*/
mbed_official 87:085cde657901 114
mbed_official 87:085cde657901 115 /** @defgroup SDRAM_Private_Functions
mbed_official 87:085cde657901 116 * @{
mbed_official 87:085cde657901 117 */
mbed_official 87:085cde657901 118
mbed_official 87:085cde657901 119 /** @defgroup SDRAM_Group1 Initialization and de-initialization functions
mbed_official 87:085cde657901 120 * @brief Initialization and Configuration functions
mbed_official 87:085cde657901 121 *
mbed_official 87:085cde657901 122 @verbatim
mbed_official 87:085cde657901 123 ==============================================================================
mbed_official 87:085cde657901 124 ##### SDRAM Initialization and de_initialization functions #####
mbed_official 87:085cde657901 125 ==============================================================================
mbed_official 87:085cde657901 126 [..]
mbed_official 87:085cde657901 127 This section provides functions allowing to initialize/de-initialize
mbed_official 87:085cde657901 128 the SDRAM memory
mbed_official 87:085cde657901 129
mbed_official 87:085cde657901 130 @endverbatim
mbed_official 87:085cde657901 131 * @{
mbed_official 87:085cde657901 132 */
mbed_official 87:085cde657901 133
mbed_official 87:085cde657901 134 /**
mbed_official 87:085cde657901 135 * @brief Performs the SDRAM device initialization sequence.
mbed_official 226:b062af740e40 136 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 137 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 138 * @param Timing: Pointer to SDRAM control timing structure
mbed_official 87:085cde657901 139 * @retval HAL status
mbed_official 87:085cde657901 140 */
mbed_official 87:085cde657901 141 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
mbed_official 87:085cde657901 142 {
mbed_official 87:085cde657901 143 /* Check the SDRAM handle parameter */
mbed_official 87:085cde657901 144 if(hsdram == NULL)
mbed_official 87:085cde657901 145 {
mbed_official 87:085cde657901 146 return HAL_ERROR;
mbed_official 87:085cde657901 147 }
mbed_official 87:085cde657901 148
mbed_official 87:085cde657901 149 if(hsdram->State == HAL_SDRAM_STATE_RESET)
mbed_official 87:085cde657901 150 {
mbed_official 87:085cde657901 151 /* Initialize the low level hardware (MSP) */
mbed_official 87:085cde657901 152 HAL_SDRAM_MspInit(hsdram);
mbed_official 87:085cde657901 153 }
mbed_official 87:085cde657901 154
mbed_official 87:085cde657901 155 /* Initialize the SDRAM controller state */
mbed_official 87:085cde657901 156 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 157
mbed_official 87:085cde657901 158 /* Initialize SDRAM control Interface */
mbed_official 87:085cde657901 159 FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
mbed_official 87:085cde657901 160
mbed_official 87:085cde657901 161 /* Initialize SDRAM timing Interface */
mbed_official 87:085cde657901 162 FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);
mbed_official 87:085cde657901 163
mbed_official 87:085cde657901 164 /* Update the SDRAM controller state */
mbed_official 87:085cde657901 165 hsdram->State = HAL_SDRAM_STATE_READY;
mbed_official 87:085cde657901 166
mbed_official 87:085cde657901 167 return HAL_OK;
mbed_official 87:085cde657901 168 }
mbed_official 87:085cde657901 169
mbed_official 87:085cde657901 170 /**
mbed_official 87:085cde657901 171 * @brief Perform the SDRAM device initialization sequence.
mbed_official 226:b062af740e40 172 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 173 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 174 * @retval HAL status
mbed_official 87:085cde657901 175 */
mbed_official 87:085cde657901 176 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 177 {
mbed_official 87:085cde657901 178 /* Initialize the low level hardware (MSP) */
mbed_official 87:085cde657901 179 HAL_SDRAM_MspDeInit(hsdram);
mbed_official 106:ced8cbb51063 180
mbed_official 87:085cde657901 181 /* Configure the SDRAM registers with their reset values */
mbed_official 87:085cde657901 182 FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
mbed_official 106:ced8cbb51063 183
mbed_official 106:ced8cbb51063 184 /* Reset the SDRAM controller state */
mbed_official 106:ced8cbb51063 185 hsdram->State = HAL_SDRAM_STATE_RESET;
mbed_official 106:ced8cbb51063 186
mbed_official 106:ced8cbb51063 187 /* Release Lock */
mbed_official 106:ced8cbb51063 188 __HAL_UNLOCK(hsdram);
mbed_official 106:ced8cbb51063 189
mbed_official 87:085cde657901 190 return HAL_OK;
mbed_official 87:085cde657901 191 }
mbed_official 87:085cde657901 192
mbed_official 87:085cde657901 193 /**
mbed_official 87:085cde657901 194 * @brief SDRAM MSP Init.
mbed_official 226:b062af740e40 195 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 196 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 197 * @retval None
mbed_official 87:085cde657901 198 */
mbed_official 87:085cde657901 199 __weak void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 200 {
mbed_official 87:085cde657901 201 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 202 the HAL_SDRAM_MspInit could be implemented in the user file
mbed_official 87:085cde657901 203 */
mbed_official 87:085cde657901 204 }
mbed_official 87:085cde657901 205
mbed_official 87:085cde657901 206 /**
mbed_official 87:085cde657901 207 * @brief SDRAM MSP DeInit.
mbed_official 226:b062af740e40 208 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 209 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 210 * @retval None
mbed_official 87:085cde657901 211 */
mbed_official 87:085cde657901 212 __weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 213 {
mbed_official 87:085cde657901 214 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 215 the HAL_SDRAM_MspDeInit could be implemented in the user file
mbed_official 87:085cde657901 216 */
mbed_official 87:085cde657901 217 }
mbed_official 87:085cde657901 218
mbed_official 87:085cde657901 219 /**
mbed_official 87:085cde657901 220 * @brief This function handles SDRAM refresh error interrupt request.
mbed_official 226:b062af740e40 221 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 222 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 223 * @retval HAL status
mbed_official 87:085cde657901 224 */
mbed_official 87:085cde657901 225 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 226 {
mbed_official 87:085cde657901 227 /* Check SDRAM interrupt Rising edge flag */
mbed_official 87:085cde657901 228 if(__FMC_SDRAM_GET_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_IT))
mbed_official 87:085cde657901 229 {
mbed_official 87:085cde657901 230 /* SDRAM refresh error interrupt callback */
mbed_official 87:085cde657901 231 HAL_SDRAM_RefreshErrorCallback(hsdram);
mbed_official 87:085cde657901 232
mbed_official 87:085cde657901 233 /* Clear SDRAM refresh error interrupt pending bit */
mbed_official 87:085cde657901 234 __FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR);
mbed_official 87:085cde657901 235 }
mbed_official 87:085cde657901 236 }
mbed_official 87:085cde657901 237
mbed_official 87:085cde657901 238 /**
mbed_official 87:085cde657901 239 * @brief SDRAM Refresh error callback.
mbed_official 226:b062af740e40 240 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 241 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 242 * @retval None
mbed_official 87:085cde657901 243 */
mbed_official 87:085cde657901 244 __weak void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 245 {
mbed_official 87:085cde657901 246 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 247 the HAL_SDRAM_RefreshErrorCallback could be implemented in the user file
mbed_official 87:085cde657901 248 */
mbed_official 87:085cde657901 249 }
mbed_official 87:085cde657901 250
mbed_official 87:085cde657901 251 /**
mbed_official 87:085cde657901 252 * @brief DMA transfer complete callback.
mbed_official 226:b062af740e40 253 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 254 * the configuration information for the specified DMA module.
mbed_official 87:085cde657901 255 * @retval None
mbed_official 87:085cde657901 256 */
mbed_official 87:085cde657901 257 __weak void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 258 {
mbed_official 87:085cde657901 259 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 260 the HAL_SDRAM_DMA_XferCpltCallback could be implemented in the user file
mbed_official 87:085cde657901 261 */
mbed_official 87:085cde657901 262 }
mbed_official 87:085cde657901 263
mbed_official 87:085cde657901 264 /**
mbed_official 87:085cde657901 265 * @brief DMA transfer complete error callback.
mbed_official 87:085cde657901 266 * @param hdma: DMA handle
mbed_official 87:085cde657901 267 * @retval None
mbed_official 87:085cde657901 268 */
mbed_official 87:085cde657901 269 __weak void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 270 {
mbed_official 87:085cde657901 271 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 272 the HAL_SDRAM_DMA_XferErrorCallback could be implemented in the user file
mbed_official 87:085cde657901 273 */
mbed_official 87:085cde657901 274 }
mbed_official 87:085cde657901 275
mbed_official 87:085cde657901 276 /**
mbed_official 87:085cde657901 277 * @}
mbed_official 87:085cde657901 278 */
mbed_official 87:085cde657901 279
mbed_official 87:085cde657901 280 /** @defgroup SDRAM_Group2 Input and Output functions
mbed_official 87:085cde657901 281 * @brief Input Output and memory control functions
mbed_official 87:085cde657901 282 *
mbed_official 87:085cde657901 283 @verbatim
mbed_official 87:085cde657901 284 ==============================================================================
mbed_official 87:085cde657901 285 ##### SDRAM Input and Output functions #####
mbed_official 87:085cde657901 286 ==============================================================================
mbed_official 87:085cde657901 287 [..]
mbed_official 87:085cde657901 288 This section provides functions allowing to use and control the SDRAM memory
mbed_official 87:085cde657901 289
mbed_official 87:085cde657901 290 @endverbatim
mbed_official 87:085cde657901 291 * @{
mbed_official 87:085cde657901 292 */
mbed_official 87:085cde657901 293
mbed_official 87:085cde657901 294 /**
mbed_official 87:085cde657901 295 * @brief Reads 8-bit data buffer from the SDRAM memory.
mbed_official 226:b062af740e40 296 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 297 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 298 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 299 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 300 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 301 * @retval HAL status
mbed_official 87:085cde657901 302 */
mbed_official 87:085cde657901 303 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 304 {
mbed_official 87:085cde657901 305 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
mbed_official 87:085cde657901 306
mbed_official 87:085cde657901 307 /* Process Locked */
mbed_official 87:085cde657901 308 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 309
mbed_official 87:085cde657901 310 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 311 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 312 {
mbed_official 87:085cde657901 313 return HAL_BUSY;
mbed_official 87:085cde657901 314 }
mbed_official 87:085cde657901 315 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
mbed_official 87:085cde657901 316 {
mbed_official 87:085cde657901 317 return HAL_ERROR;
mbed_official 87:085cde657901 318 }
mbed_official 87:085cde657901 319
mbed_official 87:085cde657901 320 /* Read data from source */
mbed_official 87:085cde657901 321 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 322 {
mbed_official 87:085cde657901 323 *pDstBuffer = *(__IO uint8_t *)pSdramAddress;
mbed_official 87:085cde657901 324 pDstBuffer++;
mbed_official 106:ced8cbb51063 325 pSdramAddress++;
mbed_official 87:085cde657901 326 }
mbed_official 87:085cde657901 327
mbed_official 87:085cde657901 328 /* Process Unlocked */
mbed_official 106:ced8cbb51063 329 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 330
mbed_official 87:085cde657901 331 return HAL_OK;
mbed_official 87:085cde657901 332 }
mbed_official 87:085cde657901 333
mbed_official 87:085cde657901 334
mbed_official 87:085cde657901 335 /**
mbed_official 87:085cde657901 336 * @brief Writes 8-bit data buffer to SDRAM memory.
mbed_official 226:b062af740e40 337 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 338 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 339 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 340 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 341 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 342 * @retval HAL status
mbed_official 87:085cde657901 343 */
mbed_official 87:085cde657901 344 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 345 {
mbed_official 87:085cde657901 346 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
mbed_official 87:085cde657901 347 uint32_t tmp = 0;
mbed_official 87:085cde657901 348
mbed_official 87:085cde657901 349 /* Process Locked */
mbed_official 87:085cde657901 350 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 351
mbed_official 87:085cde657901 352 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 353 tmp = hsdram->State;
mbed_official 87:085cde657901 354
mbed_official 87:085cde657901 355 if(tmp == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 356 {
mbed_official 87:085cde657901 357 return HAL_BUSY;
mbed_official 87:085cde657901 358 }
mbed_official 87:085cde657901 359 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
mbed_official 87:085cde657901 360 {
mbed_official 87:085cde657901 361 return HAL_ERROR;
mbed_official 87:085cde657901 362 }
mbed_official 87:085cde657901 363
mbed_official 87:085cde657901 364 /* Write data to memory */
mbed_official 87:085cde657901 365 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 366 {
mbed_official 87:085cde657901 367 *(__IO uint8_t *)pSdramAddress = *pSrcBuffer;
mbed_official 87:085cde657901 368 pSrcBuffer++;
mbed_official 106:ced8cbb51063 369 pSdramAddress++;
mbed_official 87:085cde657901 370 }
mbed_official 87:085cde657901 371
mbed_official 87:085cde657901 372 /* Process Unlocked */
mbed_official 87:085cde657901 373 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 374
mbed_official 87:085cde657901 375 return HAL_OK;
mbed_official 87:085cde657901 376 }
mbed_official 87:085cde657901 377
mbed_official 87:085cde657901 378
mbed_official 87:085cde657901 379 /**
mbed_official 87:085cde657901 380 * @brief Reads 16-bit data buffer from the SDRAM memory.
mbed_official 226:b062af740e40 381 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 382 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 383 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 384 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 385 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 386 * @retval HAL status
mbed_official 87:085cde657901 387 */
mbed_official 87:085cde657901 388 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 389 {
mbed_official 87:085cde657901 390 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
mbed_official 87:085cde657901 391
mbed_official 87:085cde657901 392 /* Process Locked */
mbed_official 87:085cde657901 393 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 394
mbed_official 87:085cde657901 395 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 396 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 397 {
mbed_official 87:085cde657901 398 return HAL_BUSY;
mbed_official 87:085cde657901 399 }
mbed_official 87:085cde657901 400 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
mbed_official 87:085cde657901 401 {
mbed_official 87:085cde657901 402 return HAL_ERROR;
mbed_official 87:085cde657901 403 }
mbed_official 87:085cde657901 404
mbed_official 87:085cde657901 405 /* Read data from source */
mbed_official 87:085cde657901 406 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 407 {
mbed_official 87:085cde657901 408 *pDstBuffer = *(__IO uint16_t *)pSdramAddress;
mbed_official 87:085cde657901 409 pDstBuffer++;
mbed_official 87:085cde657901 410 pSdramAddress++;
mbed_official 87:085cde657901 411 }
mbed_official 87:085cde657901 412
mbed_official 87:085cde657901 413 /* Process Unlocked */
mbed_official 87:085cde657901 414 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 415
mbed_official 87:085cde657901 416 return HAL_OK;
mbed_official 87:085cde657901 417 }
mbed_official 87:085cde657901 418
mbed_official 87:085cde657901 419 /**
mbed_official 87:085cde657901 420 * @brief Writes 16-bit data buffer to SDRAM memory.
mbed_official 226:b062af740e40 421 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 422 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 423 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 424 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 425 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 426 * @retval HAL status
mbed_official 87:085cde657901 427 */
mbed_official 87:085cde657901 428 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 429 {
mbed_official 87:085cde657901 430 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
mbed_official 87:085cde657901 431 uint32_t tmp = 0;
mbed_official 87:085cde657901 432
mbed_official 87:085cde657901 433 /* Process Locked */
mbed_official 87:085cde657901 434 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 435
mbed_official 87:085cde657901 436 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 437 tmp = hsdram->State;
mbed_official 87:085cde657901 438
mbed_official 87:085cde657901 439 if(tmp == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 440 {
mbed_official 87:085cde657901 441 return HAL_BUSY;
mbed_official 87:085cde657901 442 }
mbed_official 87:085cde657901 443 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
mbed_official 87:085cde657901 444 {
mbed_official 87:085cde657901 445 return HAL_ERROR;
mbed_official 87:085cde657901 446 }
mbed_official 87:085cde657901 447
mbed_official 87:085cde657901 448 /* Write data to memory */
mbed_official 87:085cde657901 449 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 450 {
mbed_official 87:085cde657901 451 *(__IO uint16_t *)pSdramAddress = *pSrcBuffer;
mbed_official 87:085cde657901 452 pSrcBuffer++;
mbed_official 87:085cde657901 453 pSdramAddress++;
mbed_official 87:085cde657901 454 }
mbed_official 87:085cde657901 455
mbed_official 87:085cde657901 456 /* Process Unlocked */
mbed_official 87:085cde657901 457 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 458
mbed_official 87:085cde657901 459 return HAL_OK;
mbed_official 87:085cde657901 460 }
mbed_official 87:085cde657901 461
mbed_official 87:085cde657901 462 /**
mbed_official 87:085cde657901 463 * @brief Reads 32-bit data buffer from the SDRAM memory.
mbed_official 226:b062af740e40 464 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 465 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 466 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 467 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 468 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 469 * @retval HAL status
mbed_official 87:085cde657901 470 */
mbed_official 87:085cde657901 471 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 472 {
mbed_official 87:085cde657901 473 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
mbed_official 87:085cde657901 474
mbed_official 87:085cde657901 475 /* Process Locked */
mbed_official 87:085cde657901 476 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 477
mbed_official 87:085cde657901 478 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 479 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 480 {
mbed_official 87:085cde657901 481 return HAL_BUSY;
mbed_official 87:085cde657901 482 }
mbed_official 87:085cde657901 483 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
mbed_official 87:085cde657901 484 {
mbed_official 87:085cde657901 485 return HAL_ERROR;
mbed_official 87:085cde657901 486 }
mbed_official 87:085cde657901 487
mbed_official 87:085cde657901 488 /* Read data from source */
mbed_official 87:085cde657901 489 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 490 {
mbed_official 87:085cde657901 491 *pDstBuffer = *(__IO uint32_t *)pSdramAddress;
mbed_official 87:085cde657901 492 pDstBuffer++;
mbed_official 87:085cde657901 493 pSdramAddress++;
mbed_official 87:085cde657901 494 }
mbed_official 87:085cde657901 495
mbed_official 87:085cde657901 496 /* Process Unlocked */
mbed_official 87:085cde657901 497 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 498
mbed_official 87:085cde657901 499 return HAL_OK;
mbed_official 87:085cde657901 500 }
mbed_official 87:085cde657901 501
mbed_official 87:085cde657901 502 /**
mbed_official 87:085cde657901 503 * @brief Writes 32-bit data buffer to SDRAM memory.
mbed_official 226:b062af740e40 504 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 505 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 506 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 507 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 508 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 509 * @retval HAL status
mbed_official 87:085cde657901 510 */
mbed_official 87:085cde657901 511 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 512 {
mbed_official 87:085cde657901 513 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
mbed_official 87:085cde657901 514 uint32_t tmp = 0;
mbed_official 87:085cde657901 515
mbed_official 87:085cde657901 516 /* Process Locked */
mbed_official 87:085cde657901 517 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 518
mbed_official 87:085cde657901 519 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 520 tmp = hsdram->State;
mbed_official 87:085cde657901 521
mbed_official 87:085cde657901 522 if(tmp == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 523 {
mbed_official 87:085cde657901 524 return HAL_BUSY;
mbed_official 87:085cde657901 525 }
mbed_official 87:085cde657901 526 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
mbed_official 87:085cde657901 527 {
mbed_official 87:085cde657901 528 return HAL_ERROR;
mbed_official 87:085cde657901 529 }
mbed_official 87:085cde657901 530
mbed_official 87:085cde657901 531 /* Write data to memory */
mbed_official 87:085cde657901 532 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 533 {
mbed_official 87:085cde657901 534 *(__IO uint32_t *)pSdramAddress = *pSrcBuffer;
mbed_official 87:085cde657901 535 pSrcBuffer++;
mbed_official 87:085cde657901 536 pSdramAddress++;
mbed_official 87:085cde657901 537 }
mbed_official 87:085cde657901 538
mbed_official 87:085cde657901 539 /* Process Unlocked */
mbed_official 87:085cde657901 540 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 541
mbed_official 87:085cde657901 542 return HAL_OK;
mbed_official 87:085cde657901 543 }
mbed_official 87:085cde657901 544
mbed_official 87:085cde657901 545 /**
mbed_official 87:085cde657901 546 * @brief Reads a Words data from the SDRAM memory using DMA transfer.
mbed_official 226:b062af740e40 547 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 548 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 549 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 550 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 551 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 552 * @retval HAL status
mbed_official 87:085cde657901 553 */
mbed_official 87:085cde657901 554 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 555 {
mbed_official 87:085cde657901 556 uint32_t tmp = 0;
mbed_official 87:085cde657901 557
mbed_official 87:085cde657901 558 /* Process Locked */
mbed_official 87:085cde657901 559 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 560
mbed_official 87:085cde657901 561 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 562 tmp = hsdram->State;
mbed_official 87:085cde657901 563
mbed_official 87:085cde657901 564 if(tmp == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 565 {
mbed_official 87:085cde657901 566 return HAL_BUSY;
mbed_official 87:085cde657901 567 }
mbed_official 87:085cde657901 568 else if(tmp == HAL_SDRAM_STATE_PRECHARGED)
mbed_official 87:085cde657901 569 {
mbed_official 87:085cde657901 570 return HAL_ERROR;
mbed_official 87:085cde657901 571 }
mbed_official 87:085cde657901 572
mbed_official 87:085cde657901 573 /* Configure DMA user callbacks */
mbed_official 87:085cde657901 574 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
mbed_official 87:085cde657901 575 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
mbed_official 87:085cde657901 576
mbed_official 87:085cde657901 577 /* Enable the DMA Stream */
mbed_official 87:085cde657901 578 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
mbed_official 87:085cde657901 579
mbed_official 87:085cde657901 580 /* Process Unlocked */
mbed_official 87:085cde657901 581 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 582
mbed_official 87:085cde657901 583 return HAL_OK;
mbed_official 87:085cde657901 584 }
mbed_official 87:085cde657901 585
mbed_official 87:085cde657901 586 /**
mbed_official 87:085cde657901 587 * @brief Writes a Words data buffer to SDRAM memory using DMA transfer.
mbed_official 226:b062af740e40 588 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 589 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 590 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 591 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 592 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 593 * @retval HAL status
mbed_official 87:085cde657901 594 */
mbed_official 87:085cde657901 595 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 596 {
mbed_official 87:085cde657901 597 uint32_t tmp = 0;
mbed_official 87:085cde657901 598
mbed_official 87:085cde657901 599 /* Process Locked */
mbed_official 87:085cde657901 600 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 601
mbed_official 87:085cde657901 602 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 603 tmp = hsdram->State;
mbed_official 87:085cde657901 604
mbed_official 87:085cde657901 605 if(tmp == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 606 {
mbed_official 87:085cde657901 607 return HAL_BUSY;
mbed_official 87:085cde657901 608 }
mbed_official 87:085cde657901 609 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
mbed_official 87:085cde657901 610 {
mbed_official 87:085cde657901 611 return HAL_ERROR;
mbed_official 87:085cde657901 612 }
mbed_official 87:085cde657901 613
mbed_official 87:085cde657901 614 /* Configure DMA user callbacks */
mbed_official 87:085cde657901 615 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
mbed_official 87:085cde657901 616 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
mbed_official 87:085cde657901 617
mbed_official 87:085cde657901 618 /* Enable the DMA Stream */
mbed_official 87:085cde657901 619 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
mbed_official 87:085cde657901 620
mbed_official 87:085cde657901 621 /* Process Unlocked */
mbed_official 87:085cde657901 622 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 623
mbed_official 87:085cde657901 624 return HAL_OK;
mbed_official 87:085cde657901 625 }
mbed_official 87:085cde657901 626
mbed_official 87:085cde657901 627 /**
mbed_official 87:085cde657901 628 * @}
mbed_official 87:085cde657901 629 */
mbed_official 87:085cde657901 630
mbed_official 87:085cde657901 631 /** @defgroup SDRAM_Group3 Control functions
mbed_official 87:085cde657901 632 * @brief management functions
mbed_official 87:085cde657901 633 *
mbed_official 87:085cde657901 634 @verbatim
mbed_official 87:085cde657901 635 ==============================================================================
mbed_official 87:085cde657901 636 ##### SDRAM Control functions #####
mbed_official 87:085cde657901 637 ==============================================================================
mbed_official 87:085cde657901 638 [..]
mbed_official 87:085cde657901 639 This subsection provides a set of functions allowing to control dynamically
mbed_official 87:085cde657901 640 the SDRAM interface.
mbed_official 87:085cde657901 641
mbed_official 87:085cde657901 642 @endverbatim
mbed_official 87:085cde657901 643 * @{
mbed_official 87:085cde657901 644 */
mbed_official 87:085cde657901 645
mbed_official 87:085cde657901 646 /**
mbed_official 87:085cde657901 647 * @brief Enables dynamically SDRAM write protection.
mbed_official 226:b062af740e40 648 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 649 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 650 * @retval HAL status
mbed_official 87:085cde657901 651 */
mbed_official 87:085cde657901 652 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 653 {
mbed_official 87:085cde657901 654 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 655 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 656 {
mbed_official 87:085cde657901 657 return HAL_BUSY;
mbed_official 87:085cde657901 658 }
mbed_official 87:085cde657901 659
mbed_official 87:085cde657901 660 /* Update the SDRAM state */
mbed_official 87:085cde657901 661 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 662
mbed_official 87:085cde657901 663 /* Enable write protection */
mbed_official 87:085cde657901 664 FMC_SDRAM_WriteProtection_Enable(hsdram->Instance, hsdram->Init.SDBank);
mbed_official 87:085cde657901 665
mbed_official 87:085cde657901 666 /* Update the SDRAM state */
mbed_official 87:085cde657901 667 hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
mbed_official 87:085cde657901 668
mbed_official 87:085cde657901 669 return HAL_OK;
mbed_official 87:085cde657901 670 }
mbed_official 87:085cde657901 671
mbed_official 87:085cde657901 672 /**
mbed_official 87:085cde657901 673 * @brief Disables dynamically SDRAM write protection.
mbed_official 226:b062af740e40 674 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 675 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 676 * @retval HAL status
mbed_official 87:085cde657901 677 */
mbed_official 87:085cde657901 678 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 679 {
mbed_official 87:085cde657901 680 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 681 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 682 {
mbed_official 87:085cde657901 683 return HAL_BUSY;
mbed_official 87:085cde657901 684 }
mbed_official 87:085cde657901 685
mbed_official 87:085cde657901 686 /* Update the SDRAM state */
mbed_official 87:085cde657901 687 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 688
mbed_official 87:085cde657901 689 /* Disable write protection */
mbed_official 87:085cde657901 690 FMC_SDRAM_WriteProtection_Disable(hsdram->Instance, hsdram->Init.SDBank);
mbed_official 87:085cde657901 691
mbed_official 87:085cde657901 692 /* Update the SDRAM state */
mbed_official 87:085cde657901 693 hsdram->State = HAL_SDRAM_STATE_READY;
mbed_official 87:085cde657901 694
mbed_official 87:085cde657901 695 return HAL_OK;
mbed_official 87:085cde657901 696 }
mbed_official 87:085cde657901 697
mbed_official 87:085cde657901 698 /**
mbed_official 87:085cde657901 699 * @brief Sends Command to the SDRAM bank.
mbed_official 226:b062af740e40 700 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 701 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 702 * @param Command: SDRAM command structure
mbed_official 87:085cde657901 703 * @param Timeout: Timeout duration
mbed_official 226:b062af740e40 704 * @retval HAL status
mbed_official 87:085cde657901 705 */
mbed_official 87:085cde657901 706 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
mbed_official 87:085cde657901 707 {
mbed_official 87:085cde657901 708 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 709 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 710 {
mbed_official 87:085cde657901 711 return HAL_BUSY;
mbed_official 87:085cde657901 712 }
mbed_official 87:085cde657901 713
mbed_official 87:085cde657901 714 /* Update the SDRAM state */
mbed_official 87:085cde657901 715 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 716
mbed_official 87:085cde657901 717 /* Send SDRAM command */
mbed_official 87:085cde657901 718 FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
mbed_official 87:085cde657901 719
mbed_official 87:085cde657901 720 /* Update the SDRAM controller state state */
mbed_official 87:085cde657901 721 if(Command->CommandMode == FMC_SDRAM_CMD_PALL)
mbed_official 87:085cde657901 722 {
mbed_official 87:085cde657901 723 hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
mbed_official 87:085cde657901 724 }
mbed_official 87:085cde657901 725 else
mbed_official 87:085cde657901 726 {
mbed_official 87:085cde657901 727 hsdram->State = HAL_SDRAM_STATE_READY;
mbed_official 87:085cde657901 728 }
mbed_official 87:085cde657901 729
mbed_official 87:085cde657901 730 return HAL_OK;
mbed_official 87:085cde657901 731 }
mbed_official 87:085cde657901 732
mbed_official 87:085cde657901 733 /**
mbed_official 87:085cde657901 734 * @brief Programs the SDRAM Memory Refresh rate.
mbed_official 226:b062af740e40 735 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 736 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 737 * @param RefreshRate: The SDRAM refresh rate value
mbed_official 226:b062af740e40 738 * @retval HAL status
mbed_official 87:085cde657901 739 */
mbed_official 87:085cde657901 740 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
mbed_official 87:085cde657901 741 {
mbed_official 87:085cde657901 742 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 743 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 744 {
mbed_official 87:085cde657901 745 return HAL_BUSY;
mbed_official 87:085cde657901 746 }
mbed_official 87:085cde657901 747
mbed_official 87:085cde657901 748 /* Update the SDRAM state */
mbed_official 87:085cde657901 749 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 750
mbed_official 87:085cde657901 751 /* Program the refresh rate */
mbed_official 87:085cde657901 752 FMC_SDRAM_ProgramRefreshRate(hsdram->Instance ,RefreshRate);
mbed_official 87:085cde657901 753
mbed_official 87:085cde657901 754 /* Update the SDRAM state */
mbed_official 87:085cde657901 755 hsdram->State = HAL_SDRAM_STATE_READY;
mbed_official 87:085cde657901 756
mbed_official 87:085cde657901 757 return HAL_OK;
mbed_official 87:085cde657901 758 }
mbed_official 87:085cde657901 759
mbed_official 87:085cde657901 760 /**
mbed_official 87:085cde657901 761 * @brief Sets the Number of consecutive SDRAM Memory auto Refresh commands.
mbed_official 226:b062af740e40 762 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 763 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 764 * @param AutoRefreshNumber: The SDRAM auto Refresh number
mbed_official 226:b062af740e40 765 * @retval HAL status
mbed_official 87:085cde657901 766 */
mbed_official 87:085cde657901 767 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber)
mbed_official 87:085cde657901 768 {
mbed_official 87:085cde657901 769 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 770 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 771 {
mbed_official 87:085cde657901 772 return HAL_BUSY;
mbed_official 87:085cde657901 773 }
mbed_official 87:085cde657901 774
mbed_official 87:085cde657901 775 /* Update the SDRAM state */
mbed_official 87:085cde657901 776 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 777
mbed_official 87:085cde657901 778 /* Set the Auto-Refresh number */
mbed_official 87:085cde657901 779 FMC_SDRAM_SetAutoRefreshNumber(hsdram->Instance ,AutoRefreshNumber);
mbed_official 87:085cde657901 780
mbed_official 87:085cde657901 781 /* Update the SDRAM state */
mbed_official 87:085cde657901 782 hsdram->State = HAL_SDRAM_STATE_READY;
mbed_official 87:085cde657901 783
mbed_official 87:085cde657901 784 return HAL_OK;
mbed_official 87:085cde657901 785 }
mbed_official 87:085cde657901 786
mbed_official 87:085cde657901 787 /**
mbed_official 87:085cde657901 788 * @brief Returns the SDRAM memory current mode.
mbed_official 226:b062af740e40 789 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 790 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 791 * @retval The SDRAM memory mode.
mbed_official 87:085cde657901 792 */
mbed_official 87:085cde657901 793 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 794 {
mbed_official 87:085cde657901 795 /* Return the SDRAM memory current mode */
mbed_official 87:085cde657901 796 return(FMC_SDRAM_GetModeStatus(hsdram->Instance, hsdram->Init.SDBank));
mbed_official 87:085cde657901 797 }
mbed_official 87:085cde657901 798
mbed_official 87:085cde657901 799 /**
mbed_official 87:085cde657901 800 * @}
mbed_official 87:085cde657901 801 */
mbed_official 87:085cde657901 802
mbed_official 87:085cde657901 803 /** @defgroup SDRAM_Group4 State functions
mbed_official 87:085cde657901 804 * @brief Peripheral State functions
mbed_official 87:085cde657901 805 *
mbed_official 87:085cde657901 806 @verbatim
mbed_official 87:085cde657901 807 ==============================================================================
mbed_official 87:085cde657901 808 ##### SDRAM State functions #####
mbed_official 87:085cde657901 809 ==============================================================================
mbed_official 87:085cde657901 810 [..]
mbed_official 87:085cde657901 811 This subsection permits to get in run-time the status of the SDRAM controller
mbed_official 87:085cde657901 812 and the data flow.
mbed_official 87:085cde657901 813
mbed_official 87:085cde657901 814 @endverbatim
mbed_official 87:085cde657901 815 * @{
mbed_official 87:085cde657901 816 */
mbed_official 87:085cde657901 817
mbed_official 87:085cde657901 818 /**
mbed_official 87:085cde657901 819 * @brief Returns the SDRAM state.
mbed_official 226:b062af740e40 820 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 821 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 822 * @retval HAL state
mbed_official 87:085cde657901 823 */
mbed_official 87:085cde657901 824 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 825 {
mbed_official 87:085cde657901 826 return hsdram->State;
mbed_official 87:085cde657901 827 }
mbed_official 87:085cde657901 828
mbed_official 87:085cde657901 829 /**
mbed_official 87:085cde657901 830 * @}
mbed_official 87:085cde657901 831 */
mbed_official 87:085cde657901 832
mbed_official 87:085cde657901 833 /**
mbed_official 87:085cde657901 834 * @}
mbed_official 87:085cde657901 835 */
mbed_official 87:085cde657901 836 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 87:085cde657901 837 #endif /* HAL_SDRAM_MODULE_ENABLED */
mbed_official 87:085cde657901 838 /**
mbed_official 87:085cde657901 839 * @}
mbed_official 87:085cde657901 840 */
mbed_official 87:085cde657901 841
mbed_official 87:085cde657901 842 /**
mbed_official 87:085cde657901 843 * @}
mbed_official 87:085cde657901 844 */
mbed_official 87:085cde657901 845
mbed_official 87:085cde657901 846 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/