mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_rcc.c@310:6188e0254baa, 2014-09-16 (annotated)
- Committer:
- janekm
- Date:
- Tue Sep 16 22:42:01 2014 +0000
- Revision:
- 310:6188e0254baa
- Parent:
- 237:f3da66175598
N/A
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 237:f3da66175598 | 1 | /** |
mbed_official | 237:f3da66175598 | 2 | ****************************************************************************** |
mbed_official | 237:f3da66175598 | 3 | * @file stm32f3xx_hal_rcc.c |
mbed_official | 237:f3da66175598 | 4 | * @author MCD Application Team |
mbed_official | 237:f3da66175598 | 5 | * @version V1.0.1 |
mbed_official | 237:f3da66175598 | 6 | * @date 18-June-2014 |
mbed_official | 237:f3da66175598 | 7 | * @brief RCC HAL module driver. |
mbed_official | 237:f3da66175598 | 8 | * This file provides firmware functions to manage the following |
mbed_official | 237:f3da66175598 | 9 | * functionalities of the Reset and Clock Control (RCC) peripheral: |
mbed_official | 237:f3da66175598 | 10 | * + Initialization and de-initialization functions |
mbed_official | 237:f3da66175598 | 11 | * + Peripheral Control functions |
mbed_official | 237:f3da66175598 | 12 | * |
mbed_official | 237:f3da66175598 | 13 | @verbatim |
mbed_official | 237:f3da66175598 | 14 | ============================================================================== |
mbed_official | 237:f3da66175598 | 15 | ##### RCC specific features ##### |
mbed_official | 237:f3da66175598 | 16 | ============================================================================== |
mbed_official | 237:f3da66175598 | 17 | [..] |
mbed_official | 237:f3da66175598 | 18 | After reset the device is running from Internal High Speed oscillator |
mbed_official | 237:f3da66175598 | 19 | (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is disabled, |
mbed_official | 237:f3da66175598 | 20 | and all peripherals are off except internal SRAM, Flash and JTAG. |
mbed_official | 237:f3da66175598 | 21 | (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses; |
mbed_official | 237:f3da66175598 | 22 | all peripherals mapped on these busses are running at HSI speed. |
mbed_official | 237:f3da66175598 | 23 | (+) The clock for all peripherals is switched off, except the SRAM and FLASH. |
mbed_official | 237:f3da66175598 | 24 | (+) All GPIOs are in input floating state, except the JTAG pins which |
mbed_official | 237:f3da66175598 | 25 | are assigned to be used for debug purpose. |
mbed_official | 237:f3da66175598 | 26 | |
mbed_official | 237:f3da66175598 | 27 | [..] |
mbed_official | 237:f3da66175598 | 28 | Once the device started from reset, the user application has to: |
mbed_official | 237:f3da66175598 | 29 | (+) Configure the clock source to be used to drive the System clock |
mbed_official | 237:f3da66175598 | 30 | (if the application needs higher frequency/performance) |
mbed_official | 237:f3da66175598 | 31 | (+) Configure the System clock frequency and Flash settings |
mbed_official | 237:f3da66175598 | 32 | (+) Configure the AHB and APB busses prescalers |
mbed_official | 237:f3da66175598 | 33 | (+) Enable the clock for the peripheral(s) to be used |
mbed_official | 237:f3da66175598 | 34 | (+) Configure the clock source(s) for peripherals which clocks are not |
mbed_official | 237:f3da66175598 | 35 | derived from the System clock (RTC, ADC, I2C, I2S, TIM, USB FS) |
mbed_official | 237:f3da66175598 | 36 | @endverbatim |
mbed_official | 237:f3da66175598 | 37 | ****************************************************************************** |
mbed_official | 237:f3da66175598 | 38 | * @attention |
mbed_official | 237:f3da66175598 | 39 | * |
mbed_official | 237:f3da66175598 | 40 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 237:f3da66175598 | 41 | * |
mbed_official | 237:f3da66175598 | 42 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 237:f3da66175598 | 43 | * are permitted provided that the following conditions are met: |
mbed_official | 237:f3da66175598 | 44 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 237:f3da66175598 | 45 | * this list of conditions and the following disclaimer. |
mbed_official | 237:f3da66175598 | 46 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 237:f3da66175598 | 47 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 237:f3da66175598 | 48 | * and/or other materials provided with the distribution. |
mbed_official | 237:f3da66175598 | 49 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 237:f3da66175598 | 50 | * may be used to endorse or promote products derived from this software |
mbed_official | 237:f3da66175598 | 51 | * without specific prior written permission. |
mbed_official | 237:f3da66175598 | 52 | * |
mbed_official | 237:f3da66175598 | 53 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 237:f3da66175598 | 54 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 237:f3da66175598 | 55 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 237:f3da66175598 | 56 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 237:f3da66175598 | 57 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 237:f3da66175598 | 58 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 237:f3da66175598 | 59 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 237:f3da66175598 | 60 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 237:f3da66175598 | 61 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 237:f3da66175598 | 62 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 237:f3da66175598 | 63 | * |
mbed_official | 237:f3da66175598 | 64 | ****************************************************************************** |
mbed_official | 237:f3da66175598 | 65 | */ |
mbed_official | 237:f3da66175598 | 66 | |
mbed_official | 237:f3da66175598 | 67 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 68 | #include "stm32f3xx_hal.h" |
mbed_official | 237:f3da66175598 | 69 | |
mbed_official | 237:f3da66175598 | 70 | /** @addtogroup STM32F3xx_HAL_Driver |
mbed_official | 237:f3da66175598 | 71 | * @{ |
mbed_official | 237:f3da66175598 | 72 | */ |
mbed_official | 237:f3da66175598 | 73 | |
mbed_official | 237:f3da66175598 | 74 | /** @defgroup RCC |
mbed_official | 237:f3da66175598 | 75 | * @brief RCC HAL module driver |
mbed_official | 237:f3da66175598 | 76 | * @{ |
mbed_official | 237:f3da66175598 | 77 | */ |
mbed_official | 237:f3da66175598 | 78 | |
mbed_official | 237:f3da66175598 | 79 | #ifdef HAL_RCC_MODULE_ENABLED |
mbed_official | 237:f3da66175598 | 80 | |
mbed_official | 237:f3da66175598 | 81 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 82 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 83 | #define HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT |
mbed_official | 237:f3da66175598 | 84 | #define HSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */ |
mbed_official | 237:f3da66175598 | 85 | #define LSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */ |
mbed_official | 237:f3da66175598 | 86 | #define PLL_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */ |
mbed_official | 237:f3da66175598 | 87 | #define CLOCKSWITCH_TIMEOUT_VALUE ((uint32_t)5000) /* 5 s */ |
mbed_official | 237:f3da66175598 | 88 | |
mbed_official | 237:f3da66175598 | 89 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 90 | #define __MCO_CLK_ENABLE() __GPIOA_CLK_ENABLE() |
mbed_official | 237:f3da66175598 | 91 | #define MCO_GPIO_PORT GPIOA |
mbed_official | 237:f3da66175598 | 92 | #define MCO_PIN GPIO_PIN_8 |
mbed_official | 237:f3da66175598 | 93 | |
mbed_official | 237:f3da66175598 | 94 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 95 | const uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; |
mbed_official | 237:f3da66175598 | 96 | const uint8_t PLLMULFactorTable[16] = { 2, 3, 4, 5, 6, 7, 8, 9, |
mbed_official | 237:f3da66175598 | 97 | 10, 11, 12, 13, 14, 15, 16, 16}; |
mbed_official | 237:f3da66175598 | 98 | const uint8_t PredivFactorTable[16] = { 1, 2, 3, 4, 5, 6, 7, 8, |
mbed_official | 237:f3da66175598 | 99 | 9,10, 11, 12, 13, 14, 15, 16}; |
mbed_official | 237:f3da66175598 | 100 | |
mbed_official | 237:f3da66175598 | 101 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 102 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 103 | |
mbed_official | 237:f3da66175598 | 104 | /** @defgroup RCC_Private_Functions |
mbed_official | 237:f3da66175598 | 105 | * @{ |
mbed_official | 237:f3da66175598 | 106 | */ |
mbed_official | 237:f3da66175598 | 107 | |
mbed_official | 237:f3da66175598 | 108 | /** @defgroup RCC_Group1 Initialization and de-initialization functions |
mbed_official | 237:f3da66175598 | 109 | * @brief Initialization and Configuration functions |
mbed_official | 237:f3da66175598 | 110 | * |
mbed_official | 237:f3da66175598 | 111 | @verbatim |
mbed_official | 237:f3da66175598 | 112 | =============================================================================== |
mbed_official | 237:f3da66175598 | 113 | ##### Initialization and de-initialization functions ##### |
mbed_official | 237:f3da66175598 | 114 | =============================================================================== |
mbed_official | 237:f3da66175598 | 115 | [..] |
mbed_official | 237:f3da66175598 | 116 | This section provide functions allowing to configure the internal/external oscillators |
mbed_official | 237:f3da66175598 | 117 | (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1 |
mbed_official | 237:f3da66175598 | 118 | and APB2). |
mbed_official | 237:f3da66175598 | 119 | |
mbed_official | 237:f3da66175598 | 120 | [..] Internal/external clock and PLL configuration |
mbed_official | 237:f3da66175598 | 121 | (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through |
mbed_official | 237:f3da66175598 | 122 | the PLL as System clock source. |
mbed_official | 237:f3da66175598 | 123 | The HSI clock can be used also to clock the USART and I2C peripherals. |
mbed_official | 237:f3da66175598 | 124 | |
mbed_official | 237:f3da66175598 | 125 | (#) LSI (low-speed internal), 40 KHz low consumption RC used as IWDG and/or RTC |
mbed_official | 237:f3da66175598 | 126 | clock source. |
mbed_official | 237:f3da66175598 | 127 | |
mbed_official | 237:f3da66175598 | 128 | (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or |
mbed_official | 237:f3da66175598 | 129 | through the PLL as System clock source. Can be used also as RTC clock source. |
mbed_official | 237:f3da66175598 | 130 | |
mbed_official | 237:f3da66175598 | 131 | (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source. |
mbed_official | 237:f3da66175598 | 132 | |
mbed_official | 237:f3da66175598 | 133 | (#) PLL (clocked by HSI or HSE), featuring different output clocks: |
mbed_official | 237:f3da66175598 | 134 | (+@) The first output is used to generate the high speed system clock (up to 72 MHz) |
mbed_official | 237:f3da66175598 | 135 | (+@) The second output is used to generate the clock for the USB FS (48 MHz) |
mbed_official | 237:f3da66175598 | 136 | (+@) The third output may be used to generate the clock for the ADC peripherals (up to 72 MHz) |
mbed_official | 237:f3da66175598 | 137 | (+@) The fourth output may be used to generate the clock for the TIM peripherals (144 MHz) |
mbed_official | 237:f3da66175598 | 138 | |
mbed_official | 237:f3da66175598 | 139 | (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE() |
mbed_official | 237:f3da66175598 | 140 | and if a HSE clock failure occurs(HSE used directly or through PLL as System |
mbed_official | 237:f3da66175598 | 141 | clock source), the System clockis automatically switched to HSI and an interrupt |
mbed_official | 237:f3da66175598 | 142 | is generated if enabled. The interrupt is linked to the Cortex-M4 NMI |
mbed_official | 237:f3da66175598 | 143 | (Non-Maskable Interrupt) exception vector. |
mbed_official | 237:f3da66175598 | 144 | |
mbed_official | 237:f3da66175598 | 145 | (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL |
mbed_official | 237:f3da66175598 | 146 | clock (divided by 2) output on pin (such as PA8 pin). |
mbed_official | 237:f3da66175598 | 147 | |
mbed_official | 237:f3da66175598 | 148 | [..] System, AHB and APB busses clocks configuration |
mbed_official | 237:f3da66175598 | 149 | (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI, |
mbed_official | 237:f3da66175598 | 150 | HSE and PLL. |
mbed_official | 237:f3da66175598 | 151 | The AHB clock (HCLK) is derived from System clock through configurable |
mbed_official | 237:f3da66175598 | 152 | prescaler and used to clock the CPU, memory and peripherals mapped |
mbed_official | 237:f3da66175598 | 153 | on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived |
mbed_official | 237:f3da66175598 | 154 | from AHB clock through configurable prescalers and used to clock |
mbed_official | 237:f3da66175598 | 155 | the peripherals mapped on these busses. You can use |
mbed_official | 237:f3da66175598 | 156 | "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. |
mbed_official | 237:f3da66175598 | 157 | |
mbed_official | 237:f3da66175598 | 158 | (#) All the peripheral clocks are derived from the System clock (SYSCLK) except: |
mbed_official | 237:f3da66175598 | 159 | (+@) The FLASH program/erase clock which is always HSI 8MHz clock. |
mbed_official | 237:f3da66175598 | 160 | (+@) The USB 48 MHz clock which is derived from the PLL VCO clock. |
mbed_official | 237:f3da66175598 | 161 | (+@) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE. |
mbed_official | 237:f3da66175598 | 162 | (+@) The I2C clock which can be derived as well from HSI 8MHz clock. |
mbed_official | 237:f3da66175598 | 163 | (+@) The ADC clock which is derived from PLL output. |
mbed_official | 237:f3da66175598 | 164 | (+@) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC |
mbed_official | 237:f3da66175598 | 165 | (HSE divided by a programmable prescaler). The System clock (SYSCLK) |
mbed_official | 237:f3da66175598 | 166 | frequency must be higher or equal to the RTC clock frequency. |
mbed_official | 237:f3da66175598 | 167 | (+@) IWDG clock which is always the LSI clock. |
mbed_official | 237:f3da66175598 | 168 | |
mbed_official | 237:f3da66175598 | 169 | (#) For the STM32F3xx devices, the maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 72 MHz, |
mbed_official | 237:f3da66175598 | 170 | Depending on the SYSCLK frequency, the flash latency should be adapted accordingly: |
mbed_official | 237:f3da66175598 | 171 | +-----------------------------------------------+ |
mbed_official | 237:f3da66175598 | 172 | | Latency | SYSCLK clock frequency (MHz) | |
mbed_official | 237:f3da66175598 | 173 | |---------------|-------------------------------| |
mbed_official | 237:f3da66175598 | 174 | |0WS(1CPU cycle)| 0 < SYSCLK <= 24 | |
mbed_official | 237:f3da66175598 | 175 | |---------------|-------------------------------| |
mbed_official | 237:f3da66175598 | 176 | |1WS(2CPU cycle)| 24 < SYSCLK <= 48 | |
mbed_official | 237:f3da66175598 | 177 | |---------------|-------------------------------| |
mbed_official | 237:f3da66175598 | 178 | |2WS(3CPU cycle)| 48 < SYSCLK <= 72 | |
mbed_official | 237:f3da66175598 | 179 | +-----------------------------------------------+ |
mbed_official | 237:f3da66175598 | 180 | |
mbed_official | 237:f3da66175598 | 181 | (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and |
mbed_official | 237:f3da66175598 | 182 | prefetch is disabled. |
mbed_official | 237:f3da66175598 | 183 | |
mbed_official | 237:f3da66175598 | 184 | @endverbatim |
mbed_official | 237:f3da66175598 | 185 | * @{ |
mbed_official | 237:f3da66175598 | 186 | */ |
mbed_official | 237:f3da66175598 | 187 | |
mbed_official | 237:f3da66175598 | 188 | /** |
mbed_official | 237:f3da66175598 | 189 | * @brief Resets the RCC clock configuration to the default reset state. |
mbed_official | 237:f3da66175598 | 190 | * @note The default reset state of the clock configuration is given below: |
mbed_official | 237:f3da66175598 | 191 | * - HSI ON and used as system clock source |
mbed_official | 237:f3da66175598 | 192 | * - HSE and PLL OFF |
mbed_official | 237:f3da66175598 | 193 | * - AHB, APB1 and APB2 prescaler set to 1. |
mbed_official | 237:f3da66175598 | 194 | * - CSS, MCO OFF |
mbed_official | 237:f3da66175598 | 195 | * - All interrupts disabled |
mbed_official | 237:f3da66175598 | 196 | * @note This function doesn't modify the configuration of the |
mbed_official | 237:f3da66175598 | 197 | * - Peripheral clocks |
mbed_official | 237:f3da66175598 | 198 | * - LSI, LSE and RTC clocks |
mbed_official | 237:f3da66175598 | 199 | * @param None |
mbed_official | 237:f3da66175598 | 200 | * @retval None |
mbed_official | 237:f3da66175598 | 201 | */ |
mbed_official | 237:f3da66175598 | 202 | void HAL_RCC_DeInit(void) |
mbed_official | 237:f3da66175598 | 203 | { |
mbed_official | 237:f3da66175598 | 204 | /* Set HSION bit, HSITRIM[4:0] bits to the reset value*/ |
mbed_official | 237:f3da66175598 | 205 | SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4); |
mbed_official | 237:f3da66175598 | 206 | |
mbed_official | 237:f3da66175598 | 207 | /* Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0] and MCOSEL[2:0] bits */ |
mbed_official | 237:f3da66175598 | 208 | CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCO); |
mbed_official | 237:f3da66175598 | 209 | |
mbed_official | 237:f3da66175598 | 210 | /* Reset HSEON, CSSON, PLLON bits */ |
mbed_official | 237:f3da66175598 | 211 | CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON); |
mbed_official | 237:f3da66175598 | 212 | |
mbed_official | 237:f3da66175598 | 213 | /* Reset HSEBYP bit */ |
mbed_official | 237:f3da66175598 | 214 | CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); |
mbed_official | 237:f3da66175598 | 215 | |
mbed_official | 237:f3da66175598 | 216 | /* Reset CFGR register */ |
mbed_official | 237:f3da66175598 | 217 | CLEAR_REG(RCC->CFGR); |
mbed_official | 237:f3da66175598 | 218 | |
mbed_official | 237:f3da66175598 | 219 | /* Reset CFGR2 register */ |
mbed_official | 237:f3da66175598 | 220 | CLEAR_REG(RCC->CFGR2); |
mbed_official | 237:f3da66175598 | 221 | |
mbed_official | 237:f3da66175598 | 222 | /* Reset CFGR3 register */ |
mbed_official | 237:f3da66175598 | 223 | CLEAR_REG(RCC->CFGR3); |
mbed_official | 237:f3da66175598 | 224 | |
mbed_official | 237:f3da66175598 | 225 | /* Disable all interrupts */ |
mbed_official | 237:f3da66175598 | 226 | CLEAR_REG(RCC->CIR); |
mbed_official | 237:f3da66175598 | 227 | } |
mbed_official | 237:f3da66175598 | 228 | |
mbed_official | 237:f3da66175598 | 229 | /** |
mbed_official | 237:f3da66175598 | 230 | * @brief Initializes the RCC Oscillators according to the specified parameters in the |
mbed_official | 237:f3da66175598 | 231 | * RCC_OscInitTypeDef. |
mbed_official | 237:f3da66175598 | 232 | * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that |
mbed_official | 237:f3da66175598 | 233 | * contains the configuration information for the RCC Oscillators. |
mbed_official | 237:f3da66175598 | 234 | * @note The PLL is not disabled when used as system clock. |
mbed_official | 237:f3da66175598 | 235 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 236 | */ |
mbed_official | 237:f3da66175598 | 237 | HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) |
mbed_official | 237:f3da66175598 | 238 | { |
mbed_official | 237:f3da66175598 | 239 | uint32_t tickstart = 0; |
mbed_official | 237:f3da66175598 | 240 | |
mbed_official | 237:f3da66175598 | 241 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 242 | assert_param(RCC_OscInitStruct != NULL); |
mbed_official | 237:f3da66175598 | 243 | assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); |
mbed_official | 237:f3da66175598 | 244 | /*------------------------------- HSE Configuration ------------------------*/ |
mbed_official | 237:f3da66175598 | 245 | if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) |
mbed_official | 237:f3da66175598 | 246 | { |
mbed_official | 237:f3da66175598 | 247 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 248 | assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); |
mbed_official | 237:f3da66175598 | 249 | /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ |
mbed_official | 237:f3da66175598 | 250 | if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) || |
mbed_official | 237:f3da66175598 | 251 | ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) |
mbed_official | 237:f3da66175598 | 252 | { |
mbed_official | 237:f3da66175598 | 253 | if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState != RCC_HSE_ON)) |
mbed_official | 237:f3da66175598 | 254 | { |
mbed_official | 237:f3da66175598 | 255 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 256 | } |
mbed_official | 237:f3da66175598 | 257 | } |
mbed_official | 237:f3da66175598 | 258 | else |
mbed_official | 237:f3da66175598 | 259 | { |
mbed_official | 237:f3da66175598 | 260 | /* Reset HSEON and HSEBYP bits before configuring the HSE --------------*/ |
mbed_official | 237:f3da66175598 | 261 | __HAL_RCC_HSE_CONFIG(RCC_HSE_OFF); |
mbed_official | 237:f3da66175598 | 262 | |
mbed_official | 237:f3da66175598 | 263 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 264 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 265 | |
mbed_official | 237:f3da66175598 | 266 | /* Wait till HSE is bypassed or disabled */ |
mbed_official | 237:f3da66175598 | 267 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) |
mbed_official | 237:f3da66175598 | 268 | { |
mbed_official | 237:f3da66175598 | 269 | if((HAL_GetTick()-tickstart) > HSE_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 270 | { |
mbed_official | 237:f3da66175598 | 271 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 272 | } |
mbed_official | 237:f3da66175598 | 273 | } |
mbed_official | 237:f3da66175598 | 274 | |
mbed_official | 237:f3da66175598 | 275 | /* Set the new HSE configuration ---------------------------------------*/ |
mbed_official | 237:f3da66175598 | 276 | __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); |
mbed_official | 237:f3da66175598 | 277 | |
mbed_official | 237:f3da66175598 | 278 | /* Configure the HSE predivision factor --------------------------------*/ |
mbed_official | 237:f3da66175598 | 279 | __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); |
mbed_official | 237:f3da66175598 | 280 | |
mbed_official | 237:f3da66175598 | 281 | /* Check the HSE State */ |
mbed_official | 237:f3da66175598 | 282 | if(RCC_OscInitStruct->HSEState == RCC_HSE_ON) |
mbed_official | 237:f3da66175598 | 283 | { |
mbed_official | 237:f3da66175598 | 284 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 285 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 286 | |
mbed_official | 237:f3da66175598 | 287 | /* Wait till HSE is ready */ |
mbed_official | 237:f3da66175598 | 288 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) |
mbed_official | 237:f3da66175598 | 289 | { |
mbed_official | 237:f3da66175598 | 290 | if((HAL_GetTick()-tickstart) > HSE_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 291 | { |
mbed_official | 237:f3da66175598 | 292 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 293 | } |
mbed_official | 237:f3da66175598 | 294 | } |
mbed_official | 237:f3da66175598 | 295 | } |
mbed_official | 237:f3da66175598 | 296 | else |
mbed_official | 237:f3da66175598 | 297 | { |
mbed_official | 237:f3da66175598 | 298 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 299 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 300 | |
mbed_official | 237:f3da66175598 | 301 | /* Wait till HSE is bypassed or disabled */ |
mbed_official | 237:f3da66175598 | 302 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) |
mbed_official | 237:f3da66175598 | 303 | { |
mbed_official | 237:f3da66175598 | 304 | if((HAL_GetTick()-tickstart) > HSE_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 305 | { |
mbed_official | 237:f3da66175598 | 306 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 307 | } |
mbed_official | 237:f3da66175598 | 308 | } |
mbed_official | 237:f3da66175598 | 309 | } |
mbed_official | 237:f3da66175598 | 310 | } |
mbed_official | 237:f3da66175598 | 311 | } |
mbed_official | 237:f3da66175598 | 312 | /*----------------------------- HSI Configuration --------------------------*/ |
mbed_official | 237:f3da66175598 | 313 | if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) |
mbed_official | 237:f3da66175598 | 314 | { |
mbed_official | 237:f3da66175598 | 315 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 316 | assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); |
mbed_official | 237:f3da66175598 | 317 | assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); |
mbed_official | 237:f3da66175598 | 318 | |
mbed_official | 237:f3da66175598 | 319 | /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ |
mbed_official | 237:f3da66175598 | 320 | if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) || |
mbed_official | 237:f3da66175598 | 321 | ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) |
mbed_official | 237:f3da66175598 | 322 | { |
mbed_official | 237:f3da66175598 | 323 | /* When the HSI is used as system clock it is not allowed to be disabled */ |
mbed_official | 237:f3da66175598 | 324 | if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) |
mbed_official | 237:f3da66175598 | 325 | { |
mbed_official | 237:f3da66175598 | 326 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 327 | } |
mbed_official | 237:f3da66175598 | 328 | /* Otherwise, just the calibration is allowed */ |
mbed_official | 237:f3da66175598 | 329 | else |
mbed_official | 237:f3da66175598 | 330 | { |
mbed_official | 237:f3da66175598 | 331 | /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ |
mbed_official | 237:f3da66175598 | 332 | __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); |
mbed_official | 237:f3da66175598 | 333 | } |
mbed_official | 237:f3da66175598 | 334 | } |
mbed_official | 237:f3da66175598 | 335 | else |
mbed_official | 237:f3da66175598 | 336 | { |
mbed_official | 237:f3da66175598 | 337 | /* Check the HSI State */ |
mbed_official | 237:f3da66175598 | 338 | if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) |
mbed_official | 237:f3da66175598 | 339 | { |
mbed_official | 237:f3da66175598 | 340 | /* Enable the Internal High Speed oscillator (HSI). */ |
mbed_official | 237:f3da66175598 | 341 | __HAL_RCC_HSI_ENABLE(); |
mbed_official | 237:f3da66175598 | 342 | |
mbed_official | 237:f3da66175598 | 343 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 344 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 345 | |
mbed_official | 237:f3da66175598 | 346 | /* Wait till HSI is ready */ |
mbed_official | 237:f3da66175598 | 347 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) |
mbed_official | 237:f3da66175598 | 348 | { |
mbed_official | 237:f3da66175598 | 349 | if((HAL_GetTick()-tickstart) > HSI_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 350 | { |
mbed_official | 237:f3da66175598 | 351 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 352 | } |
mbed_official | 237:f3da66175598 | 353 | } |
mbed_official | 237:f3da66175598 | 354 | |
mbed_official | 237:f3da66175598 | 355 | /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ |
mbed_official | 237:f3da66175598 | 356 | __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); |
mbed_official | 237:f3da66175598 | 357 | } |
mbed_official | 237:f3da66175598 | 358 | else |
mbed_official | 237:f3da66175598 | 359 | { |
mbed_official | 237:f3da66175598 | 360 | /* Disable the Internal High Speed oscillator (HSI). */ |
mbed_official | 237:f3da66175598 | 361 | __HAL_RCC_HSI_DISABLE(); |
mbed_official | 237:f3da66175598 | 362 | |
mbed_official | 237:f3da66175598 | 363 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 364 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 365 | |
mbed_official | 237:f3da66175598 | 366 | /* Wait till HSI is ready */ |
mbed_official | 237:f3da66175598 | 367 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) |
mbed_official | 237:f3da66175598 | 368 | { |
mbed_official | 237:f3da66175598 | 369 | if((HAL_GetTick()-tickstart) > HSI_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 370 | { |
mbed_official | 237:f3da66175598 | 371 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 372 | } |
mbed_official | 237:f3da66175598 | 373 | } |
mbed_official | 237:f3da66175598 | 374 | } |
mbed_official | 237:f3da66175598 | 375 | } |
mbed_official | 237:f3da66175598 | 376 | } |
mbed_official | 237:f3da66175598 | 377 | /*------------------------------ LSI Configuration -------------------------*/ |
mbed_official | 237:f3da66175598 | 378 | if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) |
mbed_official | 237:f3da66175598 | 379 | { |
mbed_official | 237:f3da66175598 | 380 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 381 | assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); |
mbed_official | 237:f3da66175598 | 382 | |
mbed_official | 237:f3da66175598 | 383 | /* Check the LSI State */ |
mbed_official | 237:f3da66175598 | 384 | if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) |
mbed_official | 237:f3da66175598 | 385 | { |
mbed_official | 237:f3da66175598 | 386 | /* Enable the Internal Low Speed oscillator (LSI). */ |
mbed_official | 237:f3da66175598 | 387 | __HAL_RCC_LSI_ENABLE(); |
mbed_official | 237:f3da66175598 | 388 | |
mbed_official | 237:f3da66175598 | 389 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 390 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 391 | |
mbed_official | 237:f3da66175598 | 392 | /* Wait till LSI is ready */ |
mbed_official | 237:f3da66175598 | 393 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) |
mbed_official | 237:f3da66175598 | 394 | { |
mbed_official | 237:f3da66175598 | 395 | if((HAL_GetTick()-tickstart) > LSI_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 396 | { |
mbed_official | 237:f3da66175598 | 397 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 398 | } |
mbed_official | 237:f3da66175598 | 399 | } |
mbed_official | 237:f3da66175598 | 400 | } |
mbed_official | 237:f3da66175598 | 401 | else |
mbed_official | 237:f3da66175598 | 402 | { |
mbed_official | 237:f3da66175598 | 403 | /* Disable the Internal Low Speed oscillator (LSI). */ |
mbed_official | 237:f3da66175598 | 404 | __HAL_RCC_LSI_DISABLE(); |
mbed_official | 237:f3da66175598 | 405 | |
mbed_official | 237:f3da66175598 | 406 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 407 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 408 | |
mbed_official | 237:f3da66175598 | 409 | /* Wait till LSI is ready */ |
mbed_official | 237:f3da66175598 | 410 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) |
mbed_official | 237:f3da66175598 | 411 | { |
mbed_official | 237:f3da66175598 | 412 | if((HAL_GetTick()-tickstart) > LSI_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 413 | { |
mbed_official | 237:f3da66175598 | 414 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 415 | } |
mbed_official | 237:f3da66175598 | 416 | } |
mbed_official | 237:f3da66175598 | 417 | } |
mbed_official | 237:f3da66175598 | 418 | } |
mbed_official | 237:f3da66175598 | 419 | /*------------------------------ LSE Configuration -------------------------*/ |
mbed_official | 237:f3da66175598 | 420 | if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) |
mbed_official | 237:f3da66175598 | 421 | { |
mbed_official | 237:f3da66175598 | 422 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 423 | assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); |
mbed_official | 237:f3da66175598 | 424 | |
mbed_official | 237:f3da66175598 | 425 | /* Enable Power Clock */ |
mbed_official | 237:f3da66175598 | 426 | __PWR_CLK_ENABLE(); |
mbed_official | 237:f3da66175598 | 427 | |
mbed_official | 237:f3da66175598 | 428 | /* Enable write access to Backup domain */ |
mbed_official | 237:f3da66175598 | 429 | SET_BIT(PWR->CR, PWR_CR_DBP); |
mbed_official | 237:f3da66175598 | 430 | |
mbed_official | 237:f3da66175598 | 431 | /* Wait for Backup domain Write protection disable */ |
mbed_official | 237:f3da66175598 | 432 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 433 | |
mbed_official | 237:f3da66175598 | 434 | while((PWR->CR & PWR_CR_DBP) == RESET) |
mbed_official | 237:f3da66175598 | 435 | { |
mbed_official | 237:f3da66175598 | 436 | if((HAL_GetTick()-tickstart) > DBP_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 437 | { |
mbed_official | 237:f3da66175598 | 438 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 439 | } |
mbed_official | 237:f3da66175598 | 440 | } |
mbed_official | 237:f3da66175598 | 441 | |
mbed_official | 237:f3da66175598 | 442 | /* Reset LSEON and LSEBYP bits before configuring the LSE ----------------*/ |
mbed_official | 237:f3da66175598 | 443 | __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF); |
mbed_official | 237:f3da66175598 | 444 | |
mbed_official | 237:f3da66175598 | 445 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 446 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 447 | |
mbed_official | 237:f3da66175598 | 448 | /* Wait till LSE is ready */ |
mbed_official | 237:f3da66175598 | 449 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) |
mbed_official | 237:f3da66175598 | 450 | { |
mbed_official | 237:f3da66175598 | 451 | if((HAL_GetTick()-tickstart) > LSE_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 452 | { |
mbed_official | 237:f3da66175598 | 453 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 454 | } |
mbed_official | 237:f3da66175598 | 455 | } |
mbed_official | 237:f3da66175598 | 456 | |
mbed_official | 237:f3da66175598 | 457 | /* Set the new LSE configuration -----------------------------------------*/ |
mbed_official | 237:f3da66175598 | 458 | __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); |
mbed_official | 237:f3da66175598 | 459 | /* Check the LSE State */ |
mbed_official | 237:f3da66175598 | 460 | if(RCC_OscInitStruct->LSEState == RCC_LSE_ON) |
mbed_official | 237:f3da66175598 | 461 | { |
mbed_official | 237:f3da66175598 | 462 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 463 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 464 | |
mbed_official | 237:f3da66175598 | 465 | /* Wait till LSE is ready */ |
mbed_official | 237:f3da66175598 | 466 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) |
mbed_official | 237:f3da66175598 | 467 | { |
mbed_official | 237:f3da66175598 | 468 | if((HAL_GetTick()-tickstart) > LSE_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 469 | { |
mbed_official | 237:f3da66175598 | 470 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 471 | } |
mbed_official | 237:f3da66175598 | 472 | } |
mbed_official | 237:f3da66175598 | 473 | } |
mbed_official | 237:f3da66175598 | 474 | else |
mbed_official | 237:f3da66175598 | 475 | { |
mbed_official | 237:f3da66175598 | 476 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 477 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 478 | |
mbed_official | 237:f3da66175598 | 479 | /* Wait till LSE is ready */ |
mbed_official | 237:f3da66175598 | 480 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) |
mbed_official | 237:f3da66175598 | 481 | { |
mbed_official | 237:f3da66175598 | 482 | if((HAL_GetTick()-tickstart) > LSE_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 483 | { |
mbed_official | 237:f3da66175598 | 484 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 485 | } |
mbed_official | 237:f3da66175598 | 486 | } |
mbed_official | 237:f3da66175598 | 487 | } |
mbed_official | 237:f3da66175598 | 488 | } |
mbed_official | 237:f3da66175598 | 489 | /*-------------------------------- PLL Configuration -----------------------*/ |
mbed_official | 237:f3da66175598 | 490 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 491 | assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); |
mbed_official | 237:f3da66175598 | 492 | if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) |
mbed_official | 237:f3da66175598 | 493 | { |
mbed_official | 237:f3da66175598 | 494 | /* Check if the PLL is used as system clock or not */ |
mbed_official | 237:f3da66175598 | 495 | if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) |
mbed_official | 237:f3da66175598 | 496 | { |
mbed_official | 237:f3da66175598 | 497 | if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) |
mbed_official | 237:f3da66175598 | 498 | { |
mbed_official | 237:f3da66175598 | 499 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 500 | assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); |
mbed_official | 237:f3da66175598 | 501 | assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); |
mbed_official | 237:f3da66175598 | 502 | |
mbed_official | 237:f3da66175598 | 503 | /* Disable the main PLL. */ |
mbed_official | 237:f3da66175598 | 504 | __HAL_RCC_PLL_DISABLE(); |
mbed_official | 237:f3da66175598 | 505 | |
mbed_official | 237:f3da66175598 | 506 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 507 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 508 | |
mbed_official | 237:f3da66175598 | 509 | /* Wait till PLL is ready */ |
mbed_official | 237:f3da66175598 | 510 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) |
mbed_official | 237:f3da66175598 | 511 | { |
mbed_official | 237:f3da66175598 | 512 | if((HAL_GetTick()-tickstart) > PLL_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 513 | { |
mbed_official | 237:f3da66175598 | 514 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 515 | } |
mbed_official | 237:f3da66175598 | 516 | } |
mbed_official | 237:f3da66175598 | 517 | |
mbed_official | 237:f3da66175598 | 518 | /* Configure the main PLL clock source and multiplication factor. */ |
mbed_official | 237:f3da66175598 | 519 | __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, |
mbed_official | 237:f3da66175598 | 520 | RCC_OscInitStruct->PLL.PLLMUL); |
mbed_official | 237:f3da66175598 | 521 | /* Enable the main PLL. */ |
mbed_official | 237:f3da66175598 | 522 | __HAL_RCC_PLL_ENABLE(); |
mbed_official | 237:f3da66175598 | 523 | |
mbed_official | 237:f3da66175598 | 524 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 525 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 526 | |
mbed_official | 237:f3da66175598 | 527 | /* Wait till PLL is ready */ |
mbed_official | 237:f3da66175598 | 528 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) |
mbed_official | 237:f3da66175598 | 529 | { |
mbed_official | 237:f3da66175598 | 530 | if((HAL_GetTick()-tickstart) > PLL_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 531 | { |
mbed_official | 237:f3da66175598 | 532 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 533 | } |
mbed_official | 237:f3da66175598 | 534 | } |
mbed_official | 237:f3da66175598 | 535 | } |
mbed_official | 237:f3da66175598 | 536 | else |
mbed_official | 237:f3da66175598 | 537 | { |
mbed_official | 237:f3da66175598 | 538 | /* Disable the main PLL. */ |
mbed_official | 237:f3da66175598 | 539 | __HAL_RCC_PLL_DISABLE(); |
mbed_official | 237:f3da66175598 | 540 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 541 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 542 | |
mbed_official | 237:f3da66175598 | 543 | /* Wait till PLL is ready */ |
mbed_official | 237:f3da66175598 | 544 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) |
mbed_official | 237:f3da66175598 | 545 | { |
mbed_official | 237:f3da66175598 | 546 | if((HAL_GetTick()-tickstart) > PLL_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 547 | { |
mbed_official | 237:f3da66175598 | 548 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 549 | } |
mbed_official | 237:f3da66175598 | 550 | } |
mbed_official | 237:f3da66175598 | 551 | } |
mbed_official | 237:f3da66175598 | 552 | } |
mbed_official | 237:f3da66175598 | 553 | else |
mbed_official | 237:f3da66175598 | 554 | { |
mbed_official | 237:f3da66175598 | 555 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 556 | } |
mbed_official | 237:f3da66175598 | 557 | } |
mbed_official | 237:f3da66175598 | 558 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 559 | } |
mbed_official | 237:f3da66175598 | 560 | |
mbed_official | 237:f3da66175598 | 561 | /** |
mbed_official | 237:f3da66175598 | 562 | * @brief Initializes the CPU, AHB and APB busses clocks according to the specified |
mbed_official | 237:f3da66175598 | 563 | * parameters in the RCC_ClkInitStruct. |
mbed_official | 237:f3da66175598 | 564 | * @param RCC_ClkInitStruct: pointer to an RCC_OscInitTypeDef structure that |
mbed_official | 237:f3da66175598 | 565 | * contains the configuration information for the RCC peripheral. |
mbed_official | 237:f3da66175598 | 566 | * @param FLatency: FLASH Latency |
mbed_official | 237:f3da66175598 | 567 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 568 | * @arg FLASH_LATENCY_0: FLASH 0 Latency cycle |
mbed_official | 237:f3da66175598 | 569 | * @arg FLASH_LATENCY_1: FLASH 1 Latency cycle |
mbed_official | 237:f3da66175598 | 570 | * @arg FLASH_LATENCY_2: FLASH 2 Latency cycle |
mbed_official | 237:f3da66175598 | 571 | * |
mbed_official | 237:f3da66175598 | 572 | * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency |
mbed_official | 237:f3da66175598 | 573 | * and updated by HAL_RCC_GetHCLKFreq() function called within this function |
mbed_official | 237:f3da66175598 | 574 | * |
mbed_official | 237:f3da66175598 | 575 | * @note The HSI is used (enabled by hardware) as system clock source after |
mbed_official | 237:f3da66175598 | 576 | * startup from Reset, wake-up from STOP and STANDBY mode, or in case |
mbed_official | 237:f3da66175598 | 577 | * of failure of the HSE used directly or indirectly as system clock |
mbed_official | 237:f3da66175598 | 578 | * (if the Clock Security System CSS is enabled). |
mbed_official | 237:f3da66175598 | 579 | * |
mbed_official | 237:f3da66175598 | 580 | * @note A switch from one clock source to another occurs only if the target |
mbed_official | 237:f3da66175598 | 581 | * clock source is ready (clock stable after startup delay or PLL locked). |
mbed_official | 237:f3da66175598 | 582 | * If a clock source which is not yet ready is selected, the switch will |
mbed_official | 237:f3da66175598 | 583 | * occur when the clock source will be ready. |
mbed_official | 237:f3da66175598 | 584 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 585 | */ |
mbed_official | 237:f3da66175598 | 586 | HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) |
mbed_official | 237:f3da66175598 | 587 | { |
mbed_official | 237:f3da66175598 | 588 | uint32_t tickstart = 0; |
mbed_official | 237:f3da66175598 | 589 | |
mbed_official | 237:f3da66175598 | 590 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 591 | assert_param(RCC_ClkInitStruct != NULL); |
mbed_official | 237:f3da66175598 | 592 | assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); |
mbed_official | 237:f3da66175598 | 593 | assert_param(IS_FLASH_LATENCY(FLatency)); |
mbed_official | 237:f3da66175598 | 594 | |
mbed_official | 237:f3da66175598 | 595 | /* To correctly read data from FLASH memory, the number of wait states (LATENCY) |
mbed_official | 237:f3da66175598 | 596 | must be correctly programmed according to the frequency of the CPU clock |
mbed_official | 237:f3da66175598 | 597 | (HCLK) of the device. */ |
mbed_official | 237:f3da66175598 | 598 | |
mbed_official | 237:f3da66175598 | 599 | /* Increasing the CPU frequency */ |
mbed_official | 237:f3da66175598 | 600 | if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) |
mbed_official | 237:f3da66175598 | 601 | { |
mbed_official | 237:f3da66175598 | 602 | /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ |
mbed_official | 237:f3da66175598 | 603 | __HAL_FLASH_SET_LATENCY(FLatency); |
mbed_official | 237:f3da66175598 | 604 | |
mbed_official | 237:f3da66175598 | 605 | /* Check that the new number of wait states is taken into account to access the Flash |
mbed_official | 237:f3da66175598 | 606 | memory by reading the FLASH_ACR register */ |
mbed_official | 237:f3da66175598 | 607 | if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) |
mbed_official | 237:f3da66175598 | 608 | { |
mbed_official | 237:f3da66175598 | 609 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 610 | } |
mbed_official | 237:f3da66175598 | 611 | |
mbed_official | 237:f3da66175598 | 612 | /*-------------------------- HCLK Configuration ----------------------------*/ |
mbed_official | 237:f3da66175598 | 613 | if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) |
mbed_official | 237:f3da66175598 | 614 | { |
mbed_official | 237:f3da66175598 | 615 | assert_param(IS_RCC_SYSCLK_DIV(RCC_ClkInitStruct->AHBCLKDivider)); |
mbed_official | 237:f3da66175598 | 616 | MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); |
mbed_official | 237:f3da66175598 | 617 | } |
mbed_official | 237:f3da66175598 | 618 | |
mbed_official | 237:f3da66175598 | 619 | /*------------------------- SYSCLK Configuration ---------------------------*/ |
mbed_official | 237:f3da66175598 | 620 | if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) |
mbed_official | 237:f3da66175598 | 621 | { |
mbed_official | 237:f3da66175598 | 622 | assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); |
mbed_official | 237:f3da66175598 | 623 | |
mbed_official | 237:f3da66175598 | 624 | /* HSE is selected as System Clock Source */ |
mbed_official | 237:f3da66175598 | 625 | if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) |
mbed_official | 237:f3da66175598 | 626 | { |
mbed_official | 237:f3da66175598 | 627 | /* Check the HSE ready flag */ |
mbed_official | 237:f3da66175598 | 628 | if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) |
mbed_official | 237:f3da66175598 | 629 | { |
mbed_official | 237:f3da66175598 | 630 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 631 | } |
mbed_official | 237:f3da66175598 | 632 | } |
mbed_official | 237:f3da66175598 | 633 | /* PLL is selected as System Clock Source */ |
mbed_official | 237:f3da66175598 | 634 | else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) |
mbed_official | 237:f3da66175598 | 635 | { |
mbed_official | 237:f3da66175598 | 636 | /* Check the PLL ready flag */ |
mbed_official | 237:f3da66175598 | 637 | if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) |
mbed_official | 237:f3da66175598 | 638 | { |
mbed_official | 237:f3da66175598 | 639 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 640 | } |
mbed_official | 237:f3da66175598 | 641 | } |
mbed_official | 237:f3da66175598 | 642 | /* HSI is selected as System Clock Source */ |
mbed_official | 237:f3da66175598 | 643 | else |
mbed_official | 237:f3da66175598 | 644 | { |
mbed_official | 237:f3da66175598 | 645 | /* Check the HSI ready flag */ |
mbed_official | 237:f3da66175598 | 646 | if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) |
mbed_official | 237:f3da66175598 | 647 | { |
mbed_official | 237:f3da66175598 | 648 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 649 | } |
mbed_official | 237:f3da66175598 | 650 | } |
mbed_official | 237:f3da66175598 | 651 | MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); |
mbed_official | 237:f3da66175598 | 652 | |
mbed_official | 237:f3da66175598 | 653 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 654 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 655 | |
mbed_official | 237:f3da66175598 | 656 | if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) |
mbed_official | 237:f3da66175598 | 657 | { |
mbed_official | 237:f3da66175598 | 658 | while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) |
mbed_official | 237:f3da66175598 | 659 | { |
mbed_official | 237:f3da66175598 | 660 | if((HAL_GetTick()-tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 661 | { |
mbed_official | 237:f3da66175598 | 662 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 663 | } |
mbed_official | 237:f3da66175598 | 664 | } |
mbed_official | 237:f3da66175598 | 665 | } |
mbed_official | 237:f3da66175598 | 666 | else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) |
mbed_official | 237:f3da66175598 | 667 | { |
mbed_official | 237:f3da66175598 | 668 | while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) |
mbed_official | 237:f3da66175598 | 669 | { |
mbed_official | 237:f3da66175598 | 670 | if((HAL_GetTick()-tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 671 | { |
mbed_official | 237:f3da66175598 | 672 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 673 | } |
mbed_official | 237:f3da66175598 | 674 | } |
mbed_official | 237:f3da66175598 | 675 | } |
mbed_official | 237:f3da66175598 | 676 | else |
mbed_official | 237:f3da66175598 | 677 | { |
mbed_official | 237:f3da66175598 | 678 | while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) |
mbed_official | 237:f3da66175598 | 679 | { |
mbed_official | 237:f3da66175598 | 680 | if((HAL_GetTick()-tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 681 | { |
mbed_official | 237:f3da66175598 | 682 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 683 | } |
mbed_official | 237:f3da66175598 | 684 | } |
mbed_official | 237:f3da66175598 | 685 | } |
mbed_official | 237:f3da66175598 | 686 | } |
mbed_official | 237:f3da66175598 | 687 | } |
mbed_official | 237:f3da66175598 | 688 | /* Decreasing the CPU frequency */ |
mbed_official | 237:f3da66175598 | 689 | else |
mbed_official | 237:f3da66175598 | 690 | { |
mbed_official | 237:f3da66175598 | 691 | /*-------------------------- HCLK Configuration ----------------------------*/ |
mbed_official | 237:f3da66175598 | 692 | if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) |
mbed_official | 237:f3da66175598 | 693 | { |
mbed_official | 237:f3da66175598 | 694 | assert_param(IS_RCC_SYSCLK_DIV(RCC_ClkInitStruct->AHBCLKDivider)); |
mbed_official | 237:f3da66175598 | 695 | MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); |
mbed_official | 237:f3da66175598 | 696 | } |
mbed_official | 237:f3da66175598 | 697 | |
mbed_official | 237:f3da66175598 | 698 | /*------------------------- SYSCLK Configuration ---------------------------*/ |
mbed_official | 237:f3da66175598 | 699 | if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) |
mbed_official | 237:f3da66175598 | 700 | { |
mbed_official | 237:f3da66175598 | 701 | assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); |
mbed_official | 237:f3da66175598 | 702 | |
mbed_official | 237:f3da66175598 | 703 | /* HSE is selected as System Clock Source */ |
mbed_official | 237:f3da66175598 | 704 | if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) |
mbed_official | 237:f3da66175598 | 705 | { |
mbed_official | 237:f3da66175598 | 706 | /* Check the HSE ready flag */ |
mbed_official | 237:f3da66175598 | 707 | if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) |
mbed_official | 237:f3da66175598 | 708 | { |
mbed_official | 237:f3da66175598 | 709 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 710 | } |
mbed_official | 237:f3da66175598 | 711 | } |
mbed_official | 237:f3da66175598 | 712 | /* PLL is selected as System Clock Source */ |
mbed_official | 237:f3da66175598 | 713 | else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) |
mbed_official | 237:f3da66175598 | 714 | { |
mbed_official | 237:f3da66175598 | 715 | /* Check the PLL ready flag */ |
mbed_official | 237:f3da66175598 | 716 | if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) |
mbed_official | 237:f3da66175598 | 717 | { |
mbed_official | 237:f3da66175598 | 718 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 719 | } |
mbed_official | 237:f3da66175598 | 720 | } |
mbed_official | 237:f3da66175598 | 721 | /* HSI is selected as System Clock Source */ |
mbed_official | 237:f3da66175598 | 722 | else |
mbed_official | 237:f3da66175598 | 723 | { |
mbed_official | 237:f3da66175598 | 724 | /* Check the HSI ready flag */ |
mbed_official | 237:f3da66175598 | 725 | if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) |
mbed_official | 237:f3da66175598 | 726 | { |
mbed_official | 237:f3da66175598 | 727 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 728 | } |
mbed_official | 237:f3da66175598 | 729 | } |
mbed_official | 237:f3da66175598 | 730 | MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); |
mbed_official | 237:f3da66175598 | 731 | |
mbed_official | 237:f3da66175598 | 732 | /* Get timeout */ |
mbed_official | 237:f3da66175598 | 733 | tickstart = HAL_GetTick(); |
mbed_official | 237:f3da66175598 | 734 | |
mbed_official | 237:f3da66175598 | 735 | if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) |
mbed_official | 237:f3da66175598 | 736 | { |
mbed_official | 237:f3da66175598 | 737 | while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) |
mbed_official | 237:f3da66175598 | 738 | { |
mbed_official | 237:f3da66175598 | 739 | if((HAL_GetTick()-tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 740 | { |
mbed_official | 237:f3da66175598 | 741 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 742 | } |
mbed_official | 237:f3da66175598 | 743 | } |
mbed_official | 237:f3da66175598 | 744 | } |
mbed_official | 237:f3da66175598 | 745 | else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) |
mbed_official | 237:f3da66175598 | 746 | { |
mbed_official | 237:f3da66175598 | 747 | while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) |
mbed_official | 237:f3da66175598 | 748 | { |
mbed_official | 237:f3da66175598 | 749 | if((HAL_GetTick()-tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 750 | { |
mbed_official | 237:f3da66175598 | 751 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 752 | } |
mbed_official | 237:f3da66175598 | 753 | } |
mbed_official | 237:f3da66175598 | 754 | } |
mbed_official | 237:f3da66175598 | 755 | else |
mbed_official | 237:f3da66175598 | 756 | { |
mbed_official | 237:f3da66175598 | 757 | while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) |
mbed_official | 237:f3da66175598 | 758 | { |
mbed_official | 237:f3da66175598 | 759 | if((HAL_GetTick()-tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) |
mbed_official | 237:f3da66175598 | 760 | { |
mbed_official | 237:f3da66175598 | 761 | return HAL_TIMEOUT; |
mbed_official | 237:f3da66175598 | 762 | } |
mbed_official | 237:f3da66175598 | 763 | } |
mbed_official | 237:f3da66175598 | 764 | } |
mbed_official | 237:f3da66175598 | 765 | } |
mbed_official | 237:f3da66175598 | 766 | |
mbed_official | 237:f3da66175598 | 767 | /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ |
mbed_official | 237:f3da66175598 | 768 | __HAL_FLASH_SET_LATENCY(FLatency); |
mbed_official | 237:f3da66175598 | 769 | |
mbed_official | 237:f3da66175598 | 770 | /* Check that the new number of wait states is taken into account to access the Flash |
mbed_official | 237:f3da66175598 | 771 | memory by reading the FLASH_ACR register */ |
mbed_official | 237:f3da66175598 | 772 | if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) |
mbed_official | 237:f3da66175598 | 773 | { |
mbed_official | 237:f3da66175598 | 774 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 775 | } |
mbed_official | 237:f3da66175598 | 776 | } |
mbed_official | 237:f3da66175598 | 777 | |
mbed_official | 237:f3da66175598 | 778 | /*-------------------------- PCLK1 Configuration ---------------------------*/ |
mbed_official | 237:f3da66175598 | 779 | if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) |
mbed_official | 237:f3da66175598 | 780 | { |
mbed_official | 237:f3da66175598 | 781 | assert_param(IS_RCC_HCLK_DIV(RCC_ClkInitStruct->APB1CLKDivider)); |
mbed_official | 237:f3da66175598 | 782 | MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); |
mbed_official | 237:f3da66175598 | 783 | } |
mbed_official | 237:f3da66175598 | 784 | |
mbed_official | 237:f3da66175598 | 785 | /*-------------------------- PCLK2 Configuration ---------------------------*/ |
mbed_official | 237:f3da66175598 | 786 | if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) |
mbed_official | 237:f3da66175598 | 787 | { |
mbed_official | 237:f3da66175598 | 788 | assert_param(IS_RCC_HCLK_DIV(RCC_ClkInitStruct->APB2CLKDivider)); |
mbed_official | 237:f3da66175598 | 789 | MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); |
mbed_official | 237:f3da66175598 | 790 | } |
mbed_official | 237:f3da66175598 | 791 | |
mbed_official | 237:f3da66175598 | 792 | /* Configure the source of time base considering new system clocks settings*/ |
mbed_official | 237:f3da66175598 | 793 | HAL_InitTick (TICK_INT_PRIORITY); |
mbed_official | 237:f3da66175598 | 794 | |
mbed_official | 237:f3da66175598 | 795 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 796 | } |
mbed_official | 237:f3da66175598 | 797 | |
mbed_official | 237:f3da66175598 | 798 | /** |
mbed_official | 237:f3da66175598 | 799 | * @} |
mbed_official | 237:f3da66175598 | 800 | */ |
mbed_official | 237:f3da66175598 | 801 | |
mbed_official | 237:f3da66175598 | 802 | /** @defgroup RCC_Group2 Peripheral Control functions |
mbed_official | 237:f3da66175598 | 803 | * @brief RCC clocks control functions |
mbed_official | 237:f3da66175598 | 804 | * |
mbed_official | 237:f3da66175598 | 805 | @verbatim |
mbed_official | 237:f3da66175598 | 806 | =============================================================================== |
mbed_official | 237:f3da66175598 | 807 | ##### Peripheral Control functions ##### |
mbed_official | 237:f3da66175598 | 808 | =============================================================================== |
mbed_official | 237:f3da66175598 | 809 | [..] |
mbed_official | 237:f3da66175598 | 810 | This subsection provides a set of functions allowing to control the RCC Clocks |
mbed_official | 237:f3da66175598 | 811 | frequencies. |
mbed_official | 237:f3da66175598 | 812 | |
mbed_official | 237:f3da66175598 | 813 | @endverbatim |
mbed_official | 237:f3da66175598 | 814 | * @{ |
mbed_official | 237:f3da66175598 | 815 | */ |
mbed_official | 237:f3da66175598 | 816 | |
mbed_official | 237:f3da66175598 | 817 | /** |
mbed_official | 237:f3da66175598 | 818 | * @brief Selects the clock source to output on MCO pin(such as PA8). |
mbed_official | 237:f3da66175598 | 819 | * @note MCO pin (such as PA8) should be configured in alternate function mode. |
mbed_official | 237:f3da66175598 | 820 | * @param RCC_MCOx: specifies the output direction for the clock source. |
mbed_official | 237:f3da66175598 | 821 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 822 | * @arg RCC_MCO: Clock source to output on MCO pin(such as PA8). |
mbed_official | 237:f3da66175598 | 823 | * @param RCC_MCOSource: specifies the clock source to output. |
mbed_official | 237:f3da66175598 | 824 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 825 | * @arg RCC_MCOSOURCE_LSI: LSI clock selected as MCO source |
mbed_official | 237:f3da66175598 | 826 | * @arg RCC_MCOSOURCE_HSI: HSI clock selected as MCO source |
mbed_official | 237:f3da66175598 | 827 | * @arg RCC_MCOSOURCE_LSE: LSE clock selected as MCO source |
mbed_official | 237:f3da66175598 | 828 | * @arg RCC_MCOSOURCE_HSE: HSE clock selected as MCO source |
mbed_official | 237:f3da66175598 | 829 | * @arg RCC_MCOSOURCE_PLLCLK_DIV2: main PLL clock divided by 2 selected as MCO source |
mbed_official | 237:f3da66175598 | 830 | * @arg RCC_MCOSOURCE_SYSCLK: System clock (SYSCLK) selected as MCO source |
mbed_official | 237:f3da66175598 | 831 | * @param RCC_MCODiv: specifies the MCOx prescaler. |
mbed_official | 237:f3da66175598 | 832 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 833 | * @arg RCC_MCO_NODIV: no division applied to MCO clock |
mbed_official | 237:f3da66175598 | 834 | * @retval None |
mbed_official | 237:f3da66175598 | 835 | */ |
mbed_official | 237:f3da66175598 | 836 | void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) |
mbed_official | 237:f3da66175598 | 837 | { |
mbed_official | 237:f3da66175598 | 838 | GPIO_InitTypeDef gpio; |
mbed_official | 237:f3da66175598 | 839 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 840 | assert_param(IS_RCC_MCO(RCC_MCOx)); |
mbed_official | 237:f3da66175598 | 841 | assert_param(IS_RCC_MCODIV(RCC_MCODiv)); |
mbed_official | 237:f3da66175598 | 842 | /* RCC_MCO */ |
mbed_official | 237:f3da66175598 | 843 | assert_param(IS_RCC_MCOSOURCE(RCC_MCOSource)); |
mbed_official | 237:f3da66175598 | 844 | |
mbed_official | 237:f3da66175598 | 845 | /* MCO Clock Enable */ |
mbed_official | 237:f3da66175598 | 846 | __MCO_CLK_ENABLE(); |
mbed_official | 237:f3da66175598 | 847 | |
mbed_official | 237:f3da66175598 | 848 | /* Configue the MCO pin in alternate function mode */ |
mbed_official | 237:f3da66175598 | 849 | gpio.Pin = MCO_PIN; |
mbed_official | 237:f3da66175598 | 850 | gpio.Mode = GPIO_MODE_AF_PP; |
mbed_official | 237:f3da66175598 | 851 | gpio.Speed = GPIO_SPEED_HIGH; |
mbed_official | 237:f3da66175598 | 852 | gpio.Pull = GPIO_NOPULL; |
mbed_official | 237:f3da66175598 | 853 | gpio.Alternate = GPIO_AF0_MCO; |
mbed_official | 237:f3da66175598 | 854 | HAL_GPIO_Init(MCO_GPIO_PORT, &gpio); |
mbed_official | 237:f3da66175598 | 855 | |
mbed_official | 237:f3da66175598 | 856 | /* Configure the MCO clock source */ |
mbed_official | 237:f3da66175598 | 857 | __HAL_RCC_MCO_CONFIG(RCC_MCOSource, RCC_MCODiv); |
mbed_official | 237:f3da66175598 | 858 | } |
mbed_official | 237:f3da66175598 | 859 | |
mbed_official | 237:f3da66175598 | 860 | /** |
mbed_official | 237:f3da66175598 | 861 | * @brief Enables the Clock Security System. |
mbed_official | 237:f3da66175598 | 862 | * @note If a failure is detected on the HSE oscillator clock, this oscillator |
mbed_official | 237:f3da66175598 | 863 | * is automatically disabled and an interrupt is generated to inform the |
mbed_official | 237:f3da66175598 | 864 | * software about the failure (Clock Security System Interrupt, CSSI), |
mbed_official | 237:f3da66175598 | 865 | * allowing the MCU to perform rescue operations. The CSSI is linked to |
mbed_official | 237:f3da66175598 | 866 | * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. |
mbed_official | 237:f3da66175598 | 867 | * @param None |
mbed_official | 237:f3da66175598 | 868 | * @retval None |
mbed_official | 237:f3da66175598 | 869 | */ |
mbed_official | 237:f3da66175598 | 870 | void HAL_RCC_EnableCSS(void) |
mbed_official | 237:f3da66175598 | 871 | { |
mbed_official | 237:f3da66175598 | 872 | *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)ENABLE; |
mbed_official | 237:f3da66175598 | 873 | } |
mbed_official | 237:f3da66175598 | 874 | |
mbed_official | 237:f3da66175598 | 875 | /** |
mbed_official | 237:f3da66175598 | 876 | * @brief Disables the Clock Security System. |
mbed_official | 237:f3da66175598 | 877 | * @param None |
mbed_official | 237:f3da66175598 | 878 | * @retval None |
mbed_official | 237:f3da66175598 | 879 | */ |
mbed_official | 237:f3da66175598 | 880 | void HAL_RCC_DisableCSS(void) |
mbed_official | 237:f3da66175598 | 881 | { |
mbed_official | 237:f3da66175598 | 882 | *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)DISABLE; |
mbed_official | 237:f3da66175598 | 883 | } |
mbed_official | 237:f3da66175598 | 884 | |
mbed_official | 237:f3da66175598 | 885 | /** |
mbed_official | 237:f3da66175598 | 886 | * @brief Returns the SYSCLK frequency |
mbed_official | 237:f3da66175598 | 887 | * @note The system frequency computed by this function is not the real |
mbed_official | 237:f3da66175598 | 888 | * frequency in the chip. It is calculated based on the predefined |
mbed_official | 237:f3da66175598 | 889 | * constant and the selected clock source: |
mbed_official | 237:f3da66175598 | 890 | * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) |
mbed_official | 237:f3da66175598 | 891 | * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE |
mbed_official | 237:f3da66175598 | 892 | * divided by PREDIV factor(**) |
mbed_official | 237:f3da66175598 | 893 | * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE |
mbed_official | 237:f3da66175598 | 894 | * divided by PREDIV factor(**) or HSI_VALUE(*) multiplied by the PLL factor. |
mbed_official | 237:f3da66175598 | 895 | * @note (*) HSI_VALUE is a constant defined in stm32f3xx.h file (default value |
mbed_official | 237:f3da66175598 | 896 | * 8 MHz). |
mbed_official | 237:f3da66175598 | 897 | * @note (**) HSE_VALUE is a constant defined in stm32f3xx.h file (default value |
mbed_official | 237:f3da66175598 | 898 | * 8 MHz), user has to ensure that HSE_VALUE is same as the real |
mbed_official | 237:f3da66175598 | 899 | * frequency of the crystal used. Otherwise, this function may |
mbed_official | 237:f3da66175598 | 900 | * have wrong result. |
mbed_official | 237:f3da66175598 | 901 | * |
mbed_official | 237:f3da66175598 | 902 | * @note The result of this function could be not correct when using fractional |
mbed_official | 237:f3da66175598 | 903 | * value for HSE crystal. |
mbed_official | 237:f3da66175598 | 904 | * |
mbed_official | 237:f3da66175598 | 905 | * @note This function can be used by the user application to compute the |
mbed_official | 237:f3da66175598 | 906 | * baudrate for the communication peripherals or configure other parameters. |
mbed_official | 237:f3da66175598 | 907 | * |
mbed_official | 237:f3da66175598 | 908 | * @note Each time SYSCLK changes, this function must be called to update the |
mbed_official | 237:f3da66175598 | 909 | * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. |
mbed_official | 237:f3da66175598 | 910 | * |
mbed_official | 237:f3da66175598 | 911 | * @param None |
mbed_official | 237:f3da66175598 | 912 | * @retval SYSCLK frequency |
mbed_official | 237:f3da66175598 | 913 | */ |
mbed_official | 237:f3da66175598 | 914 | uint32_t HAL_RCC_GetSysClockFreq(void) |
mbed_official | 237:f3da66175598 | 915 | { |
mbed_official | 237:f3da66175598 | 916 | uint32_t tmpreg = 0, prediv = 0, pllmul = 0, pllclk = 0; |
mbed_official | 237:f3da66175598 | 917 | uint32_t sysclockfreq = 0; |
mbed_official | 237:f3da66175598 | 918 | |
mbed_official | 237:f3da66175598 | 919 | tmpreg = RCC->CFGR; |
mbed_official | 237:f3da66175598 | 920 | |
mbed_official | 237:f3da66175598 | 921 | /* Get SYSCLK source -------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 922 | switch (tmpreg & RCC_CFGR_SWS) |
mbed_official | 237:f3da66175598 | 923 | { |
mbed_official | 237:f3da66175598 | 924 | case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock source */ |
mbed_official | 237:f3da66175598 | 925 | sysclockfreq = HSE_VALUE; |
mbed_official | 237:f3da66175598 | 926 | break; |
mbed_official | 237:f3da66175598 | 927 | |
mbed_official | 237:f3da66175598 | 928 | case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock source */ |
mbed_official | 237:f3da66175598 | 929 | pllmul = PLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> POSITION_VAL(RCC_CFGR_PLLMUL)]; |
mbed_official | 237:f3da66175598 | 930 | prediv = PredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFGR2_PREDIV)]; |
mbed_official | 237:f3da66175598 | 931 | if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI) |
mbed_official | 237:f3da66175598 | 932 | { |
mbed_official | 237:f3da66175598 | 933 | /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ |
mbed_official | 237:f3da66175598 | 934 | pllclk = (HSE_VALUE/prediv) * pllmul; |
mbed_official | 237:f3da66175598 | 935 | } |
mbed_official | 237:f3da66175598 | 936 | else |
mbed_official | 237:f3da66175598 | 937 | { |
mbed_official | 237:f3da66175598 | 938 | /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ |
mbed_official | 237:f3da66175598 | 939 | pllclk = (HSI_VALUE >> 1) * pllmul; |
mbed_official | 237:f3da66175598 | 940 | } |
mbed_official | 237:f3da66175598 | 941 | sysclockfreq = pllclk; |
mbed_official | 237:f3da66175598 | 942 | break; |
mbed_official | 237:f3da66175598 | 943 | |
mbed_official | 237:f3da66175598 | 944 | case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ |
mbed_official | 237:f3da66175598 | 945 | default: |
mbed_official | 237:f3da66175598 | 946 | sysclockfreq = HSI_VALUE; |
mbed_official | 237:f3da66175598 | 947 | break; |
mbed_official | 237:f3da66175598 | 948 | } |
mbed_official | 237:f3da66175598 | 949 | return sysclockfreq; |
mbed_official | 237:f3da66175598 | 950 | } |
mbed_official | 237:f3da66175598 | 951 | |
mbed_official | 237:f3da66175598 | 952 | /** |
mbed_official | 237:f3da66175598 | 953 | * @brief Returns the HCLK frequency |
mbed_official | 237:f3da66175598 | 954 | * @note Each time HCLK changes, this function must be called to update the |
mbed_official | 237:f3da66175598 | 955 | * right HCLK value. Otherwise, any configuration based on this function will be incorrect. |
mbed_official | 237:f3da66175598 | 956 | * |
mbed_official | 237:f3da66175598 | 957 | * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency |
mbed_official | 237:f3da66175598 | 958 | * and updated within this function |
mbed_official | 237:f3da66175598 | 959 | * |
mbed_official | 237:f3da66175598 | 960 | * @param None |
mbed_official | 237:f3da66175598 | 961 | * @retval HCLK frequency |
mbed_official | 237:f3da66175598 | 962 | */ |
mbed_official | 237:f3da66175598 | 963 | uint32_t HAL_RCC_GetHCLKFreq(void) |
mbed_official | 237:f3da66175598 | 964 | { |
mbed_official | 237:f3da66175598 | 965 | SystemCoreClock = HAL_RCC_GetSysClockFreq() >> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> POSITION_VAL(RCC_CFGR_HPRE)]; |
mbed_official | 237:f3da66175598 | 966 | return SystemCoreClock; |
mbed_official | 237:f3da66175598 | 967 | } |
mbed_official | 237:f3da66175598 | 968 | |
mbed_official | 237:f3da66175598 | 969 | /** |
mbed_official | 237:f3da66175598 | 970 | * @brief Returns the PCLK1 frequency |
mbed_official | 237:f3da66175598 | 971 | * @note Each time PCLK1 changes, this function must be called to update the |
mbed_official | 237:f3da66175598 | 972 | * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. |
mbed_official | 237:f3da66175598 | 973 | * @param None |
mbed_official | 237:f3da66175598 | 974 | * @retval PCLK1 frequency |
mbed_official | 237:f3da66175598 | 975 | */ |
mbed_official | 237:f3da66175598 | 976 | uint32_t HAL_RCC_GetPCLK1Freq(void) |
mbed_official | 237:f3da66175598 | 977 | { |
mbed_official | 237:f3da66175598 | 978 | /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ |
mbed_official | 237:f3da66175598 | 979 | return (HAL_RCC_GetHCLKFreq() >> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> POSITION_VAL(RCC_CFGR_PPRE1)]); |
mbed_official | 237:f3da66175598 | 980 | } |
mbed_official | 237:f3da66175598 | 981 | |
mbed_official | 237:f3da66175598 | 982 | /** |
mbed_official | 237:f3da66175598 | 983 | * @brief Returns the PCLK2 frequency |
mbed_official | 237:f3da66175598 | 984 | * @note Each time PCLK2 changes, this function must be called to update the |
mbed_official | 237:f3da66175598 | 985 | * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. |
mbed_official | 237:f3da66175598 | 986 | * @param None |
mbed_official | 237:f3da66175598 | 987 | * @retval PCLK2 frequency |
mbed_official | 237:f3da66175598 | 988 | */ |
mbed_official | 237:f3da66175598 | 989 | uint32_t HAL_RCC_GetPCLK2Freq(void) |
mbed_official | 237:f3da66175598 | 990 | { |
mbed_official | 237:f3da66175598 | 991 | /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ |
mbed_official | 237:f3da66175598 | 992 | return (HAL_RCC_GetHCLKFreq() >> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> POSITION_VAL(RCC_CFGR_PPRE2)]); |
mbed_official | 237:f3da66175598 | 993 | } |
mbed_official | 237:f3da66175598 | 994 | |
mbed_official | 237:f3da66175598 | 995 | /** |
mbed_official | 237:f3da66175598 | 996 | * @brief Configures the RCC_OscInitStruct according to the internal |
mbed_official | 237:f3da66175598 | 997 | * RCC configuration registers. |
mbed_official | 237:f3da66175598 | 998 | * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that |
mbed_official | 237:f3da66175598 | 999 | * will be configured. |
mbed_official | 237:f3da66175598 | 1000 | * @retval None |
mbed_official | 237:f3da66175598 | 1001 | */ |
mbed_official | 237:f3da66175598 | 1002 | void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) |
mbed_official | 237:f3da66175598 | 1003 | { |
mbed_official | 237:f3da66175598 | 1004 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1005 | assert_param(RCC_OscInitStruct != NULL); |
mbed_official | 237:f3da66175598 | 1006 | |
mbed_official | 237:f3da66175598 | 1007 | /* Set all possible values for the Oscillator type parameter ---------------*/ |
mbed_official | 237:f3da66175598 | 1008 | RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI; |
mbed_official | 237:f3da66175598 | 1009 | |
mbed_official | 237:f3da66175598 | 1010 | /* Get the HSE configuration -----------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 1011 | if((RCC->CR & RCC_CR_HSEBYP) == RCC_CR_HSEBYP) |
mbed_official | 237:f3da66175598 | 1012 | { |
mbed_official | 237:f3da66175598 | 1013 | RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; |
mbed_official | 237:f3da66175598 | 1014 | } |
mbed_official | 237:f3da66175598 | 1015 | else if((RCC->CR & RCC_CR_HSEON) == RCC_CR_HSEON) |
mbed_official | 237:f3da66175598 | 1016 | { |
mbed_official | 237:f3da66175598 | 1017 | RCC_OscInitStruct->HSEState = RCC_HSE_ON; |
mbed_official | 237:f3da66175598 | 1018 | } |
mbed_official | 237:f3da66175598 | 1019 | else |
mbed_official | 237:f3da66175598 | 1020 | { |
mbed_official | 237:f3da66175598 | 1021 | RCC_OscInitStruct->HSEState = RCC_HSE_OFF; |
mbed_official | 237:f3da66175598 | 1022 | } |
mbed_official | 237:f3da66175598 | 1023 | |
mbed_official | 237:f3da66175598 | 1024 | /* Get the HSI configuration -----------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 1025 | if((RCC->CR & RCC_CR_HSION) == RCC_CR_HSION) |
mbed_official | 237:f3da66175598 | 1026 | { |
mbed_official | 237:f3da66175598 | 1027 | RCC_OscInitStruct->HSIState = RCC_HSI_ON; |
mbed_official | 237:f3da66175598 | 1028 | } |
mbed_official | 237:f3da66175598 | 1029 | else |
mbed_official | 237:f3da66175598 | 1030 | { |
mbed_official | 237:f3da66175598 | 1031 | RCC_OscInitStruct->HSIState = RCC_HSI_OFF; |
mbed_official | 237:f3da66175598 | 1032 | } |
mbed_official | 237:f3da66175598 | 1033 | |
mbed_official | 237:f3da66175598 | 1034 | RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> POSITION_VAL(RCC_CR_HSITRIM)); |
mbed_official | 237:f3da66175598 | 1035 | |
mbed_official | 237:f3da66175598 | 1036 | /* Get the LSE configuration -----------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 1037 | if((RCC->BDCR & RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) |
mbed_official | 237:f3da66175598 | 1038 | { |
mbed_official | 237:f3da66175598 | 1039 | RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; |
mbed_official | 237:f3da66175598 | 1040 | } |
mbed_official | 237:f3da66175598 | 1041 | else if((RCC->BDCR & RCC_BDCR_LSEON) == RCC_BDCR_LSEON) |
mbed_official | 237:f3da66175598 | 1042 | { |
mbed_official | 237:f3da66175598 | 1043 | RCC_OscInitStruct->LSEState = RCC_LSE_ON; |
mbed_official | 237:f3da66175598 | 1044 | } |
mbed_official | 237:f3da66175598 | 1045 | else |
mbed_official | 237:f3da66175598 | 1046 | { |
mbed_official | 237:f3da66175598 | 1047 | RCC_OscInitStruct->LSEState = RCC_LSE_OFF; |
mbed_official | 237:f3da66175598 | 1048 | } |
mbed_official | 237:f3da66175598 | 1049 | |
mbed_official | 237:f3da66175598 | 1050 | /* Get the LSI configuration -----------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 1051 | if((RCC->CSR & RCC_CSR_LSION) == RCC_CSR_LSION) |
mbed_official | 237:f3da66175598 | 1052 | { |
mbed_official | 237:f3da66175598 | 1053 | RCC_OscInitStruct->LSIState = RCC_LSI_ON; |
mbed_official | 237:f3da66175598 | 1054 | } |
mbed_official | 237:f3da66175598 | 1055 | else |
mbed_official | 237:f3da66175598 | 1056 | { |
mbed_official | 237:f3da66175598 | 1057 | RCC_OscInitStruct->LSIState = RCC_LSI_OFF; |
mbed_official | 237:f3da66175598 | 1058 | } |
mbed_official | 237:f3da66175598 | 1059 | |
mbed_official | 237:f3da66175598 | 1060 | /* Get the PLL configuration -----------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 1061 | if((RCC->CR & RCC_CR_PLLON) == RCC_CR_PLLON) |
mbed_official | 237:f3da66175598 | 1062 | { |
mbed_official | 237:f3da66175598 | 1063 | RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; |
mbed_official | 237:f3da66175598 | 1064 | } |
mbed_official | 237:f3da66175598 | 1065 | else |
mbed_official | 237:f3da66175598 | 1066 | { |
mbed_official | 237:f3da66175598 | 1067 | RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; |
mbed_official | 237:f3da66175598 | 1068 | } |
mbed_official | 237:f3da66175598 | 1069 | RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC); |
mbed_official | 237:f3da66175598 | 1070 | RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL); |
mbed_official | 237:f3da66175598 | 1071 | } |
mbed_official | 237:f3da66175598 | 1072 | |
mbed_official | 237:f3da66175598 | 1073 | /** |
mbed_official | 237:f3da66175598 | 1074 | * @brief Get the RCC_ClkInitStruct according to the internal |
mbed_official | 237:f3da66175598 | 1075 | * RCC configuration registers. |
mbed_official | 237:f3da66175598 | 1076 | * @param RCC_ClkInitStruct: pointer to an RCC_ClkInitTypeDef structure that |
mbed_official | 237:f3da66175598 | 1077 | * contains the current clock configuration. |
mbed_official | 237:f3da66175598 | 1078 | * @param pFLatency: Pointer on the Flash Latency. |
mbed_official | 237:f3da66175598 | 1079 | * @retval None |
mbed_official | 237:f3da66175598 | 1080 | */ |
mbed_official | 237:f3da66175598 | 1081 | void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) |
mbed_official | 237:f3da66175598 | 1082 | { |
mbed_official | 237:f3da66175598 | 1083 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1084 | assert_param(RCC_ClkInitStruct != NULL); |
mbed_official | 237:f3da66175598 | 1085 | assert_param(pFLatency != NULL); |
mbed_official | 237:f3da66175598 | 1086 | |
mbed_official | 237:f3da66175598 | 1087 | /* Set all possible values for the Clock type parameter --------------------*/ |
mbed_official | 237:f3da66175598 | 1088 | RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; |
mbed_official | 237:f3da66175598 | 1089 | |
mbed_official | 237:f3da66175598 | 1090 | /* Get the SYSCLK configuration --------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 1091 | RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); |
mbed_official | 237:f3da66175598 | 1092 | |
mbed_official | 237:f3da66175598 | 1093 | /* Get the HCLK configuration ----------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 1094 | RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); |
mbed_official | 237:f3da66175598 | 1095 | |
mbed_official | 237:f3da66175598 | 1096 | /* Get the APB1 configuration ----------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 1097 | RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); |
mbed_official | 237:f3da66175598 | 1098 | |
mbed_official | 237:f3da66175598 | 1099 | /* Get the APB2 configuration ----------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 1100 | RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3); |
mbed_official | 237:f3da66175598 | 1101 | |
mbed_official | 237:f3da66175598 | 1102 | /* Get the Flash Wait State (Latency) configuration ------------------------*/ |
mbed_official | 237:f3da66175598 | 1103 | *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); |
mbed_official | 237:f3da66175598 | 1104 | } |
mbed_official | 237:f3da66175598 | 1105 | |
mbed_official | 237:f3da66175598 | 1106 | /** |
mbed_official | 237:f3da66175598 | 1107 | * @brief This function handles the RCC CSS interrupt request. |
mbed_official | 237:f3da66175598 | 1108 | * @note This API should be called under the NMI_Handler(). |
mbed_official | 237:f3da66175598 | 1109 | * @param None |
mbed_official | 237:f3da66175598 | 1110 | * @retval None |
mbed_official | 237:f3da66175598 | 1111 | */ |
mbed_official | 237:f3da66175598 | 1112 | void HAL_RCC_NMI_IRQHandler(void) |
mbed_official | 237:f3da66175598 | 1113 | { |
mbed_official | 237:f3da66175598 | 1114 | /* Check RCC CSSF flag */ |
mbed_official | 237:f3da66175598 | 1115 | if(__HAL_RCC_GET_IT(RCC_IT_CSS)) |
mbed_official | 237:f3da66175598 | 1116 | { |
mbed_official | 237:f3da66175598 | 1117 | /* RCC Clock Security System interrupt user callback */ |
mbed_official | 237:f3da66175598 | 1118 | HAL_RCC_CCSCallback(); |
mbed_official | 237:f3da66175598 | 1119 | |
mbed_official | 237:f3da66175598 | 1120 | /* Clear RCC CSS pending bit */ |
mbed_official | 237:f3da66175598 | 1121 | __HAL_RCC_CLEAR_IT(RCC_IT_CSS); |
mbed_official | 237:f3da66175598 | 1122 | } |
mbed_official | 237:f3da66175598 | 1123 | } |
mbed_official | 237:f3da66175598 | 1124 | |
mbed_official | 237:f3da66175598 | 1125 | /** |
mbed_official | 237:f3da66175598 | 1126 | * @brief RCC Clock Security System interrupt callback |
mbed_official | 237:f3da66175598 | 1127 | * @param None |
mbed_official | 237:f3da66175598 | 1128 | * @retval None |
mbed_official | 237:f3da66175598 | 1129 | */ |
mbed_official | 237:f3da66175598 | 1130 | __weak void HAL_RCC_CCSCallback(void) |
mbed_official | 237:f3da66175598 | 1131 | { |
mbed_official | 237:f3da66175598 | 1132 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 237:f3da66175598 | 1133 | the HAL_RCC_CCSCallback could be implemented in the user file |
mbed_official | 237:f3da66175598 | 1134 | */ |
mbed_official | 237:f3da66175598 | 1135 | } |
mbed_official | 237:f3da66175598 | 1136 | |
mbed_official | 237:f3da66175598 | 1137 | /** |
mbed_official | 237:f3da66175598 | 1138 | * @} |
mbed_official | 237:f3da66175598 | 1139 | */ |
mbed_official | 237:f3da66175598 | 1140 | |
mbed_official | 237:f3da66175598 | 1141 | /** |
mbed_official | 237:f3da66175598 | 1142 | * @} |
mbed_official | 237:f3da66175598 | 1143 | */ |
mbed_official | 237:f3da66175598 | 1144 | |
mbed_official | 237:f3da66175598 | 1145 | #endif /* HAL_RCC_MODULE_ENABLED */ |
mbed_official | 237:f3da66175598 | 1146 | /** |
mbed_official | 237:f3da66175598 | 1147 | * @} |
mbed_official | 237:f3da66175598 | 1148 | */ |
mbed_official | 237:f3da66175598 | 1149 | |
mbed_official | 237:f3da66175598 | 1150 | /** |
mbed_official | 237:f3da66175598 | 1151 | * @} |
mbed_official | 237:f3da66175598 | 1152 | */ |
mbed_official | 237:f3da66175598 | 1153 | |
mbed_official | 237:f3da66175598 | 1154 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |