mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/system_stm32f4xx.c@126:549ba18ddd81, 2014-03-19 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Mar 19 16:00:09 2014 +0000
- Revision:
- 126:549ba18ddd81
- Parent:
- 125:23cc3068a9e4
- Child:
- 185:e752b4ee7de1
Synchronized with git revision cf8fd1cf86b0cd85131dd24a6ded21cc6fe04827
Full URL: https://github.com/mbedmicro/mbed/commit/cf8fd1cf86b0cd85131dd24a6ded21cc6fe04827/
Conflicts:
workspace_tools/targets.py
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 87:085cde657901 | 1 | /** |
mbed_official | 87:085cde657901 | 2 | ****************************************************************************** |
mbed_official | 87:085cde657901 | 3 | * @file system_stm32f4xx.c |
mbed_official | 87:085cde657901 | 4 | * @author MCD Application Team |
mbed_official | 106:ced8cbb51063 | 5 | * @version V1.0.0 |
mbed_official | 106:ced8cbb51063 | 6 | * @date 18-February-2014 |
mbed_official | 87:085cde657901 | 7 | * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. |
mbed_official | 87:085cde657901 | 8 | * |
mbed_official | 87:085cde657901 | 9 | * This file provides two functions and one global variable to be called from |
mbed_official | 87:085cde657901 | 10 | * user application: |
mbed_official | 87:085cde657901 | 11 | * - SystemInit(): This function is called at startup just after reset and |
mbed_official | 87:085cde657901 | 12 | * before branch to main program. This call is made inside |
mbed_official | 87:085cde657901 | 13 | * the "startup_stm32f4xx.s" file. |
mbed_official | 87:085cde657901 | 14 | * |
mbed_official | 87:085cde657901 | 15 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used |
mbed_official | 87:085cde657901 | 16 | * by the user application to setup the SysTick |
mbed_official | 87:085cde657901 | 17 | * timer or configure other parameters. |
mbed_official | 87:085cde657901 | 18 | * |
mbed_official | 87:085cde657901 | 19 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must |
mbed_official | 87:085cde657901 | 20 | * be called whenever the core clock is changed |
mbed_official | 87:085cde657901 | 21 | * during program execution. |
mbed_official | 87:085cde657901 | 22 | * |
mbed_official | 87:085cde657901 | 23 | * |
mbed_official | 87:085cde657901 | 24 | ****************************************************************************** |
mbed_official | 87:085cde657901 | 25 | * @attention |
mbed_official | 87:085cde657901 | 26 | * |
mbed_official | 87:085cde657901 | 27 | * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> |
mbed_official | 87:085cde657901 | 28 | * |
mbed_official | 106:ced8cbb51063 | 29 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 106:ced8cbb51063 | 30 | * are permitted provided that the following conditions are met: |
mbed_official | 106:ced8cbb51063 | 31 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 106:ced8cbb51063 | 32 | * this list of conditions and the following disclaimer. |
mbed_official | 106:ced8cbb51063 | 33 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 106:ced8cbb51063 | 34 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 106:ced8cbb51063 | 35 | * and/or other materials provided with the distribution. |
mbed_official | 106:ced8cbb51063 | 36 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 106:ced8cbb51063 | 37 | * may be used to endorse or promote products derived from this software |
mbed_official | 106:ced8cbb51063 | 38 | * without specific prior written permission. |
mbed_official | 87:085cde657901 | 39 | * |
mbed_official | 106:ced8cbb51063 | 40 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 106:ced8cbb51063 | 41 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 106:ced8cbb51063 | 42 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 106:ced8cbb51063 | 43 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 106:ced8cbb51063 | 44 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 106:ced8cbb51063 | 45 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 106:ced8cbb51063 | 46 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 106:ced8cbb51063 | 47 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 106:ced8cbb51063 | 48 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 106:ced8cbb51063 | 49 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 87:085cde657901 | 50 | * |
mbed_official | 87:085cde657901 | 51 | ****************************************************************************** |
mbed_official | 87:085cde657901 | 52 | */ |
mbed_official | 87:085cde657901 | 53 | |
mbed_official | 87:085cde657901 | 54 | /** @addtogroup CMSIS |
mbed_official | 87:085cde657901 | 55 | * @{ |
mbed_official | 87:085cde657901 | 56 | */ |
mbed_official | 87:085cde657901 | 57 | |
mbed_official | 87:085cde657901 | 58 | /** @addtogroup stm32f4xx_system |
mbed_official | 87:085cde657901 | 59 | * @{ |
mbed_official | 87:085cde657901 | 60 | */ |
mbed_official | 87:085cde657901 | 61 | |
mbed_official | 87:085cde657901 | 62 | /** @addtogroup STM32F4xx_System_Private_Includes |
mbed_official | 87:085cde657901 | 63 | * @{ |
mbed_official | 87:085cde657901 | 64 | */ |
mbed_official | 87:085cde657901 | 65 | |
mbed_official | 87:085cde657901 | 66 | #include "stm32f4xx_hal.h" |
mbed_official | 87:085cde657901 | 67 | |
mbed_official | 87:085cde657901 | 68 | /** |
mbed_official | 87:085cde657901 | 69 | * @} |
mbed_official | 87:085cde657901 | 70 | */ |
mbed_official | 87:085cde657901 | 71 | |
mbed_official | 87:085cde657901 | 72 | /** @addtogroup STM32F4xx_System_Private_TypesDefinitions |
mbed_official | 87:085cde657901 | 73 | * @{ |
mbed_official | 87:085cde657901 | 74 | */ |
mbed_official | 87:085cde657901 | 75 | |
mbed_official | 87:085cde657901 | 76 | /** |
mbed_official | 87:085cde657901 | 77 | * @} |
mbed_official | 87:085cde657901 | 78 | */ |
mbed_official | 87:085cde657901 | 79 | |
mbed_official | 87:085cde657901 | 80 | /** @addtogroup STM32F4xx_System_Private_Defines |
mbed_official | 87:085cde657901 | 81 | * @{ |
mbed_official | 87:085cde657901 | 82 | */ |
mbed_official | 87:085cde657901 | 83 | |
mbed_official | 87:085cde657901 | 84 | /************************* Miscellaneous Configuration ************************/ |
mbed_official | 87:085cde657901 | 85 | |
mbed_official | 87:085cde657901 | 86 | /*!< Uncomment the following line if you need to relocate your vector Table in |
mbed_official | 87:085cde657901 | 87 | Internal SRAM. */ |
mbed_official | 87:085cde657901 | 88 | /* #define VECT_TAB_SRAM */ |
mbed_official | 87:085cde657901 | 89 | #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. |
mbed_official | 87:085cde657901 | 90 | This value must be a multiple of 0x200. */ |
mbed_official | 87:085cde657901 | 91 | /******************************************************************************/ |
mbed_official | 87:085cde657901 | 92 | |
mbed_official | 87:085cde657901 | 93 | /** |
mbed_official | 87:085cde657901 | 94 | * @} |
mbed_official | 87:085cde657901 | 95 | */ |
mbed_official | 87:085cde657901 | 96 | |
mbed_official | 87:085cde657901 | 97 | /** @addtogroup STM32F4xx_System_Private_Macros |
mbed_official | 87:085cde657901 | 98 | * @{ |
mbed_official | 87:085cde657901 | 99 | */ |
mbed_official | 87:085cde657901 | 100 | |
mbed_official | 87:085cde657901 | 101 | /** |
mbed_official | 87:085cde657901 | 102 | * @} |
mbed_official | 87:085cde657901 | 103 | */ |
mbed_official | 87:085cde657901 | 104 | |
mbed_official | 87:085cde657901 | 105 | /** @addtogroup STM32F4xx_System_Private_Variables |
mbed_official | 87:085cde657901 | 106 | * @{ |
mbed_official | 87:085cde657901 | 107 | */ |
mbed_official | 87:085cde657901 | 108 | /* This variable is updated in three ways: |
mbed_official | 87:085cde657901 | 109 | 1) by calling CMSIS function SystemCoreClockUpdate() |
mbed_official | 87:085cde657901 | 110 | 2) by calling HAL API function HAL_RCC_GetHCLKFreq() |
mbed_official | 87:085cde657901 | 111 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency |
mbed_official | 87:085cde657901 | 112 | Note: If you use this function to configure the system clock; then there |
mbed_official | 87:085cde657901 | 113 | is no need to call the 2 first functions listed above, since SystemCoreClock |
mbed_official | 87:085cde657901 | 114 | variable is updated automatically. |
mbed_official | 87:085cde657901 | 115 | */ |
mbed_official | 125:23cc3068a9e4 | 116 | uint32_t SystemCoreClock = 84000000; /* [CHANGED FOR MBED] */ |
mbed_official | 87:085cde657901 | 117 | __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; |
mbed_official | 87:085cde657901 | 118 | |
mbed_official | 87:085cde657901 | 119 | /** |
mbed_official | 87:085cde657901 | 120 | * @} |
mbed_official | 87:085cde657901 | 121 | */ |
mbed_official | 87:085cde657901 | 122 | |
mbed_official | 87:085cde657901 | 123 | /** @addtogroup STM32F4xx_System_Private_FunctionPrototypes |
mbed_official | 87:085cde657901 | 124 | * @{ |
mbed_official | 87:085cde657901 | 125 | */ |
mbed_official | 87:085cde657901 | 126 | |
mbed_official | 125:23cc3068a9e4 | 127 | /* [ADDED FOR MBED] */ |
mbed_official | 125:23cc3068a9e4 | 128 | void SystemClock_Config(void); |
mbed_official | 125:23cc3068a9e4 | 129 | |
mbed_official | 87:085cde657901 | 130 | /** |
mbed_official | 87:085cde657901 | 131 | * @} |
mbed_official | 87:085cde657901 | 132 | */ |
mbed_official | 87:085cde657901 | 133 | |
mbed_official | 87:085cde657901 | 134 | /** @addtogroup STM32F4xx_System_Private_Functions |
mbed_official | 87:085cde657901 | 135 | * @{ |
mbed_official | 87:085cde657901 | 136 | */ |
mbed_official | 87:085cde657901 | 137 | |
mbed_official | 87:085cde657901 | 138 | /** |
mbed_official | 87:085cde657901 | 139 | * @brief Setup the microcontroller system |
mbed_official | 87:085cde657901 | 140 | * Initialize the FPU setting, vector table location and External memory |
mbed_official | 87:085cde657901 | 141 | * configuration. |
mbed_official | 87:085cde657901 | 142 | * @param None |
mbed_official | 87:085cde657901 | 143 | * @retval None |
mbed_official | 87:085cde657901 | 144 | */ |
mbed_official | 87:085cde657901 | 145 | void SystemInit(void) |
mbed_official | 87:085cde657901 | 146 | { |
mbed_official | 87:085cde657901 | 147 | /* FPU settings ------------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 148 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
mbed_official | 87:085cde657901 | 149 | SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ |
mbed_official | 87:085cde657901 | 150 | #endif |
mbed_official | 87:085cde657901 | 151 | /* Reset the RCC clock configuration to the default reset state ------------*/ |
mbed_official | 87:085cde657901 | 152 | /* Set HSION bit */ |
mbed_official | 87:085cde657901 | 153 | RCC->CR |= (uint32_t)0x00000001; |
mbed_official | 87:085cde657901 | 154 | |
mbed_official | 87:085cde657901 | 155 | /* Reset CFGR register */ |
mbed_official | 87:085cde657901 | 156 | RCC->CFGR = 0x00000000; |
mbed_official | 87:085cde657901 | 157 | |
mbed_official | 87:085cde657901 | 158 | /* Reset HSEON, CSSON and PLLON bits */ |
mbed_official | 87:085cde657901 | 159 | RCC->CR &= (uint32_t)0xFEF6FFFF; |
mbed_official | 87:085cde657901 | 160 | |
mbed_official | 87:085cde657901 | 161 | /* Reset PLLCFGR register */ |
mbed_official | 87:085cde657901 | 162 | RCC->PLLCFGR = 0x24003010; |
mbed_official | 87:085cde657901 | 163 | |
mbed_official | 87:085cde657901 | 164 | /* Reset HSEBYP bit */ |
mbed_official | 87:085cde657901 | 165 | RCC->CR &= (uint32_t)0xFFFBFFFF; |
mbed_official | 87:085cde657901 | 166 | |
mbed_official | 87:085cde657901 | 167 | /* Disable all interrupts */ |
mbed_official | 87:085cde657901 | 168 | RCC->CIR = 0x00000000; |
mbed_official | 87:085cde657901 | 169 | |
mbed_official | 87:085cde657901 | 170 | /* Configure the Vector Table location add offset address ------------------*/ |
mbed_official | 87:085cde657901 | 171 | #ifdef VECT_TAB_SRAM |
mbed_official | 87:085cde657901 | 172 | SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ |
mbed_official | 87:085cde657901 | 173 | #else |
mbed_official | 87:085cde657901 | 174 | SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ |
mbed_official | 87:085cde657901 | 175 | #endif |
mbed_official | 87:085cde657901 | 176 | |
mbed_official | 125:23cc3068a9e4 | 177 | /* [ADDED FOR MBED] */ |
mbed_official | 87:085cde657901 | 178 | HAL_Init(); |
mbed_official | 125:23cc3068a9e4 | 179 | SystemClock_Config(); |
mbed_official | 87:085cde657901 | 180 | } |
mbed_official | 87:085cde657901 | 181 | |
mbed_official | 87:085cde657901 | 182 | /** |
mbed_official | 87:085cde657901 | 183 | * @brief Update SystemCoreClock variable according to Clock Register Values. |
mbed_official | 87:085cde657901 | 184 | * The SystemCoreClock variable contains the core clock (HCLK), it can |
mbed_official | 87:085cde657901 | 185 | * be used by the user application to setup the SysTick timer or configure |
mbed_official | 87:085cde657901 | 186 | * other parameters. |
mbed_official | 87:085cde657901 | 187 | * |
mbed_official | 87:085cde657901 | 188 | * @note Each time the core clock (HCLK) changes, this function must be called |
mbed_official | 87:085cde657901 | 189 | * to update SystemCoreClock variable value. Otherwise, any configuration |
mbed_official | 87:085cde657901 | 190 | * based on this variable will be incorrect. |
mbed_official | 87:085cde657901 | 191 | * |
mbed_official | 87:085cde657901 | 192 | * @note - The system frequency computed by this function is not the real |
mbed_official | 87:085cde657901 | 193 | * frequency in the chip. It is calculated based on the predefined |
mbed_official | 87:085cde657901 | 194 | * constant and the selected clock source: |
mbed_official | 87:085cde657901 | 195 | * |
mbed_official | 87:085cde657901 | 196 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) |
mbed_official | 87:085cde657901 | 197 | * |
mbed_official | 87:085cde657901 | 198 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) |
mbed_official | 87:085cde657901 | 199 | * |
mbed_official | 87:085cde657901 | 200 | * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) |
mbed_official | 87:085cde657901 | 201 | * or HSI_VALUE(*) multiplied/divided by the PLL factors. |
mbed_official | 87:085cde657901 | 202 | * |
mbed_official | 106:ced8cbb51063 | 203 | * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value |
mbed_official | 87:085cde657901 | 204 | * 16 MHz) but the real value may vary depending on the variations |
mbed_official | 87:085cde657901 | 205 | * in voltage and temperature. |
mbed_official | 87:085cde657901 | 206 | * |
mbed_official | 106:ced8cbb51063 | 207 | * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value |
mbed_official | 106:ced8cbb51063 | 208 | * depends on the application requirements), user has to ensure that HSE_VALUE |
mbed_official | 106:ced8cbb51063 | 209 | * is same as the real frequency of the crystal used. Otherwise, this function |
mbed_official | 106:ced8cbb51063 | 210 | * may have wrong result. |
mbed_official | 87:085cde657901 | 211 | * |
mbed_official | 87:085cde657901 | 212 | * - The result of this function could be not correct when using fractional |
mbed_official | 87:085cde657901 | 213 | * value for HSE crystal. |
mbed_official | 87:085cde657901 | 214 | * |
mbed_official | 87:085cde657901 | 215 | * @param None |
mbed_official | 87:085cde657901 | 216 | * @retval None |
mbed_official | 87:085cde657901 | 217 | */ |
mbed_official | 87:085cde657901 | 218 | void SystemCoreClockUpdate(void) |
mbed_official | 87:085cde657901 | 219 | { |
mbed_official | 87:085cde657901 | 220 | uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; |
mbed_official | 87:085cde657901 | 221 | |
mbed_official | 87:085cde657901 | 222 | /* Get SYSCLK source -------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 223 | tmp = RCC->CFGR & RCC_CFGR_SWS; |
mbed_official | 87:085cde657901 | 224 | |
mbed_official | 87:085cde657901 | 225 | switch (tmp) |
mbed_official | 87:085cde657901 | 226 | { |
mbed_official | 87:085cde657901 | 227 | case 0x00: /* HSI used as system clock source */ |
mbed_official | 87:085cde657901 | 228 | SystemCoreClock = HSI_VALUE; |
mbed_official | 87:085cde657901 | 229 | break; |
mbed_official | 87:085cde657901 | 230 | case 0x04: /* HSE used as system clock source */ |
mbed_official | 87:085cde657901 | 231 | SystemCoreClock = HSE_VALUE; |
mbed_official | 87:085cde657901 | 232 | break; |
mbed_official | 87:085cde657901 | 233 | case 0x08: /* PLL used as system clock source */ |
mbed_official | 87:085cde657901 | 234 | |
mbed_official | 87:085cde657901 | 235 | /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N |
mbed_official | 87:085cde657901 | 236 | SYSCLK = PLL_VCO / PLL_P |
mbed_official | 87:085cde657901 | 237 | */ |
mbed_official | 87:085cde657901 | 238 | pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; |
mbed_official | 87:085cde657901 | 239 | pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; |
mbed_official | 87:085cde657901 | 240 | |
mbed_official | 87:085cde657901 | 241 | if (pllsource != 0) |
mbed_official | 87:085cde657901 | 242 | { |
mbed_official | 87:085cde657901 | 243 | /* HSE used as PLL clock source */ |
mbed_official | 87:085cde657901 | 244 | pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); |
mbed_official | 87:085cde657901 | 245 | } |
mbed_official | 87:085cde657901 | 246 | else |
mbed_official | 87:085cde657901 | 247 | { |
mbed_official | 87:085cde657901 | 248 | /* HSI used as PLL clock source */ |
mbed_official | 87:085cde657901 | 249 | pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); |
mbed_official | 87:085cde657901 | 250 | } |
mbed_official | 87:085cde657901 | 251 | |
mbed_official | 87:085cde657901 | 252 | pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; |
mbed_official | 87:085cde657901 | 253 | SystemCoreClock = pllvco/pllp; |
mbed_official | 87:085cde657901 | 254 | break; |
mbed_official | 87:085cde657901 | 255 | default: |
mbed_official | 87:085cde657901 | 256 | SystemCoreClock = HSI_VALUE; |
mbed_official | 87:085cde657901 | 257 | break; |
mbed_official | 87:085cde657901 | 258 | } |
mbed_official | 87:085cde657901 | 259 | /* Compute HCLK frequency --------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 260 | /* Get HCLK prescaler */ |
mbed_official | 87:085cde657901 | 261 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; |
mbed_official | 87:085cde657901 | 262 | /* HCLK frequency */ |
mbed_official | 87:085cde657901 | 263 | SystemCoreClock >>= tmp; |
mbed_official | 87:085cde657901 | 264 | } |
mbed_official | 87:085cde657901 | 265 | |
mbed_official | 125:23cc3068a9e4 | 266 | /* [ADDED FOR MBED] |
mbed_official | 125:23cc3068a9e4 | 267 | Configure the System clock to 84 MHz (max value) using the internal HSI 16 MHz clock */ |
mbed_official | 125:23cc3068a9e4 | 268 | void SystemClock_Config(void) |
mbed_official | 125:23cc3068a9e4 | 269 | { |
mbed_official | 125:23cc3068a9e4 | 270 | RCC_ClkInitTypeDef RCC_ClkInitStruct; |
mbed_official | 125:23cc3068a9e4 | 271 | RCC_OscInitTypeDef RCC_OscInitStruct; |
mbed_official | 125:23cc3068a9e4 | 272 | |
mbed_official | 125:23cc3068a9e4 | 273 | /* The voltage scaling allows optimizing the power consumption when the device is |
mbed_official | 125:23cc3068a9e4 | 274 | clocked below the maximum system frequency, to update the voltage scaling value |
mbed_official | 125:23cc3068a9e4 | 275 | regarding system frequency refer to product datasheet. */ |
mbed_official | 125:23cc3068a9e4 | 276 | __PWR_CLK_ENABLE(); |
mbed_official | 125:23cc3068a9e4 | 277 | __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); |
mbed_official | 125:23cc3068a9e4 | 278 | |
mbed_official | 125:23cc3068a9e4 | 279 | /* Enable HSI Oscillator and activate PLL with HSI as source */ |
mbed_official | 125:23cc3068a9e4 | 280 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; |
mbed_official | 125:23cc3068a9e4 | 281 | RCC_OscInitStruct.HSEState = RCC_HSE_OFF; |
mbed_official | 125:23cc3068a9e4 | 282 | RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
mbed_official | 125:23cc3068a9e4 | 283 | RCC_OscInitStruct.LSEState = RCC_LSE_OFF; |
mbed_official | 125:23cc3068a9e4 | 284 | RCC_OscInitStruct.LSIState = RCC_LSI_OFF; |
mbed_official | 125:23cc3068a9e4 | 285 | RCC_OscInitStruct.HSICalibrationValue = 16; |
mbed_official | 125:23cc3068a9e4 | 286 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
mbed_official | 125:23cc3068a9e4 | 287 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; |
mbed_official | 125:23cc3068a9e4 | 288 | RCC_OscInitStruct.PLL.PLLM = 16; |
mbed_official | 125:23cc3068a9e4 | 289 | RCC_OscInitStruct.PLL.PLLN = 336; |
mbed_official | 125:23cc3068a9e4 | 290 | RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; |
mbed_official | 125:23cc3068a9e4 | 291 | RCC_OscInitStruct.PLL.PLLQ = 7; |
mbed_official | 125:23cc3068a9e4 | 292 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) |
mbed_official | 125:23cc3068a9e4 | 293 | { |
mbed_official | 126:549ba18ddd81 | 294 | // System clock initialization failed |
mbed_official | 126:549ba18ddd81 | 295 | while(1) |
mbed_official | 126:549ba18ddd81 | 296 | { |
mbed_official | 126:549ba18ddd81 | 297 | // [TODO] Put something here to tell the user that a problem occured... |
mbed_official | 126:549ba18ddd81 | 298 | } |
mbed_official | 125:23cc3068a9e4 | 299 | } |
mbed_official | 125:23cc3068a9e4 | 300 | |
mbed_official | 125:23cc3068a9e4 | 301 | /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ |
mbed_official | 125:23cc3068a9e4 | 302 | RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
mbed_official | 125:23cc3068a9e4 | 303 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
mbed_official | 125:23cc3068a9e4 | 304 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 84 MHz |
mbed_official | 125:23cc3068a9e4 | 305 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 42 MHz |
mbed_official | 125:23cc3068a9e4 | 306 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 84 MHz (SPI1 clock...) |
mbed_official | 125:23cc3068a9e4 | 307 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) |
mbed_official | 125:23cc3068a9e4 | 308 | { |
mbed_official | 126:549ba18ddd81 | 309 | // System clock initialization failed |
mbed_official | 126:549ba18ddd81 | 310 | while(1) |
mbed_official | 126:549ba18ddd81 | 311 | { |
mbed_official | 126:549ba18ddd81 | 312 | // [TODO] Put something here to tell the user that a problem occured... |
mbed_official | 126:549ba18ddd81 | 313 | } |
mbed_official | 125:23cc3068a9e4 | 314 | } |
mbed_official | 125:23cc3068a9e4 | 315 | |
mbed_official | 125:23cc3068a9e4 | 316 | /* Update the SystemCoreClock variable |
mbed_official | 125:23cc3068a9e4 | 317 | - Not needed because the variable is already set on top of this file. |
mbed_official | 125:23cc3068a9e4 | 318 | - Warning: this function call is removed by the compiler with -O3/-Otime options. */ |
mbed_official | 125:23cc3068a9e4 | 319 | //SystemCoreClockUpdate(); |
mbed_official | 125:23cc3068a9e4 | 320 | |
mbed_official | 125:23cc3068a9e4 | 321 | /* Output SYSCLK on MCO2 pin(PC9) for debugging purpose */ |
mbed_official | 125:23cc3068a9e4 | 322 | //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4); // 84 MHz / 4 = 21 MHz |
mbed_official | 125:23cc3068a9e4 | 323 | } |
mbed_official | 125:23cc3068a9e4 | 324 | |
mbed_official | 125:23cc3068a9e4 | 325 | /* [ADDED FOR MBED] |
mbed_official | 125:23cc3068a9e4 | 326 | Used for the different timeouts in the HAL */ |
mbed_official | 125:23cc3068a9e4 | 327 | void SysTick_Handler(void) |
mbed_official | 125:23cc3068a9e4 | 328 | { |
mbed_official | 125:23cc3068a9e4 | 329 | HAL_IncTick(); |
mbed_official | 125:23cc3068a9e4 | 330 | } |
mbed_official | 125:23cc3068a9e4 | 331 | |
mbed_official | 87:085cde657901 | 332 | /** |
mbed_official | 87:085cde657901 | 333 | * @} |
mbed_official | 87:085cde657901 | 334 | */ |
mbed_official | 87:085cde657901 | 335 | |
mbed_official | 87:085cde657901 | 336 | /** |
mbed_official | 87:085cde657901 | 337 | * @} |
mbed_official | 87:085cde657901 | 338 | */ |
mbed_official | 87:085cde657901 | 339 | |
mbed_official | 87:085cde657901 | 340 | /** |
mbed_official | 87:085cde657901 | 341 | * @} |
mbed_official | 87:085cde657901 | 342 | */ |
mbed_official | 87:085cde657901 | 343 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |