mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/gpio_irq_api.c@254:181b5e179739, 2014-07-10 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Jul 10 09:00:09 2014 +0100
- Revision:
- 254:181b5e179739
- Parent:
- 251:de9a1e4ffd79
- Child:
- 286:31249416b6f9
Synchronized with git revision ffef32f2bc6fb88a72a992e85a9e9df0982d7eff
Full URL: https://github.com/mbedmicro/mbed/commit/ffef32f2bc6fb88a72a992e85a9e9df0982d7eff/
[KLxxZ] Increased KLxxZs interrupt handling speed
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 82:0b31dbcd4769 | 1 | /* mbed Microcontroller Library |
mbed_official | 82:0b31dbcd4769 | 2 | * Copyright (c) 2006-2013 ARM Limited |
mbed_official | 82:0b31dbcd4769 | 3 | * |
mbed_official | 82:0b31dbcd4769 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
mbed_official | 82:0b31dbcd4769 | 5 | * you may not use this file except in compliance with the License. |
mbed_official | 82:0b31dbcd4769 | 6 | * You may obtain a copy of the License at |
mbed_official | 82:0b31dbcd4769 | 7 | * |
mbed_official | 82:0b31dbcd4769 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
mbed_official | 82:0b31dbcd4769 | 9 | * |
mbed_official | 82:0b31dbcd4769 | 10 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 82:0b31dbcd4769 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 82:0b31dbcd4769 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 82:0b31dbcd4769 | 13 | * See the License for the specific language governing permissions and |
mbed_official | 82:0b31dbcd4769 | 14 | * limitations under the License. |
mbed_official | 82:0b31dbcd4769 | 15 | */ |
mbed_official | 82:0b31dbcd4769 | 16 | #include <stddef.h> |
mbed_official | 82:0b31dbcd4769 | 17 | #include "cmsis.h" |
mbed_official | 82:0b31dbcd4769 | 18 | |
mbed_official | 82:0b31dbcd4769 | 19 | #include "gpio_irq_api.h" |
mbed_official | 113:65a335a675de | 20 | #include "gpio_api.h" |
mbed_official | 251:de9a1e4ffd79 | 21 | #include "error.h" |
mbed_official | 82:0b31dbcd4769 | 22 | |
mbed_official | 82:0b31dbcd4769 | 23 | #define CHANNEL_NUM 64 // 31 pins on 2 ports |
mbed_official | 82:0b31dbcd4769 | 24 | |
mbed_official | 82:0b31dbcd4769 | 25 | static uint32_t channel_ids[CHANNEL_NUM] = {0}; |
mbed_official | 82:0b31dbcd4769 | 26 | static gpio_irq_handler irq_handler; |
mbed_official | 82:0b31dbcd4769 | 27 | |
mbed_official | 82:0b31dbcd4769 | 28 | #define IRQ_DISABLED (0) |
mbed_official | 82:0b31dbcd4769 | 29 | #define IRQ_RAISING_EDGE PORT_PCR_IRQC(9) |
mbed_official | 82:0b31dbcd4769 | 30 | #define IRQ_FALLING_EDGE PORT_PCR_IRQC(10) |
mbed_official | 82:0b31dbcd4769 | 31 | #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11) |
mbed_official | 82:0b31dbcd4769 | 32 | |
mbed_official | 254:181b5e179739 | 33 | const uint32_t search_bits[] = {0x0000FFFF, 0x000000FF, 0x0000000F, 0x00000003, 0x00000001}; |
mbed_official | 254:181b5e179739 | 34 | |
mbed_official | 82:0b31dbcd4769 | 35 | static void handle_interrupt_in(PORT_Type *port, int ch_base) { |
mbed_official | 254:181b5e179739 | 36 | uint32_t isfr; |
mbed_official | 254:181b5e179739 | 37 | uint8_t location; |
mbed_official | 82:0b31dbcd4769 | 38 | |
mbed_official | 254:181b5e179739 | 39 | while((isfr = port->ISFR) != 0) { |
mbed_official | 254:181b5e179739 | 40 | location = 0; |
mbed_official | 254:181b5e179739 | 41 | for (int i = 0; i < 5; i++) { |
mbed_official | 254:181b5e179739 | 42 | if (!(isfr & (search_bits[i] << location))) |
mbed_official | 254:181b5e179739 | 43 | location += 1 << (4 - i); |
mbed_official | 254:181b5e179739 | 44 | } |
mbed_official | 254:181b5e179739 | 45 | |
mbed_official | 254:181b5e179739 | 46 | uint32_t id = channel_ids[ch_base + location]; |
mbed_official | 254:181b5e179739 | 47 | if (id == 0) { |
mbed_official | 254:181b5e179739 | 48 | continue; |
mbed_official | 254:181b5e179739 | 49 | } |
mbed_official | 82:0b31dbcd4769 | 50 | |
mbed_official | 254:181b5e179739 | 51 | FGPIO_Type *gpio; |
mbed_official | 254:181b5e179739 | 52 | gpio_irq_event event = IRQ_NONE; |
mbed_official | 254:181b5e179739 | 53 | switch (port->PCR[location] & PORT_PCR_IRQC_MASK) { |
mbed_official | 254:181b5e179739 | 54 | case IRQ_RAISING_EDGE: |
mbed_official | 254:181b5e179739 | 55 | event = IRQ_RISE; |
mbed_official | 254:181b5e179739 | 56 | break; |
mbed_official | 82:0b31dbcd4769 | 57 | |
mbed_official | 254:181b5e179739 | 58 | case IRQ_FALLING_EDGE: |
mbed_official | 254:181b5e179739 | 59 | event = IRQ_FALL; |
mbed_official | 254:181b5e179739 | 60 | break; |
mbed_official | 82:0b31dbcd4769 | 61 | |
mbed_official | 254:181b5e179739 | 62 | case IRQ_EITHER_EDGE: |
mbed_official | 254:181b5e179739 | 63 | gpio = (port == PORTA) ? (FPTA) : (FPTB); |
mbed_official | 254:181b5e179739 | 64 | event = (gpio->PDIR & (1 << location)) ? (IRQ_RISE) : (IRQ_FALL); |
mbed_official | 254:181b5e179739 | 65 | break; |
mbed_official | 82:0b31dbcd4769 | 66 | } |
mbed_official | 254:181b5e179739 | 67 | if (event != IRQ_NONE) { |
mbed_official | 254:181b5e179739 | 68 | irq_handler(id, event); |
mbed_official | 254:181b5e179739 | 69 | } |
mbed_official | 254:181b5e179739 | 70 | port->ISFR = 1 << location; |
mbed_official | 82:0b31dbcd4769 | 71 | } |
mbed_official | 82:0b31dbcd4769 | 72 | } |
mbed_official | 82:0b31dbcd4769 | 73 | |
mbed_official | 82:0b31dbcd4769 | 74 | /* IRQ only on PORTA and PORTB */ |
mbed_official | 82:0b31dbcd4769 | 75 | void gpio_irqA(void) { |
mbed_official | 82:0b31dbcd4769 | 76 | handle_interrupt_in(PORTA, 0); |
mbed_official | 82:0b31dbcd4769 | 77 | } |
mbed_official | 82:0b31dbcd4769 | 78 | |
mbed_official | 82:0b31dbcd4769 | 79 | void gpio_irqB(void) { |
mbed_official | 82:0b31dbcd4769 | 80 | handle_interrupt_in(PORTB, 32); |
mbed_official | 82:0b31dbcd4769 | 81 | } |
mbed_official | 82:0b31dbcd4769 | 82 | |
mbed_official | 82:0b31dbcd4769 | 83 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) { |
mbed_official | 82:0b31dbcd4769 | 84 | if (pin == NC) return -1; |
mbed_official | 82:0b31dbcd4769 | 85 | |
mbed_official | 82:0b31dbcd4769 | 86 | irq_handler = handler; |
mbed_official | 82:0b31dbcd4769 | 87 | |
mbed_official | 82:0b31dbcd4769 | 88 | obj->port = pin >> PORT_SHIFT; |
mbed_official | 82:0b31dbcd4769 | 89 | obj->pin = (pin & 0x7F) >> 2; |
mbed_official | 82:0b31dbcd4769 | 90 | |
mbed_official | 82:0b31dbcd4769 | 91 | uint32_t ch_base, vector; |
mbed_official | 82:0b31dbcd4769 | 92 | IRQn_Type irq_n; |
mbed_official | 82:0b31dbcd4769 | 93 | switch (obj->port) { |
mbed_official | 254:181b5e179739 | 94 | case PortA: |
mbed_official | 254:181b5e179739 | 95 | ch_base = 0; |
mbed_official | 254:181b5e179739 | 96 | irq_n = PORTA_IRQn; |
mbed_official | 254:181b5e179739 | 97 | vector = (uint32_t)gpio_irqA; |
mbed_official | 254:181b5e179739 | 98 | break; |
mbed_official | 82:0b31dbcd4769 | 99 | |
mbed_official | 254:181b5e179739 | 100 | case PortB: |
mbed_official | 254:181b5e179739 | 101 | ch_base = 32; |
mbed_official | 254:181b5e179739 | 102 | irq_n = PORTB_IRQn; |
mbed_official | 254:181b5e179739 | 103 | vector = (uint32_t)gpio_irqB; |
mbed_official | 254:181b5e179739 | 104 | break; |
mbed_official | 82:0b31dbcd4769 | 105 | |
mbed_official | 254:181b5e179739 | 106 | default: |
mbed_official | 254:181b5e179739 | 107 | error("gpio_irq only supported on Port A and B"); |
mbed_official | 254:181b5e179739 | 108 | break; |
mbed_official | 82:0b31dbcd4769 | 109 | } |
mbed_official | 82:0b31dbcd4769 | 110 | NVIC_SetVector(irq_n, vector); |
mbed_official | 82:0b31dbcd4769 | 111 | NVIC_EnableIRQ(irq_n); |
mbed_official | 82:0b31dbcd4769 | 112 | |
mbed_official | 82:0b31dbcd4769 | 113 | obj->ch = ch_base + obj->pin; |
mbed_official | 82:0b31dbcd4769 | 114 | channel_ids[obj->ch] = id; |
mbed_official | 82:0b31dbcd4769 | 115 | |
mbed_official | 82:0b31dbcd4769 | 116 | return 0; |
mbed_official | 82:0b31dbcd4769 | 117 | } |
mbed_official | 82:0b31dbcd4769 | 118 | |
mbed_official | 82:0b31dbcd4769 | 119 | void gpio_irq_free(gpio_irq_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 120 | channel_ids[obj->ch] = 0; |
mbed_official | 82:0b31dbcd4769 | 121 | } |
mbed_official | 82:0b31dbcd4769 | 122 | |
mbed_official | 82:0b31dbcd4769 | 123 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { |
mbed_official | 82:0b31dbcd4769 | 124 | PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port); |
mbed_official | 82:0b31dbcd4769 | 125 | |
mbed_official | 82:0b31dbcd4769 | 126 | uint32_t irq_settings = IRQ_DISABLED; |
mbed_official | 82:0b31dbcd4769 | 127 | |
mbed_official | 82:0b31dbcd4769 | 128 | switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) { |
mbed_official | 82:0b31dbcd4769 | 129 | case IRQ_DISABLED: |
mbed_official | 82:0b31dbcd4769 | 130 | if (enable) { |
mbed_official | 82:0b31dbcd4769 | 131 | irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE); |
mbed_official | 82:0b31dbcd4769 | 132 | } |
mbed_official | 82:0b31dbcd4769 | 133 | break; |
mbed_official | 82:0b31dbcd4769 | 134 | |
mbed_official | 82:0b31dbcd4769 | 135 | case IRQ_RAISING_EDGE: |
mbed_official | 82:0b31dbcd4769 | 136 | if (enable) { |
mbed_official | 82:0b31dbcd4769 | 137 | irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE); |
mbed_official | 82:0b31dbcd4769 | 138 | } else { |
mbed_official | 82:0b31dbcd4769 | 139 | if (event == IRQ_FALL) |
mbed_official | 82:0b31dbcd4769 | 140 | irq_settings = IRQ_RAISING_EDGE; |
mbed_official | 82:0b31dbcd4769 | 141 | } |
mbed_official | 82:0b31dbcd4769 | 142 | break; |
mbed_official | 82:0b31dbcd4769 | 143 | |
mbed_official | 82:0b31dbcd4769 | 144 | case IRQ_FALLING_EDGE: |
mbed_official | 82:0b31dbcd4769 | 145 | if (enable) { |
mbed_official | 82:0b31dbcd4769 | 146 | irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE); |
mbed_official | 82:0b31dbcd4769 | 147 | } else { |
mbed_official | 82:0b31dbcd4769 | 148 | if (event == IRQ_RISE) |
mbed_official | 82:0b31dbcd4769 | 149 | irq_settings = IRQ_FALLING_EDGE; |
mbed_official | 82:0b31dbcd4769 | 150 | } |
mbed_official | 82:0b31dbcd4769 | 151 | break; |
mbed_official | 82:0b31dbcd4769 | 152 | |
mbed_official | 82:0b31dbcd4769 | 153 | case IRQ_EITHER_EDGE: |
mbed_official | 82:0b31dbcd4769 | 154 | if (enable) { |
mbed_official | 82:0b31dbcd4769 | 155 | irq_settings = IRQ_EITHER_EDGE; |
mbed_official | 82:0b31dbcd4769 | 156 | } else { |
mbed_official | 82:0b31dbcd4769 | 157 | irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE); |
mbed_official | 82:0b31dbcd4769 | 158 | } |
mbed_official | 82:0b31dbcd4769 | 159 | break; |
mbed_official | 82:0b31dbcd4769 | 160 | } |
mbed_official | 82:0b31dbcd4769 | 161 | |
mbed_official | 82:0b31dbcd4769 | 162 | // Interrupt configuration and clear interrupt |
mbed_official | 82:0b31dbcd4769 | 163 | port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK; |
mbed_official | 82:0b31dbcd4769 | 164 | } |
mbed_official | 82:0b31dbcd4769 | 165 | |
mbed_official | 82:0b31dbcd4769 | 166 | void gpio_irq_enable(gpio_irq_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 167 | if (obj->port == PortA) { |
mbed_official | 82:0b31dbcd4769 | 168 | NVIC_EnableIRQ(PORTA_IRQn); |
mbed_official | 82:0b31dbcd4769 | 169 | } else if (obj->port == PortB) { |
mbed_official | 82:0b31dbcd4769 | 170 | NVIC_EnableIRQ(PORTB_IRQn); |
mbed_official | 82:0b31dbcd4769 | 171 | } |
mbed_official | 82:0b31dbcd4769 | 172 | } |
mbed_official | 82:0b31dbcd4769 | 173 | |
mbed_official | 82:0b31dbcd4769 | 174 | void gpio_irq_disable(gpio_irq_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 175 | if (obj->port == PortA) { |
mbed_official | 82:0b31dbcd4769 | 176 | NVIC_DisableIRQ(PORTA_IRQn); |
mbed_official | 82:0b31dbcd4769 | 177 | } else if (obj->port == PortB) { |
mbed_official | 82:0b31dbcd4769 | 178 | NVIC_DisableIRQ(PORTB_IRQn); |
mbed_official | 82:0b31dbcd4769 | 179 | } |
mbed_official | 82:0b31dbcd4769 | 180 | } |