Janani Sunil / Mbed OS EVAL-TempSense-ARDZ

Forked repository for Analog Devices EVAL-TempSense-ARDZ

Dependencies:   platform_drivers

app/adt7xxx_support.c@7:a3472d023b12, 2021-09-23 (annotated)

Committer:
Janani Sunil
Date:
Thu Sep 23 12:40:39 2021 +0530
Revision:
7:a3472d023b12
1.) Updated the project repository structure

2.) Made modifications in the code to align with the latest no-OS drivers and the platform drivers

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Janani Sunil 7:a3472d023b12 1 /***************************************************************************//**
Janani Sunil 7:a3472d023b12 2 * @file adt7xxx_support.c
Janani Sunil 7:a3472d023b12 3 * @brief Support Source File for adt7xxx
Janani Sunil 7:a3472d023b12 4 ********************************************************************************
Janani Sunil 7:a3472d023b12 5 * Copyright (c) 2021 Analog Devices, Inc.
Janani Sunil 7:a3472d023b12 6 * All rights reserved.
Janani Sunil 7:a3472d023b12 7 *
Janani Sunil 7:a3472d023b12 8 * This software is proprietary to Analog Devices, Inc. and its licensors.
Janani Sunil 7:a3472d023b12 9 * By using this software you agree to the terms of the associated
Janani Sunil 7:a3472d023b12 10 * Analog Devices Software License Agreement.
Janani Sunil 7:a3472d023b12 11 *******************************************************************************/
Janani Sunil 7:a3472d023b12 12
Janani Sunil 7:a3472d023b12 13 /******************************************************************************/
Janani Sunil 7:a3472d023b12 14 /***************************** Include Files **********************************/
Janani Sunil 7:a3472d023b12 15 /******************************************************************************/
Janani Sunil 7:a3472d023b12 16
Janani Sunil 7:a3472d023b12 17 #include <stdint.h>
Janani Sunil 7:a3472d023b12 18 #include "adt7420.h"
Janani Sunil 7:a3472d023b12 19 #include "error.h"
Janani Sunil 7:a3472d023b12 20 #include "adt7xxx_support.h"
Janani Sunil 7:a3472d023b12 21
Janani Sunil 7:a3472d023b12 22 /******************************************************************************/
Janani Sunil 7:a3472d023b12 23 /********************** Macros and Constants Definitions **********************/
Janani Sunil 7:a3472d023b12 24 /******************************************************************************/
Janani Sunil 7:a3472d023b12 25
Janani Sunil 7:a3472d023b12 26 /******************************************************************************/
Janani Sunil 7:a3472d023b12 27 /************************ Functions Definitions *******************************/
Janani Sunil 7:a3472d023b12 28 /******************************************************************************/
Janani Sunil 7:a3472d023b12 29
Janani Sunil 7:a3472d023b12 30 /***************************************************************************//**
Janani Sunil 7:a3472d023b12 31 * @brief Reads the value of a register SPI/I2C.
Janani Sunil 7:a3472d023b12 32 *
Janani Sunil 7:a3472d023b12 33 * @param dev - The device structure.
Janani Sunil 7:a3472d023b12 34 * @param register_address - Address of the register.
Janani Sunil 7:a3472d023b12 35 *
Janani Sunil 7:a3472d023b12 36 * @return register_value - Value of the register.
Janani Sunil 7:a3472d023b12 37 *******************************************************************************/
Janani Sunil 7:a3472d023b12 38 uint16_t adt7420_get_register_address_and_value(struct adt7420_dev *dev,
Janani Sunil 7:a3472d023b12 39 uint8_t register_address)
Janani Sunil 7:a3472d023b12 40 {
Janani Sunil 7:a3472d023b12 41 uint16_t register_value = 0;
Janani Sunil 7:a3472d023b12 42
Janani Sunil 7:a3472d023b12 43 //remap register map
Janani Sunil 7:a3472d023b12 44 if(adt7420_is_spi(dev)) {
Janani Sunil 7:a3472d023b12 45 switch (register_address) {
Janani Sunil 7:a3472d023b12 46 case REG_TEMP:
Janani Sunil 7:a3472d023b12 47 register_address = ADT7320_REG_TEMP;
Janani Sunil 7:a3472d023b12 48 break; // Temperature value
Janani Sunil 7:a3472d023b12 49 case REG_STATUS :
Janani Sunil 7:a3472d023b12 50 register_address = ADT7320_REG_STATUS;
Janani Sunil 7:a3472d023b12 51 break; // status info
Janani Sunil 7:a3472d023b12 52 case REG_CONFIG :
Janani Sunil 7:a3472d023b12 53 register_address = ADT7320_REG_CONFIG;
Janani Sunil 7:a3472d023b12 54 break; // Configuration
Janani Sunil 7:a3472d023b12 55 case REG_T_CRIT :
Janani Sunil 7:a3472d023b12 56 register_address = ADT7320_REG_T_CRIT;
Janani Sunil 7:a3472d023b12 57 break; // Temperature CRIT setpoint (147'C)
Janani Sunil 7:a3472d023b12 58 case REG_HIST :
Janani Sunil 7:a3472d023b12 59 register_address = ADT7320_REG_HIST;
Janani Sunil 7:a3472d023b12 60 break; // Temperature HYST setpoint (5'C)
Janani Sunil 7:a3472d023b12 61 case REG_T_HIGH :
Janani Sunil 7:a3472d023b12 62 register_address = ADT7320_REG_T_HIGH;
Janani Sunil 7:a3472d023b12 63 break; // Temperature HIGH setpoint (64'C)
Janani Sunil 7:a3472d023b12 64 case REG_T_LOW :
Janani Sunil 7:a3472d023b12 65 register_address = ADT7320_REG_T_LOW;
Janani Sunil 7:a3472d023b12 66 break; // Temperature LOW setpoint (10'C)
Janani Sunil 7:a3472d023b12 67 case REG_ID :
Janani Sunil 7:a3472d023b12 68 register_address = ADT7320_REG_ID;
Janani Sunil 7:a3472d023b12 69 break; // ID value
Janani Sunil 7:a3472d023b12 70 }
Janani Sunil 7:a3472d023b12 71 register_value = adt7420_get_register_value(dev, register_address);
Janani Sunil 7:a3472d023b12 72 } else {
Janani Sunil 7:a3472d023b12 73 switch (register_address) {
Janani Sunil 7:a3472d023b12 74 case REG_TEMP: {
Janani Sunil 7:a3472d023b12 75 register_value = adt7420_get_register_value(dev,
Janani Sunil 7:a3472d023b12 76 ADT7420_REG_TEMP_MSB) << 8;
Janani Sunil 7:a3472d023b12 77 register_value |= adt7420_get_register_value(dev, ADT7420_REG_TEMP_LSB);
Janani Sunil 7:a3472d023b12 78 break;
Janani Sunil 7:a3472d023b12 79 }
Janani Sunil 7:a3472d023b12 80 case REG_STATUS:
Janani Sunil 7:a3472d023b12 81 register_value = adt7420_get_register_value(dev, ADT7420_REG_STATUS);
Janani Sunil 7:a3472d023b12 82 break;
Janani Sunil 7:a3472d023b12 83 case REG_CONFIG:
Janani Sunil 7:a3472d023b12 84 register_value = adt7420_get_register_value(dev, ADT7420_REG_CONFIG);
Janani Sunil 7:a3472d023b12 85 break;
Janani Sunil 7:a3472d023b12 86 case REG_T_HIGH: {
Janani Sunil 7:a3472d023b12 87 register_value = adt7420_get_register_value(dev,
Janani Sunil 7:a3472d023b12 88 ADT7420_REG_T_HIGH_MSB) << 8;
Janani Sunil 7:a3472d023b12 89 register_value |= adt7420_get_register_value(dev, ADT7420_REG_T_HIGH_LSB);
Janani Sunil 7:a3472d023b12 90 break;
Janani Sunil 7:a3472d023b12 91 }
Janani Sunil 7:a3472d023b12 92 case REG_T_LOW: {
Janani Sunil 7:a3472d023b12 93 register_value = adt7420_get_register_value(dev,
Janani Sunil 7:a3472d023b12 94 ADT7420_REG_T_LOW_MSB) << 8;
Janani Sunil 7:a3472d023b12 95 register_value |= adt7420_get_register_value(dev, ADT7420_REG_T_LOW_LSB);
Janani Sunil 7:a3472d023b12 96 break;
Janani Sunil 7:a3472d023b12 97 }
Janani Sunil 7:a3472d023b12 98 case REG_T_CRIT: {
Janani Sunil 7:a3472d023b12 99 register_value = adt7420_get_register_value(dev,
Janani Sunil 7:a3472d023b12 100 ADT7420_REG_T_CRIT_MSB) << 8;
Janani Sunil 7:a3472d023b12 101 register_value |= adt7420_get_register_value(dev, ADT7420_REG_T_CRIT_LSB);
Janani Sunil 7:a3472d023b12 102 break;
Janani Sunil 7:a3472d023b12 103 }
Janani Sunil 7:a3472d023b12 104 case REG_HIST:
Janani Sunil 7:a3472d023b12 105 register_value = adt7420_get_register_value(dev, ADT7420_REG_HIST);
Janani Sunil 7:a3472d023b12 106 break;
Janani Sunil 7:a3472d023b12 107 case REG_ID:
Janani Sunil 7:a3472d023b12 108 register_value = adt7420_get_register_value(dev, ADT7420_REG_ID);
Janani Sunil 7:a3472d023b12 109 break;
Janani Sunil 7:a3472d023b12 110 }
Janani Sunil 7:a3472d023b12 111 }
Janani Sunil 7:a3472d023b12 112 return register_value;
Janani Sunil 7:a3472d023b12 113 }
Janani Sunil 7:a3472d023b12 114
Janani Sunil 7:a3472d023b12 115
Janani Sunil 7:a3472d023b12 116 /**************************************************************************//**
Janani Sunil 7:a3472d023b12 117 * @brief Configure write typev register based on communication interface.
Janani Sunil 7:a3472d023b12 118 *
Janani Sunil 7:a3472d023b12 119 * @param dev - The device structure.
Janani Sunil 7:a3472d023b12 120 * @param register_address - Register type.
Janani Sunil 7:a3472d023b12 121 *
Janani Sunil 7:a3472d023b12 122 * @return register_address - Register Address.
Janani Sunil 7:a3472d023b12 123 ******************************************************************************/
Janani Sunil 7:a3472d023b12 124 uint16_t configure_write_type_registers(struct adt7420_dev *dev,
Janani Sunil 7:a3472d023b12 125 uint8_t register_address)
Janani Sunil 7:a3472d023b12 126 {
Janani Sunil 7:a3472d023b12 127 if (adt7420_is_spi(dev)) {
Janani Sunil 7:a3472d023b12 128 //simple address re-map for SPI devices
Janani Sunil 7:a3472d023b12 129 switch(register_address) {
Janani Sunil 7:a3472d023b12 130 case REG_TEMP:
Janani Sunil 7:a3472d023b12 131 register_address = ADT7320_REG_TEMP;
Janani Sunil 7:a3472d023b12 132 break; // Temperature value
Janani Sunil 7:a3472d023b12 133 case REG_STATUS :
Janani Sunil 7:a3472d023b12 134 register_address = ADT7320_REG_STATUS;
Janani Sunil 7:a3472d023b12 135 break; // status info
Janani Sunil 7:a3472d023b12 136 case REG_CONFIG :
Janani Sunil 7:a3472d023b12 137 register_address = ADT7320_REG_CONFIG;
Janani Sunil 7:a3472d023b12 138 break; // Configuration
Janani Sunil 7:a3472d023b12 139 case REG_T_CRIT :
Janani Sunil 7:a3472d023b12 140 register_address = ADT7320_REG_T_CRIT;
Janani Sunil 7:a3472d023b12 141 break; // Temperature CRIT setpoint (147'C)
Janani Sunil 7:a3472d023b12 142 case REG_HIST :
Janani Sunil 7:a3472d023b12 143 register_address = ADT7320_REG_HIST;
Janani Sunil 7:a3472d023b12 144 break; // Temperature HYST setpoint (5'C)
Janani Sunil 7:a3472d023b12 145 case REG_T_HIGH :
Janani Sunil 7:a3472d023b12 146 register_address = ADT7320_REG_T_HIGH;
Janani Sunil 7:a3472d023b12 147 break; // Temperature HIGH setpoint (64'C)
Janani Sunil 7:a3472d023b12 148 case REG_T_LOW :
Janani Sunil 7:a3472d023b12 149 register_address = ADT7320_REG_T_LOW;
Janani Sunil 7:a3472d023b12 150 break; // Temperature LOW setpoint (10'C)
Janani Sunil 7:a3472d023b12 151 case REG_ID :
Janani Sunil 7:a3472d023b12 152 register_address = ADT7320_REG_ID;
Janani Sunil 7:a3472d023b12 153 break; // ID value
Janani Sunil 7:a3472d023b12 154 }
Janani Sunil 7:a3472d023b12 155 } else {
Janani Sunil 7:a3472d023b12 156 //simple address re-map for I2Cdevices
Janani Sunil 7:a3472d023b12 157 switch(register_address) {
Janani Sunil 7:a3472d023b12 158 case REG_TEMP:
Janani Sunil 7:a3472d023b12 159 register_address = ADT7420_REG_T_HIGH_MSB;
Janani Sunil 7:a3472d023b12 160 break; // Temperature value
Janani Sunil 7:a3472d023b12 161 case REG_STATUS :
Janani Sunil 7:a3472d023b12 162 register_address = ADT7420_REG_STATUS;
Janani Sunil 7:a3472d023b12 163 break; // status info
Janani Sunil 7:a3472d023b12 164 case REG_CONFIG :
Janani Sunil 7:a3472d023b12 165 register_address = ADT7420_REG_CONFIG;
Janani Sunil 7:a3472d023b12 166 break; // Configuration
Janani Sunil 7:a3472d023b12 167 case REG_T_CRIT :
Janani Sunil 7:a3472d023b12 168 register_address = ADT7420_REG_T_CRIT_MSB;
Janani Sunil 7:a3472d023b12 169 break; // Temperature CRIT setpoint (147'C)
Janani Sunil 7:a3472d023b12 170 case REG_HIST :
Janani Sunil 7:a3472d023b12 171 register_address = ADT7420_REG_HIST;
Janani Sunil 7:a3472d023b12 172 break; // Temperature HYST setpoint (5'C)
Janani Sunil 7:a3472d023b12 173 case REG_T_HIGH :
Janani Sunil 7:a3472d023b12 174 register_address = ADT7420_REG_T_HIGH_MSB;
Janani Sunil 7:a3472d023b12 175 break; // Temperature HIGH setpoint (64'C)
Janani Sunil 7:a3472d023b12 176 case REG_T_LOW :
Janani Sunil 7:a3472d023b12 177 register_address = ADT7420_REG_T_LOW_MSB;
Janani Sunil 7:a3472d023b12 178 break; // Temperature LOW setpoint (10'C)
Janani Sunil 7:a3472d023b12 179 case REG_ID :
Janani Sunil 7:a3472d023b12 180 register_address = ADT7420_REG_ID;
Janani Sunil 7:a3472d023b12 181 break; // ID value
Janani Sunil 7:a3472d023b12 182 }
Janani Sunil 7:a3472d023b12 183 }
Janani Sunil 7:a3472d023b12 184
Janani Sunil 7:a3472d023b12 185 return register_address;
Janani Sunil 7:a3472d023b12 186 }
Janani Sunil 7:a3472d023b12 187
Janani Sunil 7:a3472d023b12 188 /**************************************************************************//**
Janani Sunil 7:a3472d023b12 189 * @brief Write to a setpoint register.
Janani Sunil 7:a3472d023b12 190 *
Janani Sunil 7:a3472d023b12 191 * @param dev - The device structure.
Janani Sunil 7:a3472d023b12 192 * @param register_value - Command control bits.
Janani Sunil 7:a3472d023b12 193 * @param data - Data to be written in input register.
Janani Sunil 7:a3472d023b12 194 *
Janani Sunil 7:a3472d023b12 195 * @return read_back_data - value read from register.
Janani Sunil 7:a3472d023b12 196 ******************************************************************************/
Janani Sunil 7:a3472d023b12 197 uint8_t adt7420_wr_setpoint_reg(struct adt7420_dev *dev,
Janani Sunil 7:a3472d023b12 198 uint8_t register_value,
Janani Sunil 7:a3472d023b12 199 uint16_t data)
Janani Sunil 7:a3472d023b12 200 {
Janani Sunil 7:a3472d023b12 201 uint16_t read_back_data = 0;
Janani Sunil 7:a3472d023b12 202 uint8_t address, num_bytes;
Janani Sunil 7:a3472d023b12 203 uint8_t data_buffer[3] = { 0, 0, 0 };
Janani Sunil 7:a3472d023b12 204
Janani Sunil 7:a3472d023b12 205 switch (register_value) {
Janani Sunil 7:a3472d023b12 206 case REG_T_CRIT:
Janani Sunil 7:a3472d023b12 207 case REG_T_HIGH:
Janani Sunil 7:a3472d023b12 208 case REG_T_LOW: {
Janani Sunil 7:a3472d023b12 209 num_bytes = 3;
Janani Sunil 7:a3472d023b12 210 data_buffer[0] = ((data & ADT7420_MSB_MASK) >> ADT7420_MSB_OFFSET);
Janani Sunil 7:a3472d023b12 211 data_buffer[1] = data & ADT7420_LSB_MASK;
Janani Sunil 7:a3472d023b12 212 break;
Janani Sunil 7:a3472d023b12 213 }
Janani Sunil 7:a3472d023b12 214 case REG_HIST: {
Janani Sunil 7:a3472d023b12 215 num_bytes = 2;
Janani Sunil 7:a3472d023b12 216 data_buffer[0] = data & ADT7420_LSB_MASK;
Janani Sunil 7:a3472d023b12 217 break;
Janani Sunil 7:a3472d023b12 218 }
Janani Sunil 7:a3472d023b12 219 }
Janani Sunil 7:a3472d023b12 220
Janani Sunil 7:a3472d023b12 221 address = configure_write_type_registers(dev, register_value);
Janani Sunil 7:a3472d023b12 222 set_register_value(dev, address, num_bytes, data_buffer, ADT7420_MASK_SET_PT_REGISTER, 0x00);
Janani Sunil 7:a3472d023b12 223 read_back_data = adt7420_get_register_value(dev, address);
Janani Sunil 7:a3472d023b12 224
Janani Sunil 7:a3472d023b12 225 if (register_value == REG_HIST) {
Janani Sunil 7:a3472d023b12 226 data &= 0x000F; //msbits are all low for HIST register
Janani Sunil 7:a3472d023b12 227 read_back_data &= 0x000F; //msbits are all low for HIST register
Janani Sunil 7:a3472d023b12 228 }
Janani Sunil 7:a3472d023b12 229
Janani Sunil 7:a3472d023b12 230 return read_back_data == data ? SUCCESS : FAILURE;
Janani Sunil 7:a3472d023b12 231 }
Janani Sunil 7:a3472d023b12 232
Janani Sunil 7:a3472d023b12 233 /***************************************************************************//**
Janani Sunil 7:a3472d023b12 234 * @brief Sets the Fault Queue option for ADT7420/ADT7320.
Janani Sunil 7:a3472d023b12 235 *
Janani Sunil 7:a3472d023b12 236 * @param dev - The device structure.
Janani Sunil 7:a3472d023b12 237 * @param mode - Fault Queue selection.
Janani Sunil 7:a3472d023b12 238 * Example: 1 - 1 fault (default).
Janani Sunil 7:a3472d023b12 239 * 2 - 2 faults.
Janani Sunil 7:a3472d023b12 240 * 3 - 3 faults.
Janani Sunil 7:a3472d023b12 241 * 4 - 4 faults.
Janani Sunil 7:a3472d023b12 242 *
Janani Sunil 7:a3472d023b12 243 * @return None.
Janani Sunil 7:a3472d023b12 244 *******************************************************************************/
Janani Sunil 7:a3472d023b12 245 void adt7420_set_fault_queue(struct adt7420_dev *dev,
Janani Sunil 7:a3472d023b12 246 uint8_t mode)
Janani Sunil 7:a3472d023b12 247 {
Janani Sunil 7:a3472d023b12 248 uint8_t register_value[1] = { 0 };
Janani Sunil 7:a3472d023b12 249 uint8_t address;
Janani Sunil 7:a3472d023b12 250
Janani Sunil 7:a3472d023b12 251 if (adt7420_is_spi(dev)) {
Janani Sunil 7:a3472d023b12 252 address = ADT7320_REG_CONFIG;
Janani Sunil 7:a3472d023b12 253 register_value[0] = adt7420_get_register_value(dev, ADT7320_REG_CONFIG);
Janani Sunil 7:a3472d023b12 254 } else {
Janani Sunil 7:a3472d023b12 255 address = ADT7420_REG_CONFIG;
Janani Sunil 7:a3472d023b12 256 register_value[0] = adt7420_get_register_value(dev, ADT7420_REG_CONFIG);
Janani Sunil 7:a3472d023b12 257 }
Janani Sunil 7:a3472d023b12 258
Janani Sunil 7:a3472d023b12 259 set_register_value(dev, address, 2, register_value,
Janani Sunil 7:a3472d023b12 260 ADT7420_CONFIG_FAULT_QUEUE(ADT7420_FAULT_QUEUE_4_FAULTS),
Janani Sunil 7:a3472d023b12 261 ADT7420_CONFIG_FAULT_QUEUE(mode));
Janani Sunil 7:a3472d023b12 262 }
Janani Sunil 7:a3472d023b12 263
Janani Sunil 7:a3472d023b12 264 /***************************************************************************//**
Janani Sunil 7:a3472d023b12 265 * @brief Sets comparator/interrupt (CT/INT) mode for ADT7420/ADT7320.
Janani Sunil 7:a3472d023b12 266 *
Janani Sunil 7:a3472d023b12 267 * @param dev - The device structure.
Janani Sunil 7:a3472d023b12 268 * @param setting - Mode selection.
Janani Sunil 7:a3472d023b12 269 * Example: 0 - Interrupt (default).
Janani Sunil 7:a3472d023b12 270 * 1 - Comparator.
Janani Sunil 7:a3472d023b12 271 *
Janani Sunil 7:a3472d023b12 272 *
Janani Sunil 7:a3472d023b12 273 * @return None.
Janani Sunil 7:a3472d023b12 274 *******************************************************************************/
Janani Sunil 7:a3472d023b12 275 void adt7420_set_ct_int_mode(struct adt7420_dev *dev,
Janani Sunil 7:a3472d023b12 276 uint8_t setting)
Janani Sunil 7:a3472d023b12 277 {
Janani Sunil 7:a3472d023b12 278 uint8_t register_value[1] = { 0 };
Janani Sunil 7:a3472d023b12 279 uint8_t address;
Janani Sunil 7:a3472d023b12 280
Janani Sunil 7:a3472d023b12 281 if (adt7420_is_spi(dev)) {
Janani Sunil 7:a3472d023b12 282 address = ADT7320_REG_CONFIG;
Janani Sunil 7:a3472d023b12 283 register_value[0] = adt7420_get_register_value(dev, ADT7320_REG_CONFIG);
Janani Sunil 7:a3472d023b12 284 } else {
Janani Sunil 7:a3472d023b12 285 address = ADT7420_REG_CONFIG;
Janani Sunil 7:a3472d023b12 286 register_value[0] = adt7420_get_register_value(dev, ADT7420_REG_CONFIG);
Janani Sunil 7:a3472d023b12 287 }
Janani Sunil 7:a3472d023b12 288
Janani Sunil 7:a3472d023b12 289 set_register_value(dev, address,2 ,register_value, ADT7420_CONFIG_INT_CT_MODE,
Janani Sunil 7:a3472d023b12 290 (setting * ADT7420_CONFIG_INT_CT_MODE));
Janani Sunil 7:a3472d023b12 291 }
Janani Sunil 7:a3472d023b12 292
Janani Sunil 7:a3472d023b12 293 /***************************************************************************//**
Janani Sunil 7:a3472d023b12 294 * @brief Sets output polarity for the pins CT/INT (Critical Temp - Over/Under Temp).
Janani Sunil 7:a3472d023b12 295 *
Janani Sunil 7:a3472d023b12 296 * @param dev - The device structure.
Janani Sunil 7:a3472d023b12 297 * @param polarity - Polarity selection.
Janani Sunil 7:a3472d023b12 298 * Example: 0 - Active Low (default).
Janani Sunil 7:a3472d023b12 299 * 1 - Active High.
Janani Sunil 7:a3472d023b12 300 *
Janani Sunil 7:a3472d023b12 301 *
Janani Sunil 7:a3472d023b12 302 * @return None.
Janani Sunil 7:a3472d023b12 303 *******************************************************************************/
Janani Sunil 7:a3472d023b12 304 void adt7420_set_ct_int_polarity(struct adt7420_dev *dev,
Janani Sunil 7:a3472d023b12 305 uint8_t polarity)
Janani Sunil 7:a3472d023b12 306 {
Janani Sunil 7:a3472d023b12 307 uint8_t register_value[1] = { 0 };
Janani Sunil 7:a3472d023b12 308 uint8_t address;
Janani Sunil 7:a3472d023b12 309 uint8_t bit_mask, bit_value;
Janani Sunil 7:a3472d023b12 310
Janani Sunil 7:a3472d023b12 311 if (adt7420_is_spi(dev)) {
Janani Sunil 7:a3472d023b12 312 address = ADT7320_REG_CONFIG;
Janani Sunil 7:a3472d023b12 313 register_value[0] = adt7420_get_register_value(dev, ADT7320_REG_CONFIG);
Janani Sunil 7:a3472d023b12 314 } else {
Janani Sunil 7:a3472d023b12 315 address = ADT7420_REG_CONFIG;
Janani Sunil 7:a3472d023b12 316 register_value[0] = adt7420_get_register_value(dev, ADT7420_REG_CONFIG);
Janani Sunil 7:a3472d023b12 317 register_value[0] = adt7420_get_register_value(dev, ADT7420_REG_CONFIG);
Janani Sunil 7:a3472d023b12 318 }
Janani Sunil 7:a3472d023b12 319
Janani Sunil 7:a3472d023b12 320 bit_mask = (ADT7420_CONFIG_CT_POL) | (ADT7420_CONFIG_INT_POL);
Janani Sunil 7:a3472d023b12 321 bit_value = (polarity * ADT7420_CONFIG_CT_POL) | (polarity *
Janani Sunil 7:a3472d023b12 322 ADT7420_CONFIG_INT_POL);
Janani Sunil 7:a3472d023b12 323
Janani Sunil 7:a3472d023b12 324 set_register_value(dev, address, 2, register_value, bit_mask, bit_value);
Janani Sunil 7:a3472d023b12 325 }