James Heavey / Mbed 2 deprecated 2665-Breakout-Game

Dependencies:   mbed

Committer:
jamesheavey
Date:
Tue Jan 05 01:14:11 2021 +0000
Revision:
0:92b180c8d407
test

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jamesheavey 0:92b180c8d407 1 /* mbed Microcontroller Library
jamesheavey 0:92b180c8d407 2 * Copyright (c) 2006-2012 ARM Limited
jamesheavey 0:92b180c8d407 3 *
jamesheavey 0:92b180c8d407 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
jamesheavey 0:92b180c8d407 5 * of this software and associated documentation files (the "Software"), to deal
jamesheavey 0:92b180c8d407 6 * in the Software without restriction, including without limitation the rights
jamesheavey 0:92b180c8d407 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
jamesheavey 0:92b180c8d407 8 * copies of the Software, and to permit persons to whom the Software is
jamesheavey 0:92b180c8d407 9 * furnished to do so, subject to the following conditions:
jamesheavey 0:92b180c8d407 10 *
jamesheavey 0:92b180c8d407 11 * The above copyright notice and this permission notice shall be included in
jamesheavey 0:92b180c8d407 12 * all copies or substantial portions of the Software.
jamesheavey 0:92b180c8d407 13 *
jamesheavey 0:92b180c8d407 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
jamesheavey 0:92b180c8d407 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
jamesheavey 0:92b180c8d407 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
jamesheavey 0:92b180c8d407 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
jamesheavey 0:92b180c8d407 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
jamesheavey 0:92b180c8d407 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
jamesheavey 0:92b180c8d407 20 * SOFTWARE.
jamesheavey 0:92b180c8d407 21 */
jamesheavey 0:92b180c8d407 22 /* Introduction
jamesheavey 0:92b180c8d407 23 * ------------
jamesheavey 0:92b180c8d407 24 * SD and MMC cards support a number of interfaces, but common to them all
jamesheavey 0:92b180c8d407 25 * is one based on SPI. This is the one I'm implmenting because it means
jamesheavey 0:92b180c8d407 26 * it is much more portable even though not so performant, and we already
jamesheavey 0:92b180c8d407 27 * have the mbed SPI Interface!
jamesheavey 0:92b180c8d407 28 *
jamesheavey 0:92b180c8d407 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
jamesheavey 0:92b180c8d407 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
jamesheavey 0:92b180c8d407 31 *
jamesheavey 0:92b180c8d407 32 * SPI Startup
jamesheavey 0:92b180c8d407 33 * -----------
jamesheavey 0:92b180c8d407 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
jamesheavey 0:92b180c8d407 35 * asserting CS low and sending the reset command (CMD0). The card will
jamesheavey 0:92b180c8d407 36 * respond with a (R1) response.
jamesheavey 0:92b180c8d407 37 *
jamesheavey 0:92b180c8d407 38 * CMD8 is optionally sent to determine the voltage range supported, and
jamesheavey 0:92b180c8d407 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
jamesheavey 0:92b180c8d407 40 * version 2.x. I'll just ignore this for now.
jamesheavey 0:92b180c8d407 41 *
jamesheavey 0:92b180c8d407 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
jamesheavey 0:92b180c8d407 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
jamesheavey 0:92b180c8d407 44 *
jamesheavey 0:92b180c8d407 45 * You should also indicate whether the host supports High Capicity cards,
jamesheavey 0:92b180c8d407 46 * and check whether the card is high capacity - i'll also ignore this
jamesheavey 0:92b180c8d407 47 *
jamesheavey 0:92b180c8d407 48 * SPI Protocol
jamesheavey 0:92b180c8d407 49 * ------------
jamesheavey 0:92b180c8d407 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
jamesheavey 0:92b180c8d407 51 * the host starting every bus transaction by asserting the CS signal low. The
jamesheavey 0:92b180c8d407 52 * card always responds to commands, data blocks and errors.
jamesheavey 0:92b180c8d407 53 *
jamesheavey 0:92b180c8d407 54 * The protocol supports a CRC, but by default it is off (except for the
jamesheavey 0:92b180c8d407 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
jamesheavey 0:92b180c8d407 56 * I'll leave the CRC off I think!
jamesheavey 0:92b180c8d407 57 *
jamesheavey 0:92b180c8d407 58 * Standard capacity cards have variable data block sizes, whereas High
jamesheavey 0:92b180c8d407 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
jamesheavey 0:92b180c8d407 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
jamesheavey 0:92b180c8d407 61 * This is set with CMD16.
jamesheavey 0:92b180c8d407 62 *
jamesheavey 0:92b180c8d407 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
jamesheavey 0:92b180c8d407 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
jamesheavey 0:92b180c8d407 65 * the card gets a read command, it responds with a response token, and then
jamesheavey 0:92b180c8d407 66 * a data token or an error.
jamesheavey 0:92b180c8d407 67 *
jamesheavey 0:92b180c8d407 68 * SPI Command Format
jamesheavey 0:92b180c8d407 69 * ------------------
jamesheavey 0:92b180c8d407 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
jamesheavey 0:92b180c8d407 71 *
jamesheavey 0:92b180c8d407 72 * +---------------+------------+------------+-----------+----------+--------------+
jamesheavey 0:92b180c8d407 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
jamesheavey 0:92b180c8d407 74 * +---------------+------------+------------+-----------+----------+--------------+
jamesheavey 0:92b180c8d407 75 *
jamesheavey 0:92b180c8d407 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
jamesheavey 0:92b180c8d407 77 *
jamesheavey 0:92b180c8d407 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
jamesheavey 0:92b180c8d407 79 *
jamesheavey 0:92b180c8d407 80 * SPI Response Format
jamesheavey 0:92b180c8d407 81 * -------------------
jamesheavey 0:92b180c8d407 82 * The main response format (R1) is a status byte (normally zero). Key flags:
jamesheavey 0:92b180c8d407 83 * idle - 1 if the card is in an idle state/initialising
jamesheavey 0:92b180c8d407 84 * cmd - 1 if an illegal command code was detected
jamesheavey 0:92b180c8d407 85 *
jamesheavey 0:92b180c8d407 86 * +-------------------------------------------------+
jamesheavey 0:92b180c8d407 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
jamesheavey 0:92b180c8d407 88 * +-------------------------------------------------+
jamesheavey 0:92b180c8d407 89 *
jamesheavey 0:92b180c8d407 90 * R1b is the same, except it is followed by a busy signal (zeros) until
jamesheavey 0:92b180c8d407 91 * the first non-zero byte when it is ready again.
jamesheavey 0:92b180c8d407 92 *
jamesheavey 0:92b180c8d407 93 * Data Response Token
jamesheavey 0:92b180c8d407 94 * -------------------
jamesheavey 0:92b180c8d407 95 * Every data block written to the card is acknowledged by a byte
jamesheavey 0:92b180c8d407 96 * response token
jamesheavey 0:92b180c8d407 97 *
jamesheavey 0:92b180c8d407 98 * +----------------------+
jamesheavey 0:92b180c8d407 99 * | xxx | 0 | status | 1 |
jamesheavey 0:92b180c8d407 100 * +----------------------+
jamesheavey 0:92b180c8d407 101 * 010 - OK!
jamesheavey 0:92b180c8d407 102 * 101 - CRC Error
jamesheavey 0:92b180c8d407 103 * 110 - Write Error
jamesheavey 0:92b180c8d407 104 *
jamesheavey 0:92b180c8d407 105 * Single Block Read and Write
jamesheavey 0:92b180c8d407 106 * ---------------------------
jamesheavey 0:92b180c8d407 107 *
jamesheavey 0:92b180c8d407 108 * Block transfers have a byte header, followed by the data, followed
jamesheavey 0:92b180c8d407 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
jamesheavey 0:92b180c8d407 110 *
jamesheavey 0:92b180c8d407 111 * +------+---------+---------+- - - -+---------+-----------+----------+
jamesheavey 0:92b180c8d407 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
jamesheavey 0:92b180c8d407 113 * +------+---------+---------+- - - -+---------+-----------+----------+
jamesheavey 0:92b180c8d407 114 */
jamesheavey 0:92b180c8d407 115 #include "SDFileSystem.h"
jamesheavey 0:92b180c8d407 116 #include "mbed_debug.h"
jamesheavey 0:92b180c8d407 117
jamesheavey 0:92b180c8d407 118 #define SD_COMMAND_TIMEOUT 5000
jamesheavey 0:92b180c8d407 119
jamesheavey 0:92b180c8d407 120 #define SD_DBG 0
jamesheavey 0:92b180c8d407 121
jamesheavey 0:92b180c8d407 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
jamesheavey 0:92b180c8d407 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0) {
jamesheavey 0:92b180c8d407 124 _cs = 1;
jamesheavey 0:92b180c8d407 125
jamesheavey 0:92b180c8d407 126 // Set default to 100kHz for initialisation and 1MHz for data transfer
jamesheavey 0:92b180c8d407 127 _init_sck = 100000;
jamesheavey 0:92b180c8d407 128 _transfer_sck = 1000000;
jamesheavey 0:92b180c8d407 129 }
jamesheavey 0:92b180c8d407 130
jamesheavey 0:92b180c8d407 131 #define R1_IDLE_STATE (1 << 0)
jamesheavey 0:92b180c8d407 132 #define R1_ERASE_RESET (1 << 1)
jamesheavey 0:92b180c8d407 133 #define R1_ILLEGAL_COMMAND (1 << 2)
jamesheavey 0:92b180c8d407 134 #define R1_COM_CRC_ERROR (1 << 3)
jamesheavey 0:92b180c8d407 135 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
jamesheavey 0:92b180c8d407 136 #define R1_ADDRESS_ERROR (1 << 5)
jamesheavey 0:92b180c8d407 137 #define R1_PARAMETER_ERROR (1 << 6)
jamesheavey 0:92b180c8d407 138
jamesheavey 0:92b180c8d407 139 // Types
jamesheavey 0:92b180c8d407 140 // - v1.x Standard Capacity
jamesheavey 0:92b180c8d407 141 // - v2.x Standard Capacity
jamesheavey 0:92b180c8d407 142 // - v2.x High Capacity
jamesheavey 0:92b180c8d407 143 // - Not recognised as an SD Card
jamesheavey 0:92b180c8d407 144 #define SDCARD_FAIL 0
jamesheavey 0:92b180c8d407 145 #define SDCARD_V1 1
jamesheavey 0:92b180c8d407 146 #define SDCARD_V2 2
jamesheavey 0:92b180c8d407 147 #define SDCARD_V2HC 3
jamesheavey 0:92b180c8d407 148
jamesheavey 0:92b180c8d407 149 int SDFileSystem::initialise_card() {
jamesheavey 0:92b180c8d407 150 // Set to SCK for initialisation, and clock card with cs = 1
jamesheavey 0:92b180c8d407 151 _spi.frequency(_init_sck);
jamesheavey 0:92b180c8d407 152 _cs = 1;
jamesheavey 0:92b180c8d407 153 for (int i = 0; i < 16; i++) {
jamesheavey 0:92b180c8d407 154 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 155 }
jamesheavey 0:92b180c8d407 156
jamesheavey 0:92b180c8d407 157 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
jamesheavey 0:92b180c8d407 158 if (_cmd(0, 0) != R1_IDLE_STATE) {
jamesheavey 0:92b180c8d407 159 debug("No disk, or could not put SD card in to SPI idle state\n");
jamesheavey 0:92b180c8d407 160 return SDCARD_FAIL;
jamesheavey 0:92b180c8d407 161 }
jamesheavey 0:92b180c8d407 162
jamesheavey 0:92b180c8d407 163 // send CMD8 to determine whther it is ver 2.x
jamesheavey 0:92b180c8d407 164 int r = _cmd8();
jamesheavey 0:92b180c8d407 165 if (r == R1_IDLE_STATE) {
jamesheavey 0:92b180c8d407 166 return initialise_card_v2();
jamesheavey 0:92b180c8d407 167 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
jamesheavey 0:92b180c8d407 168 return initialise_card_v1();
jamesheavey 0:92b180c8d407 169 } else {
jamesheavey 0:92b180c8d407 170 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
jamesheavey 0:92b180c8d407 171 return SDCARD_FAIL;
jamesheavey 0:92b180c8d407 172 }
jamesheavey 0:92b180c8d407 173 }
jamesheavey 0:92b180c8d407 174
jamesheavey 0:92b180c8d407 175 int SDFileSystem::initialise_card_v1() {
jamesheavey 0:92b180c8d407 176 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
jamesheavey 0:92b180c8d407 177 _cmd(55, 0);
jamesheavey 0:92b180c8d407 178 if (_cmd(41, 0) == 0) {
jamesheavey 0:92b180c8d407 179 cdv = 512;
jamesheavey 0:92b180c8d407 180 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
jamesheavey 0:92b180c8d407 181 return SDCARD_V1;
jamesheavey 0:92b180c8d407 182 }
jamesheavey 0:92b180c8d407 183 }
jamesheavey 0:92b180c8d407 184
jamesheavey 0:92b180c8d407 185 debug("Timeout waiting for v1.x card\n");
jamesheavey 0:92b180c8d407 186 return SDCARD_FAIL;
jamesheavey 0:92b180c8d407 187 }
jamesheavey 0:92b180c8d407 188
jamesheavey 0:92b180c8d407 189 int SDFileSystem::initialise_card_v2() {
jamesheavey 0:92b180c8d407 190 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
jamesheavey 0:92b180c8d407 191 wait_ms(50);
jamesheavey 0:92b180c8d407 192 _cmd58();
jamesheavey 0:92b180c8d407 193 _cmd(55, 0);
jamesheavey 0:92b180c8d407 194 if (_cmd(41, 0x40000000) == 0) {
jamesheavey 0:92b180c8d407 195 _cmd58();
jamesheavey 0:92b180c8d407 196 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
jamesheavey 0:92b180c8d407 197 cdv = 1;
jamesheavey 0:92b180c8d407 198 return SDCARD_V2;
jamesheavey 0:92b180c8d407 199 }
jamesheavey 0:92b180c8d407 200 }
jamesheavey 0:92b180c8d407 201
jamesheavey 0:92b180c8d407 202 debug("Timeout waiting for v2.x card\n");
jamesheavey 0:92b180c8d407 203 return SDCARD_FAIL;
jamesheavey 0:92b180c8d407 204 }
jamesheavey 0:92b180c8d407 205
jamesheavey 0:92b180c8d407 206 int SDFileSystem::disk_initialize() {
jamesheavey 0:92b180c8d407 207 _is_initialized = initialise_card();
jamesheavey 0:92b180c8d407 208 if (_is_initialized == 0) {
jamesheavey 0:92b180c8d407 209 debug("Fail to initialize card\n");
jamesheavey 0:92b180c8d407 210 return 1;
jamesheavey 0:92b180c8d407 211 }
jamesheavey 0:92b180c8d407 212 debug_if(SD_DBG, "init card = %d\n", _is_initialized);
jamesheavey 0:92b180c8d407 213 _sectors = _sd_sectors();
jamesheavey 0:92b180c8d407 214
jamesheavey 0:92b180c8d407 215 // Set block length to 512 (CMD16)
jamesheavey 0:92b180c8d407 216 if (_cmd(16, 512) != 0) {
jamesheavey 0:92b180c8d407 217 debug("Set 512-byte block timed out\n");
jamesheavey 0:92b180c8d407 218 return 1;
jamesheavey 0:92b180c8d407 219 }
jamesheavey 0:92b180c8d407 220
jamesheavey 0:92b180c8d407 221 // Set SCK for data transfer
jamesheavey 0:92b180c8d407 222 _spi.frequency(_transfer_sck);
jamesheavey 0:92b180c8d407 223 return 0;
jamesheavey 0:92b180c8d407 224 }
jamesheavey 0:92b180c8d407 225
jamesheavey 0:92b180c8d407 226 int SDFileSystem::disk_write(const uint8_t* buffer, uint32_t block_number, uint32_t count) {
jamesheavey 0:92b180c8d407 227 if (!_is_initialized) {
jamesheavey 0:92b180c8d407 228 return -1;
jamesheavey 0:92b180c8d407 229 }
jamesheavey 0:92b180c8d407 230
jamesheavey 0:92b180c8d407 231 for (uint32_t b = block_number; b < block_number + count; b++) {
jamesheavey 0:92b180c8d407 232 // set write address for single block (CMD24)
jamesheavey 0:92b180c8d407 233 if (_cmd(24, b * cdv) != 0) {
jamesheavey 0:92b180c8d407 234 return 1;
jamesheavey 0:92b180c8d407 235 }
jamesheavey 0:92b180c8d407 236
jamesheavey 0:92b180c8d407 237 // send the data block
jamesheavey 0:92b180c8d407 238 _write(buffer, 512);
jamesheavey 0:92b180c8d407 239 buffer += 512;
jamesheavey 0:92b180c8d407 240 }
jamesheavey 0:92b180c8d407 241
jamesheavey 0:92b180c8d407 242 return 0;
jamesheavey 0:92b180c8d407 243 }
jamesheavey 0:92b180c8d407 244
jamesheavey 0:92b180c8d407 245 int SDFileSystem::disk_read(uint8_t* buffer, uint32_t block_number, uint32_t count) {
jamesheavey 0:92b180c8d407 246 if (!_is_initialized) {
jamesheavey 0:92b180c8d407 247 return -1;
jamesheavey 0:92b180c8d407 248 }
jamesheavey 0:92b180c8d407 249
jamesheavey 0:92b180c8d407 250 for (uint32_t b = block_number; b < block_number + count; b++) {
jamesheavey 0:92b180c8d407 251 // set read address for single block (CMD17)
jamesheavey 0:92b180c8d407 252 if (_cmd(17, b * cdv) != 0) {
jamesheavey 0:92b180c8d407 253 return 1;
jamesheavey 0:92b180c8d407 254 }
jamesheavey 0:92b180c8d407 255
jamesheavey 0:92b180c8d407 256 // receive the data
jamesheavey 0:92b180c8d407 257 _read(buffer, 512);
jamesheavey 0:92b180c8d407 258 buffer += 512;
jamesheavey 0:92b180c8d407 259 }
jamesheavey 0:92b180c8d407 260
jamesheavey 0:92b180c8d407 261 return 0;
jamesheavey 0:92b180c8d407 262 }
jamesheavey 0:92b180c8d407 263
jamesheavey 0:92b180c8d407 264 int SDFileSystem::disk_status() {
jamesheavey 0:92b180c8d407 265 // FATFileSystem::disk_status() returns 0 when initialized
jamesheavey 0:92b180c8d407 266 if (_is_initialized) {
jamesheavey 0:92b180c8d407 267 return 0;
jamesheavey 0:92b180c8d407 268 } else {
jamesheavey 0:92b180c8d407 269 return 1;
jamesheavey 0:92b180c8d407 270 }
jamesheavey 0:92b180c8d407 271 }
jamesheavey 0:92b180c8d407 272
jamesheavey 0:92b180c8d407 273 int SDFileSystem::disk_sync() { return 0; }
jamesheavey 0:92b180c8d407 274 uint32_t SDFileSystem::disk_sectors() { return _sectors; }
jamesheavey 0:92b180c8d407 275
jamesheavey 0:92b180c8d407 276
jamesheavey 0:92b180c8d407 277 // PRIVATE FUNCTIONS
jamesheavey 0:92b180c8d407 278 int SDFileSystem::_cmd(int cmd, int arg) {
jamesheavey 0:92b180c8d407 279 _cs = 0;
jamesheavey 0:92b180c8d407 280
jamesheavey 0:92b180c8d407 281 // send a command
jamesheavey 0:92b180c8d407 282 _spi.write(0x40 | cmd);
jamesheavey 0:92b180c8d407 283 _spi.write(arg >> 24);
jamesheavey 0:92b180c8d407 284 _spi.write(arg >> 16);
jamesheavey 0:92b180c8d407 285 _spi.write(arg >> 8);
jamesheavey 0:92b180c8d407 286 _spi.write(arg >> 0);
jamesheavey 0:92b180c8d407 287 _spi.write(0x95);
jamesheavey 0:92b180c8d407 288
jamesheavey 0:92b180c8d407 289 // wait for the repsonse (response[7] == 0)
jamesheavey 0:92b180c8d407 290 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
jamesheavey 0:92b180c8d407 291 int response = _spi.write(0xFF);
jamesheavey 0:92b180c8d407 292 if (!(response & 0x80)) {
jamesheavey 0:92b180c8d407 293 _cs = 1;
jamesheavey 0:92b180c8d407 294 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 295 return response;
jamesheavey 0:92b180c8d407 296 }
jamesheavey 0:92b180c8d407 297 }
jamesheavey 0:92b180c8d407 298 _cs = 1;
jamesheavey 0:92b180c8d407 299 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 300 return -1; // timeout
jamesheavey 0:92b180c8d407 301 }
jamesheavey 0:92b180c8d407 302 int SDFileSystem::_cmdx(int cmd, int arg) {
jamesheavey 0:92b180c8d407 303 _cs = 0;
jamesheavey 0:92b180c8d407 304
jamesheavey 0:92b180c8d407 305 // send a command
jamesheavey 0:92b180c8d407 306 _spi.write(0x40 | cmd);
jamesheavey 0:92b180c8d407 307 _spi.write(arg >> 24);
jamesheavey 0:92b180c8d407 308 _spi.write(arg >> 16);
jamesheavey 0:92b180c8d407 309 _spi.write(arg >> 8);
jamesheavey 0:92b180c8d407 310 _spi.write(arg >> 0);
jamesheavey 0:92b180c8d407 311 _spi.write(0x95);
jamesheavey 0:92b180c8d407 312
jamesheavey 0:92b180c8d407 313 // wait for the repsonse (response[7] == 0)
jamesheavey 0:92b180c8d407 314 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
jamesheavey 0:92b180c8d407 315 int response = _spi.write(0xFF);
jamesheavey 0:92b180c8d407 316 if (!(response & 0x80)) {
jamesheavey 0:92b180c8d407 317 return response;
jamesheavey 0:92b180c8d407 318 }
jamesheavey 0:92b180c8d407 319 }
jamesheavey 0:92b180c8d407 320 _cs = 1;
jamesheavey 0:92b180c8d407 321 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 322 return -1; // timeout
jamesheavey 0:92b180c8d407 323 }
jamesheavey 0:92b180c8d407 324
jamesheavey 0:92b180c8d407 325
jamesheavey 0:92b180c8d407 326 int SDFileSystem::_cmd58() {
jamesheavey 0:92b180c8d407 327 _cs = 0;
jamesheavey 0:92b180c8d407 328 int arg = 0;
jamesheavey 0:92b180c8d407 329
jamesheavey 0:92b180c8d407 330 // send a command
jamesheavey 0:92b180c8d407 331 _spi.write(0x40 | 58);
jamesheavey 0:92b180c8d407 332 _spi.write(arg >> 24);
jamesheavey 0:92b180c8d407 333 _spi.write(arg >> 16);
jamesheavey 0:92b180c8d407 334 _spi.write(arg >> 8);
jamesheavey 0:92b180c8d407 335 _spi.write(arg >> 0);
jamesheavey 0:92b180c8d407 336 _spi.write(0x95);
jamesheavey 0:92b180c8d407 337
jamesheavey 0:92b180c8d407 338 // wait for the repsonse (response[7] == 0)
jamesheavey 0:92b180c8d407 339 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
jamesheavey 0:92b180c8d407 340 int response = _spi.write(0xFF);
jamesheavey 0:92b180c8d407 341 if (!(response & 0x80)) {
jamesheavey 0:92b180c8d407 342 int ocr = _spi.write(0xFF) << 24;
jamesheavey 0:92b180c8d407 343 ocr |= _spi.write(0xFF) << 16;
jamesheavey 0:92b180c8d407 344 ocr |= _spi.write(0xFF) << 8;
jamesheavey 0:92b180c8d407 345 ocr |= _spi.write(0xFF) << 0;
jamesheavey 0:92b180c8d407 346 _cs = 1;
jamesheavey 0:92b180c8d407 347 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 348 return response;
jamesheavey 0:92b180c8d407 349 }
jamesheavey 0:92b180c8d407 350 }
jamesheavey 0:92b180c8d407 351 _cs = 1;
jamesheavey 0:92b180c8d407 352 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 353 return -1; // timeout
jamesheavey 0:92b180c8d407 354 }
jamesheavey 0:92b180c8d407 355
jamesheavey 0:92b180c8d407 356 int SDFileSystem::_cmd8() {
jamesheavey 0:92b180c8d407 357 _cs = 0;
jamesheavey 0:92b180c8d407 358
jamesheavey 0:92b180c8d407 359 // send a command
jamesheavey 0:92b180c8d407 360 _spi.write(0x40 | 8); // CMD8
jamesheavey 0:92b180c8d407 361 _spi.write(0x00); // reserved
jamesheavey 0:92b180c8d407 362 _spi.write(0x00); // reserved
jamesheavey 0:92b180c8d407 363 _spi.write(0x01); // 3.3v
jamesheavey 0:92b180c8d407 364 _spi.write(0xAA); // check pattern
jamesheavey 0:92b180c8d407 365 _spi.write(0x87); // crc
jamesheavey 0:92b180c8d407 366
jamesheavey 0:92b180c8d407 367 // wait for the repsonse (response[7] == 0)
jamesheavey 0:92b180c8d407 368 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
jamesheavey 0:92b180c8d407 369 char response[5];
jamesheavey 0:92b180c8d407 370 response[0] = _spi.write(0xFF);
jamesheavey 0:92b180c8d407 371 if (!(response[0] & 0x80)) {
jamesheavey 0:92b180c8d407 372 for (int j = 1; j < 5; j++) {
jamesheavey 0:92b180c8d407 373 response[i] = _spi.write(0xFF);
jamesheavey 0:92b180c8d407 374 }
jamesheavey 0:92b180c8d407 375 _cs = 1;
jamesheavey 0:92b180c8d407 376 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 377 return response[0];
jamesheavey 0:92b180c8d407 378 }
jamesheavey 0:92b180c8d407 379 }
jamesheavey 0:92b180c8d407 380 _cs = 1;
jamesheavey 0:92b180c8d407 381 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 382 return -1; // timeout
jamesheavey 0:92b180c8d407 383 }
jamesheavey 0:92b180c8d407 384
jamesheavey 0:92b180c8d407 385 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
jamesheavey 0:92b180c8d407 386 _cs = 0;
jamesheavey 0:92b180c8d407 387
jamesheavey 0:92b180c8d407 388 // read until start byte (0xFF)
jamesheavey 0:92b180c8d407 389 while (_spi.write(0xFF) != 0xFE);
jamesheavey 0:92b180c8d407 390
jamesheavey 0:92b180c8d407 391 // read data
jamesheavey 0:92b180c8d407 392 for (uint32_t i = 0; i < length; i++) {
jamesheavey 0:92b180c8d407 393 buffer[i] = _spi.write(0xFF);
jamesheavey 0:92b180c8d407 394 }
jamesheavey 0:92b180c8d407 395 _spi.write(0xFF); // checksum
jamesheavey 0:92b180c8d407 396 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 397
jamesheavey 0:92b180c8d407 398 _cs = 1;
jamesheavey 0:92b180c8d407 399 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 400 return 0;
jamesheavey 0:92b180c8d407 401 }
jamesheavey 0:92b180c8d407 402
jamesheavey 0:92b180c8d407 403 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
jamesheavey 0:92b180c8d407 404 _cs = 0;
jamesheavey 0:92b180c8d407 405
jamesheavey 0:92b180c8d407 406 // indicate start of block
jamesheavey 0:92b180c8d407 407 _spi.write(0xFE);
jamesheavey 0:92b180c8d407 408
jamesheavey 0:92b180c8d407 409 // write the data
jamesheavey 0:92b180c8d407 410 for (uint32_t i = 0; i < length; i++) {
jamesheavey 0:92b180c8d407 411 _spi.write(buffer[i]);
jamesheavey 0:92b180c8d407 412 }
jamesheavey 0:92b180c8d407 413
jamesheavey 0:92b180c8d407 414 // write the checksum
jamesheavey 0:92b180c8d407 415 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 416 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 417
jamesheavey 0:92b180c8d407 418 // check the response token
jamesheavey 0:92b180c8d407 419 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
jamesheavey 0:92b180c8d407 420 _cs = 1;
jamesheavey 0:92b180c8d407 421 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 422 return 1;
jamesheavey 0:92b180c8d407 423 }
jamesheavey 0:92b180c8d407 424
jamesheavey 0:92b180c8d407 425 // wait for write to finish
jamesheavey 0:92b180c8d407 426 while (_spi.write(0xFF) == 0);
jamesheavey 0:92b180c8d407 427
jamesheavey 0:92b180c8d407 428 _cs = 1;
jamesheavey 0:92b180c8d407 429 _spi.write(0xFF);
jamesheavey 0:92b180c8d407 430 return 0;
jamesheavey 0:92b180c8d407 431 }
jamesheavey 0:92b180c8d407 432
jamesheavey 0:92b180c8d407 433 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
jamesheavey 0:92b180c8d407 434 uint32_t bits = 0;
jamesheavey 0:92b180c8d407 435 uint32_t size = 1 + msb - lsb;
jamesheavey 0:92b180c8d407 436 for (uint32_t i = 0; i < size; i++) {
jamesheavey 0:92b180c8d407 437 uint32_t position = lsb + i;
jamesheavey 0:92b180c8d407 438 uint32_t byte = 15 - (position >> 3);
jamesheavey 0:92b180c8d407 439 uint32_t bit = position & 0x7;
jamesheavey 0:92b180c8d407 440 uint32_t value = (data[byte] >> bit) & 1;
jamesheavey 0:92b180c8d407 441 bits |= value << i;
jamesheavey 0:92b180c8d407 442 }
jamesheavey 0:92b180c8d407 443 return bits;
jamesheavey 0:92b180c8d407 444 }
jamesheavey 0:92b180c8d407 445
jamesheavey 0:92b180c8d407 446 uint32_t SDFileSystem::_sd_sectors() {
jamesheavey 0:92b180c8d407 447 uint32_t c_size, c_size_mult, read_bl_len;
jamesheavey 0:92b180c8d407 448 uint32_t block_len, mult, blocknr, capacity;
jamesheavey 0:92b180c8d407 449 uint32_t hc_c_size;
jamesheavey 0:92b180c8d407 450 uint32_t blocks;
jamesheavey 0:92b180c8d407 451
jamesheavey 0:92b180c8d407 452 // CMD9, Response R2 (R1 byte + 16-byte block read)
jamesheavey 0:92b180c8d407 453 if (_cmdx(9, 0) != 0) {
jamesheavey 0:92b180c8d407 454 debug("Didn't get a response from the disk\n");
jamesheavey 0:92b180c8d407 455 return 0;
jamesheavey 0:92b180c8d407 456 }
jamesheavey 0:92b180c8d407 457
jamesheavey 0:92b180c8d407 458 uint8_t csd[16];
jamesheavey 0:92b180c8d407 459 if (_read(csd, 16) != 0) {
jamesheavey 0:92b180c8d407 460 debug("Couldn't read csd response from disk\n");
jamesheavey 0:92b180c8d407 461 return 0;
jamesheavey 0:92b180c8d407 462 }
jamesheavey 0:92b180c8d407 463
jamesheavey 0:92b180c8d407 464 // csd_structure : csd[127:126]
jamesheavey 0:92b180c8d407 465 // c_size : csd[73:62]
jamesheavey 0:92b180c8d407 466 // c_size_mult : csd[49:47]
jamesheavey 0:92b180c8d407 467 // read_bl_len : csd[83:80] - the *maximum* read block length
jamesheavey 0:92b180c8d407 468
jamesheavey 0:92b180c8d407 469 int csd_structure = ext_bits(csd, 127, 126);
jamesheavey 0:92b180c8d407 470
jamesheavey 0:92b180c8d407 471 switch (csd_structure) {
jamesheavey 0:92b180c8d407 472 case 0:
jamesheavey 0:92b180c8d407 473 cdv = 512;
jamesheavey 0:92b180c8d407 474 c_size = ext_bits(csd, 73, 62);
jamesheavey 0:92b180c8d407 475 c_size_mult = ext_bits(csd, 49, 47);
jamesheavey 0:92b180c8d407 476 read_bl_len = ext_bits(csd, 83, 80);
jamesheavey 0:92b180c8d407 477
jamesheavey 0:92b180c8d407 478 block_len = 1 << read_bl_len;
jamesheavey 0:92b180c8d407 479 mult = 1 << (c_size_mult + 2);
jamesheavey 0:92b180c8d407 480 blocknr = (c_size + 1) * mult;
jamesheavey 0:92b180c8d407 481 capacity = blocknr * block_len;
jamesheavey 0:92b180c8d407 482 blocks = capacity / 512;
jamesheavey 0:92b180c8d407 483 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
jamesheavey 0:92b180c8d407 484 break;
jamesheavey 0:92b180c8d407 485
jamesheavey 0:92b180c8d407 486 case 1:
jamesheavey 0:92b180c8d407 487 cdv = 1;
jamesheavey 0:92b180c8d407 488 hc_c_size = ext_bits(csd, 63, 48);
jamesheavey 0:92b180c8d407 489 blocks = (hc_c_size+1)*1024;
jamesheavey 0:92b180c8d407 490 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
jamesheavey 0:92b180c8d407 491 break;
jamesheavey 0:92b180c8d407 492
jamesheavey 0:92b180c8d407 493 default:
jamesheavey 0:92b180c8d407 494 debug("CSD struct unsupported\r\n");
jamesheavey 0:92b180c8d407 495 return 0;
jamesheavey 0:92b180c8d407 496 };
jamesheavey 0:92b180c8d407 497 return blocks;
jamesheavey 0:92b180c8d407 498 }