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Dependents:   2doejemplo Labo_TRSE_Drone

Fork of mbed by mbed official

Committer:
emilmont
Date:
Wed Jan 16 12:56:34 2013 +0000
Revision:
55:d722ed6a4237
Parent:
54:71b101360fb9
Child:
59:0883845fe643
Include "sleep_api.h" in "mbed.h"
Add initial IAR toolchain support
LPC I2C: better handling of status
Add sleep mode support for the LPC1768
Correct GCC "__semihost" definition
Correct GCC "_isatty" retargeting

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 44:24d45a770a51 1 /* mbed Microcontroller Library
emilmont 54:71b101360fb9 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 44:24d45a770a51 3 *
emilmont 44:24d45a770a51 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
emilmont 44:24d45a770a51 5 * of this software and associated documentation files (the "Software"), to deal
emilmont 44:24d45a770a51 6 * in the Software without restriction, including without limitation the rights
emilmont 44:24d45a770a51 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
emilmont 44:24d45a770a51 8 * copies of the Software, and to permit persons to whom the Software is
emilmont 44:24d45a770a51 9 * furnished to do so, subject to the following conditions:
emilmont 44:24d45a770a51 10 *
emilmont 44:24d45a770a51 11 * The above copyright notice and this permission notice shall be included in
emilmont 44:24d45a770a51 12 * all copies or substantial portions of the Software.
emilmont 44:24d45a770a51 13 *
emilmont 44:24d45a770a51 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
emilmont 44:24d45a770a51 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
emilmont 44:24d45a770a51 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
emilmont 44:24d45a770a51 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
emilmont 44:24d45a770a51 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
emilmont 44:24d45a770a51 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
emilmont 44:24d45a770a51 20 * SOFTWARE.
emilmont 44:24d45a770a51 21 */
emilmont 44:24d45a770a51 22 #ifndef MBED_SPISLAVE_H
emilmont 44:24d45a770a51 23 #define MBED_SPISLAVE_H
emilmont 44:24d45a770a51 24
emilmont 44:24d45a770a51 25 #include "platform.h"
emilmont 44:24d45a770a51 26
emilmont 44:24d45a770a51 27 #if DEVICE_SPISLAVE
emilmont 44:24d45a770a51 28
emilmont 44:24d45a770a51 29 #include "spi_api.h"
emilmont 44:24d45a770a51 30
emilmont 44:24d45a770a51 31 namespace mbed {
emilmont 44:24d45a770a51 32
emilmont 44:24d45a770a51 33 /** A SPI slave, used for communicating with a SPI Master device
emilmont 44:24d45a770a51 34 *
emilmont 44:24d45a770a51 35 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
emilmont 44:24d45a770a51 36 *
emilmont 44:24d45a770a51 37 * Example:
emilmont 44:24d45a770a51 38 * @code
emilmont 44:24d45a770a51 39 * // Reply to a SPI master as slave
emilmont 44:24d45a770a51 40 *
emilmont 44:24d45a770a51 41 * #include "mbed.h"
emilmont 44:24d45a770a51 42 *
emilmont 44:24d45a770a51 43 * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
emilmont 44:24d45a770a51 44 *
emilmont 44:24d45a770a51 45 * int main() {
emilmont 44:24d45a770a51 46 * device.reply(0x00); // Prime SPI with first reply
emilmont 44:24d45a770a51 47 * while(1) {
emilmont 44:24d45a770a51 48 * if(device.receive()) {
emilmont 44:24d45a770a51 49 * int v = device.read(); // Read byte from master
emilmont 44:24d45a770a51 50 * v = (v + 1) % 0x100; // Add one to it, modulo 256
emilmont 44:24d45a770a51 51 * device.reply(v); // Make this the next reply
emilmont 44:24d45a770a51 52 * }
emilmont 44:24d45a770a51 53 * }
emilmont 44:24d45a770a51 54 * }
emilmont 44:24d45a770a51 55 * @endcode
emilmont 44:24d45a770a51 56 */
emilmont 44:24d45a770a51 57 class SPISlave {
emilmont 44:24d45a770a51 58
emilmont 44:24d45a770a51 59 public:
emilmont 44:24d45a770a51 60
emilmont 44:24d45a770a51 61 /** Create a SPI slave connected to the specified pins
emilmont 44:24d45a770a51 62 *
emilmont 44:24d45a770a51 63 * Pin Options:
emilmont 44:24d45a770a51 64 * (5, 6, 7i, 8) or (11, 12, 13, 14)
emilmont 44:24d45a770a51 65 *
emilmont 44:24d45a770a51 66 * mosi or miso can be specfied as NC if not used
emilmont 44:24d45a770a51 67 *
emilmont 44:24d45a770a51 68 * @param mosi SPI Master Out, Slave In pin
emilmont 44:24d45a770a51 69 * @param miso SPI Master In, Slave Out pin
emilmont 44:24d45a770a51 70 * @param sclk SPI Clock pin
emilmont 44:24d45a770a51 71 * @param ssel SPI chip select pin
emilmont 44:24d45a770a51 72 * @param name (optional) A string to identify the object
emilmont 44:24d45a770a51 73 */
emilmont 44:24d45a770a51 74 SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
emilmont 44:24d45a770a51 75
emilmont 44:24d45a770a51 76 /** Configure the data transmission format
emilmont 44:24d45a770a51 77 *
emilmont 44:24d45a770a51 78 * @param bits Number of bits per SPI frame (4 - 16)
emilmont 44:24d45a770a51 79 * @param mode Clock polarity and phase mode (0 - 3)
emilmont 44:24d45a770a51 80 *
emilmont 44:24d45a770a51 81 * @code
emilmont 55:d722ed6a4237 82 * mode | POL PHA
emilmont 55:d722ed6a4237 83 * -----+--------
emilmont 55:d722ed6a4237 84 * 0 | 0 0
emilmont 44:24d45a770a51 85 * 1 | 0 1
emilmont 55:d722ed6a4237 86 * 2 | 1 0
emilmont 44:24d45a770a51 87 * 3 | 1 1
emilmont 44:24d45a770a51 88 * @endcode
emilmont 44:24d45a770a51 89 */
emilmont 44:24d45a770a51 90 void format(int bits, int mode = 0);
emilmont 44:24d45a770a51 91
emilmont 44:24d45a770a51 92 /** Set the spi bus clock frequency
emilmont 44:24d45a770a51 93 *
emilmont 44:24d45a770a51 94 * @param hz SCLK frequency in hz (default = 1MHz)
emilmont 44:24d45a770a51 95 */
emilmont 44:24d45a770a51 96 void frequency(int hz = 1000000);
emilmont 44:24d45a770a51 97
emilmont 44:24d45a770a51 98 /** Polls the SPI to see if data has been received
emilmont 44:24d45a770a51 99 *
emilmont 44:24d45a770a51 100 * @returns
emilmont 44:24d45a770a51 101 * 0 if no data,
emilmont 44:24d45a770a51 102 * 1 otherwise
emilmont 44:24d45a770a51 103 */
emilmont 44:24d45a770a51 104 int receive(void);
emilmont 44:24d45a770a51 105
emilmont 44:24d45a770a51 106 /** Retrieve data from receive buffer as slave
emilmont 44:24d45a770a51 107 *
emilmont 44:24d45a770a51 108 * @returns
emilmont 44:24d45a770a51 109 * the data in the receive buffer
emilmont 44:24d45a770a51 110 */
emilmont 44:24d45a770a51 111 int read(void);
emilmont 44:24d45a770a51 112
emilmont 44:24d45a770a51 113 /** Fill the transmission buffer with the value to be written out
emilmont 44:24d45a770a51 114 * as slave on the next received message from the master.
emilmont 44:24d45a770a51 115 *
emilmont 44:24d45a770a51 116 * @param value the data to be transmitted next
emilmont 44:24d45a770a51 117 */
emilmont 44:24d45a770a51 118 void reply(int value);
emilmont 44:24d45a770a51 119
emilmont 44:24d45a770a51 120 protected:
emilmont 44:24d45a770a51 121 spi_t _spi;
emilmont 55:d722ed6a4237 122
emilmont 44:24d45a770a51 123 int _bits;
emilmont 44:24d45a770a51 124 int _mode;
emilmont 44:24d45a770a51 125 int _hz;
emilmont 44:24d45a770a51 126 };
emilmont 44:24d45a770a51 127
emilmont 44:24d45a770a51 128 } // namespace mbed
emilmont 44:24d45a770a51 129
emilmont 44:24d45a770a51 130 #endif
emilmont 44:24d45a770a51 131
emilmont 44:24d45a770a51 132 #endif