mbed library sources

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Fork of mbed-src by mbed official

Committer:
jaerts
Date:
Tue Dec 22 13:22:16 2015 +0000
Revision:
637:ed69428d4850
Parent:
514:7668256dbe61
Add very shady LPC1768 CAN Filter implementation

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 514:7668256dbe61 1 /*******************************************************************************
mbed_official 514:7668256dbe61 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
mbed_official 514:7668256dbe61 3 *
mbed_official 514:7668256dbe61 4 * Permission is hereby granted, free of charge, to any person obtaining a
mbed_official 514:7668256dbe61 5 * copy of this software and associated documentation files (the "Software"),
mbed_official 514:7668256dbe61 6 * to deal in the Software without restriction, including without limitation
mbed_official 514:7668256dbe61 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
mbed_official 514:7668256dbe61 8 * and/or sell copies of the Software, and to permit persons to whom the
mbed_official 514:7668256dbe61 9 * Software is furnished to do so, subject to the following conditions:
mbed_official 514:7668256dbe61 10 *
mbed_official 514:7668256dbe61 11 * The above copyright notice and this permission notice shall be included
mbed_official 514:7668256dbe61 12 * in all copies or substantial portions of the Software.
mbed_official 514:7668256dbe61 13 *
mbed_official 514:7668256dbe61 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
mbed_official 514:7668256dbe61 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
mbed_official 514:7668256dbe61 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
mbed_official 514:7668256dbe61 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
mbed_official 514:7668256dbe61 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
mbed_official 514:7668256dbe61 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
mbed_official 514:7668256dbe61 20 * OTHER DEALINGS IN THE SOFTWARE.
mbed_official 514:7668256dbe61 21 *
mbed_official 514:7668256dbe61 22 * Except as contained in this notice, the name of Maxim Integrated
mbed_official 514:7668256dbe61 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
mbed_official 514:7668256dbe61 24 * Products, Inc. Branding Policy.
mbed_official 514:7668256dbe61 25 *
mbed_official 514:7668256dbe61 26 * The mere transfer of this software does not imply any licenses
mbed_official 514:7668256dbe61 27 * of trade secrets, proprietary technology, copyrights, patents,
mbed_official 514:7668256dbe61 28 * trademarks, maskwork rights, or any other form of intellectual
mbed_official 514:7668256dbe61 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
mbed_official 514:7668256dbe61 30 * ownership rights.
mbed_official 514:7668256dbe61 31 *******************************************************************************
mbed_official 514:7668256dbe61 32 */
mbed_official 514:7668256dbe61 33
mbed_official 514:7668256dbe61 34 #ifndef _MAX32600_H_
mbed_official 514:7668256dbe61 35 #define _MAX32600_H_
mbed_official 514:7668256dbe61 36
mbed_official 514:7668256dbe61 37 #include <stdint.h>
mbed_official 514:7668256dbe61 38
mbed_official 514:7668256dbe61 39 typedef enum IRQn_Type {
mbed_official 514:7668256dbe61 40 NonMaskableInt_IRQn = -14,
mbed_official 514:7668256dbe61 41 HardFault_IRQn = -13,
mbed_official 514:7668256dbe61 42 MemoryManagement_IRQn = -12,
mbed_official 514:7668256dbe61 43 BusFault_IRQn = -11,
mbed_official 514:7668256dbe61 44 UsageFault_IRQn = -10,
mbed_official 514:7668256dbe61 45 SVCall_IRQn = -5,
mbed_official 514:7668256dbe61 46 DebugMonitor_IRQn = -4,
mbed_official 514:7668256dbe61 47 PendSV_IRQn = -2,
mbed_official 514:7668256dbe61 48 SysTick_IRQn = -1,
mbed_official 514:7668256dbe61 49
mbed_official 514:7668256dbe61 50 /* Externals interrupts */
mbed_official 514:7668256dbe61 51 UART0_IRQn = 0, /* 16:01 UART0 */
mbed_official 514:7668256dbe61 52 UART1_IRQn, /* 17: 2 UART1 */
mbed_official 514:7668256dbe61 53 I2CM0_IRQn, /* 18: 3 I2C Master 0 */
mbed_official 514:7668256dbe61 54 I2CS_IRQn, /* 19: 4 I2C Slave */
mbed_official 514:7668256dbe61 55 USB_IRQn, /* 20: 5 USB */
mbed_official 514:7668256dbe61 56 PMU_IRQn, /* 21: 6 DMA */
mbed_official 514:7668256dbe61 57 AFE_IRQn, /* 22: 7 AFE */
mbed_official 514:7668256dbe61 58 MAA_IRQn, /* 23: 8 MAA */
mbed_official 514:7668256dbe61 59 AES_IRQn, /* 24: 9 AES */
mbed_official 514:7668256dbe61 60 SPI0_IRQn, /* 25:10 SPI0 */
mbed_official 514:7668256dbe61 61 SPI1_IRQn, /* 26:11 SPI1 */
mbed_official 514:7668256dbe61 62 SPI2_IRQn, /* 27:12 SPI2 */
mbed_official 514:7668256dbe61 63 TMR0_IRQn, /* 28:13 Timer32-0 */
mbed_official 514:7668256dbe61 64 TMR1_IRQn, /* 29:14 Timer32-1 */
mbed_official 514:7668256dbe61 65 TMR2_IRQn, /* 30:15 Timer32-1 */
mbed_official 514:7668256dbe61 66 TMR3_IRQn, /* 31:16 Timer32-2 */
mbed_official 514:7668256dbe61 67 RSVD0_IRQn, /* 32:17 RSVD */
mbed_official 514:7668256dbe61 68 RSVD1_IRQn, /* 33:18 RSVD */
mbed_official 514:7668256dbe61 69 DAC0_IRQn, /* 34:19 DAC0 (12-bit DAC) */
mbed_official 514:7668256dbe61 70 DAC1_IRQn, /* 35:20 DAC1 (12-bit DAC) */
mbed_official 514:7668256dbe61 71 DAC2_IRQn, /* 36:21 DAC2 (8-bit DAC) */
mbed_official 514:7668256dbe61 72 DAC3_IRQn, /* 37:22 DAC3 (8-bit DAC) */
mbed_official 514:7668256dbe61 73 ADC_IRQn, /* 38:23 ADC */
mbed_official 514:7668256dbe61 74 FLC_IRQn, /* 39:24 Flash Controller */
mbed_official 514:7668256dbe61 75 PWRMAN_IRQn, /* 40:25 PWRMAN */
mbed_official 514:7668256dbe61 76 CLKMAN_IRQn, /* 41:26 CLKMAN */
mbed_official 514:7668256dbe61 77 RTC0_IRQn, /* 42:27 RTC INT0 */
mbed_official 514:7668256dbe61 78 RTC1_IRQn, /* 43:28 RTC INT1 */
mbed_official 514:7668256dbe61 79 RTC2_IRQn, /* 44:29 RTC INT2 */
mbed_official 514:7668256dbe61 80 RTC3_IRQn, /* 45:30 RTC INT3 */
mbed_official 514:7668256dbe61 81 WDT0_IRQn, /* 46:31 WATCHDOG0 */
mbed_official 514:7668256dbe61 82 WDT0_P_IRQn, /* 47:32 WATCHDOG0 PRE-WINDOW */
mbed_official 514:7668256dbe61 83 WDT1_IRQn, /* 48:33 WATCHDOG1 */
mbed_official 514:7668256dbe61 84 WDT1_P_IRQn, /* 49:34 WATCHDOG1 PRE-WINDOW */
mbed_official 514:7668256dbe61 85 GPIO_P0_IRQn, /* 50:35 GPIO Port 0 */
mbed_official 514:7668256dbe61 86 GPIO_P1_IRQn, /* 51:36 GPIO Port 1 */
mbed_official 514:7668256dbe61 87 GPIO_P2_IRQn, /* 52:37 GPIO Port 2 */
mbed_official 514:7668256dbe61 88 GPIO_P3_IRQn, /* 53:38 GPIO Port 3 */
mbed_official 514:7668256dbe61 89 GPIO_P4_IRQn, /* 54:39 GPIO Port 4 */
mbed_official 514:7668256dbe61 90 GPIO_P5_IRQn, /* 55:40 GPIO Port 5 */
mbed_official 514:7668256dbe61 91 GPIO_P6_IRQn, /* 56:41 GPIO Port 6 */
mbed_official 514:7668256dbe61 92 GPIO_P7_IRQn, /* 57:42 GPIO Port 7 */
mbed_official 514:7668256dbe61 93 TMR16_0_IRQn, /* 58:43 Timer16-s0 */
mbed_official 514:7668256dbe61 94 TMR16_1_IRQn, /* 59:44 Timer16-s1 */
mbed_official 514:7668256dbe61 95 TMR16_2_IRQn, /* 60:45 Timer16-s2 */
mbed_official 514:7668256dbe61 96 TMR16_3_IRQn, /* 61:46 Timer16-s3 */
mbed_official 514:7668256dbe61 97 I2CM1_IRQn, /* 62:47 I2C Master 1 */
mbed_official 514:7668256dbe61 98 MXC_IRQ_EXT_COUNT,
mbed_official 514:7668256dbe61 99 } IRQn_Type;
mbed_official 514:7668256dbe61 100
mbed_official 514:7668256dbe61 101 #define MXC_IRQ_COUNT (MXC_IRQ_EXT_COUNT + 16)
mbed_official 514:7668256dbe61 102
mbed_official 514:7668256dbe61 103 /* ================================================================================ */
mbed_official 514:7668256dbe61 104 /* ================ Processor and Core Peripheral Section ================ */
mbed_official 514:7668256dbe61 105 /* ================================================================================ */
mbed_official 514:7668256dbe61 106
mbed_official 514:7668256dbe61 107 #define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
mbed_official 514:7668256dbe61 108
mbed_official 514:7668256dbe61 109 #include <core_cm3.h> /* Processor and core peripherals */
mbed_official 514:7668256dbe61 110 #include "system_max32600.h" /* System Header */
mbed_official 514:7668256dbe61 111
mbed_official 514:7668256dbe61 112 /* ================================================================================ */
mbed_official 514:7668256dbe61 113 /* ================== Device Specific Memory Section ================== */
mbed_official 514:7668256dbe61 114 /* ================================================================================ */
mbed_official 514:7668256dbe61 115
mbed_official 514:7668256dbe61 116 #define MXC_FLASH_MEM_BASE 0x00000000UL
mbed_official 514:7668256dbe61 117 #define MXC_FLASH_PAGE_SIZE 0x1000 // 256 x 128b = 4KB
mbed_official 514:7668256dbe61 118 #define MXC_FLASH_MEM_SIZE 0x00040000UL
mbed_official 514:7668256dbe61 119 #define MXC_SYS_MEM_BASE 0x20000000UL
mbed_official 514:7668256dbe61 120
mbed_official 514:7668256dbe61 121 /* ================================================================================ */
mbed_official 514:7668256dbe61 122 /* ================ Device Specific Peripheral Section ================ */
mbed_official 514:7668256dbe61 123 /* ================================================================================ */
mbed_official 514:7668256dbe61 124
mbed_official 514:7668256dbe61 125 /*******************************************************************************/
mbed_official 514:7668256dbe61 126 /* General Purpose I/O Ports (GPIO) */
mbed_official 514:7668256dbe61 127
mbed_official 514:7668256dbe61 128 #define MXC_BASE_GPIO ((uint32_t)0x40000000UL)
mbed_official 514:7668256dbe61 129 #define MXC_GPIO ((mxc_gpio_regs_t *)MXC_BASE_GPIO)
mbed_official 514:7668256dbe61 130 #define MXC_BASE_GPIO_BITBAND ((uint32_t)0x42000000UL)
mbed_official 514:7668256dbe61 131
mbed_official 514:7668256dbe61 132 #define MXC_GPIO_GET_IRQ(i) (((unsigned int)i) + GPIO_P0_IRQn)
mbed_official 514:7668256dbe61 133
mbed_official 514:7668256dbe61 134
mbed_official 514:7668256dbe61 135 /*******************************************************************************/
mbed_official 514:7668256dbe61 136 /* Pulse Train Generation */
mbed_official 514:7668256dbe61 137
mbed_official 514:7668256dbe61 138 #define MXC_CFG_PT_INSTANCES (13)
mbed_official 514:7668256dbe61 139
mbed_official 514:7668256dbe61 140 #define MXC_BASE_PTG ((uint32_t)0x40001000UL)
mbed_official 514:7668256dbe61 141 #define MXC_PTG ((mxc_ptg_regs_t *)MXC_BASE_PTG)
mbed_official 514:7668256dbe61 142 #define MXC_BASE_PT ((uint32_t)0x40001008UL)
mbed_official 514:7668256dbe61 143 #define MXC_PT ((mxc_pt_regs_t *)MXC_BASE_PT)
mbed_official 514:7668256dbe61 144 #define MXC_BASE_PT0 ((uint32_t)0x40001008UL)
mbed_official 514:7668256dbe61 145 #define MXC_PT0 ((mxc_pt_regs_t *)MXC_BASE_PT0)
mbed_official 514:7668256dbe61 146 #define MXC_BASE_PT1 ((uint32_t)0x40001010UL)
mbed_official 514:7668256dbe61 147 #define MXC_PT1 ((mxc_pt_regs_t *)MXC_BASE_PT1)
mbed_official 514:7668256dbe61 148 #define MXC_BASE_PT2 ((uint32_t)0x40001018UL)
mbed_official 514:7668256dbe61 149 #define MXC_PT2 ((mxc_pt_regs_t *)MXC_BASE_PT2)
mbed_official 514:7668256dbe61 150 #define MXC_BASE_PT3 ((uint32_t)0x40001020UL)
mbed_official 514:7668256dbe61 151 #define MXC_PT3 ((mxc_pt_regs_t *)MXC_BASE_PT3)
mbed_official 514:7668256dbe61 152 #define MXC_BASE_PT4 ((uint32_t)0x40001028UL)
mbed_official 514:7668256dbe61 153 #define MXC_PT4 ((mxc_pt_regs_t *)MXC_BASE_PT4)
mbed_official 514:7668256dbe61 154 #define MXC_BASE_PT5 ((uint32_t)0x40001030UL)
mbed_official 514:7668256dbe61 155 #define MXC_PT5 ((mxc_pt_regs_t *)MXC_BASE_PT5)
mbed_official 514:7668256dbe61 156 #define MXC_BASE_PT6 ((uint32_t)0x40001038UL)
mbed_official 514:7668256dbe61 157 #define MXC_PT6 ((mxc_pt_regs_t *)MXC_BASE_PT6)
mbed_official 514:7668256dbe61 158 #define MXC_BASE_PT7 ((uint32_t)0x40001040UL)
mbed_official 514:7668256dbe61 159 #define MXC_PT7 ((mxc_pt_regs_t *)MXC_BASE_PT7)
mbed_official 514:7668256dbe61 160 #define MXC_BASE_PT8 ((uint32_t)0x40001048UL)
mbed_official 514:7668256dbe61 161 #define MXC_PT8 ((mxc_pt_regs_t *)MXC_BASE_PT8)
mbed_official 514:7668256dbe61 162 #define MXC_BASE_PT9 ((uint32_t)0x40001050UL)
mbed_official 514:7668256dbe61 163 #define MXC_PT9 ((mxc_pt_regs_t *)MXC_BASE_PT9)
mbed_official 514:7668256dbe61 164 #define MXC_BASE_PT10 ((uint32_t)0x40001058UL)
mbed_official 514:7668256dbe61 165 #define MXC_PT10 ((mxc_pt_regs_t *)MXC_BASE_PT10)
mbed_official 514:7668256dbe61 166 #define MXC_BASE_PT11 ((uint32_t)0x40001060UL)
mbed_official 514:7668256dbe61 167 #define MXC_PT11 ((mxc_pt_regs_t *)MXC_BASE_PT11)
mbed_official 514:7668256dbe61 168
mbed_official 514:7668256dbe61 169 /* PT12, PT13, PT14 are not used */
mbed_official 514:7668256dbe61 170
mbed_official 514:7668256dbe61 171 /*******************************************************************************/
mbed_official 514:7668256dbe61 172 /* CRC-16/CRC-32 Engine */
mbed_official 514:7668256dbe61 173
mbed_official 514:7668256dbe61 174 #define MXC_BASE_CRC ((uint32_t)0x40010000UL)
mbed_official 514:7668256dbe61 175 #define MXC_CRC_REGS ((mxc_crc_regs_t *)MXC_BASE_CRC)
mbed_official 514:7668256dbe61 176
mbed_official 514:7668256dbe61 177 #define MXC_BASE_CRC_DATA ((uint32_t)0x4010B000UL)
mbed_official 514:7668256dbe61 178 #define MXC_CRC_DATA ((mxc_crc_data_regs_t *)MXC_BASE_CRC_DATA)
mbed_official 514:7668256dbe61 179
mbed_official 514:7668256dbe61 180 /*******************************************************************************/
mbed_official 514:7668256dbe61 181 /* Trust Protection Unit (TPU) */
mbed_official 514:7668256dbe61 182
mbed_official 514:7668256dbe61 183 #define MXC_BASE_TPU ((uint32_t)0x40011000UL)
mbed_official 514:7668256dbe61 184 #define MXC_TPU ((mxc_tpu_regs_t *)MXC_BASE_TPU)
mbed_official 514:7668256dbe61 185
mbed_official 514:7668256dbe61 186 #define MXC_BASE_TPU_TSR ((uint32_t)0x40011C00UL)
mbed_official 514:7668256dbe61 187 #define MXC_TPU_TSR ((mxc_tpu_tsr_regs_t *)MXC_BASE_TPU_TSR)
mbed_official 514:7668256dbe61 188
mbed_official 514:7668256dbe61 189 /*******************************************************************************/
mbed_official 514:7668256dbe61 190 /* AES Cryptographic Engine */
mbed_official 514:7668256dbe61 191
mbed_official 514:7668256dbe61 192 #define MXC_BASE_AES ((uint32_t)0x40011400UL)
mbed_official 514:7668256dbe61 193 #define MXC_AES ((mxc_aes_regs_t *)MXC_BASE_AES)
mbed_official 514:7668256dbe61 194
mbed_official 514:7668256dbe61 195 #define MXC_BASE_AES_MEM ((uint32_t)0x4010A000UL)
mbed_official 514:7668256dbe61 196 #define MXC_AES_MEM ((mxc_aes_mem_regs_t *)MXC_BASE_AES_MEM)
mbed_official 514:7668256dbe61 197
mbed_official 514:7668256dbe61 198
mbed_official 514:7668256dbe61 199 /*******************************************************************************/
mbed_official 514:7668256dbe61 200 /* MAA Cryptographic Engine */
mbed_official 514:7668256dbe61 201
mbed_official 514:7668256dbe61 202 #define MXC_BASE_MAA ((uint32_t)0x40011800UL)
mbed_official 514:7668256dbe61 203 #define MXC_MAA ((mxc_maa_regs_t *)MXC_BASE_MAA)
mbed_official 514:7668256dbe61 204
mbed_official 514:7668256dbe61 205 #define MXC_BASE_MAA_MEM ((uint32_t)0x4010A800UL)
mbed_official 514:7668256dbe61 206 #define MXC_MAA_MEM ((mxc_maa_mem_regs_t *)MXC_BASE_MAA_MEM)
mbed_official 514:7668256dbe61 207
mbed_official 514:7668256dbe61 208 /*******************************************************************************/
mbed_official 514:7668256dbe61 209 /* 32-Bit PWM Timer/Counter */
mbed_official 514:7668256dbe61 210
mbed_official 514:7668256dbe61 211 #define MXC_CFG_TMR_INSTANCES (4)
mbed_official 514:7668256dbe61 212
mbed_official 514:7668256dbe61 213 #define MXC_BASE_TMR0 ((uint32_t)0x40012000UL)
mbed_official 514:7668256dbe61 214 #define MXC_BASE_TMR0_BITBAND ((uint32_t)0x42240000UL)
mbed_official 514:7668256dbe61 215 #define MXC_TMR0 ((mxc_tmr_regs_t *) MXC_BASE_TMR0)
mbed_official 514:7668256dbe61 216
mbed_official 514:7668256dbe61 217 #define MXC_BASE_TMR1 ((uint32_t)0x40013000UL)
mbed_official 514:7668256dbe61 218 #define MXC_BASE_TMR1_BITBAND ((uint32_t)0x42260000UL)
mbed_official 514:7668256dbe61 219 #define MXC_TMR1 ((mxc_tmr_regs_t *) MXC_BASE_TMR1)
mbed_official 514:7668256dbe61 220
mbed_official 514:7668256dbe61 221 #define MXC_BASE_TMR2 ((uint32_t)0x40014000UL)
mbed_official 514:7668256dbe61 222 #define MXC_BASE_TMR2_BITBAND ((uint32_t)0x42280000UL)
mbed_official 514:7668256dbe61 223 #define MXC_TMR2 ((mxc_tmr_regs_t *) MXC_BASE_TMR2)
mbed_official 514:7668256dbe61 224
mbed_official 514:7668256dbe61 225 #define MXC_BASE_TMR3 ((uint32_t)0x40015000UL)
mbed_official 514:7668256dbe61 226 #define MXC_BASE_TMR3_BITBAND ((uint32_t)0x422A0000UL)
mbed_official 514:7668256dbe61 227 #define MXC_TMR3 ((mxc_tmr_regs_t *) MXC_BASE_TMR3)
mbed_official 514:7668256dbe61 228
mbed_official 514:7668256dbe61 229
mbed_official 514:7668256dbe61 230 #define MXC_TMR_GET_IRQ_32(i) ((i) == 0 ? TMR0_IRQn : \
mbed_official 514:7668256dbe61 231 (i) == 1 ? TMR1_IRQn : \
mbed_official 514:7668256dbe61 232 (i) == 2 ? TMR2_IRQn : \
mbed_official 514:7668256dbe61 233 (i) == 3 ? TMR3_IRQn : 0)
mbed_official 514:7668256dbe61 234
mbed_official 514:7668256dbe61 235 #define MXC_TMR_GET_IRQ_16(i) ((i) == 0 ? TMR0_IRQn : \
mbed_official 514:7668256dbe61 236 (i) == 1 ? TMR1_IRQn : \
mbed_official 514:7668256dbe61 237 (i) == 2 ? TMR2_IRQn : \
mbed_official 514:7668256dbe61 238 (i) == 3 ? TMR3_IRQn : \
mbed_official 514:7668256dbe61 239 (i) == 4 ? TMR16_0_IRQn : \
mbed_official 514:7668256dbe61 240 (i) == 5 ? TMR16_1_IRQn : \
mbed_official 514:7668256dbe61 241 (i) == 6 ? TMR16_2_IRQn : \
mbed_official 514:7668256dbe61 242 (i) == 7 ? TMR16_3_IRQn : 0)
mbed_official 514:7668256dbe61 243
mbed_official 514:7668256dbe61 244 #define MXC_TMR_GET_BASE(i) ((i) == 0 ? MXC_BASE_TMR0 : \
mbed_official 514:7668256dbe61 245 (i) == 1 ? MXC_BASE_TMR1 : \
mbed_official 514:7668256dbe61 246 (i) == 2 ? MXC_BASE_TMR2 : \
mbed_official 514:7668256dbe61 247 (i) == 3 ? MXC_BASE_TMR3 : 0)
mbed_official 514:7668256dbe61 248
mbed_official 514:7668256dbe61 249 #define MXC_TMR_GET_TMR(i) ((i) == 0 ? MXC_TMR0 : \
mbed_official 514:7668256dbe61 250 (i) == 1 ? MXC_TMR1 : \
mbed_official 514:7668256dbe61 251 (i) == 2 ? MXC_TMR2 : \
mbed_official 514:7668256dbe61 252 (i) == 3 ? MXC_TMR3 : 0)
mbed_official 514:7668256dbe61 253 /*******************************************************************************/
mbed_official 514:7668256dbe61 254 /* Watchdog Timer */
mbed_official 514:7668256dbe61 255
mbed_official 514:7668256dbe61 256 #define MXC_CFG_WDT_INSTANCES (2)
mbed_official 514:7668256dbe61 257
mbed_official 514:7668256dbe61 258 #define MXC_BASE_WDT0 ((uint32_t)0x40021000UL)
mbed_official 514:7668256dbe61 259 #define MXC_BASE_WDT0_BITBAND ((uint32_t)0x42420000UL)
mbed_official 514:7668256dbe61 260 #define MXC_WDT0 ((mxc_wdt_regs_t *)MXC_BASE_WDT0)
mbed_official 514:7668256dbe61 261
mbed_official 514:7668256dbe61 262 #define MXC_BASE_WDT1 ((uint32_t)0x40022000UL)
mbed_official 514:7668256dbe61 263 #define MXC_BASE_WDT1_BITBAND ((uint32_t)0x42440000UL)
mbed_official 514:7668256dbe61 264 #define MXC_WDT1 ((mxc_wdt_regs_t *)MXC_BASE_WDT1)
mbed_official 514:7668256dbe61 265
mbed_official 514:7668256dbe61 266 #define MXC_WDT_GET_IRQ(i) ((i) == 0 ? WDT0_IRQn : \
mbed_official 514:7668256dbe61 267 (i) == 1 ? WDT1_IRQn : 0)
mbed_official 514:7668256dbe61 268
mbed_official 514:7668256dbe61 269 #define MXC_WDT_GET_IRQ_P(i) ((i) == 0 ? WDT0_P_IRQn : \
mbed_official 514:7668256dbe61 270 (i) == 1 ? WDT1_P_IRQn : 0)
mbed_official 514:7668256dbe61 271
mbed_official 514:7668256dbe61 272 #define MXC_WDT_GET_BASE(i) ((i) == 0 ? MXC_BASE_WDT0 : \
mbed_official 514:7668256dbe61 273 (i) == 1 ? MXC_BASE_WDT1 : 0)
mbed_official 514:7668256dbe61 274
mbed_official 514:7668256dbe61 275 #define MXC_WDT_GET_WDT(i) ((i) == 0 ? MXC_WDT0 : \
mbed_official 514:7668256dbe61 276 (i) == 1 ? MXC_WDT1 : 0)
mbed_official 514:7668256dbe61 277
mbed_official 514:7668256dbe61 278 /*******************************************************************************/
mbed_official 514:7668256dbe61 279 /* SPI Interface */
mbed_official 514:7668256dbe61 280
mbed_official 514:7668256dbe61 281 #define MXC_CFG_SPI_INSTANCES (3)
mbed_official 514:7668256dbe61 282 #define MXC_CFG_SPI_FIFO_DEPTH (16)
mbed_official 514:7668256dbe61 283
mbed_official 514:7668256dbe61 284 #define MXC_BASE_SPI0 ((uint32_t)0x40030000UL)
mbed_official 514:7668256dbe61 285 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)
mbed_official 514:7668256dbe61 286
mbed_official 514:7668256dbe61 287 #define MXC_BASE_SPI0_TXFIFO ((uint32_t)0x40100000UL)
mbed_official 514:7668256dbe61 288 #define MXC_SPI0_TXFIFO ((mxc_spi_txfifo_regs_t *)MXC_BASE_SPI0_TXFIFO)
mbed_official 514:7668256dbe61 289 #define MXC_BASE_SPI0_RXFIFO ((uint32_t)0x40100800UL)
mbed_official 514:7668256dbe61 290 #define MXC_SPI0_RXFIFO ((mxc_spi_rxfifo_regs_t *)MXC_BASE_SPI0_RXFIFO)
mbed_official 514:7668256dbe61 291
mbed_official 514:7668256dbe61 292 #define MXC_BASE_SPI1 ((uint32_t)0x40031000UL)
mbed_official 514:7668256dbe61 293 #define MXC_SPI1 ((mxc_spi_regs_t *)MXC_BASE_SPI1)
mbed_official 514:7668256dbe61 294
mbed_official 514:7668256dbe61 295 #define MXC_BASE_SPI1_TXFIFO ((uint32_t)0x40101000UL)
mbed_official 514:7668256dbe61 296 #define MXC_SPI1_TXFIFO ((mxc_spi_txfifo_regs_t *)MXC_BASE_SPI1_TXFIFO)
mbed_official 514:7668256dbe61 297 #define MXC_BASE_SPI1_RXFIFO ((uint32_t)0x40101800UL)
mbed_official 514:7668256dbe61 298 #define MXC_SPI1_RXFIFO ((mxc_spi_rxfifo_regs_t *)MXC_BASE_SPI1_RXFIFO)
mbed_official 514:7668256dbe61 299
mbed_official 514:7668256dbe61 300 #define MXC_BASE_SPI2 ((uint32_t)0x40032000UL)
mbed_official 514:7668256dbe61 301 #define MXC_SPI2 ((mxc_spi_regs_t *)MXC_BASE_SPI2)
mbed_official 514:7668256dbe61 302
mbed_official 514:7668256dbe61 303 #define MXC_BASE_SPI2_TXFIFO ((uint32_t)0x40102000UL)
mbed_official 514:7668256dbe61 304 #define MXC_SPI2_TXFIFO ((mxc_spi_txfifo_regs_t *)MXC_BASE_SPI2_TXFIFO)
mbed_official 514:7668256dbe61 305 #define MXC_BASE_SPI2_RXFIFO ((uint32_t)0x40102800UL)
mbed_official 514:7668256dbe61 306 #define MXC_SPI2_RXFIFO ((mxc_spi_rxfifo_regs_t *)MXC_BASE_SPI2_RXFIFO)
mbed_official 514:7668256dbe61 307
mbed_official 514:7668256dbe61 308
mbed_official 514:7668256dbe61 309 #define MXC_SPI_GET_IRQ(i) ((i) == 0 ? SPI0_IRQn : \
mbed_official 514:7668256dbe61 310 (i) == 1 ? SPI1_IRQn : \
mbed_official 514:7668256dbe61 311 (i) == 2 ? SPI2_IRQn : 0)
mbed_official 514:7668256dbe61 312
mbed_official 514:7668256dbe61 313 #define MXC_SPI_GET_BASE(i) ((i) == 0 ? MXC_BASE_SPI0 : \
mbed_official 514:7668256dbe61 314 (i) == 1 ? MXC_BASE_SPI1 : \
mbed_official 514:7668256dbe61 315 (i) == 2 ? MXC_BASE_SPI2 : 0)
mbed_official 514:7668256dbe61 316
mbed_official 514:7668256dbe61 317 #define MXC_SPI_GET_SPI(i) ((i) == 0 ? MXC_SPI0 : \
mbed_official 514:7668256dbe61 318 (i) == 1 ? MXC_SPI1 : \
mbed_official 514:7668256dbe61 319 (i) == 2 ? MXC_SPI2 : 0)
mbed_official 514:7668256dbe61 320
mbed_official 514:7668256dbe61 321 #define MXC_SPI_GET_RXFIFO(i) ((i) == 0 ? MXC_SPI0_RXFIFO : \
mbed_official 514:7668256dbe61 322 (i) == 1 ? MXC_SPI1_RXFIFO : \
mbed_official 514:7668256dbe61 323 (i) == 2 ? MXC_SPI2_RXFIFO : 0)
mbed_official 514:7668256dbe61 324
mbed_official 514:7668256dbe61 325 #define MXC_SPI_GET_TXFIFO(i) ((i) == 0 ? MXC_SPI0_TXFIFO : \
mbed_official 514:7668256dbe61 326 (i) == 1 ? MXC_SPI1_TXFIFO : \
mbed_official 514:7668256dbe61 327 (i) == 2 ? MXC_SPI2_TXFIFO : 0)
mbed_official 514:7668256dbe61 328
mbed_official 514:7668256dbe61 329 #define MXC_SPI_INSTANCE_TO_BASE(instance) (((uint32_t)(instance) << 12) + MXC_BASE_SPI0)
mbed_official 514:7668256dbe61 330 #define MXC_SPI_BASE_TO_INSTANCE(base) (((uint32_t)(base) & 0x00003000) >> 12)
mbed_official 514:7668256dbe61 331
mbed_official 514:7668256dbe61 332
mbed_official 514:7668256dbe61 333 /*******************************************************************************/
mbed_official 514:7668256dbe61 334 /* UART Interface */
mbed_official 514:7668256dbe61 335
mbed_official 514:7668256dbe61 336 #define MXC_CFG_UART_INSTANCES (2)
mbed_official 514:7668256dbe61 337
mbed_official 514:7668256dbe61 338 #define MXC_BASE_UART0 ((uint32_t)0x40038000UL)
mbed_official 514:7668256dbe61 339 #define MXC_BASE_UART0_BITBAND ((uint32_t)0x42700000UL)
mbed_official 514:7668256dbe61 340 #define MXC_UART0 ((mxc_uart_regs_t *)MXC_BASE_UART0)
mbed_official 514:7668256dbe61 341
mbed_official 514:7668256dbe61 342 #define MXC_BASE_UART1 ((uint32_t)0x40039000UL)
mbed_official 514:7668256dbe61 343 #define MXC_BASE_UART1_BITBAND ((uint32_t)0x42720000UL)
mbed_official 514:7668256dbe61 344 #define MXC_UART1 ((mxc_uart_regs_t *)MXC_BASE_UART1)
mbed_official 514:7668256dbe61 345
mbed_official 514:7668256dbe61 346
mbed_official 514:7668256dbe61 347 #define MXC_UART_GET_IRQ(i) ((i) == 0 ? UART0_IRQn : \
mbed_official 514:7668256dbe61 348 (i) == 1 ? UART1_IRQn : 0)
mbed_official 514:7668256dbe61 349
mbed_official 514:7668256dbe61 350 #define MXC_UART_GET_BASE(i) ((i) == 0 ? MXC_BASE_UART0 : \
mbed_official 514:7668256dbe61 351 (i) == 1 ? MXC_BASE_UART1 : 0)
mbed_official 514:7668256dbe61 352
mbed_official 514:7668256dbe61 353 #define MXC_UART_GET_UART(i) ((i) == 0 ? MXC_UART0 : \
mbed_official 514:7668256dbe61 354 (i) == 1 ? MXC_UART1 : 0)
mbed_official 514:7668256dbe61 355
mbed_official 514:7668256dbe61 356 #define MXC_UART_INSTANCE_TO_BASE(instance) (((uint32_t)(instance) << 12) + MXC_BASE_UART0)
mbed_official 514:7668256dbe61 357 #define MXC_UART_BASE_TO_INSTANCE(base) (((uint32_t)(base) & 0x00001000) >> 12)
mbed_official 514:7668256dbe61 358
mbed_official 514:7668256dbe61 359
mbed_official 514:7668256dbe61 360 /*******************************************************************************/
mbed_official 514:7668256dbe61 361 /* I2C Master Interface */
mbed_official 514:7668256dbe61 362
mbed_official 514:7668256dbe61 363 #define MXC_CFG_I2CM_INSTANCES (2)
mbed_official 514:7668256dbe61 364
mbed_official 514:7668256dbe61 365 #define MXC_BASE_I2CM0 ((uint32_t)0x40040000UL)
mbed_official 514:7668256dbe61 366 #define MXC_BASE_I2CM0_BITBAND ((uint32_t)0x42800000UL)
mbed_official 514:7668256dbe61 367 #define MXC_I2CM0 ((mxc_i2cm_regs_t *)MXC_BASE_I2CM0)
mbed_official 514:7668256dbe61 368 #define MXC_BASE_I2CM0_TX_FIFO ((uint32_t)0x40103000UL)
mbed_official 514:7668256dbe61 369 #define MXC_BASE_I2CM0_RX_FIFO ((uint32_t)0x40103800UL)
mbed_official 514:7668256dbe61 370
mbed_official 514:7668256dbe61 371 #define MXC_BASE_I2CM1 ((uint32_t)0x40042000UL)
mbed_official 514:7668256dbe61 372 #define MXC_BASE_I2CM1_BITBAND ((uint32_t)0x42840000UL)
mbed_official 514:7668256dbe61 373 #define MXC_I2CM1 ((mxc_i2cm_regs_t *)MXC_BASE_I2CM1)
mbed_official 514:7668256dbe61 374 #define MXC_BASE_I2CM1_TX_FIFO ((uint32_t)0x4010D000UL)
mbed_official 514:7668256dbe61 375 #define MXC_BASE_I2CM1_RX_FIFO ((uint32_t)0x4010D800UL)
mbed_official 514:7668256dbe61 376
mbed_official 514:7668256dbe61 377 #define MXC_I2CM_GET_IRQ(i) ((i) == 0 ? I2CM0_IRQn : \
mbed_official 514:7668256dbe61 378 (i) == 1 ? I2CM1_IRQn : 0)
mbed_official 514:7668256dbe61 379
mbed_official 514:7668256dbe61 380 #define MXC_I2CM_GET_BASE(i) ((i) == 0 ? MXC_BASE_I2CM0 : \
mbed_official 514:7668256dbe61 381 (i) == 1 ? MXC_BASE_I2CM1 : 0)
mbed_official 514:7668256dbe61 382
mbed_official 514:7668256dbe61 383 #define MXC_I2CM_GET_I2CM(i) ((i) == 0 ? MXC_I2CM0 : \
mbed_official 514:7668256dbe61 384 (i) == 1 ? MXC_I2CM1 : 0)
mbed_official 514:7668256dbe61 385
mbed_official 514:7668256dbe61 386 #define MXC_I2CM_GET_BASE_TX_FIFO(i) ((i) == 0 ? MXC_BASE_I2CM0_TX_FIFO : \
mbed_official 514:7668256dbe61 387 (i) == 1 ? MXC_BASE_I2CM1_TX_FIFO : 0)
mbed_official 514:7668256dbe61 388
mbed_official 514:7668256dbe61 389 #define MXC_I2CM_GET_BASE_RX_FIFO(i) ((i) == 0 ? MXC_BASE_I2CM0_RX_FIFO : \
mbed_official 514:7668256dbe61 390 (i) == 1 ? MXC_BASE_I2CM1_RX_FIFO : 0)
mbed_official 514:7668256dbe61 391
mbed_official 514:7668256dbe61 392 #define MXC_I2CM_INSTANCE_TO_BASE(instance) (((uint32_t)(instance) << 13) + MXC_BASE_I2CM0)
mbed_official 514:7668256dbe61 393 #define MXC_I2CM_BASE_TO_INSTANCE(base) (((uint32_t)(base) & 0x00002000) >> 13)
mbed_official 514:7668256dbe61 394
mbed_official 514:7668256dbe61 395
mbed_official 514:7668256dbe61 396 /*******************************************************************************/
mbed_official 514:7668256dbe61 397 /* I2C Slave Interface */
mbed_official 514:7668256dbe61 398
mbed_official 514:7668256dbe61 399 #define MXC_CFG_I2CS_INSTANCES (1)
mbed_official 514:7668256dbe61 400
mbed_official 514:7668256dbe61 401 #define MXC_BASE_I2CS0 ((uint32_t)0x40041000UL)
mbed_official 514:7668256dbe61 402 #define MXC_BASE_I2CS0_BITBAND ((uint32_t)0x42820000UL)
mbed_official 514:7668256dbe61 403 #define MXC_I2CS0 ((mxc_i2cs_regs_t *)MXC_BASE_I2CS0)
mbed_official 514:7668256dbe61 404
mbed_official 514:7668256dbe61 405 #define MXC_BASE_I2CS0_FIFO ((uint32_t)0x40104000UL)
mbed_official 514:7668256dbe61 406 #define MXC_I2CS0_FIFO ((mxc_i2cs_fifo_regs_t *)MXC_BASE_I2CS0)
mbed_official 514:7668256dbe61 407
mbed_official 514:7668256dbe61 408
mbed_official 514:7668256dbe61 409
mbed_official 514:7668256dbe61 410 /*******************************************************************************/
mbed_official 514:7668256dbe61 411 /* DACs */
mbed_official 514:7668256dbe61 412
mbed_official 514:7668256dbe61 413 #define MXC_CFG_DAC_INSTANCES (4)
mbed_official 514:7668256dbe61 414 #define MXC_CFG_DAC_FIFO_DEPTH (32)
mbed_official 514:7668256dbe61 415
mbed_official 514:7668256dbe61 416 #define MXC_BASE_DAC0 ((uint32_t)0x40050000UL)
mbed_official 514:7668256dbe61 417 #define MXC_DAC0 ((mxc_dac_regs_t *)MXC_BASE_DAC0)
mbed_official 514:7668256dbe61 418 #define MXC_BASE_DAC0_FIFO ((uint32_t)0x40105000UL)
mbed_official 514:7668256dbe61 419 #define MXC_DAC0_FIFO ((mxc_dac_fifo_regs_t *)MXC_BASE_DAC0_FIFO)
mbed_official 514:7668256dbe61 420 #define MXC_DAC0_WIDTH ((uint8_t)(2))
mbed_official 514:7668256dbe61 421
mbed_official 514:7668256dbe61 422 #define MXC_BASE_DAC1 ((uint32_t)0x40051000UL)
mbed_official 514:7668256dbe61 423 #define MXC_DAC1 ((mxc_dac_regs_t *)MXC_BASE_DAC1)
mbed_official 514:7668256dbe61 424 #define MXC_BASE_DAC1_FIFO ((uint32_t)0x40106000UL)
mbed_official 514:7668256dbe61 425 #define MXC_DAC1_FIFO ((mxc_dac_fifo_regs_t *)MXC_BASE_DAC1_FIFO)
mbed_official 514:7668256dbe61 426 #define MXC_DAC1_WIDTH ((uint8_t)(2))
mbed_official 514:7668256dbe61 427
mbed_official 514:7668256dbe61 428 #define MXC_BASE_DAC2 ((uint32_t)0x40052000UL)
mbed_official 514:7668256dbe61 429 #define MXC_DAC2 ((mxc_dac_regs_t *)MXC_BASE_DAC2)
mbed_official 514:7668256dbe61 430 #define MXC_BASE_DAC2_FIFO ((uint32_t)0x40107000UL)
mbed_official 514:7668256dbe61 431 #define MXC_DAC2_FIFO ((mxc_dac_fifo_regs_t *)MXC_BASE_DAC2_FIFO)
mbed_official 514:7668256dbe61 432 #define MXC_DAC2_WIDTH ((uint8_t)(1))
mbed_official 514:7668256dbe61 433
mbed_official 514:7668256dbe61 434 #define MXC_BASE_DAC3 ((uint32_t)0x40053000UL)
mbed_official 514:7668256dbe61 435 #define MXC_DAC3 ((mxc_dac_regs_t *)MXC_BASE_DAC3)
mbed_official 514:7668256dbe61 436 #define MXC_BASE_DAC3_FIFO ((uint32_t)0x40108000UL)
mbed_official 514:7668256dbe61 437 #define MXC_DAC3_FIFO ((mxc_dac_fifo_regs_t *)MXC_BASE_DAC3_FIFO)
mbed_official 514:7668256dbe61 438 #define MXC_DAC3_WIDTH ((uint8_t)(1))
mbed_official 514:7668256dbe61 439
mbed_official 514:7668256dbe61 440
mbed_official 514:7668256dbe61 441 #define MXC_DAC_GET_IRQ(i) ((i) == 0 ? DAC0_IRQn : \
mbed_official 514:7668256dbe61 442 (i) == 1 ? DAC1_IRQn : \
mbed_official 514:7668256dbe61 443 (i) == 2 ? DAC2_IRQn : \
mbed_official 514:7668256dbe61 444 (i) == 3 ? DAC3_IRQn : 0)
mbed_official 514:7668256dbe61 445
mbed_official 514:7668256dbe61 446
mbed_official 514:7668256dbe61 447 #define MXC_DAC_GET_BASE(i) (i == 0 ? MXC_BASE_DAC0 : \
mbed_official 514:7668256dbe61 448 i == 1 ? MXC_BASE_DAC1 : \
mbed_official 514:7668256dbe61 449 i == 2 ? MXC_BASE_DAC2 : \
mbed_official 514:7668256dbe61 450 i == 3 ? MXC_BASE_DAC3 : 0)
mbed_official 514:7668256dbe61 451
mbed_official 514:7668256dbe61 452 #define MXC_DAC_GET_FIFO(i) (i == 0 ? MXC_BASE_DAC0_FIFO : \
mbed_official 514:7668256dbe61 453 i == 1 ? MXC_BASE_DAC1_FIFO : \
mbed_official 514:7668256dbe61 454 i == 2 ? MXC_BASE_DAC2_FIFO : \
mbed_official 514:7668256dbe61 455 i == 3 ? MXC_BASE_DAC3_FIFO : 0)
mbed_official 514:7668256dbe61 456
mbed_official 514:7668256dbe61 457 #define MXC_DAC_GET_PMU_FIFO_IRQ(i) (i == 0 ? PMU_IRQ_DAC0_FIFO_AE : \
mbed_official 514:7668256dbe61 458 i == 1 ? PMU_IRQ_DAC1_FIFO_AE : \
mbed_official 514:7668256dbe61 459 i == 2 ? PMU_IRQ_DAC2_FIFO_AE : \
mbed_official 514:7668256dbe61 460 i == 3 ? PMU_IRQ_DAC3_FIFO_AE : 0)
mbed_official 514:7668256dbe61 461
mbed_official 514:7668256dbe61 462 #define MXC_DAC_GET_DAC(i) (i == 0 ? MXC_DAC0 : \
mbed_official 514:7668256dbe61 463 i == 1 ? MXC_DAC1 : \
mbed_official 514:7668256dbe61 464 i == 2 ? MXC_DAC2 : \
mbed_official 514:7668256dbe61 465 i == 3 ? MXC_DAC3 : 0)
mbed_official 514:7668256dbe61 466
mbed_official 514:7668256dbe61 467 #define MXC_DAC_GET_WIDTH(i) (i == 0 ? MXC_DAC0_WIDTH : \
mbed_official 514:7668256dbe61 468 i == 1 ? MXC_DAC1_WIDTH : \
mbed_official 514:7668256dbe61 469 i == 2 ? MXC_DAC2_WIDTH : \
mbed_official 514:7668256dbe61 470 i == 3 ? MXC_DAC3_WIDTH : 0)
mbed_official 514:7668256dbe61 471
mbed_official 514:7668256dbe61 472
mbed_official 514:7668256dbe61 473 /*******************************************************************************/
mbed_official 514:7668256dbe61 474 /* Analog Front End */
mbed_official 514:7668256dbe61 475
mbed_official 514:7668256dbe61 476 #define MXC_BASE_AFE ((uint32_t)0x4005401CUL)
mbed_official 514:7668256dbe61 477 #define MXC_AFE ((mxc_afe_regs_t *)MXC_BASE_AFE)
mbed_official 514:7668256dbe61 478
mbed_official 514:7668256dbe61 479
mbed_official 514:7668256dbe61 480
mbed_official 514:7668256dbe61 481 /*******************************************************************************/
mbed_official 514:7668256dbe61 482 /* ADC */
mbed_official 514:7668256dbe61 483
mbed_official 514:7668256dbe61 484 #define MXC_CFG_ADC_FIFO_DEPTH ((uint32_t)(32))
mbed_official 514:7668256dbe61 485
mbed_official 514:7668256dbe61 486 #define MXC_BASE_ADC ((uint32_t)0x40054000UL)
mbed_official 514:7668256dbe61 487 #define MXC_ADC ((mxc_adc_regs_t *)MXC_BASE_ADC)
mbed_official 514:7668256dbe61 488
mbed_official 514:7668256dbe61 489 #define MXC_BASE_ADCCFG ((uint32_t)0x40054038UL)
mbed_official 514:7668256dbe61 490 #define MXC_ADCCFG ((mxc_adccfg_regs_t *)MXC_BASE_ADCCFG)
mbed_official 514:7668256dbe61 491
mbed_official 514:7668256dbe61 492 #define MXC_BASE_ADC_FIFO ((uint32_t)0x40109000UL)
mbed_official 514:7668256dbe61 493 #define MXC_ADC_FIFO ((mxc_adc_fifo_regs_t *)MXC_BASE_ADC_FIFO)
mbed_official 514:7668256dbe61 494
mbed_official 514:7668256dbe61 495
mbed_official 514:7668256dbe61 496
mbed_official 514:7668256dbe61 497 /*******************************************************************************/
mbed_official 514:7668256dbe61 498 /* LCD */
mbed_official 514:7668256dbe61 499 #define MXC_BASE_LCD ((uint32_t)0x40060000)
mbed_official 514:7668256dbe61 500 #define MXC_LCD ((mxc_lcd_regs_t *)MXC_BASE_LCD)
mbed_official 514:7668256dbe61 501
mbed_official 514:7668256dbe61 502 /*******************************************************************************/
mbed_official 514:7668256dbe61 503 /* Peripheral Management Unit (PMU) - formerly DMA Controller */
mbed_official 514:7668256dbe61 504
mbed_official 514:7668256dbe61 505 #define MXC_CFG_PMU_CHANNELS (6)
mbed_official 514:7668256dbe61 506
mbed_official 514:7668256dbe61 507 #define MXC_BASE_PMU0 ((uint32_t)0x40070000UL)
mbed_official 514:7668256dbe61 508 #define MXC_PMU0 ((mxc_pmu_regs_t *)MXC_BASE_PMU0)
mbed_official 514:7668256dbe61 509 #define MXC_BASE_PMU1 ((uint32_t)0x40070020UL)
mbed_official 514:7668256dbe61 510 #define MXC_PMU1 ((mxc_pmu_regs_t *)MXC_BASE_PMU1)
mbed_official 514:7668256dbe61 511 #define MXC_BASE_PMU2 ((uint32_t)0x40070040UL)
mbed_official 514:7668256dbe61 512 #define MXC_PMU2 ((mxc_pmu_regs_t *)MXC_BASE_PMU2)
mbed_official 514:7668256dbe61 513 #define MXC_BASE_PMU3 ((uint32_t)0x40070060UL)
mbed_official 514:7668256dbe61 514 #define MXC_PMU3 ((mxc_pmu_regs_t *)MXC_BASE_PMU3)
mbed_official 514:7668256dbe61 515 #define MXC_BASE_PMU4 ((uint32_t)0x40070080UL)
mbed_official 514:7668256dbe61 516 #define MXC_PMU4 ((mxc_pmu_regs_t *)MXC_BASE_PMU4)
mbed_official 514:7668256dbe61 517 #define MXC_BASE_PMU5 ((uint32_t)0x400700A0UL)
mbed_official 514:7668256dbe61 518 #define MXC_PMU5 ((mxc_pmu_regs_t *)MXC_BASE_PMU5)
mbed_official 514:7668256dbe61 519
mbed_official 514:7668256dbe61 520 #define MXC_BASE_PMU_BITBAND ((uint32_t)0x42E00000UL)
mbed_official 514:7668256dbe61 521 #define MXC_BASE_PMU_BITBAND_CHOFFSET ((uint32_t)0x00000400UL)
mbed_official 514:7668256dbe61 522 /*******************************************************************************/
mbed_official 514:7668256dbe61 523
mbed_official 514:7668256dbe61 524 typedef enum {
mbed_official 514:7668256dbe61 525 PMU_IRQ_DAC0_FIFO_AE,
mbed_official 514:7668256dbe61 526 PMU_IRQ_DAC1_FIFO_AE,
mbed_official 514:7668256dbe61 527 PMU_IRQ_DAC2_FIFO_AE,
mbed_official 514:7668256dbe61 528 PMU_IRQ_DAC3_FIFO_AE,
mbed_official 514:7668256dbe61 529 PMU_IRQ_DAC0_DONE,
mbed_official 514:7668256dbe61 530 PMU_IRQ_DAC1_DONE,
mbed_official 514:7668256dbe61 531 PMU_IRQ_DAC2_DONE,
mbed_official 514:7668256dbe61 532 PMU_IRQ_DAC3_DONE,
mbed_official 514:7668256dbe61 533 PMU_IRQ_ADC_FIFO_AF,
mbed_official 514:7668256dbe61 534 PMU_IRQ_ADC_DONE,
mbed_official 514:7668256dbe61 535 PMU_IRQ_I2C_MST0_DONE,
mbed_official 514:7668256dbe61 536 PMU_IRQ_I2C_MST1_DONE,
mbed_official 514:7668256dbe61 537 PMU_IRQ_SPI0_RSLTS_DONE,
mbed_official 514:7668256dbe61 538 PMU_IRQ_SPI1_RSLTS_DONE,
mbed_official 514:7668256dbe61 539 PMU_IRQ_SPI2_RSLTS_DONE,
mbed_official 514:7668256dbe61 540 PMU_IRQ_MAA_DONE,
mbed_official 514:7668256dbe61 541 PMU_IRQ_SPI0_TX_FIFO_AE,
mbed_official 514:7668256dbe61 542 PMU_IRQ_SPI0_RSLTS_FIFO_AF,
mbed_official 514:7668256dbe61 543 PMU_IRQ_SPI1_TX_FIFO_AE,
mbed_official 514:7668256dbe61 544 PMU_IRQ_SPI1_RSLTS_FIFO_AF,
mbed_official 514:7668256dbe61 545 PMU_IRQ_SPI2_TX_FIFO_AE,
mbed_official 514:7668256dbe61 546 PMU_IRQ_SPI3_RSLTS_FIFO_AF,
mbed_official 514:7668256dbe61 547 PMU_IRQ_I2C_MST0_TRANS_FIFO,
mbed_official 514:7668256dbe61 548 PMU_IRQ_I2C_MST0_RSLT_FIFO,
mbed_official 514:7668256dbe61 549 PMU_IRQ_I2C_MST1_TRANS_FIFO,
mbed_official 514:7668256dbe61 550 PMU_IRQ_I2C_MST2_RSLT_FIFO,
mbed_official 514:7668256dbe61 551 PMU_IRQ_I2C_SLV_TRANS_FIFO,
mbed_official 514:7668256dbe61 552 PMU_IRQ_I2C_SLV_RSLT_FIFO,
mbed_official 514:7668256dbe61 553 PMU_IRQ_UART0_TX_FIFO,
mbed_official 514:7668256dbe61 554 PMU_IRQ_UART0_RX_FIFO,
mbed_official 514:7668256dbe61 555 PMU_IRQ_UART1_TX_FIFO,
mbed_official 514:7668256dbe61 556 PMU_IRQ_UART1_RX_FIFO,
mbed_official 514:7668256dbe61 557 PMU_IRQ_SPI0_EXCP,
mbed_official 514:7668256dbe61 558 PMU_IRQ_SPI1_EXCP,
mbed_official 514:7668256dbe61 559 PMU_IRQ_SPI2_EXCP,
mbed_official 514:7668256dbe61 560 PMU_IRQ_RSVD0,
mbed_official 514:7668256dbe61 561 PMU_IRQ_I2C_MST0_EXCP,
mbed_official 514:7668256dbe61 562 PMU_IRQ_I2C_MST1_EXCP,
mbed_official 514:7668256dbe61 563 PMU_IRQ_I2C_SLV_EXCP,
mbed_official 514:7668256dbe61 564 PMU_IRQ_RSVD1,
mbed_official 514:7668256dbe61 565 PMU_IRQ_GPIO0,
mbed_official 514:7668256dbe61 566 PMU_IRQ_GPIO1,
mbed_official 514:7668256dbe61 567 PMU_IRQ_GPIO2,
mbed_official 514:7668256dbe61 568 PMU_IRQ_GPIO3,
mbed_official 514:7668256dbe61 569 PMU_IRQ_GPIO4,
mbed_official 514:7668256dbe61 570 PMU_IRQ_GPIO5,
mbed_official 514:7668256dbe61 571 PMU_IRQ_GPIO6,
mbed_official 514:7668256dbe61 572 PMU_IRQ_GPIO7,
mbed_official 514:7668256dbe61 573 PMU_IRQ_GPIO8,
mbed_official 514:7668256dbe61 574 PMU_IRQ_AFE_COMP_NMI,
mbed_official 514:7668256dbe61 575 PMU_IRQ_AES_ENGINE,
mbed_official 514:7668256dbe61 576 } pmu_int_mask_t;
mbed_official 514:7668256dbe61 577
mbed_official 514:7668256dbe61 578 /*******************************************************************************/
mbed_official 514:7668256dbe61 579 /* USB */
mbed_official 514:7668256dbe61 580
mbed_official 514:7668256dbe61 581 #define MXC_BASE_USB ((uint32_t)0x4010C000UL)
mbed_official 514:7668256dbe61 582 #define MXC_USB ((mxc_usb_regs_t *)MXC_BASE_USB)
mbed_official 514:7668256dbe61 583
mbed_official 514:7668256dbe61 584 #define MXC_USB_MAX_PACKET (64)
mbed_official 514:7668256dbe61 585 #define MXC_USB_NUM_EP (8)
mbed_official 514:7668256dbe61 586
mbed_official 514:7668256dbe61 587
mbed_official 514:7668256dbe61 588 /*******************************************************************************/
mbed_official 514:7668256dbe61 589 /* Instruction Cache Controller */
mbed_official 514:7668256dbe61 590
mbed_official 514:7668256dbe61 591 #define MXC_BASE_ICC ((uint32_t)0x40080000UL)
mbed_official 514:7668256dbe61 592 #define MXC_ICC ((mxc_icc_regs_t *)MXC_BASE_ICC)
mbed_official 514:7668256dbe61 593
mbed_official 514:7668256dbe61 594 /* System Manager */
mbed_official 514:7668256dbe61 595
mbed_official 514:7668256dbe61 596 #define MXC_BASE_SYSMAN ((uint32_t)0x40090000UL)
mbed_official 514:7668256dbe61 597
mbed_official 514:7668256dbe61 598 /*******************************************************************************/
mbed_official 514:7668256dbe61 599 /* Clock Manager */
mbed_official 514:7668256dbe61 600
mbed_official 514:7668256dbe61 601 #define MXC_BASE_CLKMAN ((uint32_t)0x40090400UL)
mbed_official 514:7668256dbe61 602 #define MXC_CLKMAN ((mxc_clkman_regs_t *)MXC_BASE_CLKMAN)
mbed_official 514:7668256dbe61 603
mbed_official 514:7668256dbe61 604
mbed_official 514:7668256dbe61 605 /*******************************************************************************/
mbed_official 514:7668256dbe61 606 /* Power Manager */
mbed_official 514:7668256dbe61 607
mbed_official 514:7668256dbe61 608 #define MXC_BASE_PWRMAN ((uint32_t)0x40090800UL)
mbed_official 514:7668256dbe61 609 #define MXC_PWRMAN ((mxc_pwrman_regs_t *)MXC_BASE_PWRMAN)
mbed_official 514:7668256dbe61 610
mbed_official 514:7668256dbe61 611 /*******************************************************************************/
mbed_official 514:7668256dbe61 612 /* I/O Manager */
mbed_official 514:7668256dbe61 613
mbed_official 514:7668256dbe61 614 #define MXC_BASE_IOMAN ((uint32_t)0x40090C00UL)
mbed_official 514:7668256dbe61 615 #define MXC_IOMAN ((mxc_ioman_regs_t *)MXC_BASE_IOMAN)
mbed_official 514:7668256dbe61 616
mbed_official 514:7668256dbe61 617
mbed_official 514:7668256dbe61 618 /*******************************************************************************/
mbed_official 514:7668256dbe61 619 /* RTC: Timer/Alarms */
mbed_official 514:7668256dbe61 620
mbed_official 514:7668256dbe61 621 #define MXC_BASE_RTCTMR ((uint32_t)0x40090A00UL)
mbed_official 514:7668256dbe61 622 #define MXC_RTCTMR ((mxc_rtctmr_regs_t *)MXC_BASE_RTCTMR)
mbed_official 514:7668256dbe61 623
mbed_official 514:7668256dbe61 624 #define MXC_RTCTMR_GET_IRQ(i) (i == 0 ? RTC0_IRQn : \
mbed_official 514:7668256dbe61 625 i == 1 ? RTC1_IRQn : \
mbed_official 514:7668256dbe61 626 i == 2 ? RTC2_IRQn : \
mbed_official 514:7668256dbe61 627 i == 3 ? RTC3_IRQn : 0)
mbed_official 514:7668256dbe61 628
mbed_official 514:7668256dbe61 629 #define MXC_BASE_RTCCFG ((uint32_t)0x40090A70UL)
mbed_official 514:7668256dbe61 630 #define MXC_RTCCFG ((mxc_rtccfg_regs_t *)MXC_BASE_RTCCFG)
mbed_official 514:7668256dbe61 631 /*******************************************************************************/
mbed_official 514:7668256dbe61 632 /* RTC: Power Sequencer */
mbed_official 514:7668256dbe61 633
mbed_official 514:7668256dbe61 634 #define MXC_BASE_PWRSEQ ((uint32_t)0x40090A30UL)
mbed_official 514:7668256dbe61 635 #define MXC_PWRSEQ ((mxc_pwrseq_regs_t *)MXC_BASE_PWRSEQ)
mbed_official 514:7668256dbe61 636
mbed_official 514:7668256dbe61 637 /*******************************************************************************/
mbed_official 514:7668256dbe61 638 /* Trim Shadow Registers */
mbed_official 514:7668256dbe61 639
mbed_official 514:7668256dbe61 640 #define MXC_BASE_TRIM ((uint32_t)0x400E0000UL)
mbed_official 514:7668256dbe61 641 #define MXC_TRIM ((mxc_ftr_regs_t *)MXC_BASE_TRIM)
mbed_official 514:7668256dbe61 642
mbed_official 514:7668256dbe61 643 /*******************************************************************************/
mbed_official 514:7668256dbe61 644 /* Flash Memory Controller / Security */
mbed_official 514:7668256dbe61 645
mbed_official 514:7668256dbe61 646 #define MXC_BASE_FLC ((uint32_t)0x400F0000UL)
mbed_official 514:7668256dbe61 647 #define MXC_FLC ((mxc_flc_regs_t *)MXC_BASE_FLC)
mbed_official 514:7668256dbe61 648 #define MXC_BASE_FLC_BITBAND ((uint32_t)0x43E00000UL)
mbed_official 514:7668256dbe61 649 #define MXC_FLC_PAGE_SIZE_SHIFT 11
mbed_official 514:7668256dbe61 650 #define MXC_FLC_PAGE_SIZE (1 << MXC_FLC_PAGE_SIZE_SHIFT)
mbed_official 514:7668256dbe61 651 #define MXC_FLC_PAGE_ERASE_MSK ((~(1 << (MXC_FLC_PAGE_SIZE_SHIFT - 1))) >> MXC_FLC_PAGE_SIZE_SHIFT) << MXC_FLC_PAGE_SIZE_SHIFT
mbed_official 514:7668256dbe61 652
mbed_official 514:7668256dbe61 653 /*******************************************************************************/
mbed_official 514:7668256dbe61 654
mbed_official 514:7668256dbe61 655 #define MXC_SET_FIELD(reg, clr, set) (*(volatile uint32_t *)reg = ((*(volatile uint32_t *)reg & ~clr) | set))
mbed_official 514:7668256dbe61 656
mbed_official 514:7668256dbe61 657 /*******************************************************************************/
mbed_official 514:7668256dbe61 658
mbed_official 514:7668256dbe61 659 #define BITBAND(reg, bit) ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2))
mbed_official 514:7668256dbe61 660 #define BITBAND_ClrBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 0
mbed_official 514:7668256dbe61 661 #define BITBAND_SetBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 1
mbed_official 514:7668256dbe61 662 #define BITBAND_GetBit(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit))
mbed_official 514:7668256dbe61 663
mbed_official 514:7668256dbe61 664 /*******************************************************************************/
mbed_official 514:7668256dbe61 665
mbed_official 514:7668256dbe61 666 #endif /* _MAX32600_H_ */