Example program with HTTPServer and sensor data streaming over TCPSockets, using Donatien Garnier's Net APIs and services code on top of LWIP. Files StreamServer.h and .cpp encapsulate streaming over TCPSockets. Broadcast is done by sendToAll(), and all incoming data is echoed back to the client. Echo code can be replaced with some remote control of the streaming interface. See main() that shows how to periodically send some data to all subscribed clients. To subscribe, a client should open a socket at <mbed_ip> port 123. I used few lines in TCL code to set up a quick sink for the data. HTTP files are served on port 80 concurrently to the streaming.

Dependencies:   mbed

Committer:
iva2k
Date:
Mon Jun 14 03:24:33 2010 +0000
Revision:
1:3ee499525aa5
Parent:
0:e614f7875b60

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
iva2k 0:e614f7875b60 1
iva2k 0:e614f7875b60 2 /*
iva2k 0:e614f7875b60 3 Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com)
iva2k 0:e614f7875b60 4
iva2k 0:e614f7875b60 5 Permission is hereby granted, free of charge, to any person obtaining a copy
iva2k 0:e614f7875b60 6 of this software and associated documentation files (the "Software"), to deal
iva2k 0:e614f7875b60 7 in the Software without restriction, including without limitation the rights
iva2k 0:e614f7875b60 8 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
iva2k 0:e614f7875b60 9 copies of the Software, and to permit persons to whom the Software is
iva2k 0:e614f7875b60 10 furnished to do so, subject to the following conditions:
iva2k 0:e614f7875b60 11
iva2k 0:e614f7875b60 12 The above copyright notice and this permission notice shall be included in
iva2k 0:e614f7875b60 13 all copies or substantial portions of the Software.
iva2k 0:e614f7875b60 14
iva2k 0:e614f7875b60 15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
iva2k 0:e614f7875b60 16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
iva2k 0:e614f7875b60 17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
iva2k 0:e614f7875b60 18 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
iva2k 0:e614f7875b60 19 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
iva2k 0:e614f7875b60 20 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
iva2k 0:e614f7875b60 21 THE SOFTWARE.
iva2k 0:e614f7875b60 22 */
iva2k 0:e614f7875b60 23
iva2k 0:e614f7875b60 24 /*
iva2k 0:e614f7875b60 25 **************************************************************************************************************
iva2k 0:e614f7875b60 26 * NXP USB Host Stack
iva2k 0:e614f7875b60 27 *
iva2k 0:e614f7875b60 28 * (c) Copyright 2008, NXP SemiConductors
iva2k 0:e614f7875b60 29 * (c) Copyright 2008, OnChip Technologies LLC
iva2k 0:e614f7875b60 30 * All Rights Reserved
iva2k 0:e614f7875b60 31 *
iva2k 0:e614f7875b60 32 * www.nxp.com
iva2k 0:e614f7875b60 33 * www.onchiptech.com
iva2k 0:e614f7875b60 34 *
iva2k 0:e614f7875b60 35 * File : usbhost_lpc17xx.h
iva2k 0:e614f7875b60 36 * Programmer(s) : Ravikanth.P
iva2k 0:e614f7875b60 37 * Version :
iva2k 0:e614f7875b60 38 *
iva2k 0:e614f7875b60 39 **************************************************************************************************************
iva2k 0:e614f7875b60 40 */
iva2k 0:e614f7875b60 41
iva2k 0:e614f7875b60 42 #ifndef USBHOST_LPC17xx_H
iva2k 0:e614f7875b60 43 #define USBHOST_LPC17xx_H
iva2k 0:e614f7875b60 44
iva2k 0:e614f7875b60 45 /*
iva2k 0:e614f7875b60 46 **************************************************************************************************************
iva2k 0:e614f7875b60 47 * INCLUDE HEADER FILES
iva2k 0:e614f7875b60 48 **************************************************************************************************************
iva2k 0:e614f7875b60 49 */
iva2k 0:e614f7875b60 50
iva2k 0:e614f7875b60 51 #include "usbhost_inc.h"
iva2k 0:e614f7875b60 52
iva2k 0:e614f7875b60 53 /*
iva2k 0:e614f7875b60 54 **************************************************************************************************************
iva2k 0:e614f7875b60 55 * PRINT CONFIGURATION
iva2k 0:e614f7875b60 56 **************************************************************************************************************
iva2k 0:e614f7875b60 57 */
iva2k 0:e614f7875b60 58
iva2k 0:e614f7875b60 59 #define PRINT_ENABLE 1
iva2k 0:e614f7875b60 60
iva2k 0:e614f7875b60 61 #if PRINT_ENABLE
iva2k 0:e614f7875b60 62 #define PRINT_Log(...) printf(__VA_ARGS__)
iva2k 0:e614f7875b60 63 #define PRINT_Err(rc) printf("ERROR: In %s at Line %u - rc = %d\n", __FUNCTION__, __LINE__, rc)
iva2k 0:e614f7875b60 64
iva2k 0:e614f7875b60 65 #else
iva2k 0:e614f7875b60 66 #define PRINT_Log(...) do {} while(0)
iva2k 0:e614f7875b60 67 #define PRINT_Err(rc) do {} while(0)
iva2k 0:e614f7875b60 68
iva2k 0:e614f7875b60 69 #endif
iva2k 0:e614f7875b60 70
iva2k 0:e614f7875b60 71 /*
iva2k 0:e614f7875b60 72 **************************************************************************************************************
iva2k 0:e614f7875b60 73 * GENERAL DEFINITIONS
iva2k 0:e614f7875b60 74 **************************************************************************************************************
iva2k 0:e614f7875b60 75 */
iva2k 0:e614f7875b60 76
iva2k 0:e614f7875b60 77 #define DESC_LENGTH(x) x[0]
iva2k 0:e614f7875b60 78 #define DESC_TYPE(x) x[1]
iva2k 0:e614f7875b60 79
iva2k 0:e614f7875b60 80
iva2k 0:e614f7875b60 81 #define HOST_GET_DESCRIPTOR(descType, descIndex, data, length) \
iva2k 0:e614f7875b60 82 Host_CtrlRecv(USB_DEVICE_TO_HOST | USB_RECIPIENT_DEVICE, GET_DESCRIPTOR, \
iva2k 0:e614f7875b60 83 (descType << 8)|(descIndex), 0, length, data)
iva2k 0:e614f7875b60 84
iva2k 0:e614f7875b60 85 #define HOST_SET_ADDRESS(new_addr) \
iva2k 0:e614f7875b60 86 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, SET_ADDRESS, \
iva2k 0:e614f7875b60 87 new_addr, 0, 0, NULL)
iva2k 0:e614f7875b60 88
iva2k 0:e614f7875b60 89 #define USBH_SET_CONFIGURATION(configNum) \
iva2k 0:e614f7875b60 90 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, SET_CONFIGURATION, \
iva2k 0:e614f7875b60 91 configNum, 0, 0, NULL)
iva2k 0:e614f7875b60 92
iva2k 0:e614f7875b60 93 #define USBH_SET_INTERFACE(ifNum, altNum) \
iva2k 0:e614f7875b60 94 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_INTERFACE, SET_INTERFACE, \
iva2k 0:e614f7875b60 95 altNum, ifNum, 0, NULL)
iva2k 0:e614f7875b60 96
iva2k 0:e614f7875b60 97 /*
iva2k 0:e614f7875b60 98 **************************************************************************************************************
iva2k 0:e614f7875b60 99 * OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
iva2k 0:e614f7875b60 100 **************************************************************************************************************
iva2k 0:e614f7875b60 101 */
iva2k 0:e614f7875b60 102
iva2k 0:e614f7875b60 103 /* ------------------ HcControl Register --------------------- */
iva2k 0:e614f7875b60 104 #define OR_CONTROL_CLE 0x00000010
iva2k 0:e614f7875b60 105 #define OR_CONTROL_BLE 0x00000020
iva2k 0:e614f7875b60 106 #define OR_CONTROL_HCFS 0x000000C0
iva2k 0:e614f7875b60 107 #define OR_CONTROL_HC_OPER 0x00000080
iva2k 0:e614f7875b60 108 /* ----------------- HcCommandStatus Register ----------------- */
iva2k 0:e614f7875b60 109 #define OR_CMD_STATUS_HCR 0x00000001
iva2k 0:e614f7875b60 110 #define OR_CMD_STATUS_CLF 0x00000002
iva2k 0:e614f7875b60 111 #define OR_CMD_STATUS_BLF 0x00000004
iva2k 0:e614f7875b60 112 /* --------------- HcInterruptStatus Register ----------------- */
iva2k 0:e614f7875b60 113 #define OR_INTR_STATUS_WDH 0x00000002
iva2k 0:e614f7875b60 114 #define OR_INTR_STATUS_RHSC 0x00000040
iva2k 0:e614f7875b60 115 /* --------------- HcInterruptEnable Register ----------------- */
iva2k 0:e614f7875b60 116 #define OR_INTR_ENABLE_WDH 0x00000002
iva2k 0:e614f7875b60 117 #define OR_INTR_ENABLE_RHSC 0x00000040
iva2k 0:e614f7875b60 118 #define OR_INTR_ENABLE_MIE 0x80000000
iva2k 0:e614f7875b60 119 /* ---------------- HcRhDescriptorA Register ------------------ */
iva2k 0:e614f7875b60 120 #define OR_RH_STATUS_LPSC 0x00010000
iva2k 0:e614f7875b60 121 #define OR_RH_STATUS_DRWE 0x00008000
iva2k 0:e614f7875b60 122 /* -------------- HcRhPortStatus[1:NDP] Register -------------- */
iva2k 0:e614f7875b60 123 #define OR_RH_PORT_CCS 0x00000001
iva2k 0:e614f7875b60 124 #define OR_RH_PORT_PRS 0x00000010
iva2k 0:e614f7875b60 125 #define OR_RH_PORT_CSC 0x00010000
iva2k 0:e614f7875b60 126 #define OR_RH_PORT_PRSC 0x00100000
iva2k 0:e614f7875b60 127
iva2k 0:e614f7875b60 128
iva2k 0:e614f7875b60 129 /*
iva2k 0:e614f7875b60 130 **************************************************************************************************************
iva2k 0:e614f7875b60 131 * FRAME INTERVAL
iva2k 0:e614f7875b60 132 **************************************************************************************************************
iva2k 0:e614f7875b60 133 */
iva2k 0:e614f7875b60 134
iva2k 0:e614f7875b60 135 #define FI 0x2EDF /* 12000 bits per frame (-1) */
iva2k 0:e614f7875b60 136 #define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
iva2k 0:e614f7875b60 137
iva2k 0:e614f7875b60 138 /*
iva2k 0:e614f7875b60 139 **************************************************************************************************************
iva2k 0:e614f7875b60 140 * ENDPOINT DESCRIPTOR CONTROL FIELDS
iva2k 0:e614f7875b60 141 **************************************************************************************************************
iva2k 0:e614f7875b60 142 */
iva2k 0:e614f7875b60 143
iva2k 0:e614f7875b60 144 #define ED_SKIP (USB_INT32U) (0x00001000) /* Skip this ep in queue */
iva2k 0:e614f7875b60 145
iva2k 0:e614f7875b60 146 /*
iva2k 0:e614f7875b60 147 **************************************************************************************************************
iva2k 0:e614f7875b60 148 * TRANSFER DESCRIPTOR CONTROL FIELDS
iva2k 0:e614f7875b60 149 **************************************************************************************************************
iva2k 0:e614f7875b60 150 */
iva2k 0:e614f7875b60 151
iva2k 0:e614f7875b60 152 #define TD_ROUNDING (USB_INT32U) (0x00040000) /* Buffer Rounding */
iva2k 0:e614f7875b60 153 #define TD_SETUP (USB_INT32U)(0) /* Direction of Setup Packet */
iva2k 0:e614f7875b60 154 #define TD_IN (USB_INT32U)(0x00100000) /* Direction In */
iva2k 0:e614f7875b60 155 #define TD_OUT (USB_INT32U)(0x00080000) /* Direction Out */
iva2k 0:e614f7875b60 156 #define TD_DELAY_INT(x) (USB_INT32U)((x) << 21) /* Delay Interrupt */
iva2k 0:e614f7875b60 157 #define TD_TOGGLE_0 (USB_INT32U)(0x02000000) /* Toggle 0 */
iva2k 0:e614f7875b60 158 #define TD_TOGGLE_1 (USB_INT32U)(0x03000000) /* Toggle 1 */
iva2k 0:e614f7875b60 159 #define TD_CC (USB_INT32U)(0xF0000000) /* Completion Code */
iva2k 0:e614f7875b60 160
iva2k 0:e614f7875b60 161 /*
iva2k 0:e614f7875b60 162 **************************************************************************************************************
iva2k 0:e614f7875b60 163 * USB STANDARD REQUEST DEFINITIONS
iva2k 0:e614f7875b60 164 **************************************************************************************************************
iva2k 0:e614f7875b60 165 */
iva2k 0:e614f7875b60 166
iva2k 0:e614f7875b60 167 #define USB_DESCRIPTOR_TYPE_DEVICE 1
iva2k 0:e614f7875b60 168 #define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
iva2k 0:e614f7875b60 169 #define USB_DESCRIPTOR_TYPE_INTERFACE 4
iva2k 0:e614f7875b60 170 #define USB_DESCRIPTOR_TYPE_ENDPOINT 5
iva2k 0:e614f7875b60 171 /* ----------- Control RequestType Fields ----------- */
iva2k 0:e614f7875b60 172 #define USB_DEVICE_TO_HOST 0x80
iva2k 0:e614f7875b60 173 #define USB_HOST_TO_DEVICE 0x00
iva2k 0:e614f7875b60 174 #define USB_REQUEST_TYPE_CLASS 0x20
iva2k 0:e614f7875b60 175 #define USB_RECIPIENT_DEVICE 0x00
iva2k 0:e614f7875b60 176 #define USB_RECIPIENT_INTERFACE 0x01
iva2k 0:e614f7875b60 177 /* -------------- USB Standard Requests -------------- */
iva2k 0:e614f7875b60 178 #define SET_ADDRESS 5
iva2k 0:e614f7875b60 179 #define GET_DESCRIPTOR 6
iva2k 0:e614f7875b60 180 #define SET_CONFIGURATION 9
iva2k 0:e614f7875b60 181 #define SET_INTERFACE 11
iva2k 0:e614f7875b60 182
iva2k 0:e614f7875b60 183 /*
iva2k 0:e614f7875b60 184 **************************************************************************************************************
iva2k 0:e614f7875b60 185 * TYPE DEFINITIONS
iva2k 0:e614f7875b60 186 **************************************************************************************************************
iva2k 0:e614f7875b60 187 */
iva2k 0:e614f7875b60 188
iva2k 0:e614f7875b60 189 typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
iva2k 0:e614f7875b60 190 volatile USB_INT32U Control; /* Endpoint descriptor control */
iva2k 0:e614f7875b60 191 volatile USB_INT32U TailTd; /* Physical address of tail in Transfer descriptor list */
iva2k 0:e614f7875b60 192 volatile USB_INT32U HeadTd; /* Physcial address of head in Transfer descriptor list */
iva2k 0:e614f7875b60 193 volatile USB_INT32U Next; /* Physical address of next Endpoint descriptor */
iva2k 0:e614f7875b60 194 } HCED;
iva2k 0:e614f7875b60 195
iva2k 0:e614f7875b60 196 typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
iva2k 0:e614f7875b60 197 volatile USB_INT32U Control; /* Transfer descriptor control */
iva2k 0:e614f7875b60 198 volatile USB_INT32U CurrBufPtr; /* Physical address of current buffer pointer */
iva2k 0:e614f7875b60 199 volatile USB_INT32U Next; /* Physical pointer to next Transfer Descriptor */
iva2k 0:e614f7875b60 200 volatile USB_INT32U BufEnd; /* Physical address of end of buffer */
iva2k 0:e614f7875b60 201 } HCTD;
iva2k 0:e614f7875b60 202
iva2k 0:e614f7875b60 203 typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
iva2k 0:e614f7875b60 204 volatile USB_INT32U IntTable[32]; /* Interrupt Table */
iva2k 0:e614f7875b60 205 volatile USB_INT32U FrameNumber; /* Frame Number */
iva2k 0:e614f7875b60 206 volatile USB_INT32U DoneHead; /* Done Head */
iva2k 0:e614f7875b60 207 volatile USB_INT08U Reserved[116]; /* Reserved for future use */
iva2k 0:e614f7875b60 208 volatile USB_INT08U Unknown[4]; /* Unused */
iva2k 0:e614f7875b60 209 } HCCA;
iva2k 0:e614f7875b60 210
iva2k 0:e614f7875b60 211 /*
iva2k 0:e614f7875b60 212 **************************************************************************************************************
iva2k 0:e614f7875b60 213 * EXTERN DECLARATIONS
iva2k 0:e614f7875b60 214 **************************************************************************************************************
iva2k 0:e614f7875b60 215 */
iva2k 0:e614f7875b60 216 #if 0
iva2k 0:e614f7875b60 217 extern volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
iva2k 0:e614f7875b60 218 extern volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
iva2k 0:e614f7875b60 219 extern volatile HCED *EDBulkHead;
iva2k 0:e614f7875b60 220 extern volatile HCTD *TDHead; /* Head transfer descriptor structure */
iva2k 0:e614f7875b60 221 extern volatile HCTD *TDTail; /* Tail transfer descriptor structure */
iva2k 0:e614f7875b60 222 #endif
iva2k 0:e614f7875b60 223 extern volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
iva2k 0:e614f7875b60 224
iva2k 0:e614f7875b60 225 /*
iva2k 0:e614f7875b60 226 **************************************************************************************************************
iva2k 0:e614f7875b60 227 * FUNCTION PROTOTYPES
iva2k 0:e614f7875b60 228 **************************************************************************************************************
iva2k 0:e614f7875b60 229 */
iva2k 0:e614f7875b60 230
iva2k 0:e614f7875b60 231 void Host_Init (void);
iva2k 0:e614f7875b60 232
iva2k 0:e614f7875b60 233 extern "C" void USB_IRQHandler(void) __irq;
iva2k 0:e614f7875b60 234
iva2k 0:e614f7875b60 235 USB_INT32S Host_EnumDev (void);
iva2k 0:e614f7875b60 236
iva2k 0:e614f7875b60 237 USB_INT32S Host_TDresult(volatile HCED *ed,
iva2k 0:e614f7875b60 238 volatile USB_INT32U token);
iva2k 0:e614f7875b60 239
iva2k 0:e614f7875b60 240 USB_INT32S Host_ProcessTD(volatile HCED *ed,
iva2k 0:e614f7875b60 241 volatile USB_INT32U token,
iva2k 0:e614f7875b60 242 volatile USB_INT08U *buffer,
iva2k 0:e614f7875b60 243 USB_INT32U buffer_len,
iva2k 0:e614f7875b60 244 bool block = true);
iva2k 0:e614f7875b60 245
iva2k 0:e614f7875b60 246
iva2k 0:e614f7875b60 247 void Host_DelayUS ( USB_INT32U delay);
iva2k 0:e614f7875b60 248 void Host_DelayMS ( USB_INT32U delay);
iva2k 0:e614f7875b60 249
iva2k 0:e614f7875b60 250
iva2k 0:e614f7875b60 251 void Host_TDInit (volatile HCTD *td);
iva2k 0:e614f7875b60 252 void Host_EDInit (volatile HCED *ed);
iva2k 0:e614f7875b60 253 void Host_HCCAInit (volatile HCCA *hcca);
iva2k 0:e614f7875b60 254
iva2k 0:e614f7875b60 255 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
iva2k 0:e614f7875b60 256 USB_INT08U b_request,
iva2k 0:e614f7875b60 257 USB_INT16U w_value,
iva2k 0:e614f7875b60 258 USB_INT16U w_index,
iva2k 0:e614f7875b60 259 USB_INT16U w_length,
iva2k 0:e614f7875b60 260 volatile USB_INT08U *buffer);
iva2k 0:e614f7875b60 261
iva2k 0:e614f7875b60 262 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
iva2k 0:e614f7875b60 263 USB_INT08U b_request,
iva2k 0:e614f7875b60 264 USB_INT16U w_value,
iva2k 0:e614f7875b60 265 USB_INT16U w_index,
iva2k 0:e614f7875b60 266 USB_INT16U w_length,
iva2k 0:e614f7875b60 267 volatile USB_INT08U *buffer);
iva2k 0:e614f7875b60 268
iva2k 0:e614f7875b60 269 void Host_FillSetup( USB_INT08U bm_request_type,
iva2k 0:e614f7875b60 270 USB_INT08U b_request,
iva2k 0:e614f7875b60 271 USB_INT16U w_value,
iva2k 0:e614f7875b60 272 USB_INT16U w_index,
iva2k 0:e614f7875b60 273 USB_INT16U w_length);
iva2k 0:e614f7875b60 274
iva2k 0:e614f7875b60 275
iva2k 0:e614f7875b60 276 void Host_WDHWait (void);
iva2k 0:e614f7875b60 277
iva2k 0:e614f7875b60 278
iva2k 0:e614f7875b60 279 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem);
iva2k 0:e614f7875b60 280 void WriteLE32U (volatile USB_INT08U *pmem,
iva2k 0:e614f7875b60 281 USB_INT32U val);
iva2k 0:e614f7875b60 282 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem);
iva2k 0:e614f7875b60 283 void WriteLE16U (volatile USB_INT08U *pmem,
iva2k 0:e614f7875b60 284 USB_INT16U val);
iva2k 0:e614f7875b60 285 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem);
iva2k 0:e614f7875b60 286 void WriteBE32U (volatile USB_INT08U *pmem,
iva2k 0:e614f7875b60 287 USB_INT32U val);
iva2k 0:e614f7875b60 288 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem);
iva2k 0:e614f7875b60 289 void WriteBE16U (volatile USB_INT08U *pmem,
iva2k 0:e614f7875b60 290 USB_INT16U val);
iva2k 0:e614f7875b60 291
iva2k 0:e614f7875b60 292 #endif