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source/bluenrg-hci/hci/controller/bluenrg_l2cap_aci.c@0:88b85febcb45, 2017-06-18 (annotated)

Committer:
iv123
Date:
Sun Jun 18 16:10:28 2017 +0000
Revision:
0:88b85febcb45
Initial commit

Who changed what in which revision?

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iv123 0:88b85febcb45 1 /******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
iv123 0:88b85febcb45 2 * File Name : bluenrg_hci.c
iv123 0:88b85febcb45 3 * Author : AMS - HEA&RF BU
iv123 0:88b85febcb45 4 * Version : V1.0.0
iv123 0:88b85febcb45 5 * Date : 4-Oct-2013
iv123 0:88b85febcb45 6 * Description : File with HCI commands for BlueNRG FW6.0 and above.
iv123 0:88b85febcb45 7 ********************************************************************************
iv123 0:88b85febcb45 8 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
iv123 0:88b85febcb45 9 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
iv123 0:88b85febcb45 10 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
iv123 0:88b85febcb45 11 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
iv123 0:88b85febcb45 12 * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
iv123 0:88b85febcb45 13 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
iv123 0:88b85febcb45 14 *******************************************************************************/
iv123 0:88b85febcb45 15
iv123 0:88b85febcb45 16 #include "ble_hal_types.h"
iv123 0:88b85febcb45 17 #include "ble_osal.h"
iv123 0:88b85febcb45 18 #include "ble_status.h"
iv123 0:88b85febcb45 19 #include "ble_hal.h"
iv123 0:88b85febcb45 20 #include "ble_osal.h"
iv123 0:88b85febcb45 21 #include "ble_hci_const.h"
iv123 0:88b85febcb45 22 #include "bluenrg_aci_const.h"
iv123 0:88b85febcb45 23 #include "bluenrg_hal_aci.h"
iv123 0:88b85febcb45 24 #include "bluenrg_gap.h"
iv123 0:88b85febcb45 25
iv123 0:88b85febcb45 26 #define MIN(a,b) ((a) < (b) )? (a) : (b)
iv123 0:88b85febcb45 27 #define MAX(a,b) ((a) > (b) )? (a) : (b)
iv123 0:88b85febcb45 28
iv123 0:88b85febcb45 29 tBleStatus aci_l2cap_connection_parameter_update_request(uint16_t conn_handle, uint16_t interval_min,
iv123 0:88b85febcb45 30 uint16_t interval_max, uint16_t slave_latency,
iv123 0:88b85febcb45 31 uint16_t timeout_multiplier)
iv123 0:88b85febcb45 32 {
iv123 0:88b85febcb45 33 struct hci_request rq;
iv123 0:88b85febcb45 34 uint8_t status;
iv123 0:88b85febcb45 35 l2cap_conn_param_update_req_cp cp;
iv123 0:88b85febcb45 36
iv123 0:88b85febcb45 37 cp.conn_handle = htobs(conn_handle);
iv123 0:88b85febcb45 38 cp.interval_min = htobs(interval_min);
iv123 0:88b85febcb45 39 cp.interval_max = htobs(interval_max);
iv123 0:88b85febcb45 40 cp.slave_latency = htobs(slave_latency);
iv123 0:88b85febcb45 41 cp.timeout_multiplier = htobs(timeout_multiplier);
iv123 0:88b85febcb45 42
iv123 0:88b85febcb45 43 Osal_MemSet(&rq, 0, sizeof(rq));
iv123 0:88b85febcb45 44 rq.ogf = OGF_VENDOR_CMD;
iv123 0:88b85febcb45 45 rq.ocf = OCF_L2CAP_CONN_PARAM_UPDATE_REQ;
iv123 0:88b85febcb45 46 rq.cparam = &cp;
iv123 0:88b85febcb45 47 rq.clen = L2CAP_CONN_PARAM_UPDATE_REQ_CP_SIZE;
iv123 0:88b85febcb45 48 rq.event = EVT_CMD_STATUS;
iv123 0:88b85febcb45 49 rq.rparam = &status;
iv123 0:88b85febcb45 50 rq.rlen = 1;
iv123 0:88b85febcb45 51
iv123 0:88b85febcb45 52 if (hci_send_req(&rq, FALSE) < 0)
iv123 0:88b85febcb45 53 return BLE_STATUS_TIMEOUT;
iv123 0:88b85febcb45 54
iv123 0:88b85febcb45 55 return status;
iv123 0:88b85febcb45 56 }
iv123 0:88b85febcb45 57
iv123 0:88b85febcb45 58 tBleStatus aci_l2cap_connection_parameter_update_response_IDB05A1(uint16_t conn_handle, uint16_t interval_min,
iv123 0:88b85febcb45 59 uint16_t interval_max, uint16_t slave_latency,
iv123 0:88b85febcb45 60 uint16_t timeout_multiplier, uint16_t min_ce_length, uint16_t max_ce_length,
iv123 0:88b85febcb45 61 uint8_t id, uint8_t accept)
iv123 0:88b85febcb45 62 {
iv123 0:88b85febcb45 63 struct hci_request rq;
iv123 0:88b85febcb45 64 uint8_t status;
iv123 0:88b85febcb45 65 l2cap_conn_param_update_resp_cp_IDB05A1 cp;
iv123 0:88b85febcb45 66
iv123 0:88b85febcb45 67 cp.conn_handle = htobs(conn_handle);
iv123 0:88b85febcb45 68 cp.interval_min = htobs(interval_min);
iv123 0:88b85febcb45 69 cp.interval_max = htobs(interval_max);
iv123 0:88b85febcb45 70 cp.slave_latency = htobs(slave_latency);
iv123 0:88b85febcb45 71 cp.timeout_multiplier = htobs(timeout_multiplier);
iv123 0:88b85febcb45 72 cp.min_ce_length = htobs(min_ce_length);
iv123 0:88b85febcb45 73 cp.max_ce_length = htobs(max_ce_length);
iv123 0:88b85febcb45 74 cp.id = id;
iv123 0:88b85febcb45 75 cp.accept = accept;
iv123 0:88b85febcb45 76
iv123 0:88b85febcb45 77 Osal_MemSet(&rq, 0, sizeof(rq));
iv123 0:88b85febcb45 78 rq.ogf = OGF_VENDOR_CMD;
iv123 0:88b85febcb45 79 rq.ocf = OCF_L2CAP_CONN_PARAM_UPDATE_RESP;
iv123 0:88b85febcb45 80 rq.cparam = &cp;
iv123 0:88b85febcb45 81 rq.clen = sizeof(cp);
iv123 0:88b85febcb45 82 rq.rparam = &status;
iv123 0:88b85febcb45 83 rq.rlen = 1;
iv123 0:88b85febcb45 84
iv123 0:88b85febcb45 85 if (hci_send_req(&rq, FALSE) < 0)
iv123 0:88b85febcb45 86 return BLE_STATUS_TIMEOUT;
iv123 0:88b85febcb45 87
iv123 0:88b85febcb45 88 return status;
iv123 0:88b85febcb45 89 }
iv123 0:88b85febcb45 90 tBleStatus aci_l2cap_connection_parameter_update_response_IDB04A1(uint16_t conn_handle, uint16_t interval_min,
iv123 0:88b85febcb45 91 uint16_t interval_max, uint16_t slave_latency,
iv123 0:88b85febcb45 92 uint16_t timeout_multiplier, uint8_t id, uint8_t accept)
iv123 0:88b85febcb45 93 {
iv123 0:88b85febcb45 94 struct hci_request rq;
iv123 0:88b85febcb45 95 uint8_t status;
iv123 0:88b85febcb45 96 l2cap_conn_param_update_resp_cp_IDB04A1 cp;
iv123 0:88b85febcb45 97
iv123 0:88b85febcb45 98 cp.conn_handle = htobs(conn_handle);
iv123 0:88b85febcb45 99 cp.interval_min = htobs(interval_min);
iv123 0:88b85febcb45 100 cp.interval_max = htobs(interval_max);
iv123 0:88b85febcb45 101 cp.slave_latency = htobs(slave_latency);
iv123 0:88b85febcb45 102 cp.timeout_multiplier = htobs(timeout_multiplier);
iv123 0:88b85febcb45 103 cp.id = id;
iv123 0:88b85febcb45 104 cp.accept = accept;
iv123 0:88b85febcb45 105
iv123 0:88b85febcb45 106 Osal_MemSet(&rq, 0, sizeof(rq));
iv123 0:88b85febcb45 107 rq.ogf = OGF_VENDOR_CMD;
iv123 0:88b85febcb45 108 rq.ocf = OCF_L2CAP_CONN_PARAM_UPDATE_RESP;
iv123 0:88b85febcb45 109 rq.cparam = &cp;
iv123 0:88b85febcb45 110 rq.clen = sizeof(cp);
iv123 0:88b85febcb45 111 rq.rparam = &status;
iv123 0:88b85febcb45 112 rq.rlen = 1;
iv123 0:88b85febcb45 113
iv123 0:88b85febcb45 114 if (hci_send_req(&rq, FALSE) < 0)
iv123 0:88b85febcb45 115 return BLE_STATUS_TIMEOUT;
iv123 0:88b85febcb45 116
iv123 0:88b85febcb45 117 return status;
iv123 0:88b85febcb45 118 }