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source/bluenrg-hci/hci/controller/bluenrg_hal_aci.c@0:88b85febcb45, 2017-06-18 (annotated)

Committer:
iv123
Date:
Sun Jun 18 16:10:28 2017 +0000
Revision:
0:88b85febcb45
Initial commit

Who changed what in which revision?

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iv123 0:88b85febcb45 1 /******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
iv123 0:88b85febcb45 2 * File Name : bluenrg_hci.c
iv123 0:88b85febcb45 3 * Author : AMS - HEA&RF BU
iv123 0:88b85febcb45 4 * Version : V1.0.0
iv123 0:88b85febcb45 5 * Date : 4-Oct-2013
iv123 0:88b85febcb45 6 * Description : File with HCI commands for BlueNRG FW6.0 and above.
iv123 0:88b85febcb45 7 ********************************************************************************
iv123 0:88b85febcb45 8 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
iv123 0:88b85febcb45 9 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
iv123 0:88b85febcb45 10 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
iv123 0:88b85febcb45 11 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
iv123 0:88b85febcb45 12 * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
iv123 0:88b85febcb45 13 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
iv123 0:88b85febcb45 14 *******************************************************************************/
iv123 0:88b85febcb45 15
iv123 0:88b85febcb45 16 #include "ble_hal_types.h"
iv123 0:88b85febcb45 17 #include "ble_osal.h"
iv123 0:88b85febcb45 18 #include "ble_status.h"
iv123 0:88b85febcb45 19 #include "ble_hal.h"
iv123 0:88b85febcb45 20 #include "ble_osal.h"
iv123 0:88b85febcb45 21 #include "ble_hci_const.h"
iv123 0:88b85febcb45 22 #include "bluenrg_aci_const.h"
iv123 0:88b85febcb45 23 #include "bluenrg_hal_aci.h"
iv123 0:88b85febcb45 24 #include "bluenrg_gatt_server.h"
iv123 0:88b85febcb45 25 #include "bluenrg_gap.h"
iv123 0:88b85febcb45 26
iv123 0:88b85febcb45 27 #define MIN(a,b) ((a) < (b) )? (a) : (b)
iv123 0:88b85febcb45 28 #define MAX(a,b) ((a) > (b) )? (a) : (b)
iv123 0:88b85febcb45 29
iv123 0:88b85febcb45 30
iv123 0:88b85febcb45 31 tBleStatus aci_hal_write_config_data(uint8_t offset,
iv123 0:88b85febcb45 32 uint8_t len,
iv123 0:88b85febcb45 33 const uint8_t *val)
iv123 0:88b85febcb45 34 {
iv123 0:88b85febcb45 35 struct hci_request rq;
iv123 0:88b85febcb45 36 uint8_t status;
iv123 0:88b85febcb45 37 uint8_t buffer[HCI_MAX_PAYLOAD_SIZE];
iv123 0:88b85febcb45 38 uint8_t indx = 0;
iv123 0:88b85febcb45 39
iv123 0:88b85febcb45 40 if ((len+2) > HCI_MAX_PAYLOAD_SIZE)
iv123 0:88b85febcb45 41 return BLE_STATUS_INVALID_PARAMS;
iv123 0:88b85febcb45 42
iv123 0:88b85febcb45 43 buffer[indx] = offset;
iv123 0:88b85febcb45 44 indx++;
iv123 0:88b85febcb45 45
iv123 0:88b85febcb45 46 buffer[indx] = len;
iv123 0:88b85febcb45 47 indx++;
iv123 0:88b85febcb45 48
iv123 0:88b85febcb45 49 Osal_MemCpy(buffer + indx, val, len);
iv123 0:88b85febcb45 50 indx += len;
iv123 0:88b85febcb45 51
iv123 0:88b85febcb45 52 Osal_MemSet(&rq, 0, sizeof(rq));
iv123 0:88b85febcb45 53 rq.ogf = OGF_VENDOR_CMD;
iv123 0:88b85febcb45 54 rq.ocf = OCF_HAL_WRITE_CONFIG_DATA;
iv123 0:88b85febcb45 55 rq.cparam = (void *)buffer;
iv123 0:88b85febcb45 56 rq.clen = indx;
iv123 0:88b85febcb45 57 rq.rparam = &status;
iv123 0:88b85febcb45 58 rq.rlen = 1;
iv123 0:88b85febcb45 59
iv123 0:88b85febcb45 60 if (hci_send_req(&rq, FALSE) < 0)
iv123 0:88b85febcb45 61 return BLE_STATUS_TIMEOUT;
iv123 0:88b85febcb45 62
iv123 0:88b85febcb45 63 if (status) {
iv123 0:88b85febcb45 64 return status;
iv123 0:88b85febcb45 65 }
iv123 0:88b85febcb45 66
iv123 0:88b85febcb45 67 return 0;
iv123 0:88b85febcb45 68 }
iv123 0:88b85febcb45 69
iv123 0:88b85febcb45 70 tBleStatus aci_hal_read_config_data(uint8_t offset, uint16_t data_len, uint8_t *data_len_out_p, uint8_t *data)
iv123 0:88b85febcb45 71 {
iv123 0:88b85febcb45 72 struct hci_request rq;
iv123 0:88b85febcb45 73 hal_read_config_data_cp cp;
iv123 0:88b85febcb45 74 hal_read_config_data_rp rp;
iv123 0:88b85febcb45 75
iv123 0:88b85febcb45 76 cp.offset = offset;
iv123 0:88b85febcb45 77
iv123 0:88b85febcb45 78 Osal_MemSet(&rq, 0, sizeof(rq));
iv123 0:88b85febcb45 79 rq.ogf = OGF_VENDOR_CMD;
iv123 0:88b85febcb45 80 rq.ocf = OCF_HAL_READ_CONFIG_DATA;
iv123 0:88b85febcb45 81 rq.cparam = &cp;
iv123 0:88b85febcb45 82 rq.clen = sizeof(cp);
iv123 0:88b85febcb45 83 rq.rparam = &rp;
iv123 0:88b85febcb45 84 rq.rlen = sizeof(rp);
iv123 0:88b85febcb45 85
iv123 0:88b85febcb45 86 if (hci_send_req(&rq, FALSE) < 0)
iv123 0:88b85febcb45 87 return BLE_STATUS_TIMEOUT;
iv123 0:88b85febcb45 88
iv123 0:88b85febcb45 89 if(rp.status)
iv123 0:88b85febcb45 90 return rp.status;
iv123 0:88b85febcb45 91
iv123 0:88b85febcb45 92 *data_len_out_p = rq.rlen-1;
iv123 0:88b85febcb45 93
iv123 0:88b85febcb45 94 Osal_MemCpy(data, rp.data, MIN(data_len, *data_len_out_p));
iv123 0:88b85febcb45 95
iv123 0:88b85febcb45 96 return 0;
iv123 0:88b85febcb45 97 }
iv123 0:88b85febcb45 98
iv123 0:88b85febcb45 99 tBleStatus aci_hal_set_tx_power_level(uint8_t en_high_power, uint8_t pa_level)
iv123 0:88b85febcb45 100 {
iv123 0:88b85febcb45 101 struct hci_request rq;
iv123 0:88b85febcb45 102 hal_set_tx_power_level_cp cp;
iv123 0:88b85febcb45 103 uint8_t status;
iv123 0:88b85febcb45 104
iv123 0:88b85febcb45 105 cp.en_high_power = en_high_power;
iv123 0:88b85febcb45 106 cp.pa_level = pa_level;
iv123 0:88b85febcb45 107
iv123 0:88b85febcb45 108 Osal_MemSet(&rq, 0, sizeof(rq));
iv123 0:88b85febcb45 109 rq.ogf = OGF_VENDOR_CMD;
iv123 0:88b85febcb45 110 rq.ocf = OCF_HAL_SET_TX_POWER_LEVEL;
iv123 0:88b85febcb45 111 rq.cparam = &cp;
iv123 0:88b85febcb45 112 rq.clen = HAL_SET_TX_POWER_LEVEL_CP_SIZE;
iv123 0:88b85febcb45 113 rq.rparam = &status;
iv123 0:88b85febcb45 114 rq.rlen = 1;
iv123 0:88b85febcb45 115
iv123 0:88b85febcb45 116 if (hci_send_req(&rq, FALSE) < 0)
iv123 0:88b85febcb45 117 return BLE_STATUS_TIMEOUT;
iv123 0:88b85febcb45 118
iv123 0:88b85febcb45 119 if (status) {
iv123 0:88b85febcb45 120 return status;
iv123 0:88b85febcb45 121 }
iv123 0:88b85febcb45 122
iv123 0:88b85febcb45 123 return 0;
iv123 0:88b85febcb45 124 }
iv123 0:88b85febcb45 125
iv123 0:88b85febcb45 126 tBleStatus aci_hal_device_standby(void)
iv123 0:88b85febcb45 127 {
iv123 0:88b85febcb45 128 struct hci_request rq;
iv123 0:88b85febcb45 129 uint8_t status;
iv123 0:88b85febcb45 130
iv123 0:88b85febcb45 131 Osal_MemSet(&rq, 0, sizeof(rq));
iv123 0:88b85febcb45 132 rq.ogf = OGF_VENDOR_CMD;
iv123 0:88b85febcb45 133 rq.ocf = OCF_HAL_DEVICE_STANDBY;
iv123 0:88b85febcb45 134 rq.rparam = &status;
iv123 0:88b85febcb45 135 rq.rlen = 1;
iv123 0:88b85febcb45 136
iv123 0:88b85febcb45 137 if (hci_send_req(&rq, FALSE) < 0)
iv123 0:88b85febcb45 138 return BLE_STATUS_TIMEOUT;
iv123 0:88b85febcb45 139
iv123 0:88b85febcb45 140 return status;
iv123 0:88b85febcb45 141 }
iv123 0:88b85febcb45 142
iv123 0:88b85febcb45 143 tBleStatus aci_hal_tone_start(uint8_t rf_channel)
iv123 0:88b85febcb45 144 {
iv123 0:88b85febcb45 145 struct hci_request rq;
iv123 0:88b85febcb45 146 hal_tone_start_cp cp;
iv123 0:88b85febcb45 147 uint8_t status;
iv123 0:88b85febcb45 148
iv123 0:88b85febcb45 149 cp.rf_channel = rf_channel;
iv123 0:88b85febcb45 150
iv123 0:88b85febcb45 151 Osal_MemSet(&rq, 0, sizeof(rq));
iv123 0:88b85febcb45 152 rq.ogf = OGF_VENDOR_CMD;
iv123 0:88b85febcb45 153 rq.ocf = OCF_HAL_TONE_START;
iv123 0:88b85febcb45 154 rq.cparam = &cp;
iv123 0:88b85febcb45 155 rq.clen = HAL_TONE_START_CP_SIZE;
iv123 0:88b85febcb45 156 rq.rparam = &status;
iv123 0:88b85febcb45 157 rq.rlen = 1;
iv123 0:88b85febcb45 158
iv123 0:88b85febcb45 159 if (hci_send_req(&rq, FALSE) < 0)
iv123 0:88b85febcb45 160 return BLE_STATUS_TIMEOUT;
iv123 0:88b85febcb45 161
iv123 0:88b85febcb45 162 return status;
iv123 0:88b85febcb45 163 }
iv123 0:88b85febcb45 164
iv123 0:88b85febcb45 165 tBleStatus aci_hal_tone_stop(void)
iv123 0:88b85febcb45 166 {
iv123 0:88b85febcb45 167 struct hci_request rq;
iv123 0:88b85febcb45 168 uint8_t status;
iv123 0:88b85febcb45 169
iv123 0:88b85febcb45 170 Osal_MemSet(&rq, 0, sizeof(rq));
iv123 0:88b85febcb45 171 rq.ogf = OGF_VENDOR_CMD;
iv123 0:88b85febcb45 172 rq.ocf = OCF_HAL_TONE_STOP;
iv123 0:88b85febcb45 173 rq.rparam = &status;
iv123 0:88b85febcb45 174 rq.rlen = 1;
iv123 0:88b85febcb45 175
iv123 0:88b85febcb45 176 if (hci_send_req(&rq, FALSE) < 0)
iv123 0:88b85febcb45 177 return BLE_STATUS_TIMEOUT;
iv123 0:88b85febcb45 178
iv123 0:88b85febcb45 179 return status;
iv123 0:88b85febcb45 180 }
iv123 0:88b85febcb45 181
iv123 0:88b85febcb45 182
iv123 0:88b85febcb45 183