Clock generator @ 145 MHz and 7 mhz

Dependencies:   Si5351A

Fork of Check_Si5351A_Clock_generator by Kenji Arai

main.cpp

Committer:
it9jru
Date:
2018-03-27
Revision:
6:c99750606e25

File content as of revision 6:c99750606e25:

#include "mbed.h"
#include "si5351a.h"

Serial pc(USBTX, USBRX);
 
I2C i2c(I2C_SDA, I2C_SCL);       // communication with Si5351A
SI5351A clk(i2c, 24998410UL);     // Base clock = 25MHz
 
int main() {
        uint32_t num=145000000;
    
      clk.set_frequency(SI5351_CLK0, 7000000);   // CLK0=7MHz
    
    clk.set_frequency(SI5351_CLK1,num);   // CLK0=145MHz
        
  while(true) {
 
     //wait(1);
      num = num + 10000;
      
     pc.printf("%d scrivo -\r\n", num);

   /* clk.set_frequency(SI5351_CLK1,num); 
    if (num>146000000) 
    {
         num=145000000;
         }*/
  } 
}
 
// ---------  CAUTION & RESTRICTION -----------------------------------------
// 1) SETTING METHOD
// 2.6KHz~100MHz: fixed PLL(around 900 or around 600MHz), fractional divider
// 100~150MHz: fractional PLL 600-900MHz, fixed divider 6
// 150~200MHz: fractional PLL 600-900MHz, fixed divider 4
//
// 2) RESOURCE USAGE
// PLLA -> only for CLK0 (You can change freqency any time to any value.)
// PLLB -> use for bothe CLK1 & CLK2
// If you set a freq. less than 100MHz,
//    You can change both CLK1 & CLK2 independently.
// Over 100MHz, you may have a trouble becase need to change PLLB freq.
//
// 3) DISCONTINUITY
// If you use multiple output, you will lose output signal when you change
//   the output frequency even not specific CLKn during I2C acccess. 
// --------------------------------------------------------------------------