dd

Committer:
injaeyoon
Date:
Thu Aug 27 03:11:34 2020 +0000
Revision:
0:71222a1e3c17
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injaeyoon 0:71222a1e3c17 1 // ================== VL53L0x library for Mbed ====================
injaeyoon 0:71222a1e3c17 2
injaeyoon 0:71222a1e3c17 3 // Modified by Alex Park 10, Aug, 2019
injaeyoon 0:71222a1e3c17 4
injaeyoon 0:71222a1e3c17 5 // Tested with NUCLEO F401RE board
injaeyoon 0:71222a1e3c17 6
injaeyoon 0:71222a1e3c17 7 // This VL53L0x library was modified from that of the Arduino made by Polou
injaeyoon 0:71222a1e3c17 8
injaeyoon 0:71222a1e3c17 9 // Firstly, constructor of the class was updated to cope with interrupt handling.
injaeyoon 0:71222a1e3c17 10
injaeyoon 0:71222a1e3c17 11 // Secondly, API of Timer,InterruptIn and I2C class are accomodated to use mbed OS5.
injaeyoon 0:71222a1e3c17 12
injaeyoon 0:71222a1e3c17 13 // Most of the functionality of this library is based on the VL53L0X API
injaeyoon 0:71222a1e3c17 14
injaeyoon 0:71222a1e3c17 15 // provided by ST (STSW-IMG005), and some of the explanatory comments are quoted
injaeyoon 0:71222a1e3c17 16
injaeyoon 0:71222a1e3c17 17 // or paraphrased from the API source code, API user manual (UM2039), and the
injaeyoon 0:71222a1e3c17 18
injaeyoon 0:71222a1e3c17 19 // VL53L0X datasheet.
injaeyoon 0:71222a1e3c17 20
injaeyoon 0:71222a1e3c17 21
injaeyoon 0:71222a1e3c17 22
injaeyoon 0:71222a1e3c17 23 #ifndef VL53L0X_h
injaeyoon 0:71222a1e3c17 24
injaeyoon 0:71222a1e3c17 25 #define VL53L0X_h
injaeyoon 0:71222a1e3c17 26
injaeyoon 0:71222a1e3c17 27
injaeyoon 0:71222a1e3c17 28
injaeyoon 0:71222a1e3c17 29 #include <mbed.h>
injaeyoon 0:71222a1e3c17 30
injaeyoon 0:71222a1e3c17 31 #define MAX_BUFFER_SIZE 10
injaeyoon 0:71222a1e3c17 32
injaeyoon 0:71222a1e3c17 33
injaeyoon 0:71222a1e3c17 34
injaeyoon 0:71222a1e3c17 35 class VL53L0X
injaeyoon 0:71222a1e3c17 36
injaeyoon 0:71222a1e3c17 37 {
injaeyoon 0:71222a1e3c17 38
injaeyoon 0:71222a1e3c17 39 public:
injaeyoon 0:71222a1e3c17 40
injaeyoon 0:71222a1e3c17 41 // register addresses from API vl53l0x_device.h (ordered as listed there)
injaeyoon 0:71222a1e3c17 42
injaeyoon 0:71222a1e3c17 43 enum regAddr
injaeyoon 0:71222a1e3c17 44
injaeyoon 0:71222a1e3c17 45 {
injaeyoon 0:71222a1e3c17 46
injaeyoon 0:71222a1e3c17 47 SYSRANGE_START = 0x00,
injaeyoon 0:71222a1e3c17 48
injaeyoon 0:71222a1e3c17 49
injaeyoon 0:71222a1e3c17 50
injaeyoon 0:71222a1e3c17 51 SYSTEM_THRESH_HIGH = 0x0C,
injaeyoon 0:71222a1e3c17 52
injaeyoon 0:71222a1e3c17 53 SYSTEM_THRESH_LOW = 0x0E,
injaeyoon 0:71222a1e3c17 54
injaeyoon 0:71222a1e3c17 55
injaeyoon 0:71222a1e3c17 56
injaeyoon 0:71222a1e3c17 57 SYSTEM_SEQUENCE_CONFIG = 0x01,
injaeyoon 0:71222a1e3c17 58
injaeyoon 0:71222a1e3c17 59 SYSTEM_RANGE_CONFIG = 0x09,
injaeyoon 0:71222a1e3c17 60
injaeyoon 0:71222a1e3c17 61 SYSTEM_INTERMEASUREMENT_PERIOD = 0x04,
injaeyoon 0:71222a1e3c17 62
injaeyoon 0:71222a1e3c17 63
injaeyoon 0:71222a1e3c17 64
injaeyoon 0:71222a1e3c17 65 SYSTEM_INTERRUPT_CONFIG_GPIO = 0x0A,
injaeyoon 0:71222a1e3c17 66
injaeyoon 0:71222a1e3c17 67
injaeyoon 0:71222a1e3c17 68
injaeyoon 0:71222a1e3c17 69 GPIO_HV_MUX_ACTIVE_HIGH = 0x84,
injaeyoon 0:71222a1e3c17 70
injaeyoon 0:71222a1e3c17 71
injaeyoon 0:71222a1e3c17 72
injaeyoon 0:71222a1e3c17 73 SYSTEM_INTERRUPT_CLEAR = 0x0B,
injaeyoon 0:71222a1e3c17 74
injaeyoon 0:71222a1e3c17 75
injaeyoon 0:71222a1e3c17 76
injaeyoon 0:71222a1e3c17 77 RESULT_INTERRUPT_STATUS = 0x13,
injaeyoon 0:71222a1e3c17 78
injaeyoon 0:71222a1e3c17 79 RESULT_RANGE_STATUS = 0x14,
injaeyoon 0:71222a1e3c17 80
injaeyoon 0:71222a1e3c17 81
injaeyoon 0:71222a1e3c17 82
injaeyoon 0:71222a1e3c17 83 RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN = 0xBC,
injaeyoon 0:71222a1e3c17 84
injaeyoon 0:71222a1e3c17 85 RESULT_CORE_RANGING_TOTAL_EVENTS_RTN = 0xC0,
injaeyoon 0:71222a1e3c17 86
injaeyoon 0:71222a1e3c17 87 RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF = 0xD0,
injaeyoon 0:71222a1e3c17 88
injaeyoon 0:71222a1e3c17 89 RESULT_CORE_RANGING_TOTAL_EVENTS_REF = 0xD4,
injaeyoon 0:71222a1e3c17 90
injaeyoon 0:71222a1e3c17 91 RESULT_PEAK_SIGNAL_RATE_REF = 0xB6,
injaeyoon 0:71222a1e3c17 92
injaeyoon 0:71222a1e3c17 93
injaeyoon 0:71222a1e3c17 94
injaeyoon 0:71222a1e3c17 95 ALGO_PART_TO_PART_RANGE_OFFSET_MM = 0x28,
injaeyoon 0:71222a1e3c17 96
injaeyoon 0:71222a1e3c17 97
injaeyoon 0:71222a1e3c17 98
injaeyoon 0:71222a1e3c17 99 I2C_SLAVE_DEVICE_ADDRESS = 0x8A,
injaeyoon 0:71222a1e3c17 100
injaeyoon 0:71222a1e3c17 101
injaeyoon 0:71222a1e3c17 102
injaeyoon 0:71222a1e3c17 103 MSRC_CONFIG_CONTROL = 0x60,
injaeyoon 0:71222a1e3c17 104
injaeyoon 0:71222a1e3c17 105
injaeyoon 0:71222a1e3c17 106
injaeyoon 0:71222a1e3c17 107 PRE_RANGE_CONFIG_MIN_SNR = 0x27,
injaeyoon 0:71222a1e3c17 108
injaeyoon 0:71222a1e3c17 109 PRE_RANGE_CONFIG_VALID_PHASE_LOW = 0x56,
injaeyoon 0:71222a1e3c17 110
injaeyoon 0:71222a1e3c17 111 PRE_RANGE_CONFIG_VALID_PHASE_HIGH = 0x57,
injaeyoon 0:71222a1e3c17 112
injaeyoon 0:71222a1e3c17 113 PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT = 0x64,
injaeyoon 0:71222a1e3c17 114
injaeyoon 0:71222a1e3c17 115
injaeyoon 0:71222a1e3c17 116
injaeyoon 0:71222a1e3c17 117 FINAL_RANGE_CONFIG_MIN_SNR = 0x67,
injaeyoon 0:71222a1e3c17 118
injaeyoon 0:71222a1e3c17 119 FINAL_RANGE_CONFIG_VALID_PHASE_LOW = 0x47,
injaeyoon 0:71222a1e3c17 120
injaeyoon 0:71222a1e3c17 121 FINAL_RANGE_CONFIG_VALID_PHASE_HIGH = 0x48,
injaeyoon 0:71222a1e3c17 122
injaeyoon 0:71222a1e3c17 123 FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT = 0x44,
injaeyoon 0:71222a1e3c17 124
injaeyoon 0:71222a1e3c17 125
injaeyoon 0:71222a1e3c17 126
injaeyoon 0:71222a1e3c17 127 PRE_RANGE_CONFIG_SIGMA_THRESH_HI = 0x61,
injaeyoon 0:71222a1e3c17 128
injaeyoon 0:71222a1e3c17 129 PRE_RANGE_CONFIG_SIGMA_THRESH_LO = 0x62,
injaeyoon 0:71222a1e3c17 130
injaeyoon 0:71222a1e3c17 131
injaeyoon 0:71222a1e3c17 132
injaeyoon 0:71222a1e3c17 133 PRE_RANGE_CONFIG_VCSEL_PERIOD = 0x50,
injaeyoon 0:71222a1e3c17 134
injaeyoon 0:71222a1e3c17 135 PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI = 0x51,
injaeyoon 0:71222a1e3c17 136
injaeyoon 0:71222a1e3c17 137 PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO = 0x52,
injaeyoon 0:71222a1e3c17 138
injaeyoon 0:71222a1e3c17 139
injaeyoon 0:71222a1e3c17 140
injaeyoon 0:71222a1e3c17 141 SYSTEM_HISTOGRAM_BIN = 0x81,
injaeyoon 0:71222a1e3c17 142
injaeyoon 0:71222a1e3c17 143 HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT = 0x33,
injaeyoon 0:71222a1e3c17 144
injaeyoon 0:71222a1e3c17 145 HISTOGRAM_CONFIG_READOUT_CTRL = 0x55,
injaeyoon 0:71222a1e3c17 146
injaeyoon 0:71222a1e3c17 147
injaeyoon 0:71222a1e3c17 148
injaeyoon 0:71222a1e3c17 149 FINAL_RANGE_CONFIG_VCSEL_PERIOD = 0x70,
injaeyoon 0:71222a1e3c17 150
injaeyoon 0:71222a1e3c17 151 FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI = 0x71,
injaeyoon 0:71222a1e3c17 152
injaeyoon 0:71222a1e3c17 153 FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO = 0x72,
injaeyoon 0:71222a1e3c17 154
injaeyoon 0:71222a1e3c17 155 CROSSTALK_COMPENSATION_PEAK_RATE_MCPS = 0x20,
injaeyoon 0:71222a1e3c17 156
injaeyoon 0:71222a1e3c17 157
injaeyoon 0:71222a1e3c17 158
injaeyoon 0:71222a1e3c17 159 MSRC_CONFIG_TIMEOUT_MACROP = 0x46,
injaeyoon 0:71222a1e3c17 160
injaeyoon 0:71222a1e3c17 161
injaeyoon 0:71222a1e3c17 162
injaeyoon 0:71222a1e3c17 163 SOFT_RESET_GO2_SOFT_RESET_N = 0xBF,
injaeyoon 0:71222a1e3c17 164
injaeyoon 0:71222a1e3c17 165 IDENTIFICATION_MODEL_ID = 0xC0,
injaeyoon 0:71222a1e3c17 166
injaeyoon 0:71222a1e3c17 167 IDENTIFICATION_REVISION_ID = 0xC2,
injaeyoon 0:71222a1e3c17 168
injaeyoon 0:71222a1e3c17 169
injaeyoon 0:71222a1e3c17 170
injaeyoon 0:71222a1e3c17 171 OSC_CALIBRATE_VAL = 0xF8,
injaeyoon 0:71222a1e3c17 172
injaeyoon 0:71222a1e3c17 173
injaeyoon 0:71222a1e3c17 174
injaeyoon 0:71222a1e3c17 175 GLOBAL_CONFIG_VCSEL_WIDTH = 0x32,
injaeyoon 0:71222a1e3c17 176
injaeyoon 0:71222a1e3c17 177 GLOBAL_CONFIG_SPAD_ENABLES_REF_0 = 0xB0,
injaeyoon 0:71222a1e3c17 178
injaeyoon 0:71222a1e3c17 179 GLOBAL_CONFIG_SPAD_ENABLES_REF_1 = 0xB1,
injaeyoon 0:71222a1e3c17 180
injaeyoon 0:71222a1e3c17 181 GLOBAL_CONFIG_SPAD_ENABLES_REF_2 = 0xB2,
injaeyoon 0:71222a1e3c17 182
injaeyoon 0:71222a1e3c17 183 GLOBAL_CONFIG_SPAD_ENABLES_REF_3 = 0xB3,
injaeyoon 0:71222a1e3c17 184
injaeyoon 0:71222a1e3c17 185 GLOBAL_CONFIG_SPAD_ENABLES_REF_4 = 0xB4,
injaeyoon 0:71222a1e3c17 186
injaeyoon 0:71222a1e3c17 187 GLOBAL_CONFIG_SPAD_ENABLES_REF_5 = 0xB5,
injaeyoon 0:71222a1e3c17 188
injaeyoon 0:71222a1e3c17 189
injaeyoon 0:71222a1e3c17 190
injaeyoon 0:71222a1e3c17 191 GLOBAL_CONFIG_REF_EN_START_SELECT = 0xB6,
injaeyoon 0:71222a1e3c17 192
injaeyoon 0:71222a1e3c17 193 DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD = 0x4E,
injaeyoon 0:71222a1e3c17 194
injaeyoon 0:71222a1e3c17 195 DYNAMIC_SPAD_REF_EN_START_OFFSET = 0x4F,
injaeyoon 0:71222a1e3c17 196
injaeyoon 0:71222a1e3c17 197 POWER_MANAGEMENT_GO1_POWER_FORCE = 0x80,
injaeyoon 0:71222a1e3c17 198
injaeyoon 0:71222a1e3c17 199
injaeyoon 0:71222a1e3c17 200
injaeyoon 0:71222a1e3c17 201 VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV = 0x89,
injaeyoon 0:71222a1e3c17 202
injaeyoon 0:71222a1e3c17 203
injaeyoon 0:71222a1e3c17 204
injaeyoon 0:71222a1e3c17 205 ALGO_PHASECAL_LIM = 0x30,
injaeyoon 0:71222a1e3c17 206
injaeyoon 0:71222a1e3c17 207 ALGO_PHASECAL_CONFIG_TIMEOUT = 0x30,
injaeyoon 0:71222a1e3c17 208
injaeyoon 0:71222a1e3c17 209 };
injaeyoon 0:71222a1e3c17 210
injaeyoon 0:71222a1e3c17 211
injaeyoon 0:71222a1e3c17 212
injaeyoon 0:71222a1e3c17 213 enum vcselPeriodType { VcselPeriodPreRange, VcselPeriodFinalRange };
injaeyoon 0:71222a1e3c17 214
injaeyoon 0:71222a1e3c17 215 enum applicationType{ SHORT_ACCURATE, SHORT_FAST, LONG_ACCURATE, LONG_FAST};
injaeyoon 0:71222a1e3c17 216
injaeyoon 0:71222a1e3c17 217 uint8_t last_status; // status of last I2C transmission
injaeyoon 0:71222a1e3c17 218
injaeyoon 0:71222a1e3c17 219
injaeyoon 0:71222a1e3c17 220
injaeyoon 0:71222a1e3c17 221 VL53L0X(PinName SDA,PinName SCL, PinName INTRT=NC);
injaeyoon 0:71222a1e3c17 222
injaeyoon 0:71222a1e3c17 223 void setApplication(applicationType mode=SHORT_ACCURATE);
injaeyoon 0:71222a1e3c17 224
injaeyoon 0:71222a1e3c17 225 void setAddress(uint8_t new_addr);
injaeyoon 0:71222a1e3c17 226
injaeyoon 0:71222a1e3c17 227 inline uint8_t getAddress(void) { return address; }
injaeyoon 0:71222a1e3c17 228
injaeyoon 0:71222a1e3c17 229
injaeyoon 0:71222a1e3c17 230
injaeyoon 0:71222a1e3c17 231 bool init(bool io_2v8 = true);
injaeyoon 0:71222a1e3c17 232
injaeyoon 0:71222a1e3c17 233
injaeyoon 0:71222a1e3c17 234
injaeyoon 0:71222a1e3c17 235 void writeReg(uint8_t reg, uint8_t value);
injaeyoon 0:71222a1e3c17 236
injaeyoon 0:71222a1e3c17 237 void writeReg16Bit(uint8_t reg, uint16_t value);
injaeyoon 0:71222a1e3c17 238
injaeyoon 0:71222a1e3c17 239 void writeReg32Bit(uint8_t reg, uint32_t value);
injaeyoon 0:71222a1e3c17 240
injaeyoon 0:71222a1e3c17 241 uint8_t readReg(uint8_t reg);
injaeyoon 0:71222a1e3c17 242
injaeyoon 0:71222a1e3c17 243 uint16_t readReg16Bit(uint8_t reg);
injaeyoon 0:71222a1e3c17 244
injaeyoon 0:71222a1e3c17 245 uint32_t readReg32Bit(uint8_t reg);
injaeyoon 0:71222a1e3c17 246
injaeyoon 0:71222a1e3c17 247
injaeyoon 0:71222a1e3c17 248
injaeyoon 0:71222a1e3c17 249 void writeMulti(uint8_t reg, uint8_t const * src, uint8_t count);
injaeyoon 0:71222a1e3c17 250
injaeyoon 0:71222a1e3c17 251 void readMulti(uint8_t reg, uint8_t * dst, uint8_t count);
injaeyoon 0:71222a1e3c17 252
injaeyoon 0:71222a1e3c17 253
injaeyoon 0:71222a1e3c17 254
injaeyoon 0:71222a1e3c17 255 bool setSignalRateLimit(float limit_Mcps);
injaeyoon 0:71222a1e3c17 256
injaeyoon 0:71222a1e3c17 257 float getSignalRateLimit(void);
injaeyoon 0:71222a1e3c17 258
injaeyoon 0:71222a1e3c17 259
injaeyoon 0:71222a1e3c17 260
injaeyoon 0:71222a1e3c17 261 bool setMeasurementTimingBudget(uint32_t budget_us);
injaeyoon 0:71222a1e3c17 262
injaeyoon 0:71222a1e3c17 263 uint32_t getMeasurementTimingBudget(void);
injaeyoon 0:71222a1e3c17 264
injaeyoon 0:71222a1e3c17 265
injaeyoon 0:71222a1e3c17 266
injaeyoon 0:71222a1e3c17 267 bool setVcselPulsePeriod(vcselPeriodType type, uint8_t period_pclks);
injaeyoon 0:71222a1e3c17 268
injaeyoon 0:71222a1e3c17 269 uint8_t getVcselPulsePeriod(vcselPeriodType type);
injaeyoon 0:71222a1e3c17 270
injaeyoon 0:71222a1e3c17 271
injaeyoon 0:71222a1e3c17 272
injaeyoon 0:71222a1e3c17 273 void startContinuous(uint32_t period_ms = 0);
injaeyoon 0:71222a1e3c17 274
injaeyoon 0:71222a1e3c17 275 void stopContinuous(void);
injaeyoon 0:71222a1e3c17 276
injaeyoon 0:71222a1e3c17 277 uint16_t readRangeContinuousMillimeters(bool blocking=true);
injaeyoon 0:71222a1e3c17 278
injaeyoon 0:71222a1e3c17 279 uint16_t readRangeSingleMillimeters(void);
injaeyoon 0:71222a1e3c17 280
injaeyoon 0:71222a1e3c17 281 uint16_t readRange();
injaeyoon 0:71222a1e3c17 282
injaeyoon 0:71222a1e3c17 283 inline void setTimeout(uint32_t timeout) { io_timeout = timeout; }
injaeyoon 0:71222a1e3c17 284
injaeyoon 0:71222a1e3c17 285 inline uint32_t getTimeout(void) { return io_timeout; }
injaeyoon 0:71222a1e3c17 286
injaeyoon 0:71222a1e3c17 287 bool timeoutOccurred(void);
injaeyoon 0:71222a1e3c17 288
injaeyoon 0:71222a1e3c17 289
injaeyoon 0:71222a1e3c17 290
injaeyoon 0:71222a1e3c17 291 private:
injaeyoon 0:71222a1e3c17 292
injaeyoon 0:71222a1e3c17 293 // TCC: Target CentreCheck
injaeyoon 0:71222a1e3c17 294
injaeyoon 0:71222a1e3c17 295 // MSRC: Minimum Signal Rate Check
injaeyoon 0:71222a1e3c17 296
injaeyoon 0:71222a1e3c17 297 // DSS: Dynamic Spad Selection
injaeyoon 0:71222a1e3c17 298
injaeyoon 0:71222a1e3c17 299
injaeyoon 0:71222a1e3c17 300
injaeyoon 0:71222a1e3c17 301 struct SequenceStepEnables
injaeyoon 0:71222a1e3c17 302
injaeyoon 0:71222a1e3c17 303 {
injaeyoon 0:71222a1e3c17 304
injaeyoon 0:71222a1e3c17 305 bool tcc, msrc, dss, pre_range, final_range;
injaeyoon 0:71222a1e3c17 306
injaeyoon 0:71222a1e3c17 307 };
injaeyoon 0:71222a1e3c17 308
injaeyoon 0:71222a1e3c17 309
injaeyoon 0:71222a1e3c17 310
injaeyoon 0:71222a1e3c17 311 struct SequenceStepTimeouts
injaeyoon 0:71222a1e3c17 312
injaeyoon 0:71222a1e3c17 313 {
injaeyoon 0:71222a1e3c17 314
injaeyoon 0:71222a1e3c17 315 uint16_t pre_range_vcsel_period_pclks, final_range_vcsel_period_pclks;
injaeyoon 0:71222a1e3c17 316
injaeyoon 0:71222a1e3c17 317
injaeyoon 0:71222a1e3c17 318
injaeyoon 0:71222a1e3c17 319 uint16_t msrc_dss_tcc_mclks, pre_range_mclks, final_range_mclks;
injaeyoon 0:71222a1e3c17 320
injaeyoon 0:71222a1e3c17 321 uint32_t msrc_dss_tcc_us, pre_range_us, final_range_us;
injaeyoon 0:71222a1e3c17 322
injaeyoon 0:71222a1e3c17 323 };
injaeyoon 0:71222a1e3c17 324
injaeyoon 0:71222a1e3c17 325
injaeyoon 0:71222a1e3c17 326
injaeyoon 0:71222a1e3c17 327 I2C _i2c;
injaeyoon 0:71222a1e3c17 328
injaeyoon 0:71222a1e3c17 329 Timer _tmr;
injaeyoon 0:71222a1e3c17 330
injaeyoon 0:71222a1e3c17 331 InterruptIn _int;
injaeyoon 0:71222a1e3c17 332
injaeyoon 0:71222a1e3c17 333
injaeyoon 0:71222a1e3c17 334
injaeyoon 0:71222a1e3c17 335 uint16_t _range; //range [mm]
injaeyoon 0:71222a1e3c17 336
injaeyoon 0:71222a1e3c17 337 bool _dataRdy;
injaeyoon 0:71222a1e3c17 338
injaeyoon 0:71222a1e3c17 339 uint8_t address;
injaeyoon 0:71222a1e3c17 340
injaeyoon 0:71222a1e3c17 341 uint64_t io_timeout;
injaeyoon 0:71222a1e3c17 342
injaeyoon 0:71222a1e3c17 343 bool _wasTimeout;
injaeyoon 0:71222a1e3c17 344
injaeyoon 0:71222a1e3c17 345 uint64_t timeout_start_ms;
injaeyoon 0:71222a1e3c17 346
injaeyoon 0:71222a1e3c17 347
injaeyoon 0:71222a1e3c17 348
injaeyoon 0:71222a1e3c17 349 uint8_t stop_variable; // read by init and used when starting measurement; is StopVariable field of VL53L0X_DevData_t structure in API
injaeyoon 0:71222a1e3c17 350
injaeyoon 0:71222a1e3c17 351 uint32_t measurement_timing_budget_us;
injaeyoon 0:71222a1e3c17 352
injaeyoon 0:71222a1e3c17 353 unsigned char buffer[MAX_BUFFER_SIZE];
injaeyoon 0:71222a1e3c17 354
injaeyoon 0:71222a1e3c17 355 void dataReady(){ _dataRdy=true;}
injaeyoon 0:71222a1e3c17 356
injaeyoon 0:71222a1e3c17 357 bool getSpadInfo(uint8_t * count, bool * type_is_aperture);
injaeyoon 0:71222a1e3c17 358
injaeyoon 0:71222a1e3c17 359
injaeyoon 0:71222a1e3c17 360
injaeyoon 0:71222a1e3c17 361 void getSequenceStepEnables(SequenceStepEnables * enables);
injaeyoon 0:71222a1e3c17 362
injaeyoon 0:71222a1e3c17 363 void getSequenceStepTimeouts(SequenceStepEnables const * enables, SequenceStepTimeouts * timeouts);
injaeyoon 0:71222a1e3c17 364
injaeyoon 0:71222a1e3c17 365
injaeyoon 0:71222a1e3c17 366
injaeyoon 0:71222a1e3c17 367 bool performSingleRefCalibration(uint8_t vhv_init_byte);
injaeyoon 0:71222a1e3c17 368
injaeyoon 0:71222a1e3c17 369
injaeyoon 0:71222a1e3c17 370
injaeyoon 0:71222a1e3c17 371 static uint16_t decodeTimeout(uint16_t value);
injaeyoon 0:71222a1e3c17 372
injaeyoon 0:71222a1e3c17 373 static uint16_t encodeTimeout(uint16_t timeout_mclks);
injaeyoon 0:71222a1e3c17 374
injaeyoon 0:71222a1e3c17 375 static uint32_t timeoutMclksToMicroseconds(uint16_t timeout_period_mclks, uint8_t vcsel_period_pclks);
injaeyoon 0:71222a1e3c17 376
injaeyoon 0:71222a1e3c17 377 static uint32_t timeoutMicrosecondsToMclks(uint32_t timeout_period_us, uint8_t vcsel_period_pclks);
injaeyoon 0:71222a1e3c17 378
injaeyoon 0:71222a1e3c17 379 };
injaeyoon 0:71222a1e3c17 380
injaeyoon 0:71222a1e3c17 381
injaeyoon 0:71222a1e3c17 382
injaeyoon 0:71222a1e3c17 383 #endif
injaeyoon 0:71222a1e3c17 384
injaeyoon 0:71222a1e3c17 385
injaeyoon 0:71222a1e3c17 386