Port of MicroPython to the mbed platform. See micropython-repl for an interactive program.

Dependents:   micropython-repl

This a port of MicroPython to the mbed Classic platform.

This provides an interpreter running on the board's USB serial connection.

Getting Started

Import the micropython-repl program into your IDE workspace on developer.mbed.org. Compile and download to your board. Connect to the USB serial port in your usual manner. You should get a startup message similar to the following:

  MicroPython v1.7-155-gdddcdd8 on 2016-04-23; K64F with ARM
  Type "help()" for more information.
  >>>

Then you can start using micropython. For example:

  >>> from mbed import DigitalOut
  >>> from pins import LED1
  >>> led = DigitalOut(LED1)
  >>> led.write(1)

Requirements

You need approximately 100K of flash memory, so this will be no good for boards with smaller amounts of storage.

Caveats

This can be considered an alpha release of the port; things may not work; APIs may change in later releases. It is NOT an official part part the micropython project, so if anything doesn't work, blame me. If it does work, most of the credit is due to micropython.

  • Only a few of the mbed classes are available in micropython so far, and not all methods of those that are.
  • Only a few boards have their full range of pin names available; for others, only a few standard ones (USBTX, USBRX, LED1) are implemented.
  • The garbage collector is not yet implemented. The interpreter will gradually consume memory and then fail.
  • Exceptions from the mbed classes are not yet handled.
  • Asynchronous processing (e.g. events on inputs) is not supported.

Credits

  • Damien P. George and other contributors who created micropython.
  • Colin Hogben, author of this port.
Committer:
Colin Hogben
Date:
Wed Apr 27 22:11:29 2016 +0100
Revision:
10:33521d742af1
Parent:
0:5868e8752d44
Update README and version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pythontech 0:5868e8752d44 1 /*
pythontech 0:5868e8752d44 2 * This file is part of the Micro Python project, http://micropython.org/
pythontech 0:5868e8752d44 3 *
pythontech 0:5868e8752d44 4 * The MIT License (MIT)
pythontech 0:5868e8752d44 5 *
pythontech 0:5868e8752d44 6 * Copyright (c) 2013, 2014 Damien P. George
pythontech 0:5868e8752d44 7 *
pythontech 0:5868e8752d44 8 * Permission is hereby granted, free of charge, to any person obtaining a copy
pythontech 0:5868e8752d44 9 * of this software and associated documentation files (the "Software"), to deal
pythontech 0:5868e8752d44 10 * in the Software without restriction, including without limitation the rights
pythontech 0:5868e8752d44 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
pythontech 0:5868e8752d44 12 * copies of the Software, and to permit persons to whom the Software is
pythontech 0:5868e8752d44 13 * furnished to do so, subject to the following conditions:
pythontech 0:5868e8752d44 14 *
pythontech 0:5868e8752d44 15 * The above copyright notice and this permission notice shall be included in
pythontech 0:5868e8752d44 16 * all copies or substantial portions of the Software.
pythontech 0:5868e8752d44 17 *
pythontech 0:5868e8752d44 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
pythontech 0:5868e8752d44 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
pythontech 0:5868e8752d44 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
pythontech 0:5868e8752d44 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
pythontech 0:5868e8752d44 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
pythontech 0:5868e8752d44 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
pythontech 0:5868e8752d44 24 * THE SOFTWARE.
pythontech 0:5868e8752d44 25 */
pythontech 0:5868e8752d44 26 #ifndef __MICROPY_INCLUDED_PY_ASMTHUMB_H__
pythontech 0:5868e8752d44 27 #define __MICROPY_INCLUDED_PY_ASMTHUMB_H__
pythontech 0:5868e8752d44 28
pythontech 0:5868e8752d44 29 #include "py/misc.h"
pythontech 0:5868e8752d44 30
pythontech 0:5868e8752d44 31 #define ASM_THUMB_PASS_COMPUTE (1)
pythontech 0:5868e8752d44 32 #define ASM_THUMB_PASS_EMIT (2)
pythontech 0:5868e8752d44 33
pythontech 0:5868e8752d44 34 #define ASM_THUMB_REG_R0 (0)
pythontech 0:5868e8752d44 35 #define ASM_THUMB_REG_R1 (1)
pythontech 0:5868e8752d44 36 #define ASM_THUMB_REG_R2 (2)
pythontech 0:5868e8752d44 37 #define ASM_THUMB_REG_R3 (3)
pythontech 0:5868e8752d44 38 #define ASM_THUMB_REG_R4 (4)
pythontech 0:5868e8752d44 39 #define ASM_THUMB_REG_R5 (5)
pythontech 0:5868e8752d44 40 #define ASM_THUMB_REG_R6 (6)
pythontech 0:5868e8752d44 41 #define ASM_THUMB_REG_R7 (7)
pythontech 0:5868e8752d44 42 #define ASM_THUMB_REG_R8 (8)
pythontech 0:5868e8752d44 43 #define ASM_THUMB_REG_R9 (9)
pythontech 0:5868e8752d44 44 #define ASM_THUMB_REG_R10 (10)
pythontech 0:5868e8752d44 45 #define ASM_THUMB_REG_R11 (11)
pythontech 0:5868e8752d44 46 #define ASM_THUMB_REG_R12 (12)
pythontech 0:5868e8752d44 47 #define ASM_THUMB_REG_R13 (13)
pythontech 0:5868e8752d44 48 #define ASM_THUMB_REG_R14 (14)
pythontech 0:5868e8752d44 49 #define ASM_THUMB_REG_R15 (15)
pythontech 0:5868e8752d44 50 #define ASM_THUMB_REG_LR (REG_R14)
pythontech 0:5868e8752d44 51
pythontech 0:5868e8752d44 52 #define ASM_THUMB_CC_EQ (0x0)
pythontech 0:5868e8752d44 53 #define ASM_THUMB_CC_NE (0x1)
pythontech 0:5868e8752d44 54 #define ASM_THUMB_CC_CS (0x2)
pythontech 0:5868e8752d44 55 #define ASM_THUMB_CC_CC (0x3)
pythontech 0:5868e8752d44 56 #define ASM_THUMB_CC_MI (0x4)
pythontech 0:5868e8752d44 57 #define ASM_THUMB_CC_PL (0x5)
pythontech 0:5868e8752d44 58 #define ASM_THUMB_CC_VS (0x6)
pythontech 0:5868e8752d44 59 #define ASM_THUMB_CC_VC (0x7)
pythontech 0:5868e8752d44 60 #define ASM_THUMB_CC_HI (0x8)
pythontech 0:5868e8752d44 61 #define ASM_THUMB_CC_LS (0x9)
pythontech 0:5868e8752d44 62 #define ASM_THUMB_CC_GE (0xa)
pythontech 0:5868e8752d44 63 #define ASM_THUMB_CC_LT (0xb)
pythontech 0:5868e8752d44 64 #define ASM_THUMB_CC_GT (0xc)
pythontech 0:5868e8752d44 65 #define ASM_THUMB_CC_LE (0xd)
pythontech 0:5868e8752d44 66
pythontech 0:5868e8752d44 67 typedef struct _asm_thumb_t asm_thumb_t;
pythontech 0:5868e8752d44 68
pythontech 0:5868e8752d44 69 asm_thumb_t *asm_thumb_new(uint max_num_labels);
pythontech 0:5868e8752d44 70 void asm_thumb_free(asm_thumb_t *as, bool free_code);
pythontech 0:5868e8752d44 71 void asm_thumb_start_pass(asm_thumb_t *as, uint pass);
pythontech 0:5868e8752d44 72 void asm_thumb_end_pass(asm_thumb_t *as);
pythontech 0:5868e8752d44 73 uint asm_thumb_get_code_pos(asm_thumb_t *as);
pythontech 0:5868e8752d44 74 uint asm_thumb_get_code_size(asm_thumb_t *as);
pythontech 0:5868e8752d44 75 void *asm_thumb_get_code(asm_thumb_t *as);
pythontech 0:5868e8752d44 76
pythontech 0:5868e8752d44 77 void asm_thumb_entry(asm_thumb_t *as, int num_locals);
pythontech 0:5868e8752d44 78 void asm_thumb_exit(asm_thumb_t *as);
pythontech 0:5868e8752d44 79
pythontech 0:5868e8752d44 80 void asm_thumb_label_assign(asm_thumb_t *as, uint label);
pythontech 0:5868e8752d44 81
pythontech 0:5868e8752d44 82 void asm_thumb_align(asm_thumb_t* as, uint align);
pythontech 0:5868e8752d44 83 void asm_thumb_data(asm_thumb_t* as, uint bytesize, uint val);
pythontech 0:5868e8752d44 84
pythontech 0:5868e8752d44 85 // argument order follows ARM, in general dest is first
pythontech 0:5868e8752d44 86 // note there is a difference between movw and mov.w, and many others!
pythontech 0:5868e8752d44 87
pythontech 0:5868e8752d44 88 #define ASM_THUMB_OP_IT (0xbf00)
pythontech 0:5868e8752d44 89 #define ASM_THUMB_OP_ITE_EQ (0xbf0c)
pythontech 0:5868e8752d44 90 #define ASM_THUMB_OP_ITE_CS (0xbf2c)
pythontech 0:5868e8752d44 91 #define ASM_THUMB_OP_ITE_MI (0xbf4c)
pythontech 0:5868e8752d44 92 #define ASM_THUMB_OP_ITE_VS (0xbf6c)
pythontech 0:5868e8752d44 93 #define ASM_THUMB_OP_ITE_HI (0xbf8c)
pythontech 0:5868e8752d44 94 #define ASM_THUMB_OP_ITE_GE (0xbfac)
pythontech 0:5868e8752d44 95 #define ASM_THUMB_OP_ITE_GT (0xbfcc)
pythontech 0:5868e8752d44 96
pythontech 0:5868e8752d44 97 #define ASM_THUMB_OP_NOP (0xbf00)
pythontech 0:5868e8752d44 98 #define ASM_THUMB_OP_WFI (0xbf30)
pythontech 0:5868e8752d44 99 #define ASM_THUMB_OP_CPSID_I (0xb672) // cpsid i, disable irq
pythontech 0:5868e8752d44 100 #define ASM_THUMB_OP_CPSIE_I (0xb662) // cpsie i, enable irq
pythontech 0:5868e8752d44 101
pythontech 0:5868e8752d44 102 void asm_thumb_op16(asm_thumb_t *as, uint op);
pythontech 0:5868e8752d44 103 void asm_thumb_op32(asm_thumb_t *as, uint op1, uint op2);
pythontech 0:5868e8752d44 104
pythontech 0:5868e8752d44 105 static inline void asm_thumb_it_cc(asm_thumb_t *as, uint cc, uint mask)
pythontech 0:5868e8752d44 106 { asm_thumb_op16(as, ASM_THUMB_OP_IT | (cc << 4) | mask); }
pythontech 0:5868e8752d44 107
pythontech 0:5868e8752d44 108 // FORMAT 1: move shifted register
pythontech 0:5868e8752d44 109
pythontech 0:5868e8752d44 110 #define ASM_THUMB_FORMAT_1_LSL (0x0000)
pythontech 0:5868e8752d44 111 #define ASM_THUMB_FORMAT_1_LSR (0x0800)
pythontech 0:5868e8752d44 112 #define ASM_THUMB_FORMAT_1_ASR (0x1000)
pythontech 0:5868e8752d44 113
pythontech 0:5868e8752d44 114 #define ASM_THUMB_FORMAT_1_ENCODE(op, rlo_dest, rlo_src, offset) \
pythontech 0:5868e8752d44 115 ((op) | ((offset) << 6) | ((rlo_src) << 3) | (rlo_dest))
pythontech 0:5868e8752d44 116
pythontech 0:5868e8752d44 117 static inline void asm_thumb_format_1(asm_thumb_t *as, uint op, uint rlo_dest, uint rlo_src, uint offset) {
pythontech 0:5868e8752d44 118 assert(rlo_dest < ASM_THUMB_REG_R8);
pythontech 0:5868e8752d44 119 assert(rlo_src < ASM_THUMB_REG_R8);
pythontech 0:5868e8752d44 120 asm_thumb_op16(as, ASM_THUMB_FORMAT_1_ENCODE(op, rlo_dest, rlo_src, offset));
pythontech 0:5868e8752d44 121 }
pythontech 0:5868e8752d44 122
pythontech 0:5868e8752d44 123 // FORMAT 2: add/subtract
pythontech 0:5868e8752d44 124
pythontech 0:5868e8752d44 125 #define ASM_THUMB_FORMAT_2_ADD (0x1800)
pythontech 0:5868e8752d44 126 #define ASM_THUMB_FORMAT_2_SUB (0x1a00)
pythontech 0:5868e8752d44 127 #define ASM_THUMB_FORMAT_2_REG_OPERAND (0x0000)
pythontech 0:5868e8752d44 128 #define ASM_THUMB_FORMAT_2_IMM_OPERAND (0x0400)
pythontech 0:5868e8752d44 129
pythontech 0:5868e8752d44 130 #define ASM_THUMB_FORMAT_2_ENCODE(op, rlo_dest, rlo_src, src_b) \
pythontech 0:5868e8752d44 131 ((op) | ((src_b) << 6) | ((rlo_src) << 3) | (rlo_dest))
pythontech 0:5868e8752d44 132
pythontech 0:5868e8752d44 133 static inline void asm_thumb_format_2(asm_thumb_t *as, uint op, uint rlo_dest, uint rlo_src, int src_b) {
pythontech 0:5868e8752d44 134 assert(rlo_dest < ASM_THUMB_REG_R8);
pythontech 0:5868e8752d44 135 assert(rlo_src < ASM_THUMB_REG_R8);
pythontech 0:5868e8752d44 136 asm_thumb_op16(as, ASM_THUMB_FORMAT_2_ENCODE(op, rlo_dest, rlo_src, src_b));
pythontech 0:5868e8752d44 137 }
pythontech 0:5868e8752d44 138
pythontech 0:5868e8752d44 139 static inline void asm_thumb_add_rlo_rlo_rlo(asm_thumb_t *as, uint rlo_dest, uint rlo_src_a, uint rlo_src_b)
pythontech 0:5868e8752d44 140 { asm_thumb_format_2(as, ASM_THUMB_FORMAT_2_ADD | ASM_THUMB_FORMAT_2_REG_OPERAND, rlo_dest, rlo_src_a, rlo_src_b); }
pythontech 0:5868e8752d44 141 static inline void asm_thumb_add_rlo_rlo_i3(asm_thumb_t *as, uint rlo_dest, uint rlo_src_a, int i3_src)
pythontech 0:5868e8752d44 142 { asm_thumb_format_2(as, ASM_THUMB_FORMAT_2_ADD | ASM_THUMB_FORMAT_2_IMM_OPERAND, rlo_dest, rlo_src_a, i3_src); }
pythontech 0:5868e8752d44 143 static inline void asm_thumb_sub_rlo_rlo_rlo(asm_thumb_t *as, uint rlo_dest, uint rlo_src_a, uint rlo_src_b)
pythontech 0:5868e8752d44 144 { asm_thumb_format_2(as, ASM_THUMB_FORMAT_2_SUB | ASM_THUMB_FORMAT_2_REG_OPERAND, rlo_dest, rlo_src_a, rlo_src_b); }
pythontech 0:5868e8752d44 145 static inline void asm_thumb_sub_rlo_rlo_i3(asm_thumb_t *as, uint rlo_dest, uint rlo_src_a, int i3_src)
pythontech 0:5868e8752d44 146 { asm_thumb_format_2(as, ASM_THUMB_FORMAT_2_SUB | ASM_THUMB_FORMAT_2_IMM_OPERAND, rlo_dest, rlo_src_a, i3_src); }
pythontech 0:5868e8752d44 147
pythontech 0:5868e8752d44 148 // FORMAT 3: move/compare/add/subtract immediate
pythontech 0:5868e8752d44 149 // These instructions all do zero extension of the i8 value
pythontech 0:5868e8752d44 150
pythontech 0:5868e8752d44 151 #define ASM_THUMB_FORMAT_3_MOV (0x2000)
pythontech 0:5868e8752d44 152 #define ASM_THUMB_FORMAT_3_CMP (0x2800)
pythontech 0:5868e8752d44 153 #define ASM_THUMB_FORMAT_3_ADD (0x3000)
pythontech 0:5868e8752d44 154 #define ASM_THUMB_FORMAT_3_SUB (0x3800)
pythontech 0:5868e8752d44 155
pythontech 0:5868e8752d44 156 #define ASM_THUMB_FORMAT_3_ENCODE(op, rlo, i8) ((op) | ((rlo) << 8) | (i8))
pythontech 0:5868e8752d44 157
pythontech 0:5868e8752d44 158 static inline void asm_thumb_format_3(asm_thumb_t *as, uint op, uint rlo, int i8) {
pythontech 0:5868e8752d44 159 assert(rlo < ASM_THUMB_REG_R8);
pythontech 0:5868e8752d44 160 asm_thumb_op16(as, ASM_THUMB_FORMAT_3_ENCODE(op, rlo, i8));
pythontech 0:5868e8752d44 161 }
pythontech 0:5868e8752d44 162
pythontech 0:5868e8752d44 163 static inline void asm_thumb_mov_rlo_i8(asm_thumb_t *as, uint rlo, int i8) { asm_thumb_format_3(as, ASM_THUMB_FORMAT_3_MOV, rlo, i8); }
pythontech 0:5868e8752d44 164 static inline void asm_thumb_cmp_rlo_i8(asm_thumb_t *as, uint rlo, int i8) { asm_thumb_format_3(as, ASM_THUMB_FORMAT_3_CMP, rlo, i8); }
pythontech 0:5868e8752d44 165 static inline void asm_thumb_add_rlo_i8(asm_thumb_t *as, uint rlo, int i8) { asm_thumb_format_3(as, ASM_THUMB_FORMAT_3_ADD, rlo, i8); }
pythontech 0:5868e8752d44 166 static inline void asm_thumb_sub_rlo_i8(asm_thumb_t *as, uint rlo, int i8) { asm_thumb_format_3(as, ASM_THUMB_FORMAT_3_SUB, rlo, i8); }
pythontech 0:5868e8752d44 167
pythontech 0:5868e8752d44 168 // FORMAT 4: ALU operations
pythontech 0:5868e8752d44 169
pythontech 0:5868e8752d44 170 #define ASM_THUMB_FORMAT_4_AND (0x4000)
pythontech 0:5868e8752d44 171 #define ASM_THUMB_FORMAT_4_EOR (0x4040)
pythontech 0:5868e8752d44 172 #define ASM_THUMB_FORMAT_4_LSL (0x4080)
pythontech 0:5868e8752d44 173 #define ASM_THUMB_FORMAT_4_LSR (0x40c0)
pythontech 0:5868e8752d44 174 #define ASM_THUMB_FORMAT_4_ASR (0x4100)
pythontech 0:5868e8752d44 175 #define ASM_THUMB_FORMAT_4_ADC (0x4140)
pythontech 0:5868e8752d44 176 #define ASM_THUMB_FORMAT_4_SBC (0x4180)
pythontech 0:5868e8752d44 177 #define ASM_THUMB_FORMAT_4_ROR (0x41c0)
pythontech 0:5868e8752d44 178 #define ASM_THUMB_FORMAT_4_TST (0x4200)
pythontech 0:5868e8752d44 179 #define ASM_THUMB_FORMAT_4_NEG (0x4240)
pythontech 0:5868e8752d44 180 #define ASM_THUMB_FORMAT_4_CMP (0x4280)
pythontech 0:5868e8752d44 181 #define ASM_THUMB_FORMAT_4_CMN (0x42c0)
pythontech 0:5868e8752d44 182 #define ASM_THUMB_FORMAT_4_ORR (0x4300)
pythontech 0:5868e8752d44 183 #define ASM_THUMB_FORMAT_4_MUL (0x4340)
pythontech 0:5868e8752d44 184 #define ASM_THUMB_FORMAT_4_BIC (0x4380)
pythontech 0:5868e8752d44 185 #define ASM_THUMB_FORMAT_4_MVN (0x43c0)
pythontech 0:5868e8752d44 186
pythontech 0:5868e8752d44 187 void asm_thumb_format_4(asm_thumb_t *as, uint op, uint rlo_dest, uint rlo_src);
pythontech 0:5868e8752d44 188
pythontech 0:5868e8752d44 189 static inline void asm_thumb_cmp_rlo_rlo(asm_thumb_t *as, uint rlo_dest, uint rlo_src) { asm_thumb_format_4(as, ASM_THUMB_FORMAT_4_CMP, rlo_dest, rlo_src); }
pythontech 0:5868e8752d44 190
pythontech 0:5868e8752d44 191 // FORMAT 9: load/store with immediate offset
pythontech 0:5868e8752d44 192 // For word transfers the offset must be aligned, and >>2
pythontech 0:5868e8752d44 193
pythontech 0:5868e8752d44 194 // FORMAT 10: load/store halfword
pythontech 0:5868e8752d44 195 // The offset must be aligned, and >>1
pythontech 0:5868e8752d44 196 // The load is zero extended into the register
pythontech 0:5868e8752d44 197
pythontech 0:5868e8752d44 198 #define ASM_THUMB_FORMAT_9_STR (0x6000)
pythontech 0:5868e8752d44 199 #define ASM_THUMB_FORMAT_9_LDR (0x6800)
pythontech 0:5868e8752d44 200 #define ASM_THUMB_FORMAT_9_WORD_TRANSFER (0x0000)
pythontech 0:5868e8752d44 201 #define ASM_THUMB_FORMAT_9_BYTE_TRANSFER (0x1000)
pythontech 0:5868e8752d44 202
pythontech 0:5868e8752d44 203 #define ASM_THUMB_FORMAT_10_STRH (0x8000)
pythontech 0:5868e8752d44 204 #define ASM_THUMB_FORMAT_10_LDRH (0x8800)
pythontech 0:5868e8752d44 205
pythontech 0:5868e8752d44 206 #define ASM_THUMB_FORMAT_9_10_ENCODE(op, rlo_dest, rlo_base, offset) \
pythontech 0:5868e8752d44 207 ((op) | (((offset) << 6) & 0x07c0) | ((rlo_base) << 3) | (rlo_dest))
pythontech 0:5868e8752d44 208
pythontech 0:5868e8752d44 209 static inline void asm_thumb_format_9_10(asm_thumb_t *as, uint op, uint rlo_dest, uint rlo_base, uint offset)
pythontech 0:5868e8752d44 210 { asm_thumb_op16(as, ASM_THUMB_FORMAT_9_10_ENCODE(op, rlo_dest, rlo_base, offset)); }
pythontech 0:5868e8752d44 211
pythontech 0:5868e8752d44 212 static inline void asm_thumb_str_rlo_rlo_i5(asm_thumb_t *as, uint rlo_src, uint rlo_base, uint word_offset)
pythontech 0:5868e8752d44 213 { asm_thumb_format_9_10(as, ASM_THUMB_FORMAT_9_STR | ASM_THUMB_FORMAT_9_WORD_TRANSFER, rlo_src, rlo_base, word_offset); }
pythontech 0:5868e8752d44 214 static inline void asm_thumb_strb_rlo_rlo_i5(asm_thumb_t *as, uint rlo_src, uint rlo_base, uint byte_offset)
pythontech 0:5868e8752d44 215 { asm_thumb_format_9_10(as, ASM_THUMB_FORMAT_9_STR | ASM_THUMB_FORMAT_9_BYTE_TRANSFER, rlo_src, rlo_base, byte_offset); }
pythontech 0:5868e8752d44 216 static inline void asm_thumb_strh_rlo_rlo_i5(asm_thumb_t *as, uint rlo_src, uint rlo_base, uint byte_offset)
pythontech 0:5868e8752d44 217 { asm_thumb_format_9_10(as, ASM_THUMB_FORMAT_10_STRH, rlo_src, rlo_base, byte_offset); }
pythontech 0:5868e8752d44 218 static inline void asm_thumb_ldr_rlo_rlo_i5(asm_thumb_t *as, uint rlo_dest, uint rlo_base, uint word_offset)
pythontech 0:5868e8752d44 219 { asm_thumb_format_9_10(as, ASM_THUMB_FORMAT_9_LDR | ASM_THUMB_FORMAT_9_WORD_TRANSFER, rlo_dest, rlo_base, word_offset); }
pythontech 0:5868e8752d44 220 static inline void asm_thumb_ldrb_rlo_rlo_i5(asm_thumb_t *as, uint rlo_dest, uint rlo_base, uint byte_offset)
pythontech 0:5868e8752d44 221 { asm_thumb_format_9_10(as, ASM_THUMB_FORMAT_9_LDR | ASM_THUMB_FORMAT_9_BYTE_TRANSFER , rlo_dest, rlo_base, byte_offset); }
pythontech 0:5868e8752d44 222 static inline void asm_thumb_ldrh_rlo_rlo_i5(asm_thumb_t *as, uint rlo_dest, uint rlo_base, uint byte_offset)
pythontech 0:5868e8752d44 223 { asm_thumb_format_9_10(as, ASM_THUMB_FORMAT_10_LDRH, rlo_dest, rlo_base, byte_offset); }
pythontech 0:5868e8752d44 224
pythontech 0:5868e8752d44 225 // TODO convert these to above format style
pythontech 0:5868e8752d44 226
pythontech 0:5868e8752d44 227 #define ASM_THUMB_OP_MOVW (0xf240)
pythontech 0:5868e8752d44 228 #define ASM_THUMB_OP_MOVT (0xf2c0)
pythontech 0:5868e8752d44 229
pythontech 0:5868e8752d44 230 void asm_thumb_mov_reg_reg(asm_thumb_t *as, uint reg_dest, uint reg_src);
pythontech 0:5868e8752d44 231 void asm_thumb_mov_reg_i16(asm_thumb_t *as, uint mov_op, uint reg_dest, int i16_src);
pythontech 0:5868e8752d44 232
pythontech 0:5868e8752d44 233 // these return true if the destination is in range, false otherwise
pythontech 0:5868e8752d44 234 bool asm_thumb_b_n_label(asm_thumb_t *as, uint label);
pythontech 0:5868e8752d44 235 bool asm_thumb_bcc_nw_label(asm_thumb_t *as, int cond, uint label, bool wide);
pythontech 0:5868e8752d44 236 bool asm_thumb_bl_label(asm_thumb_t *as, uint label);
pythontech 0:5868e8752d44 237
pythontech 0:5868e8752d44 238 void asm_thumb_mov_reg_i32(asm_thumb_t *as, uint reg_dest, mp_uint_t i32_src); // convenience
pythontech 0:5868e8752d44 239 void asm_thumb_mov_reg_i32_optimised(asm_thumb_t *as, uint reg_dest, int i32_src); // convenience
pythontech 0:5868e8752d44 240 void asm_thumb_mov_reg_i32_aligned(asm_thumb_t *as, uint reg_dest, int i32); // convenience
pythontech 0:5868e8752d44 241 void asm_thumb_mov_local_reg(asm_thumb_t *as, int local_num_dest, uint rlo_src); // convenience
pythontech 0:5868e8752d44 242 void asm_thumb_mov_reg_local(asm_thumb_t *as, uint rlo_dest, int local_num); // convenience
pythontech 0:5868e8752d44 243 void asm_thumb_mov_reg_local_addr(asm_thumb_t *as, uint rlo_dest, int local_num); // convenience
pythontech 0:5868e8752d44 244
pythontech 0:5868e8752d44 245 void asm_thumb_b_label(asm_thumb_t *as, uint label); // convenience: picks narrow or wide branch
pythontech 0:5868e8752d44 246 void asm_thumb_bcc_label(asm_thumb_t *as, int cc, uint label); // convenience: picks narrow or wide branch
pythontech 0:5868e8752d44 247 void asm_thumb_bl_ind(asm_thumb_t *as, void *fun_ptr, uint fun_id, uint reg_temp); // convenience
pythontech 0:5868e8752d44 248
pythontech 0:5868e8752d44 249 #endif // __MICROPY_INCLUDED_PY_ASMTHUMB_H__