V148
Fork of RadioHead-148 by
radio_config_Si4460.h@1:b7641da2b203, 2017-10-25 (annotated)
- Committer:
- ilkaykozak
- Date:
- Wed Oct 25 05:14:09 2017 +0000
- Revision:
- 1:b7641da2b203
- Parent:
- 0:ab4e012489ef
V148
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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davidr99 | 0:ab4e012489ef | 1 | /*! @file radio_config.h |
davidr99 | 0:ab4e012489ef | 2 | * @brief This file contains the automatically generated |
davidr99 | 0:ab4e012489ef | 3 | * configurations. |
davidr99 | 0:ab4e012489ef | 4 | * |
davidr99 | 0:ab4e012489ef | 5 | * @n WDS GUI Version: 3.2.6.0 |
davidr99 | 0:ab4e012489ef | 6 | * @n Device: Si4460 Rev.: B1 |
davidr99 | 0:ab4e012489ef | 7 | * |
davidr99 | 0:ab4e012489ef | 8 | * @b COPYRIGHT |
davidr99 | 0:ab4e012489ef | 9 | * @n Silicon Laboratories Confidential |
davidr99 | 0:ab4e012489ef | 10 | * @n Copyright 2013 Silicon Laboratories, Inc. |
davidr99 | 0:ab4e012489ef | 11 | * @n http://www.silabs.com |
davidr99 | 0:ab4e012489ef | 12 | */ |
davidr99 | 0:ab4e012489ef | 13 | |
davidr99 | 0:ab4e012489ef | 14 | #ifndef RADIO_CONFIG_H_ |
davidr99 | 0:ab4e012489ef | 15 | #define RADIO_CONFIG_H_ |
davidr99 | 0:ab4e012489ef | 16 | |
davidr99 | 0:ab4e012489ef | 17 | // USER DEFINED PARAMETERS |
davidr99 | 0:ab4e012489ef | 18 | // Define your own parameters here |
davidr99 | 0:ab4e012489ef | 19 | |
davidr99 | 0:ab4e012489ef | 20 | // INPUT DATA |
davidr99 | 0:ab4e012489ef | 21 | /* |
davidr99 | 0:ab4e012489ef | 22 | // Crys_freq(Hz): 30000000 Crys_tol(ppm): 20 IF_mode: 2 High_perf_Ch_Fil: 1 OSRtune: 0 Ch_Fil_Bw_AFC: 0 ANT_DIV: 0 PM_pattern: 0 |
davidr99 | 0:ab4e012489ef | 23 | // MOD_type: 3 Rsymb(sps): 50000 Fdev(Hz): 100000 RXBW(Hz): 150000 Manchester: 0 AFC_en: 0 Rsymb_error: 0.0 Chip-Version: 2 |
davidr99 | 0:ab4e012489ef | 24 | // RF Freq.(MHz): 434 API_TC: 31 fhst: 250000 inputBW: 0 BERT: 0 RAW_dout: 0 D_source: 0 Hi_pfm_div: 1 |
davidr99 | 0:ab4e012489ef | 25 | // |
davidr99 | 0:ab4e012489ef | 26 | // # WB filter 2 (BW = 274.83 kHz); NB-filter 2 (BW = 274.83 kHz) |
davidr99 | 0:ab4e012489ef | 27 | // |
davidr99 | 0:ab4e012489ef | 28 | // Modulation index: 4 |
davidr99 | 0:ab4e012489ef | 29 | */ |
davidr99 | 0:ab4e012489ef | 30 | |
davidr99 | 0:ab4e012489ef | 31 | |
davidr99 | 0:ab4e012489ef | 32 | // CONFIGURATION PARAMETERS |
davidr99 | 0:ab4e012489ef | 33 | #define RADIO_CONFIGURATION_DATA_RADIO_XO_FREQ {30000000L} |
davidr99 | 0:ab4e012489ef | 34 | #define RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER {0x00} |
davidr99 | 0:ab4e012489ef | 35 | #define RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH {0x07} |
davidr99 | 0:ab4e012489ef | 36 | #define RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP {0x03} |
davidr99 | 0:ab4e012489ef | 37 | #define RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET {0xF000} |
davidr99 | 0:ab4e012489ef | 38 | #define RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD {0xC5, 0xC5, 0xC5, 0xC5, 0xC5, 0xC5, 0xC5} |
davidr99 | 0:ab4e012489ef | 39 | |
davidr99 | 0:ab4e012489ef | 40 | |
davidr99 | 0:ab4e012489ef | 41 | // CONFIGURATION COMMANDS |
davidr99 | 0:ab4e012489ef | 42 | |
davidr99 | 0:ab4e012489ef | 43 | /* |
davidr99 | 0:ab4e012489ef | 44 | // Command: RF_POWER_UP |
davidr99 | 0:ab4e012489ef | 45 | // Description: Command to power-up the device and select the operational mode and functionality. |
davidr99 | 0:ab4e012489ef | 46 | */ |
davidr99 | 0:ab4e012489ef | 47 | #define RF_POWER_UP 0x02, 0x01, 0x00, 0x01, 0xC9, 0xC3, 0x80 |
davidr99 | 0:ab4e012489ef | 48 | |
davidr99 | 0:ab4e012489ef | 49 | /* |
davidr99 | 0:ab4e012489ef | 50 | // Command: RF_GPIO_PIN_CFG |
davidr99 | 0:ab4e012489ef | 51 | // Description: Configures the GPIO pins. |
davidr99 | 0:ab4e012489ef | 52 | */ |
davidr99 | 0:ab4e012489ef | 53 | #define RF_GPIO_PIN_CFG 0x13, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
davidr99 | 0:ab4e012489ef | 54 | |
davidr99 | 0:ab4e012489ef | 55 | /* |
davidr99 | 0:ab4e012489ef | 56 | // Set properties: RF_GLOBAL_XO_TUNE_1 |
davidr99 | 0:ab4e012489ef | 57 | // Number of properties: 1 |
davidr99 | 0:ab4e012489ef | 58 | // Group ID: 0x00 |
davidr99 | 0:ab4e012489ef | 59 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 60 | // Default values: 0x40, |
davidr99 | 0:ab4e012489ef | 61 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 62 | // GLOBAL_XO_TUNE - Configure the internal capacitor frequency tuning bank for the crystal oscillator. |
davidr99 | 0:ab4e012489ef | 63 | */ |
davidr99 | 0:ab4e012489ef | 64 | #define RF_GLOBAL_XO_TUNE_1 0x11, 0x00, 0x01, 0x00, 0x52 |
davidr99 | 0:ab4e012489ef | 65 | |
davidr99 | 0:ab4e012489ef | 66 | /* |
davidr99 | 0:ab4e012489ef | 67 | // Set properties: RF_GLOBAL_CONFIG_1 |
davidr99 | 0:ab4e012489ef | 68 | // Number of properties: 1 |
davidr99 | 0:ab4e012489ef | 69 | // Group ID: 0x00 |
davidr99 | 0:ab4e012489ef | 70 | // Start ID: 0x03 |
davidr99 | 0:ab4e012489ef | 71 | // Default values: 0x20, |
davidr99 | 0:ab4e012489ef | 72 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 73 | // GLOBAL_CONFIG - Global configuration settings. |
davidr99 | 0:ab4e012489ef | 74 | */ |
davidr99 | 0:ab4e012489ef | 75 | #define RF_GLOBAL_CONFIG_1 0x11, 0x00, 0x01, 0x03, 0x60 |
davidr99 | 0:ab4e012489ef | 76 | |
davidr99 | 0:ab4e012489ef | 77 | /* |
davidr99 | 0:ab4e012489ef | 78 | // Set properties: RF_INT_CTL_ENABLE_2 |
davidr99 | 0:ab4e012489ef | 79 | // Number of properties: 2 |
davidr99 | 0:ab4e012489ef | 80 | // Group ID: 0x01 |
davidr99 | 0:ab4e012489ef | 81 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 82 | // Default values: 0x04, 0x00, |
davidr99 | 0:ab4e012489ef | 83 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 84 | // INT_CTL_ENABLE - This property provides for global enabling of the three interrupt groups (Chip, Modem and Packet Handler) in order to generate HW interrupts at the NIRQ pin. |
davidr99 | 0:ab4e012489ef | 85 | // INT_CTL_PH_ENABLE - Enable individual interrupt sources within the Packet Handler Interrupt Group to generate a HW interrupt on the NIRQ output pin. |
davidr99 | 0:ab4e012489ef | 86 | */ |
davidr99 | 0:ab4e012489ef | 87 | #define RF_INT_CTL_ENABLE_2 0x11, 0x01, 0x02, 0x00, 0x01, 0x38 |
davidr99 | 0:ab4e012489ef | 88 | |
davidr99 | 0:ab4e012489ef | 89 | /* |
davidr99 | 0:ab4e012489ef | 90 | // Set properties: RF_FRR_CTL_A_MODE_4 |
davidr99 | 0:ab4e012489ef | 91 | // Number of properties: 4 |
davidr99 | 0:ab4e012489ef | 92 | // Group ID: 0x02 |
davidr99 | 0:ab4e012489ef | 93 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 94 | // Default values: 0x01, 0x02, 0x09, 0x00, |
davidr99 | 0:ab4e012489ef | 95 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 96 | // FRR_CTL_A_MODE - Fast Response Register A Configuration. |
davidr99 | 0:ab4e012489ef | 97 | // FRR_CTL_B_MODE - Fast Response Register B Configuration. |
davidr99 | 0:ab4e012489ef | 98 | // FRR_CTL_C_MODE - Fast Response Register C Configuration. |
davidr99 | 0:ab4e012489ef | 99 | // FRR_CTL_D_MODE - Fast Response Register D Configuration. |
davidr99 | 0:ab4e012489ef | 100 | */ |
davidr99 | 0:ab4e012489ef | 101 | #define RF_FRR_CTL_A_MODE_4 0x11, 0x02, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00 |
davidr99 | 0:ab4e012489ef | 102 | |
davidr99 | 0:ab4e012489ef | 103 | /* |
davidr99 | 0:ab4e012489ef | 104 | // Set properties: RF_PREAMBLE_TX_LENGTH_9 |
davidr99 | 0:ab4e012489ef | 105 | // Number of properties: 9 |
davidr99 | 0:ab4e012489ef | 106 | // Group ID: 0x10 |
davidr99 | 0:ab4e012489ef | 107 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 108 | // Default values: 0x08, 0x14, 0x00, 0x0F, 0x21, 0x00, 0x00, 0x00, 0x00, |
davidr99 | 0:ab4e012489ef | 109 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 110 | // PREAMBLE_TX_LENGTH - Configure length of TX Preamble. |
davidr99 | 0:ab4e012489ef | 111 | // PREAMBLE_CONFIG_STD_1 - Configuration of reception of a packet with a Standard Preamble pattern. |
davidr99 | 0:ab4e012489ef | 112 | // PREAMBLE_CONFIG_NSTD - Configuration of transmission/reception of a packet with a Non-Standard Preamble pattern. |
davidr99 | 0:ab4e012489ef | 113 | // PREAMBLE_CONFIG_STD_2 - Configuration of timeout periods during reception of a packet with Standard Preamble pattern. |
davidr99 | 0:ab4e012489ef | 114 | // PREAMBLE_CONFIG - General configuration bits for the Preamble field. |
davidr99 | 0:ab4e012489ef | 115 | // PREAMBLE_PATTERN_31_24 - Configuration of the bit values describing a Non-Standard Preamble pattern. |
davidr99 | 0:ab4e012489ef | 116 | // PREAMBLE_PATTERN_23_16 - Configuration of the bit values describing a Non-Standard Preamble pattern. |
davidr99 | 0:ab4e012489ef | 117 | // PREAMBLE_PATTERN_15_8 - Configuration of the bit values describing a Non-Standard Preamble pattern. |
davidr99 | 0:ab4e012489ef | 118 | // PREAMBLE_PATTERN_7_0 - Configuration of the bit values describing a Non-Standard Preamble pattern. |
davidr99 | 0:ab4e012489ef | 119 | */ |
davidr99 | 0:ab4e012489ef | 120 | #define RF_PREAMBLE_TX_LENGTH_9 0x11, 0x10, 0x09, 0x00, 0x08, 0x14, 0x00, 0x0F, 0x31, 0x00, 0x00, 0x00, 0x00 |
davidr99 | 0:ab4e012489ef | 121 | |
davidr99 | 0:ab4e012489ef | 122 | /* |
davidr99 | 0:ab4e012489ef | 123 | // Set properties: RF_SYNC_CONFIG_5 |
davidr99 | 0:ab4e012489ef | 124 | // Number of properties: 5 |
davidr99 | 0:ab4e012489ef | 125 | // Group ID: 0x11 |
davidr99 | 0:ab4e012489ef | 126 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 127 | // Default values: 0x01, 0x2D, 0xD4, 0x2D, 0xD4, |
davidr99 | 0:ab4e012489ef | 128 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 129 | // SYNC_CONFIG - Sync Word configuration bits. |
davidr99 | 0:ab4e012489ef | 130 | // SYNC_BITS_31_24 - Sync word. |
davidr99 | 0:ab4e012489ef | 131 | // SYNC_BITS_23_16 - Sync word. |
davidr99 | 0:ab4e012489ef | 132 | // SYNC_BITS_15_8 - Sync word. |
davidr99 | 0:ab4e012489ef | 133 | // SYNC_BITS_7_0 - Sync word. |
davidr99 | 0:ab4e012489ef | 134 | */ |
davidr99 | 0:ab4e012489ef | 135 | #define RF_SYNC_CONFIG_5 0x11, 0x11, 0x05, 0x00, 0x01, 0xB4, 0x2B, 0x00, 0x00 |
davidr99 | 0:ab4e012489ef | 136 | |
davidr99 | 0:ab4e012489ef | 137 | /* |
davidr99 | 0:ab4e012489ef | 138 | // Set properties: RF_PKT_CRC_CONFIG_1 |
davidr99 | 0:ab4e012489ef | 139 | // Number of properties: 1 |
davidr99 | 0:ab4e012489ef | 140 | // Group ID: 0x12 |
davidr99 | 0:ab4e012489ef | 141 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 142 | // Default values: 0x00, |
davidr99 | 0:ab4e012489ef | 143 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 144 | // PKT_CRC_CONFIG - Select a CRC polynomial and seed. |
davidr99 | 0:ab4e012489ef | 145 | */ |
davidr99 | 0:ab4e012489ef | 146 | #define RF_PKT_CRC_CONFIG_1 0x11, 0x12, 0x01, 0x00, 0x80 |
davidr99 | 0:ab4e012489ef | 147 | |
davidr99 | 0:ab4e012489ef | 148 | /* |
davidr99 | 0:ab4e012489ef | 149 | // Set properties: RF_PKT_WHT_SEED_15_8_4 |
davidr99 | 0:ab4e012489ef | 150 | // Number of properties: 4 |
davidr99 | 0:ab4e012489ef | 151 | // Group ID: 0x12 |
davidr99 | 0:ab4e012489ef | 152 | // Start ID: 0x03 |
davidr99 | 0:ab4e012489ef | 153 | // Default values: 0xFF, 0xFF, 0x00, 0x00, |
davidr99 | 0:ab4e012489ef | 154 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 155 | // PKT_WHT_SEED_15_8 - 16-bit seed value for the PN Generator (e.g., for Data Whitening) |
davidr99 | 0:ab4e012489ef | 156 | // PKT_WHT_SEED_7_0 - 16-bit seed value for the PN Generator (e.g., for Data Whitening) |
davidr99 | 0:ab4e012489ef | 157 | // PKT_WHT_BIT_NUM - Selects which bit of the LFSR (used to generate the PN / data whitening sequence) is used as the output bit for data scrambling. |
davidr99 | 0:ab4e012489ef | 158 | // PKT_CONFIG1 - General configuration bits for transmission or reception of a packet. |
davidr99 | 0:ab4e012489ef | 159 | */ |
davidr99 | 0:ab4e012489ef | 160 | #define RF_PKT_WHT_SEED_15_8_4 0x11, 0x12, 0x04, 0x03, 0xFF, 0xFF, 0x00, 0x02 |
davidr99 | 0:ab4e012489ef | 161 | |
davidr99 | 0:ab4e012489ef | 162 | /* |
davidr99 | 0:ab4e012489ef | 163 | // Set properties: RF_PKT_LEN_12 |
davidr99 | 0:ab4e012489ef | 164 | // Number of properties: 12 |
davidr99 | 0:ab4e012489ef | 165 | // Group ID: 0x12 |
davidr99 | 0:ab4e012489ef | 166 | // Start ID: 0x08 |
davidr99 | 0:ab4e012489ef | 167 | // Default values: 0x00, 0x00, 0x00, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
davidr99 | 0:ab4e012489ef | 168 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 169 | // PKT_LEN - Configuration bits for reception of a variable length packet. |
davidr99 | 0:ab4e012489ef | 170 | // PKT_LEN_FIELD_SOURCE - Field number containing the received packet length byte(s). |
davidr99 | 0:ab4e012489ef | 171 | // PKT_LEN_ADJUST - Provides for adjustment/offset of the received packet length value (in order to accommodate a variety of methods of defining total packet length). |
davidr99 | 0:ab4e012489ef | 172 | // PKT_TX_THRESHOLD - TX FIFO almost empty threshold. |
davidr99 | 0:ab4e012489ef | 173 | // PKT_RX_THRESHOLD - RX FIFO Almost Full threshold. |
davidr99 | 0:ab4e012489ef | 174 | // PKT_FIELD_1_LENGTH_12_8 - Unsigned 13-bit Field 1 length value. |
davidr99 | 0:ab4e012489ef | 175 | // PKT_FIELD_1_LENGTH_7_0 - Unsigned 13-bit Field 1 length value. |
davidr99 | 0:ab4e012489ef | 176 | // PKT_FIELD_1_CONFIG - General data processing and packet configuration bits for Field 1. |
davidr99 | 0:ab4e012489ef | 177 | // PKT_FIELD_1_CRC_CONFIG - Configuration of CRC control bits across Field 1. |
davidr99 | 0:ab4e012489ef | 178 | // PKT_FIELD_2_LENGTH_12_8 - Unsigned 13-bit Field 2 length value. |
davidr99 | 0:ab4e012489ef | 179 | // PKT_FIELD_2_LENGTH_7_0 - Unsigned 13-bit Field 2 length value. |
davidr99 | 0:ab4e012489ef | 180 | // PKT_FIELD_2_CONFIG - General data processing and packet configuration bits for Field 2. |
davidr99 | 0:ab4e012489ef | 181 | */ |
davidr99 | 0:ab4e012489ef | 182 | #define RF_PKT_LEN_12 0x11, 0x12, 0x0C, 0x08, 0x00, 0x00, 0x00, 0x30, 0x30, 0x00, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00 |
davidr99 | 0:ab4e012489ef | 183 | |
davidr99 | 0:ab4e012489ef | 184 | /* |
davidr99 | 0:ab4e012489ef | 185 | // Set properties: RF_PKT_FIELD_2_CRC_CONFIG_12 |
davidr99 | 0:ab4e012489ef | 186 | // Number of properties: 12 |
davidr99 | 0:ab4e012489ef | 187 | // Group ID: 0x12 |
davidr99 | 0:ab4e012489ef | 188 | // Start ID: 0x14 |
davidr99 | 0:ab4e012489ef | 189 | // Default values: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
davidr99 | 0:ab4e012489ef | 190 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 191 | // PKT_FIELD_2_CRC_CONFIG - Configuration of CRC control bits across Field 2. |
davidr99 | 0:ab4e012489ef | 192 | // PKT_FIELD_3_LENGTH_12_8 - Unsigned 13-bit Field 3 length value. |
davidr99 | 0:ab4e012489ef | 193 | // PKT_FIELD_3_LENGTH_7_0 - Unsigned 13-bit Field 3 length value. |
davidr99 | 0:ab4e012489ef | 194 | // PKT_FIELD_3_CONFIG - General data processing and packet configuration bits for Field 3. |
davidr99 | 0:ab4e012489ef | 195 | // PKT_FIELD_3_CRC_CONFIG - Configuration of CRC control bits across Field 3. |
davidr99 | 0:ab4e012489ef | 196 | // PKT_FIELD_4_LENGTH_12_8 - Unsigned 13-bit Field 4 length value. |
davidr99 | 0:ab4e012489ef | 197 | // PKT_FIELD_4_LENGTH_7_0 - Unsigned 13-bit Field 4 length value. |
davidr99 | 0:ab4e012489ef | 198 | // PKT_FIELD_4_CONFIG - General data processing and packet configuration bits for Field 4. |
davidr99 | 0:ab4e012489ef | 199 | // PKT_FIELD_4_CRC_CONFIG - Configuration of CRC control bits across Field 4. |
davidr99 | 0:ab4e012489ef | 200 | // PKT_FIELD_5_LENGTH_12_8 - Unsigned 13-bit Field 5 length value. |
davidr99 | 0:ab4e012489ef | 201 | // PKT_FIELD_5_LENGTH_7_0 - Unsigned 13-bit Field 5 length value. |
davidr99 | 0:ab4e012489ef | 202 | // PKT_FIELD_5_CONFIG - General data processing and packet configuration bits for Field 5. |
davidr99 | 0:ab4e012489ef | 203 | */ |
davidr99 | 0:ab4e012489ef | 204 | #define RF_PKT_FIELD_2_CRC_CONFIG_12 0x11, 0x12, 0x0C, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
davidr99 | 0:ab4e012489ef | 205 | |
davidr99 | 0:ab4e012489ef | 206 | /* |
davidr99 | 0:ab4e012489ef | 207 | // Set properties: RF_PKT_FIELD_5_CRC_CONFIG_1 |
davidr99 | 0:ab4e012489ef | 208 | // Number of properties: 1 |
davidr99 | 0:ab4e012489ef | 209 | // Group ID: 0x12 |
davidr99 | 0:ab4e012489ef | 210 | // Start ID: 0x20 |
davidr99 | 0:ab4e012489ef | 211 | // Default values: 0x00, |
davidr99 | 0:ab4e012489ef | 212 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 213 | // PKT_FIELD_5_CRC_CONFIG - Configuration of CRC control bits across Field 5. |
davidr99 | 0:ab4e012489ef | 214 | */ |
davidr99 | 0:ab4e012489ef | 215 | #define RF_PKT_FIELD_5_CRC_CONFIG_1 0x11, 0x12, 0x01, 0x20, 0x00 |
davidr99 | 0:ab4e012489ef | 216 | |
davidr99 | 0:ab4e012489ef | 217 | /* |
davidr99 | 0:ab4e012489ef | 218 | // Set properties: RF_MODEM_MOD_TYPE_12 |
davidr99 | 0:ab4e012489ef | 219 | // Number of properties: 12 |
davidr99 | 0:ab4e012489ef | 220 | // Group ID: 0x20 |
davidr99 | 0:ab4e012489ef | 221 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 222 | // Default values: 0x02, 0x80, 0x07, 0x0F, 0x42, 0x40, 0x01, 0xC9, 0xC3, 0x80, 0x00, 0x06, |
davidr99 | 0:ab4e012489ef | 223 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 224 | // MODEM_MOD_TYPE - Selects the type of modulation. In TX mode, additionally selects the source of the modulation. |
davidr99 | 0:ab4e012489ef | 225 | // MODEM_MAP_CONTROL - Controls polarity and mapping of transmit and receive bits. |
davidr99 | 0:ab4e012489ef | 226 | // MODEM_DSM_CTRL - Miscellaneous control bits for the Delta-Sigma Modulator (DSM) in the PLL Synthesizer. |
davidr99 | 0:ab4e012489ef | 227 | // MODEM_DATA_RATE_2 - Unsigned 24-bit value used to determine the TX data rate |
davidr99 | 0:ab4e012489ef | 228 | // MODEM_DATA_RATE_1 - Unsigned 24-bit value used to determine the TX data rate |
davidr99 | 0:ab4e012489ef | 229 | // MODEM_DATA_RATE_0 - Unsigned 24-bit value used to determine the TX data rate |
davidr99 | 0:ab4e012489ef | 230 | // MODEM_TX_NCO_MODE_3 - TX Gaussian filter oversampling ratio and Byte 3 of unsigned 26-bit TX Numerically Controlled Oscillator (NCO) modulus. |
davidr99 | 0:ab4e012489ef | 231 | // MODEM_TX_NCO_MODE_2 - TX Gaussian filter oversampling ratio and Byte 3 of unsigned 26-bit TX Numerically Controlled Oscillator (NCO) modulus. |
davidr99 | 0:ab4e012489ef | 232 | // MODEM_TX_NCO_MODE_1 - TX Gaussian filter oversampling ratio and Byte 3 of unsigned 26-bit TX Numerically Controlled Oscillator (NCO) modulus. |
davidr99 | 0:ab4e012489ef | 233 | // MODEM_TX_NCO_MODE_0 - TX Gaussian filter oversampling ratio and Byte 3 of unsigned 26-bit TX Numerically Controlled Oscillator (NCO) modulus. |
davidr99 | 0:ab4e012489ef | 234 | // MODEM_FREQ_DEV_2 - 17-bit unsigned TX frequency deviation word. |
davidr99 | 0:ab4e012489ef | 235 | // MODEM_FREQ_DEV_1 - 17-bit unsigned TX frequency deviation word. |
davidr99 | 0:ab4e012489ef | 236 | */ |
davidr99 | 0:ab4e012489ef | 237 | #define RF_MODEM_MOD_TYPE_12 0x11, 0x20, 0x0C, 0x00, 0x03, 0x00, 0x07, 0x0F, 0x42, 0x40, 0x09, 0xC9, 0xC3, 0x80, 0x00, 0x1B |
davidr99 | 0:ab4e012489ef | 238 | |
davidr99 | 0:ab4e012489ef | 239 | /* |
davidr99 | 0:ab4e012489ef | 240 | // Set properties: RF_MODEM_FREQ_DEV_0_1 |
davidr99 | 0:ab4e012489ef | 241 | // Number of properties: 1 |
davidr99 | 0:ab4e012489ef | 242 | // Group ID: 0x20 |
davidr99 | 0:ab4e012489ef | 243 | // Start ID: 0x0C |
davidr99 | 0:ab4e012489ef | 244 | // Default values: 0xD3, |
davidr99 | 0:ab4e012489ef | 245 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 246 | // MODEM_FREQ_DEV_0 - 17-bit unsigned TX frequency deviation word. |
davidr99 | 0:ab4e012489ef | 247 | */ |
davidr99 | 0:ab4e012489ef | 248 | #define RF_MODEM_FREQ_DEV_0_1 0x11, 0x20, 0x01, 0x0C, 0x4F |
davidr99 | 0:ab4e012489ef | 249 | |
davidr99 | 0:ab4e012489ef | 250 | /* |
davidr99 | 0:ab4e012489ef | 251 | // Set properties: RF_MODEM_TX_RAMP_DELAY_8 |
davidr99 | 0:ab4e012489ef | 252 | // Number of properties: 8 |
davidr99 | 0:ab4e012489ef | 253 | // Group ID: 0x20 |
davidr99 | 0:ab4e012489ef | 254 | // Start ID: 0x18 |
davidr99 | 0:ab4e012489ef | 255 | // Default values: 0x01, 0x00, 0x08, 0x03, 0xC0, 0x00, 0x10, 0x20, |
davidr99 | 0:ab4e012489ef | 256 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 257 | // MODEM_TX_RAMP_DELAY - TX ramp-down delay setting. |
davidr99 | 0:ab4e012489ef | 258 | // MODEM_MDM_CTRL - MDM control. |
davidr99 | 0:ab4e012489ef | 259 | // MODEM_IF_CONTROL - Selects Fixed-IF, Scaled-IF, or Zero-IF mode of RX Modem operation. |
davidr99 | 0:ab4e012489ef | 260 | // MODEM_IF_FREQ_2 - the IF frequency setting (an 18-bit signed number). |
davidr99 | 0:ab4e012489ef | 261 | // MODEM_IF_FREQ_1 - the IF frequency setting (an 18-bit signed number). |
davidr99 | 0:ab4e012489ef | 262 | // MODEM_IF_FREQ_0 - the IF frequency setting (an 18-bit signed number). |
davidr99 | 0:ab4e012489ef | 263 | // MODEM_DECIMATION_CFG1 - Specifies three decimator ratios for the Cascaded Integrator Comb (CIC) filter. |
davidr99 | 0:ab4e012489ef | 264 | // MODEM_DECIMATION_CFG0 - Specifies miscellaneous parameters and decimator ratios for the Cascaded Integrator Comb (CIC) filter. |
davidr99 | 0:ab4e012489ef | 265 | */ |
davidr99 | 0:ab4e012489ef | 266 | #define RF_MODEM_TX_RAMP_DELAY_8 0x11, 0x20, 0x08, 0x18, 0x01, 0x80, 0x08, 0x03, 0x80, 0x00, 0x00, 0x10 |
davidr99 | 0:ab4e012489ef | 267 | |
davidr99 | 0:ab4e012489ef | 268 | /* |
davidr99 | 0:ab4e012489ef | 269 | // Set properties: RF_MODEM_BCR_OSR_1_9 |
davidr99 | 0:ab4e012489ef | 270 | // Number of properties: 9 |
davidr99 | 0:ab4e012489ef | 271 | // Group ID: 0x20 |
davidr99 | 0:ab4e012489ef | 272 | // Start ID: 0x22 |
davidr99 | 0:ab4e012489ef | 273 | // Default values: 0x00, 0x4B, 0x06, 0xD3, 0xA0, 0x06, 0xD3, 0x02, 0xC0, |
davidr99 | 0:ab4e012489ef | 274 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 275 | // MODEM_BCR_OSR_1 - RX BCR/Slicer oversampling rate (12-bit unsigned number). |
davidr99 | 0:ab4e012489ef | 276 | // MODEM_BCR_OSR_0 - RX BCR/Slicer oversampling rate (12-bit unsigned number). |
davidr99 | 0:ab4e012489ef | 277 | // MODEM_BCR_NCO_OFFSET_2 - RX BCR NCO offset value (an unsigned 22-bit number). |
davidr99 | 0:ab4e012489ef | 278 | // MODEM_BCR_NCO_OFFSET_1 - RX BCR NCO offset value (an unsigned 22-bit number). |
davidr99 | 0:ab4e012489ef | 279 | // MODEM_BCR_NCO_OFFSET_0 - RX BCR NCO offset value (an unsigned 22-bit number). |
davidr99 | 0:ab4e012489ef | 280 | // MODEM_BCR_GAIN_1 - The unsigned 11-bit RX BCR loop gain value. |
davidr99 | 0:ab4e012489ef | 281 | // MODEM_BCR_GAIN_0 - The unsigned 11-bit RX BCR loop gain value. |
davidr99 | 0:ab4e012489ef | 282 | // MODEM_BCR_GEAR - RX BCR loop gear control. |
davidr99 | 0:ab4e012489ef | 283 | // MODEM_BCR_MISC1 - Miscellaneous control bits for the RX BCR loop. |
davidr99 | 0:ab4e012489ef | 284 | */ |
davidr99 | 0:ab4e012489ef | 285 | #define RF_MODEM_BCR_OSR_1_9 0x11, 0x20, 0x09, 0x22, 0x00, 0xC8, 0x02, 0x8F, 0x5C, 0x01, 0x48, 0x02, 0xC2 |
davidr99 | 0:ab4e012489ef | 286 | |
davidr99 | 0:ab4e012489ef | 287 | /* |
davidr99 | 0:ab4e012489ef | 288 | // Set properties: RF_MODEM_AFC_GEAR_7 |
davidr99 | 0:ab4e012489ef | 289 | // Number of properties: 7 |
davidr99 | 0:ab4e012489ef | 290 | // Group ID: 0x20 |
davidr99 | 0:ab4e012489ef | 291 | // Start ID: 0x2C |
davidr99 | 0:ab4e012489ef | 292 | // Default values: 0x00, 0x23, 0x83, 0x69, 0x00, 0x40, 0xA0, |
davidr99 | 0:ab4e012489ef | 293 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 294 | // MODEM_AFC_GEAR - RX AFC loop gear control. |
davidr99 | 0:ab4e012489ef | 295 | // MODEM_AFC_WAIT - RX AFC loop wait time control. |
davidr99 | 0:ab4e012489ef | 296 | // MODEM_AFC_GAIN_1 - Sets the gain of the PLL-based AFC acquisition loop, and provides miscellaneous control bits for AFC functionality. |
davidr99 | 0:ab4e012489ef | 297 | // MODEM_AFC_GAIN_0 - Sets the gain of the PLL-based AFC acquisition loop, and provides miscellaneous control bits for AFC functionality. |
davidr99 | 0:ab4e012489ef | 298 | // MODEM_AFC_LIMITER_1 - Set the AFC limiter value. |
davidr99 | 0:ab4e012489ef | 299 | // MODEM_AFC_LIMITER_0 - Set the AFC limiter value. |
davidr99 | 0:ab4e012489ef | 300 | // MODEM_AFC_MISC - Specifies miscellaneous AFC control bits. |
davidr99 | 0:ab4e012489ef | 301 | */ |
davidr99 | 0:ab4e012489ef | 302 | #define RF_MODEM_AFC_GEAR_7 0x11, 0x20, 0x07, 0x2C, 0x04, 0x36, 0x80, 0x92, 0x0A, 0x46, 0x80 |
davidr99 | 0:ab4e012489ef | 303 | |
davidr99 | 0:ab4e012489ef | 304 | /* |
davidr99 | 0:ab4e012489ef | 305 | // Set properties: RF_MODEM_AGC_CONTROL_1 |
davidr99 | 0:ab4e012489ef | 306 | // Number of properties: 1 |
davidr99 | 0:ab4e012489ef | 307 | // Group ID: 0x20 |
davidr99 | 0:ab4e012489ef | 308 | // Start ID: 0x35 |
davidr99 | 0:ab4e012489ef | 309 | // Default values: 0xE0, |
davidr99 | 0:ab4e012489ef | 310 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 311 | // MODEM_AGC_CONTROL - Miscellaneous control bits for the Automatic Gain Control (AGC) function in the RX Chain. |
davidr99 | 0:ab4e012489ef | 312 | */ |
davidr99 | 0:ab4e012489ef | 313 | #define RF_MODEM_AGC_CONTROL_1 0x11, 0x20, 0x01, 0x35, 0xE2 |
davidr99 | 0:ab4e012489ef | 314 | |
davidr99 | 0:ab4e012489ef | 315 | /* |
davidr99 | 0:ab4e012489ef | 316 | // Set properties: RF_MODEM_AGC_WINDOW_SIZE_9 |
davidr99 | 0:ab4e012489ef | 317 | // Number of properties: 9 |
davidr99 | 0:ab4e012489ef | 318 | // Group ID: 0x20 |
davidr99 | 0:ab4e012489ef | 319 | // Start ID: 0x38 |
davidr99 | 0:ab4e012489ef | 320 | // Default values: 0x11, 0x10, 0x10, 0x0B, 0x1C, 0x40, 0x00, 0x00, 0x2B, |
davidr99 | 0:ab4e012489ef | 321 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 322 | // MODEM_AGC_WINDOW_SIZE - Specifies the size of the measurement and settling windows for the AGC algorithm. |
davidr99 | 0:ab4e012489ef | 323 | // MODEM_AGC_RFPD_DECAY - Sets the decay time of the RF peak detectors. |
davidr99 | 0:ab4e012489ef | 324 | // MODEM_AGC_IFPD_DECAY - Sets the decay time of the IF peak detectors. |
davidr99 | 0:ab4e012489ef | 325 | // MODEM_FSK4_GAIN1 - Specifies the gain factor of the secondary branch in 4(G)FSK ISI-suppression. |
davidr99 | 0:ab4e012489ef | 326 | // MODEM_FSK4_GAIN0 - Specifies the gain factor of the primary branch in 4(G)FSK ISI-suppression. |
davidr99 | 0:ab4e012489ef | 327 | // MODEM_FSK4_TH1 - 16 bit 4(G)FSK slicer threshold. |
davidr99 | 0:ab4e012489ef | 328 | // MODEM_FSK4_TH0 - 16 bit 4(G)FSK slicer threshold. |
davidr99 | 0:ab4e012489ef | 329 | // MODEM_FSK4_MAP - 4(G)FSK symbol mapping code. |
davidr99 | 0:ab4e012489ef | 330 | // MODEM_OOK_PDTC - Configures the attack and decay times of the OOK Peak Detector. |
davidr99 | 0:ab4e012489ef | 331 | */ |
davidr99 | 0:ab4e012489ef | 332 | #define RF_MODEM_AGC_WINDOW_SIZE_9 0x11, 0x20, 0x09, 0x38, 0x11, 0x2C, 0x2C, 0x00, 0x1A, 0xFF, 0xFF, 0x00, 0x29 |
davidr99 | 0:ab4e012489ef | 333 | |
davidr99 | 0:ab4e012489ef | 334 | /* |
davidr99 | 0:ab4e012489ef | 335 | // Set properties: RF_MODEM_OOK_CNT1_11 |
davidr99 | 0:ab4e012489ef | 336 | // Number of properties: 11 |
davidr99 | 0:ab4e012489ef | 337 | // Group ID: 0x20 |
davidr99 | 0:ab4e012489ef | 338 | // Start ID: 0x42 |
davidr99 | 0:ab4e012489ef | 339 | // Default values: 0xA4, 0x03, 0x56, 0x02, 0x00, 0xA3, 0x02, 0x80, 0xFF, 0x0C, 0x01, |
davidr99 | 0:ab4e012489ef | 340 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 341 | // MODEM_OOK_CNT1 - OOK control. |
davidr99 | 0:ab4e012489ef | 342 | // MODEM_OOK_MISC - Selects the detector(s) used for demodulation of an OOK signal, or for demodulation of a (G)FSK signal when using the asynchronous demodulator. |
davidr99 | 0:ab4e012489ef | 343 | // MODEM_RAW_SEARCH - Defines and controls the search period length for the Moving Average and Min-Max detectors. |
davidr99 | 0:ab4e012489ef | 344 | // MODEM_RAW_CONTROL - Defines gain and enable controls for raw / nonstandard mode. |
davidr99 | 0:ab4e012489ef | 345 | // MODEM_RAW_EYE_1 - 11 bit eye-open detector threshold. |
davidr99 | 0:ab4e012489ef | 346 | // MODEM_RAW_EYE_0 - 11 bit eye-open detector threshold. |
davidr99 | 0:ab4e012489ef | 347 | // MODEM_ANT_DIV_MODE - Antenna diversity mode settings. |
davidr99 | 0:ab4e012489ef | 348 | // MODEM_ANT_DIV_CONTROL - Specifies controls for the Antenna Diversity algorithm. |
davidr99 | 0:ab4e012489ef | 349 | // MODEM_RSSI_THRESH - Configures the RSSI threshold. |
davidr99 | 0:ab4e012489ef | 350 | // MODEM_RSSI_JUMP_THRESH - Configures the RSSI Jump Detection threshold. |
davidr99 | 0:ab4e012489ef | 351 | // MODEM_RSSI_CONTROL - Control of the averaging modes and latching time for reporting RSSI value(s). |
davidr99 | 0:ab4e012489ef | 352 | */ |
davidr99 | 0:ab4e012489ef | 353 | #define RF_MODEM_OOK_CNT1_11 0x11, 0x20, 0x0B, 0x42, 0xA4, 0x02, 0xD6, 0x83, 0x01, 0x7F, 0x01, 0x80, 0xFF, 0x0C, 0x02 |
davidr99 | 0:ab4e012489ef | 354 | |
davidr99 | 0:ab4e012489ef | 355 | /* |
davidr99 | 0:ab4e012489ef | 356 | // Set properties: RF_MODEM_RSSI_COMP_1 |
davidr99 | 0:ab4e012489ef | 357 | // Number of properties: 1 |
davidr99 | 0:ab4e012489ef | 358 | // Group ID: 0x20 |
davidr99 | 0:ab4e012489ef | 359 | // Start ID: 0x4E |
davidr99 | 0:ab4e012489ef | 360 | // Default values: 0x40, |
davidr99 | 0:ab4e012489ef | 361 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 362 | // MODEM_RSSI_COMP - RSSI compensation value. |
davidr99 | 0:ab4e012489ef | 363 | */ |
davidr99 | 0:ab4e012489ef | 364 | #define RF_MODEM_RSSI_COMP_1 0x11, 0x20, 0x01, 0x4E, 0x40 |
davidr99 | 0:ab4e012489ef | 365 | |
davidr99 | 0:ab4e012489ef | 366 | /* |
davidr99 | 0:ab4e012489ef | 367 | // Set properties: RF_MODEM_CLKGEN_BAND_1 |
davidr99 | 0:ab4e012489ef | 368 | // Number of properties: 1 |
davidr99 | 0:ab4e012489ef | 369 | // Group ID: 0x20 |
davidr99 | 0:ab4e012489ef | 370 | // Start ID: 0x51 |
davidr99 | 0:ab4e012489ef | 371 | // Default values: 0x08, |
davidr99 | 0:ab4e012489ef | 372 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 373 | // MODEM_CLKGEN_BAND - Select PLL Synthesizer output divider ratio as a function of frequency band. |
davidr99 | 0:ab4e012489ef | 374 | */ |
davidr99 | 0:ab4e012489ef | 375 | #define RF_MODEM_CLKGEN_BAND_1 0x11, 0x20, 0x01, 0x51, 0x0A |
davidr99 | 0:ab4e012489ef | 376 | |
davidr99 | 0:ab4e012489ef | 377 | /* |
davidr99 | 0:ab4e012489ef | 378 | // Set properties: RF_MODEM_CHFLT_RX1_CHFLT_COE13_7_0_12 |
davidr99 | 0:ab4e012489ef | 379 | // Number of properties: 12 |
davidr99 | 0:ab4e012489ef | 380 | // Group ID: 0x21 |
davidr99 | 0:ab4e012489ef | 381 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 382 | // Default values: 0xFF, 0xBA, 0x0F, 0x51, 0xCF, 0xA9, 0xC9, 0xFC, 0x1B, 0x1E, 0x0F, 0x01, |
davidr99 | 0:ab4e012489ef | 383 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 384 | // MODEM_CHFLT_RX1_CHFLT_COE13_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 385 | // MODEM_CHFLT_RX1_CHFLT_COE12_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 386 | // MODEM_CHFLT_RX1_CHFLT_COE11_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 387 | // MODEM_CHFLT_RX1_CHFLT_COE10_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 388 | // MODEM_CHFLT_RX1_CHFLT_COE9_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 389 | // MODEM_CHFLT_RX1_CHFLT_COE8_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 390 | // MODEM_CHFLT_RX1_CHFLT_COE7_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 391 | // MODEM_CHFLT_RX1_CHFLT_COE6_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 392 | // MODEM_CHFLT_RX1_CHFLT_COE5_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 393 | // MODEM_CHFLT_RX1_CHFLT_COE4_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 394 | // MODEM_CHFLT_RX1_CHFLT_COE3_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 395 | // MODEM_CHFLT_RX1_CHFLT_COE2_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 396 | */ |
davidr99 | 0:ab4e012489ef | 397 | #define RF_MODEM_CHFLT_RX1_CHFLT_COE13_7_0_12 0x11, 0x21, 0x0C, 0x00, 0xFF, 0xC4, 0x30, 0x7F, 0xF5, 0xB5, 0xB8, 0xDE, 0x05, 0x17, 0x16, 0x0C |
davidr99 | 0:ab4e012489ef | 398 | |
davidr99 | 0:ab4e012489ef | 399 | /* |
davidr99 | 0:ab4e012489ef | 400 | // Set properties: RF_MODEM_CHFLT_RX1_CHFLT_COE1_7_0_12 |
davidr99 | 0:ab4e012489ef | 401 | // Number of properties: 12 |
davidr99 | 0:ab4e012489ef | 402 | // Group ID: 0x21 |
davidr99 | 0:ab4e012489ef | 403 | // Start ID: 0x0C |
davidr99 | 0:ab4e012489ef | 404 | // Default values: 0xFC, 0xFD, 0x15, 0xFF, 0x00, 0x0F, 0xFF, 0xC4, 0x30, 0x7F, 0xF5, 0xB5, |
davidr99 | 0:ab4e012489ef | 405 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 406 | // MODEM_CHFLT_RX1_CHFLT_COE1_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 407 | // MODEM_CHFLT_RX1_CHFLT_COE0_7_0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 408 | // MODEM_CHFLT_RX1_CHFLT_COEM0 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 409 | // MODEM_CHFLT_RX1_CHFLT_COEM1 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 410 | // MODEM_CHFLT_RX1_CHFLT_COEM2 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 411 | // MODEM_CHFLT_RX1_CHFLT_COEM3 - Filter coefficients for the first set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 412 | // MODEM_CHFLT_RX2_CHFLT_COE13_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 413 | // MODEM_CHFLT_RX2_CHFLT_COE12_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 414 | // MODEM_CHFLT_RX2_CHFLT_COE11_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 415 | // MODEM_CHFLT_RX2_CHFLT_COE10_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 416 | // MODEM_CHFLT_RX2_CHFLT_COE9_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 417 | // MODEM_CHFLT_RX2_CHFLT_COE8_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 418 | */ |
davidr99 | 0:ab4e012489ef | 419 | #define RF_MODEM_CHFLT_RX1_CHFLT_COE1_7_0_12 0x11, 0x21, 0x0C, 0x0C, 0x03, 0x00, 0x15, 0xFF, 0x00, 0x00, 0xFF, 0xC4, 0x30, 0x7F, 0xF5, 0xB5 |
davidr99 | 0:ab4e012489ef | 420 | |
davidr99 | 0:ab4e012489ef | 421 | /* |
davidr99 | 0:ab4e012489ef | 422 | // Set properties: RF_MODEM_CHFLT_RX2_CHFLT_COE7_7_0_12 |
davidr99 | 0:ab4e012489ef | 423 | // Number of properties: 12 |
davidr99 | 0:ab4e012489ef | 424 | // Group ID: 0x21 |
davidr99 | 0:ab4e012489ef | 425 | // Start ID: 0x18 |
davidr99 | 0:ab4e012489ef | 426 | // Default values: 0xB8, 0xDE, 0x05, 0x17, 0x16, 0x0C, 0x03, 0x00, 0x15, 0xFF, 0x00, 0x00, |
davidr99 | 0:ab4e012489ef | 427 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 428 | // MODEM_CHFLT_RX2_CHFLT_COE7_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 429 | // MODEM_CHFLT_RX2_CHFLT_COE6_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 430 | // MODEM_CHFLT_RX2_CHFLT_COE5_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 431 | // MODEM_CHFLT_RX2_CHFLT_COE4_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 432 | // MODEM_CHFLT_RX2_CHFLT_COE3_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 433 | // MODEM_CHFLT_RX2_CHFLT_COE2_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 434 | // MODEM_CHFLT_RX2_CHFLT_COE1_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 435 | // MODEM_CHFLT_RX2_CHFLT_COE0_7_0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 436 | // MODEM_CHFLT_RX2_CHFLT_COEM0 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 437 | // MODEM_CHFLT_RX2_CHFLT_COEM1 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 438 | // MODEM_CHFLT_RX2_CHFLT_COEM2 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 439 | // MODEM_CHFLT_RX2_CHFLT_COEM3 - Filter coefficients for the second set of RX filter coefficients. |
davidr99 | 0:ab4e012489ef | 440 | */ |
davidr99 | 0:ab4e012489ef | 441 | #define RF_MODEM_CHFLT_RX2_CHFLT_COE7_7_0_12 0x11, 0x21, 0x0C, 0x18, 0xB8, 0xDE, 0x05, 0x17, 0x16, 0x0C, 0x03, 0x00, 0x15, 0xFF, 0x00, 0x00 |
davidr99 | 0:ab4e012489ef | 442 | |
davidr99 | 0:ab4e012489ef | 443 | /* |
davidr99 | 0:ab4e012489ef | 444 | // Set properties: RF_PA_MODE_4 |
davidr99 | 0:ab4e012489ef | 445 | // Number of properties: 4 |
davidr99 | 0:ab4e012489ef | 446 | // Group ID: 0x22 |
davidr99 | 0:ab4e012489ef | 447 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 448 | // Default values: 0x08, 0x7F, 0x00, 0x5D, |
davidr99 | 0:ab4e012489ef | 449 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 450 | // PA_MODE - Selects the PA operating mode, and selects resolution of PA power adjustment (i.e., step size). |
davidr99 | 0:ab4e012489ef | 451 | // PA_PWR_LVL - Configuration of PA output power level. |
davidr99 | 0:ab4e012489ef | 452 | // PA_BIAS_CLKDUTY - Configuration of the PA Bias and duty cycle of the TX clock source. |
davidr99 | 0:ab4e012489ef | 453 | // PA_TC - Configuration of PA ramping parameters. |
davidr99 | 0:ab4e012489ef | 454 | */ |
davidr99 | 0:ab4e012489ef | 455 | #define RF_PA_MODE_4 0x11, 0x22, 0x04, 0x00, 0x18, 0x01, 0xC0, 0x3F |
davidr99 | 0:ab4e012489ef | 456 | |
davidr99 | 0:ab4e012489ef | 457 | /* |
davidr99 | 0:ab4e012489ef | 458 | // Set properties: RF_SYNTH_PFDCP_CPFF_7 |
davidr99 | 0:ab4e012489ef | 459 | // Number of properties: 7 |
davidr99 | 0:ab4e012489ef | 460 | // Group ID: 0x23 |
davidr99 | 0:ab4e012489ef | 461 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 462 | // Default values: 0x2C, 0x0E, 0x0B, 0x04, 0x0C, 0x73, 0x03, |
davidr99 | 0:ab4e012489ef | 463 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 464 | // SYNTH_PFDCP_CPFF - Feed forward charge pump current selection. |
davidr99 | 0:ab4e012489ef | 465 | // SYNTH_PFDCP_CPINT - Integration charge pump current selection. |
davidr99 | 0:ab4e012489ef | 466 | // SYNTH_VCO_KV - Gain scaling factors (Kv) for the VCO tuning varactors on both the integrated-path and feed forward path. |
davidr99 | 0:ab4e012489ef | 467 | // SYNTH_LPFILT3 - Value of resistor R2 in feed-forward path of loop filter. |
davidr99 | 0:ab4e012489ef | 468 | // SYNTH_LPFILT2 - Value of capacitor C2 in feed-forward path of loop filter. |
davidr99 | 0:ab4e012489ef | 469 | // SYNTH_LPFILT1 - Value of capacitors C1 and C3 in feed-forward path of loop filter. |
davidr99 | 0:ab4e012489ef | 470 | // SYNTH_LPFILT0 - Bias current of the active amplifier in the feed-forward loop filter. |
davidr99 | 0:ab4e012489ef | 471 | */ |
davidr99 | 0:ab4e012489ef | 472 | #define RF_SYNTH_PFDCP_CPFF_7 0x11, 0x23, 0x07, 0x00, 0x2C, 0x0E, 0x0B, 0x04, 0x0C, 0x73, 0x03 |
davidr99 | 0:ab4e012489ef | 473 | |
davidr99 | 0:ab4e012489ef | 474 | /* |
davidr99 | 0:ab4e012489ef | 475 | // Set properties: RF_MATCH_VALUE_1_12 |
davidr99 | 0:ab4e012489ef | 476 | // Number of properties: 12 |
davidr99 | 0:ab4e012489ef | 477 | // Group ID: 0x30 |
davidr99 | 0:ab4e012489ef | 478 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 479 | // Default values: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
davidr99 | 0:ab4e012489ef | 480 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 481 | // MATCH_VALUE_1 - Match value to be compared with the result of logically AND-ing (bit-wise) the Mask 1 value with the received Match 1 byte. |
davidr99 | 0:ab4e012489ef | 482 | // MATCH_MASK_1 - Mask value to be logically AND-ed (bit-wise) with the Match 1 byte. |
davidr99 | 0:ab4e012489ef | 483 | // MATCH_CTRL_1 - Enable for Packet Match functionality, and configuration of Match Byte 1. |
davidr99 | 0:ab4e012489ef | 484 | // MATCH_VALUE_2 - Match value to be compared with the result of logically AND-ing (bit-wise) the Mask 2 value with the received Match 2 byte. |
davidr99 | 0:ab4e012489ef | 485 | // MATCH_MASK_2 - Mask value to be logically AND-ed (bit-wise) with the Match 2 byte. |
davidr99 | 0:ab4e012489ef | 486 | // MATCH_CTRL_2 - Configuration of Match Byte 2. |
davidr99 | 0:ab4e012489ef | 487 | // MATCH_VALUE_3 - Match value to be compared with the result of logically AND-ing (bit-wise) the Mask 3 value with the received Match 3 byte. |
davidr99 | 0:ab4e012489ef | 488 | // MATCH_MASK_3 - Mask value to be logically AND-ed (bit-wise) with the Match 3 byte. |
davidr99 | 0:ab4e012489ef | 489 | // MATCH_CTRL_3 - Configuration of Match Byte 3. |
davidr99 | 0:ab4e012489ef | 490 | // MATCH_VALUE_4 - Match value to be compared with the result of logically AND-ing (bit-wise) the Mask 4 value with the received Match 4 byte. |
davidr99 | 0:ab4e012489ef | 491 | // MATCH_MASK_4 - Mask value to be logically AND-ed (bit-wise) with the Match 4 byte. |
davidr99 | 0:ab4e012489ef | 492 | // MATCH_CTRL_4 - Configuration of Match Byte 4. |
davidr99 | 0:ab4e012489ef | 493 | */ |
davidr99 | 0:ab4e012489ef | 494 | #define RF_MATCH_VALUE_1_12 0x11, 0x30, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
davidr99 | 0:ab4e012489ef | 495 | |
davidr99 | 0:ab4e012489ef | 496 | /* |
davidr99 | 0:ab4e012489ef | 497 | // Set properties: RF_FREQ_CONTROL_INTE_8 |
davidr99 | 0:ab4e012489ef | 498 | // Number of properties: 8 |
davidr99 | 0:ab4e012489ef | 499 | // Group ID: 0x40 |
davidr99 | 0:ab4e012489ef | 500 | // Start ID: 0x00 |
davidr99 | 0:ab4e012489ef | 501 | // Default values: 0x3C, 0x08, 0x00, 0x00, 0x00, 0x00, 0x20, 0xFF, |
davidr99 | 0:ab4e012489ef | 502 | // Descriptions: |
davidr99 | 0:ab4e012489ef | 503 | // FREQ_CONTROL_INTE - Frac-N PLL Synthesizer integer divide number. |
davidr99 | 0:ab4e012489ef | 504 | // FREQ_CONTROL_FRAC_2 - Frac-N PLL fraction number. |
davidr99 | 0:ab4e012489ef | 505 | // FREQ_CONTROL_FRAC_1 - Frac-N PLL fraction number. |
davidr99 | 0:ab4e012489ef | 506 | // FREQ_CONTROL_FRAC_0 - Frac-N PLL fraction number. |
davidr99 | 0:ab4e012489ef | 507 | // FREQ_CONTROL_CHANNEL_STEP_SIZE_1 - EZ Frequency Programming channel step size. |
davidr99 | 0:ab4e012489ef | 508 | // FREQ_CONTROL_CHANNEL_STEP_SIZE_0 - EZ Frequency Programming channel step size. |
davidr99 | 0:ab4e012489ef | 509 | // FREQ_CONTROL_W_SIZE - Set window gating period (in number of crystal reference clock cycles) for counting VCO frequency during calibration. |
davidr99 | 0:ab4e012489ef | 510 | // FREQ_CONTROL_VCOCNT_RX_ADJ - Adjust target count for VCO calibration in RX mode. |
davidr99 | 0:ab4e012489ef | 511 | */ |
davidr99 | 0:ab4e012489ef | 512 | #define RF_FREQ_CONTROL_INTE_8 0x11, 0x40, 0x08, 0x00, 0x38, 0x0E, 0xEE, 0xEE, 0x44, 0x44, 0x20, 0xFE |
davidr99 | 0:ab4e012489ef | 513 | |
davidr99 | 0:ab4e012489ef | 514 | |
davidr99 | 0:ab4e012489ef | 515 | // AUTOMATICALLY GENERATED CODE! |
davidr99 | 0:ab4e012489ef | 516 | // DO NOT EDIT/MODIFY BELOW THIS LINE! |
davidr99 | 0:ab4e012489ef | 517 | // -------------------------------------------- |
davidr99 | 0:ab4e012489ef | 518 | |
davidr99 | 0:ab4e012489ef | 519 | #ifndef FIRMWARE_LOAD_COMPILE |
davidr99 | 0:ab4e012489ef | 520 | #define RADIO_CONFIGURATION_DATA_ARRAY { \ |
davidr99 | 0:ab4e012489ef | 521 | 0x07, RF_POWER_UP, \ |
davidr99 | 0:ab4e012489ef | 522 | 0x08, RF_GPIO_PIN_CFG, \ |
davidr99 | 0:ab4e012489ef | 523 | 0x05, RF_GLOBAL_XO_TUNE_1, \ |
davidr99 | 0:ab4e012489ef | 524 | 0x05, RF_GLOBAL_CONFIG_1, \ |
davidr99 | 0:ab4e012489ef | 525 | 0x06, RF_INT_CTL_ENABLE_2, \ |
davidr99 | 0:ab4e012489ef | 526 | 0x08, RF_FRR_CTL_A_MODE_4, \ |
davidr99 | 0:ab4e012489ef | 527 | 0x0D, RF_PREAMBLE_TX_LENGTH_9, \ |
davidr99 | 0:ab4e012489ef | 528 | 0x09, RF_SYNC_CONFIG_5, \ |
davidr99 | 0:ab4e012489ef | 529 | 0x05, RF_PKT_CRC_CONFIG_1, \ |
davidr99 | 0:ab4e012489ef | 530 | 0x08, RF_PKT_WHT_SEED_15_8_4, \ |
davidr99 | 0:ab4e012489ef | 531 | 0x10, RF_PKT_LEN_12, \ |
davidr99 | 0:ab4e012489ef | 532 | 0x10, RF_PKT_FIELD_2_CRC_CONFIG_12, \ |
davidr99 | 0:ab4e012489ef | 533 | 0x05, RF_PKT_FIELD_5_CRC_CONFIG_1, \ |
davidr99 | 0:ab4e012489ef | 534 | 0x10, RF_MODEM_MOD_TYPE_12, \ |
davidr99 | 0:ab4e012489ef | 535 | 0x05, RF_MODEM_FREQ_DEV_0_1, \ |
davidr99 | 0:ab4e012489ef | 536 | 0x0C, RF_MODEM_TX_RAMP_DELAY_8, \ |
davidr99 | 0:ab4e012489ef | 537 | 0x0D, RF_MODEM_BCR_OSR_1_9, \ |
davidr99 | 0:ab4e012489ef | 538 | 0x0B, RF_MODEM_AFC_GEAR_7, \ |
davidr99 | 0:ab4e012489ef | 539 | 0x05, RF_MODEM_AGC_CONTROL_1, \ |
davidr99 | 0:ab4e012489ef | 540 | 0x0D, RF_MODEM_AGC_WINDOW_SIZE_9, \ |
davidr99 | 0:ab4e012489ef | 541 | 0x0F, RF_MODEM_OOK_CNT1_11, \ |
davidr99 | 0:ab4e012489ef | 542 | 0x05, RF_MODEM_RSSI_COMP_1, \ |
davidr99 | 0:ab4e012489ef | 543 | 0x05, RF_MODEM_CLKGEN_BAND_1, \ |
davidr99 | 0:ab4e012489ef | 544 | 0x10, RF_MODEM_CHFLT_RX1_CHFLT_COE13_7_0_12, \ |
davidr99 | 0:ab4e012489ef | 545 | 0x10, RF_MODEM_CHFLT_RX1_CHFLT_COE1_7_0_12, \ |
davidr99 | 0:ab4e012489ef | 546 | 0x10, RF_MODEM_CHFLT_RX2_CHFLT_COE7_7_0_12, \ |
davidr99 | 0:ab4e012489ef | 547 | 0x08, RF_PA_MODE_4, \ |
davidr99 | 0:ab4e012489ef | 548 | 0x0B, RF_SYNTH_PFDCP_CPFF_7, \ |
davidr99 | 0:ab4e012489ef | 549 | 0x10, RF_MATCH_VALUE_1_12, \ |
davidr99 | 0:ab4e012489ef | 550 | 0x0C, RF_FREQ_CONTROL_INTE_8, \ |
davidr99 | 0:ab4e012489ef | 551 | 0x00 \ |
davidr99 | 0:ab4e012489ef | 552 | } |
davidr99 | 0:ab4e012489ef | 553 | #else |
davidr99 | 0:ab4e012489ef | 554 | #define RADIO_CONFIGURATION_DATA_ARRAY { 0 } |
davidr99 | 0:ab4e012489ef | 555 | #endif |
davidr99 | 0:ab4e012489ef | 556 | |
davidr99 | 0:ab4e012489ef | 557 | // DEFAULT VALUES FOR CONFIGURATION PARAMETERS |
davidr99 | 0:ab4e012489ef | 558 | #define RADIO_CONFIGURATION_DATA_RADIO_XO_FREQ_DEFAULT 30000000L |
davidr99 | 0:ab4e012489ef | 559 | #define RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER_DEFAULT 0x00 |
davidr99 | 0:ab4e012489ef | 560 | #define RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH_DEFAULT 0x10 |
davidr99 | 0:ab4e012489ef | 561 | #define RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP_DEFAULT 0x01 |
davidr99 | 0:ab4e012489ef | 562 | #define RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET_DEFAULT 0x1000 |
davidr99 | 0:ab4e012489ef | 563 | #define RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD_DEFAULT 0x42, 0x55, 0x54, 0x54, 0x4F, 0x4E, 0x31 // BUTTON1 |
davidr99 | 0:ab4e012489ef | 564 | |
davidr99 | 0:ab4e012489ef | 565 | #define RADIO_CONFIGURATION_DATA_RADIO_PATCH_INCLUDED 0x00 |
davidr99 | 0:ab4e012489ef | 566 | #define RADIO_CONFIGURATION_DATA_RADIO_PATCH_SIZE 0x00 |
davidr99 | 0:ab4e012489ef | 567 | #define RADIO_CONFIGURATION_DATA_RADIO_PATCH { } |
davidr99 | 0:ab4e012489ef | 568 | |
davidr99 | 0:ab4e012489ef | 569 | #ifndef RADIO_CONFIGURATION_DATA_ARRAY |
davidr99 | 0:ab4e012489ef | 570 | #error "This property must be defined!" |
davidr99 | 0:ab4e012489ef | 571 | #endif |
davidr99 | 0:ab4e012489ef | 572 | |
davidr99 | 0:ab4e012489ef | 573 | #ifndef RADIO_CONFIGURATION_DATA_RADIO_XO_FREQ |
davidr99 | 0:ab4e012489ef | 574 | #define RADIO_CONFIGURATION_DATA_RADIO_XO_FREQ { RADIO_CONFIGURATION_DATA_RADIO_XO_FREQ_DEFAULT } |
davidr99 | 0:ab4e012489ef | 575 | #endif |
davidr99 | 0:ab4e012489ef | 576 | |
davidr99 | 0:ab4e012489ef | 577 | #ifndef RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER |
davidr99 | 0:ab4e012489ef | 578 | #define RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER { RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER_DEFAULT } |
davidr99 | 0:ab4e012489ef | 579 | #endif |
davidr99 | 0:ab4e012489ef | 580 | |
davidr99 | 0:ab4e012489ef | 581 | #ifndef RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH |
davidr99 | 0:ab4e012489ef | 582 | #define RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH { RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH_DEFAULT } |
davidr99 | 0:ab4e012489ef | 583 | #endif |
davidr99 | 0:ab4e012489ef | 584 | |
davidr99 | 0:ab4e012489ef | 585 | #ifndef RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP |
davidr99 | 0:ab4e012489ef | 586 | #define RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP { RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP_DEFAULT } |
davidr99 | 0:ab4e012489ef | 587 | #endif |
davidr99 | 0:ab4e012489ef | 588 | |
davidr99 | 0:ab4e012489ef | 589 | #ifndef RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET |
davidr99 | 0:ab4e012489ef | 590 | #define RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET { RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET_DEFAULT } |
davidr99 | 0:ab4e012489ef | 591 | #endif |
davidr99 | 0:ab4e012489ef | 592 | |
davidr99 | 0:ab4e012489ef | 593 | #ifndef RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD |
davidr99 | 0:ab4e012489ef | 594 | #define RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD { RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD_DEFAULT } |
davidr99 | 0:ab4e012489ef | 595 | #endif |
davidr99 | 0:ab4e012489ef | 596 | |
davidr99 | 0:ab4e012489ef | 597 | #define RADIO_CONFIGURATION_DATA { \ |
davidr99 | 0:ab4e012489ef | 598 | Radio_Configuration_Data_Array, \ |
davidr99 | 0:ab4e012489ef | 599 | RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER, \ |
davidr99 | 0:ab4e012489ef | 600 | RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH, \ |
davidr99 | 0:ab4e012489ef | 601 | RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP, \ |
davidr99 | 0:ab4e012489ef | 602 | RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET, \ |
davidr99 | 0:ab4e012489ef | 603 | RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD \ |
davidr99 | 0:ab4e012489ef | 604 | } |
davidr99 | 0:ab4e012489ef | 605 | |
davidr99 | 0:ab4e012489ef | 606 | #endif /* RADIO_CONFIG_H_ */ |