File content as of revision 197:7a05523bf588:

#include "Device.h"

#define SSPCR1_SSE       0x00000002

#define TX_SSP_EMPT      0x00000001
#define RX_SSP_notEMPT   0x00000004
#define TX_SSP_notFULL   0x00000002
#define RX_SSP_FULL      0x00000008
#define SSP_BUSY         0x00000010

#define ADC_ERR_MSK      0x00000001
#define DAC_ERR_MSK      0x00000002

extern Device device;

void InitSSPDefaultSettings(void){
}

void InitSSPState(void){
}

void DeviceStartSSP(void){
  uint32_t Dummy;
  
  LPC_SC->PCONP |= (1<<21); //Power on SSP0

  /* выбор частоты для переферии используем по умолчания с делителем основной на 4 */
  LPC_SC->PCLKSEL1 &= ~(0x3<<10);  //00 CLK/4; 1 CLK; 2 CLK/2; 3 CLK/8
  LPC_SC->PCLKSEL1 |= (0x0<<10);   //00 CLK/4; 1 CLK; 2 CLK/2; 3 CLK/

  // P0.15~0.18 as SSP0 
  LPC_PINCON->PINSEL0 &= ~(0x3UL<<30);  //установит Р 0.15 
  LPC_PINCON->PINSEL0 |=  (0x2UL<<30);  //частота для синхронизациии Master - slave

  LPC_PINCON->PINSEL1 &= ~((0x3<<0)|(0x3<<2)|(0x3<<4)); // устанивоить   Р 0.17    и   Р 0.18
  LPC_PINCON->PINSEL1 |=  ((0x2<<2)|(0x2<<4));          //    как         MISO0    и    MOSI0

  LPC_PINCON->PINMODE0 &= ~(0x3UL<<30);// ?  установление на Р 0.15 режима On-Chip pull-down resistor enabled
  LPC_PINCON->PINMODE0 |=  (0x3UL<<30);// ?  установление на Р 0.15 режима On-Chip pull-down resistor enabled

  LPC_PINCON->PINMODE1 &= ~((0x3<<2)|(0x3<<4));// ?  установление на Р 0.17 и Р 0.18 режима On-Chip pull-down resistor enabled
  LPC_PINCON->PINMODE1 |=  ((0x3<<2)|(0x3<<4));// ?  установление на Р 0.17 и Р 0.18 режима On-Chip pull-down resistor enabled

  LPC_SSP0->CR0 = ((3<<8)|(0<<7)|(0<<4) |0xF); // (0xF)-установление DSS(Data sise select) в 16-битный формат, (3<<8 scr - выбор частоты), 
                                               //   низкий уровень линии тактирования между кадрами, прикрепление передачи к первому нарастанию тактового мигнала
                                               //    формат кадра TI.
   
  /* SSPCPSR clock prescale register, master mode, minimum divisor is 0x02 */
  LPC_SSP0->CPSR = 0x2;   // freq = CLK/(cpsdvr*(scr+1)) = 1.6 MHz
 
  /*SSP enable, master mode     */
  LPC_SSP0->CR1 = SSPCR1_SSE;
  while (LPC_SSP0->SR & SSP_BUSY); //wait until busy
  while (LPC_SSP0->SR & RX_SSP_notEMPT)  /* clear the RxFIFO */
    Dummy = LPC_SSP0->DR;       
  //all pins after reset is in GPIO mode, so CS pins needn't to configure
  LPC_GPIO0->FIODIR |= (1<<16);      // P0.16 defined as CS for ADC
  LPC_GPIO0->FIOSET |= (1<<16);      // set CS for ADC

  LPC_GPIO0->FIODIR |= (1<<23);       // P defined as CS for DAC
  LPC_GPIO0->FIOCLR |= (1<<23);       // set CS for DAC 
  while (LPC_SSP1->SR & RX_SSP_notEMPT)
    Dummy = LPC_SSP1->DR;   /* clear the RxFIFO */
}

void sspReceive(void){
  //Prepare ADCs for sampling
  LPC_GPIO0->FIOCLR = 1<<16; //reset SSEL signal for ADCs
  //Start ADCs sampling
  LPC_GPIO0->FIOSET = 1<<16; //set SSEL signal for ADCs
  //Get samples
  
  device.controller.SSP.in[4] += LPC_SSP0->DR;
  device.controller.SSP.in[3] += LPC_SSP0->DR;
  device.controller.SSP.in[2] += LPC_SSP0->DR;
  device.controller.SSP.in[1] += LPC_SSP0->DR;
  device.controller.SSP.in[0] += LPC_SSP0->DR;
  
  /*
  device.controller.SSP.accumulator[4] += LPC_SSP0->DR;
  device.controller.SSP.accumulator[3] += LPC_SSP0->DR;
  device.controller.SSP.accumulator[2] += LPC_SSP0->DR;
  device.controller.SSP.accumulator[1] += LPC_SSP0->DR;
  device.controller.SSP.accumulator[0] += LPC_SSP0->DR;
  */
  
  //Clear input queue
  uint32_t value;
  while (LPC_SSP0->SR & 0x00000004) value = LPC_SSP0->DR;
  /*
  //Average samples for dither period
  if (device.measurement.counter == 31) {
    for (uint8_t i = 0; i < 5; i++){
      device.controller.SSP.in[i] = device.controller.SSP.accumulator[i] >> 5;
      device.controller.SSP.accumulator[i] = 0;
    }
  }
  */
}

void sspTransmit(uint8_t index){
  LPC_GPIO0->FIOSET = 1<<23; //set SSEL signal for DACs
  LPC_GPIO0->FIOCLR = 1<<23; //reset SSEL signal for DACs
  
  LPC_SSP0->DR=0x5555;
  LPC_SSP0->DR=0x5555;
  LPC_SSP0->DR=0x5555;

  if (index){
    LPC_SSP0->DR = 0x00000030; //Write DAC0
    LPC_SSP0->DR = device.controller.SSP.out[0];
  } else {
    LPC_SSP0->DR = 0x00000031; //Write DAC1
    LPC_SSP0->DR = device.controller.SSP.out[1];
  }
}