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DeviceServicePort.c@182:2bd8ec44998f, 2016-07-10 (annotated)
- Committer:
- Diletant
- Date:
- Sun Jul 10 05:35:08 2016 +0000
- Revision:
- 182:2bd8ec44998f
- Parent:
- 167:bedc0a9d559a
Device & ... update. More AskGld & Techno functionality. Not final!!!
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Diletant | 149:abbf7663d27d | 1 | #include "Device.h" |
Diletant | 149:abbf7663d27d | 2 | extern Device device; |
Diletant | 149:abbf7663d27d | 3 | extern unsigned int SystemCoreClock1; |
Diletant | 149:abbf7663d27d | 4 | |
Diletant | 149:abbf7663d27d | 5 | extern char InCon[1024]; |
Diletant | 149:abbf7663d27d | 6 | extern char OutCon[1024]; |
Diletant | 149:abbf7663d27d | 7 | |
Diletant | 149:abbf7663d27d | 8 | extern unsigned int ConInPnt; |
Diletant | 149:abbf7663d27d | 9 | extern unsigned int ConInCur; |
Diletant | 149:abbf7663d27d | 10 | extern unsigned int ConOutPnt; |
Diletant | 149:abbf7663d27d | 11 | extern unsigned int ConOutCur; |
Diletant | 149:abbf7663d27d | 12 | |
Diletant | 167:bedc0a9d559a | 13 | void InitServicePortDefaultSettings(void) { |
Diletant | 182:2bd8ec44998f | 14 | device.service.port.settings.baud = 921600; |
Diletant | 149:abbf7663d27d | 15 | } |
Diletant | 149:abbf7663d27d | 16 | |
Diletant | 167:bedc0a9d559a | 17 | void InitServicePortState(void){ |
Diletant | 182:2bd8ec44998f | 18 | device.service.port.state.baud = device.service.port.settings.baud; |
Diletant | 167:bedc0a9d559a | 19 | } |
Diletant | 167:bedc0a9d559a | 20 | |
Diletant | 167:bedc0a9d559a | 21 | void DeviceStartServicePort(void){ |
Diletant | 149:abbf7663d27d | 22 | uint32_t Fdiv; |
Diletant | 149:abbf7663d27d | 23 | uint32_t pclkdiv, pclk; |
Diletant | 149:abbf7663d27d | 24 | |
Diletant | 149:abbf7663d27d | 25 | LPC_PINCON->PINSEL0 |= (1 << 4); /* Pin P0.2 used as TXD0 (Com0) */ |
Diletant | 149:abbf7663d27d | 26 | LPC_PINCON->PINSEL0 |= (1 << 6); /* Pin P0.3 used as RXD0 (Com0) */ |
Diletant | 149:abbf7663d27d | 27 | |
Diletant | 149:abbf7663d27d | 28 | /* By default, the PCLKSELx value is zero, thus, the PCLK for all the peripherals is 1/4 of the SystemFrequency. */ |
Diletant | 149:abbf7663d27d | 29 | /* Bit 6,7 are for UART0 */ |
Diletant | 149:abbf7663d27d | 30 | pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; |
Diletant | 149:abbf7663d27d | 31 | switch ( pclkdiv ) { |
Diletant | 149:abbf7663d27d | 32 | case 0x00: |
Diletant | 149:abbf7663d27d | 33 | default: |
Diletant | 149:abbf7663d27d | 34 | pclk = SystemCoreClock1/4; |
Diletant | 149:abbf7663d27d | 35 | break; |
Diletant | 149:abbf7663d27d | 36 | case 0x01: |
Diletant | 149:abbf7663d27d | 37 | pclk = SystemCoreClock1; |
Diletant | 149:abbf7663d27d | 38 | break; |
Diletant | 149:abbf7663d27d | 39 | case 0x02: |
Diletant | 149:abbf7663d27d | 40 | pclk = SystemCoreClock1/2; |
Diletant | 149:abbf7663d27d | 41 | break; |
Diletant | 149:abbf7663d27d | 42 | case 0x03: |
Diletant | 149:abbf7663d27d | 43 | pclk = SystemCoreClock1/8; |
Diletant | 149:abbf7663d27d | 44 | break; |
Diletant | 149:abbf7663d27d | 45 | } |
Diletant | 149:abbf7663d27d | 46 | |
Diletant | 156:e68ee0bcdcda | 47 | device.controller.uart[0].state.LCR = 0x83; |
Diletant | 156:e68ee0bcdcda | 48 | LPC_UART0->LCR = device.controller.uart[0].state.LCR; |
Diletant | 149:abbf7663d27d | 49 | |
Diletant | 182:2bd8ec44998f | 50 | Fdiv = ((pclk / 16) / device.service.port.state.baud) + 1; |
Diletant | 149:abbf7663d27d | 51 | |
Diletant | 156:e68ee0bcdcda | 52 | device.controller.uart[0].state.DLM = Fdiv / 256; |
Diletant | 156:e68ee0bcdcda | 53 | LPC_UART0->DLM = device.controller.uart[0].state.DLM; |
Diletant | 156:e68ee0bcdcda | 54 | device.controller.uart[0].state.DLL = Fdiv % 256; |
Diletant | 156:e68ee0bcdcda | 55 | LPC_UART0->DLL = device.controller.uart[0].state.DLL; |
Diletant | 149:abbf7663d27d | 56 | |
Diletant | 156:e68ee0bcdcda | 57 | device.controller.uart[0].state.LCR = 0x03; |
Diletant | 156:e68ee0bcdcda | 58 | LPC_UART0->LCR = device.controller.uart[0].state.LCR; |
Diletant | 156:e68ee0bcdcda | 59 | device.controller.uart[0].state.FCR = 0x07; |
Diletant | 156:e68ee0bcdcda | 60 | LPC_UART0->FCR = device.controller.uart[0].state.FCR; |
Diletant | 149:abbf7663d27d | 61 | } |
Diletant | 149:abbf7663d27d | 62 | |
Diletant | 149:abbf7663d27d | 63 | void Concole(void) |
Diletant | 149:abbf7663d27d | 64 | { |
Diletant | 149:abbf7663d27d | 65 | if (ConOutPnt != ConOutCur) |
Diletant | 149:abbf7663d27d | 66 | if (LPC_UART0->LSR & 0x20){ |
Diletant | 149:abbf7663d27d | 67 | LPC_UART0->THR = OutCon[ConOutCur]; |
Diletant | 149:abbf7663d27d | 68 | ConOutCur++; |
Diletant | 149:abbf7663d27d | 69 | ConOutCur = ConOutCur & 0x3ff; |
Diletant | 149:abbf7663d27d | 70 | } |
Diletant | 149:abbf7663d27d | 71 | if (LPC_UART0->LSR & 0x01){ |
Diletant | 149:abbf7663d27d | 72 | InCon[ConInCur] = (LPC_UART0->RBR); |
Diletant | 149:abbf7663d27d | 73 | ConInCur++; |
Diletant | 149:abbf7663d27d | 74 | ConInCur = ConInCur & 0x3ff; |
Diletant | 149:abbf7663d27d | 75 | } |
Diletant | 149:abbf7663d27d | 76 | } |
Diletant | 149:abbf7663d27d | 77 | |
Diletant | 156:e68ee0bcdcda | 78 | int ReadConcole(void) |
Diletant | 149:abbf7663d27d | 79 | { |
Diletant | 156:e68ee0bcdcda | 80 | uint16_t i = 0; |
Diletant | 149:abbf7663d27d | 81 | while (ConInPnt != ConInCur){ |
Diletant | 156:e68ee0bcdcda | 82 | device.service.buffer[i] = InCon[ConInPnt]; |
Diletant | 149:abbf7663d27d | 83 | ConInPnt++; ConInPnt = ConInPnt & 0x3ff; |
Diletant | 149:abbf7663d27d | 84 | i++; |
Diletant | 149:abbf7663d27d | 85 | } |
Diletant | 156:e68ee0bcdcda | 86 | device.service.buffer[i] = 0; |
Diletant | 149:abbf7663d27d | 87 | return i; |
Diletant | 149:abbf7663d27d | 88 | } |
Diletant | 149:abbf7663d27d | 89 | |
Diletant | 156:e68ee0bcdcda | 90 | void WriteConcole(void) { |
Diletant | 156:e68ee0bcdcda | 91 | uint16_t i = 0; |
Diletant | 156:e68ee0bcdcda | 92 | while (device.service.buffer[i] != 0){ |
Diletant | 156:e68ee0bcdcda | 93 | OutCon[ConOutPnt] = device.service.buffer[i]; |
Diletant | 149:abbf7663d27d | 94 | ConOutPnt++; ConOutPnt = ConOutPnt & 0x3ff; |
Diletant | 156:e68ee0bcdcda | 95 | i++; |
Diletant | 149:abbf7663d27d | 96 | } |
Diletant | 149:abbf7663d27d | 97 | } |