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Fork of LG by igor Apu

Committer:
Kovalev_D
Date:
Wed Feb 03 10:44:42 2016 +0300
Revision:
22:12e6183f04d4
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Kovalev_D 22:12e6183f04d4 1 /**************************************************************************//**
Kovalev_D 22:12e6183f04d4 2 * @file core_cm3.c
Kovalev_D 22:12e6183f04d4 3 * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
Kovalev_D 22:12e6183f04d4 4 * @version V1.30
Kovalev_D 22:12e6183f04d4 5 * @date 30. October 2009
Kovalev_D 22:12e6183f04d4 6 *
Kovalev_D 22:12e6183f04d4 7 * @note
Kovalev_D 22:12e6183f04d4 8 * Copyright (C) 2009 ARM Limited. All rights reserved.
Kovalev_D 22:12e6183f04d4 9 *
Kovalev_D 22:12e6183f04d4 10 * @par
Kovalev_D 22:12e6183f04d4 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
Kovalev_D 22:12e6183f04d4 12 * processor based microcontrollers. This file can be freely distributed
Kovalev_D 22:12e6183f04d4 13 * within development tools that are supporting such ARM based processors.
Kovalev_D 22:12e6183f04d4 14 *
Kovalev_D 22:12e6183f04d4 15 * @par
Kovalev_D 22:12e6183f04d4 16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
Kovalev_D 22:12e6183f04d4 17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
Kovalev_D 22:12e6183f04d4 18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
Kovalev_D 22:12e6183f04d4 19 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
Kovalev_D 22:12e6183f04d4 20 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
Kovalev_D 22:12e6183f04d4 21 *
Kovalev_D 22:12e6183f04d4 22 ******************************************************************************/
Kovalev_D 22:12e6183f04d4 23
Kovalev_D 22:12e6183f04d4 24 #include <stdint.h>
Kovalev_D 22:12e6183f04d4 25
Kovalev_D 22:12e6183f04d4 26 /* define compiler specific symbols */
Kovalev_D 22:12e6183f04d4 27 #if defined ( __CC_ARM )
Kovalev_D 22:12e6183f04d4 28 #define __ASM __asm /*!< asm keyword for ARM Compiler */
Kovalev_D 22:12e6183f04d4 29 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
Kovalev_D 22:12e6183f04d4 30
Kovalev_D 22:12e6183f04d4 31 #elif defined ( __ICCARM__ )
Kovalev_D 22:12e6183f04d4 32 #define __ASM __asm /*!< asm keyword for IAR Compiler */
Kovalev_D 22:12e6183f04d4 33 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
Kovalev_D 22:12e6183f04d4 34
Kovalev_D 22:12e6183f04d4 35 #elif defined ( __GNUC__ )
Kovalev_D 22:12e6183f04d4 36 #define __ASM __asm /*!< asm keyword for GNU Compiler */
Kovalev_D 22:12e6183f04d4 37 #define __INLINE inline /*!< inline keyword for GNU Compiler */
Kovalev_D 22:12e6183f04d4 38
Kovalev_D 22:12e6183f04d4 39 #elif defined ( __TASKING__ )
Kovalev_D 22:12e6183f04d4 40 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
Kovalev_D 22:12e6183f04d4 41 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
Kovalev_D 22:12e6183f04d4 42
Kovalev_D 22:12e6183f04d4 43 #endif
Kovalev_D 22:12e6183f04d4 44
Kovalev_D 22:12e6183f04d4 45
Kovalev_D 22:12e6183f04d4 46 /* ################### Compiler specific Intrinsics ########################### */
Kovalev_D 22:12e6183f04d4 47
Kovalev_D 22:12e6183f04d4 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Kovalev_D 22:12e6183f04d4 49 /* ARM armcc specific functions */
Kovalev_D 22:12e6183f04d4 50
Kovalev_D 22:12e6183f04d4 51 /**
Kovalev_D 22:12e6183f04d4 52 * @brief Return the Process Stack Pointer
Kovalev_D 22:12e6183f04d4 53 *
Kovalev_D 22:12e6183f04d4 54 * @return ProcessStackPointer
Kovalev_D 22:12e6183f04d4 55 *
Kovalev_D 22:12e6183f04d4 56 * Return the actual process stack pointer
Kovalev_D 22:12e6183f04d4 57 */
Kovalev_D 22:12e6183f04d4 58 __ASM uint32_t __get_PSP(void)
Kovalev_D 22:12e6183f04d4 59 {
Kovalev_D 22:12e6183f04d4 60 mrs r0, psp
Kovalev_D 22:12e6183f04d4 61 bx lr
Kovalev_D 22:12e6183f04d4 62 }
Kovalev_D 22:12e6183f04d4 63
Kovalev_D 22:12e6183f04d4 64 /**
Kovalev_D 22:12e6183f04d4 65 * @brief Set the Process Stack Pointer
Kovalev_D 22:12e6183f04d4 66 *
Kovalev_D 22:12e6183f04d4 67 * @param topOfProcStack Process Stack Pointer
Kovalev_D 22:12e6183f04d4 68 *
Kovalev_D 22:12e6183f04d4 69 * Assign the value ProcessStackPointer to the MSP
Kovalev_D 22:12e6183f04d4 70 * (process stack pointer) Cortex processor register
Kovalev_D 22:12e6183f04d4 71 */
Kovalev_D 22:12e6183f04d4 72 __ASM void __set_PSP(uint32_t topOfProcStack)
Kovalev_D 22:12e6183f04d4 73 {
Kovalev_D 22:12e6183f04d4 74 msr psp, r0
Kovalev_D 22:12e6183f04d4 75 bx lr
Kovalev_D 22:12e6183f04d4 76 }
Kovalev_D 22:12e6183f04d4 77
Kovalev_D 22:12e6183f04d4 78 /**
Kovalev_D 22:12e6183f04d4 79 * @brief Return the Main Stack Pointer
Kovalev_D 22:12e6183f04d4 80 *
Kovalev_D 22:12e6183f04d4 81 * @return Main Stack Pointer
Kovalev_D 22:12e6183f04d4 82 *
Kovalev_D 22:12e6183f04d4 83 * Return the current value of the MSP (main stack pointer)
Kovalev_D 22:12e6183f04d4 84 * Cortex processor register
Kovalev_D 22:12e6183f04d4 85 */
Kovalev_D 22:12e6183f04d4 86 __ASM uint32_t __get_MSP(void)
Kovalev_D 22:12e6183f04d4 87 {
Kovalev_D 22:12e6183f04d4 88 mrs r0, msp
Kovalev_D 22:12e6183f04d4 89 bx lr
Kovalev_D 22:12e6183f04d4 90 }
Kovalev_D 22:12e6183f04d4 91
Kovalev_D 22:12e6183f04d4 92 /**
Kovalev_D 22:12e6183f04d4 93 * @brief Set the Main Stack Pointer
Kovalev_D 22:12e6183f04d4 94 *
Kovalev_D 22:12e6183f04d4 95 * @param topOfMainStack Main Stack Pointer
Kovalev_D 22:12e6183f04d4 96 *
Kovalev_D 22:12e6183f04d4 97 * Assign the value mainStackPointer to the MSP
Kovalev_D 22:12e6183f04d4 98 * (main stack pointer) Cortex processor register
Kovalev_D 22:12e6183f04d4 99 */
Kovalev_D 22:12e6183f04d4 100 __ASM void __set_MSP(uint32_t mainStackPointer)
Kovalev_D 22:12e6183f04d4 101 {
Kovalev_D 22:12e6183f04d4 102 msr msp, r0
Kovalev_D 22:12e6183f04d4 103 bx lr
Kovalev_D 22:12e6183f04d4 104 }
Kovalev_D 22:12e6183f04d4 105
Kovalev_D 22:12e6183f04d4 106 /**
Kovalev_D 22:12e6183f04d4 107 * @brief Reverse byte order in unsigned short value
Kovalev_D 22:12e6183f04d4 108 *
Kovalev_D 22:12e6183f04d4 109 * @param value value to reverse
Kovalev_D 22:12e6183f04d4 110 * @return reversed value
Kovalev_D 22:12e6183f04d4 111 *
Kovalev_D 22:12e6183f04d4 112 * Reverse byte order in unsigned short value
Kovalev_D 22:12e6183f04d4 113 */
Kovalev_D 22:12e6183f04d4 114 __ASM uint32_t __REV16(uint16_t value)
Kovalev_D 22:12e6183f04d4 115 {
Kovalev_D 22:12e6183f04d4 116 rev16 r0, r0
Kovalev_D 22:12e6183f04d4 117 bx lr
Kovalev_D 22:12e6183f04d4 118 }
Kovalev_D 22:12e6183f04d4 119
Kovalev_D 22:12e6183f04d4 120 /**
Kovalev_D 22:12e6183f04d4 121 * @brief Reverse byte order in signed short value with sign extension to integer
Kovalev_D 22:12e6183f04d4 122 *
Kovalev_D 22:12e6183f04d4 123 * @param value value to reverse
Kovalev_D 22:12e6183f04d4 124 * @return reversed value
Kovalev_D 22:12e6183f04d4 125 *
Kovalev_D 22:12e6183f04d4 126 * Reverse byte order in signed short value with sign extension to integer
Kovalev_D 22:12e6183f04d4 127 */
Kovalev_D 22:12e6183f04d4 128 __ASM int32_t __REVSH(int16_t value)
Kovalev_D 22:12e6183f04d4 129 {
Kovalev_D 22:12e6183f04d4 130 revsh r0, r0
Kovalev_D 22:12e6183f04d4 131 bx lr
Kovalev_D 22:12e6183f04d4 132 }
Kovalev_D 22:12e6183f04d4 133
Kovalev_D 22:12e6183f04d4 134
Kovalev_D 22:12e6183f04d4 135 #if (__ARMCC_VERSION < 400000)
Kovalev_D 22:12e6183f04d4 136
Kovalev_D 22:12e6183f04d4 137 /**
Kovalev_D 22:12e6183f04d4 138 * @brief Remove the exclusive lock created by ldrex
Kovalev_D 22:12e6183f04d4 139 *
Kovalev_D 22:12e6183f04d4 140 * Removes the exclusive lock which is created by ldrex.
Kovalev_D 22:12e6183f04d4 141 */
Kovalev_D 22:12e6183f04d4 142 __ASM void __CLREX(void)
Kovalev_D 22:12e6183f04d4 143 {
Kovalev_D 22:12e6183f04d4 144 clrex
Kovalev_D 22:12e6183f04d4 145 }
Kovalev_D 22:12e6183f04d4 146
Kovalev_D 22:12e6183f04d4 147 /**
Kovalev_D 22:12e6183f04d4 148 * @brief Return the Base Priority value
Kovalev_D 22:12e6183f04d4 149 *
Kovalev_D 22:12e6183f04d4 150 * @return BasePriority
Kovalev_D 22:12e6183f04d4 151 *
Kovalev_D 22:12e6183f04d4 152 * Return the content of the base priority register
Kovalev_D 22:12e6183f04d4 153 */
Kovalev_D 22:12e6183f04d4 154 __ASM uint32_t __get_BASEPRI(void)
Kovalev_D 22:12e6183f04d4 155 {
Kovalev_D 22:12e6183f04d4 156 mrs r0, basepri
Kovalev_D 22:12e6183f04d4 157 bx lr
Kovalev_D 22:12e6183f04d4 158 }
Kovalev_D 22:12e6183f04d4 159
Kovalev_D 22:12e6183f04d4 160 /**
Kovalev_D 22:12e6183f04d4 161 * @brief Set the Base Priority value
Kovalev_D 22:12e6183f04d4 162 *
Kovalev_D 22:12e6183f04d4 163 * @param basePri BasePriority
Kovalev_D 22:12e6183f04d4 164 *
Kovalev_D 22:12e6183f04d4 165 * Set the base priority register
Kovalev_D 22:12e6183f04d4 166 */
Kovalev_D 22:12e6183f04d4 167 __ASM void __set_BASEPRI(uint32_t basePri)
Kovalev_D 22:12e6183f04d4 168 {
Kovalev_D 22:12e6183f04d4 169 msr basepri, r0
Kovalev_D 22:12e6183f04d4 170 bx lr
Kovalev_D 22:12e6183f04d4 171 }
Kovalev_D 22:12e6183f04d4 172
Kovalev_D 22:12e6183f04d4 173 /**
Kovalev_D 22:12e6183f04d4 174 * @brief Return the Priority Mask value
Kovalev_D 22:12e6183f04d4 175 *
Kovalev_D 22:12e6183f04d4 176 * @return PriMask
Kovalev_D 22:12e6183f04d4 177 *
Kovalev_D 22:12e6183f04d4 178 * Return state of the priority mask bit from the priority mask register
Kovalev_D 22:12e6183f04d4 179 */
Kovalev_D 22:12e6183f04d4 180 __ASM uint32_t __get_PRIMASK(void)
Kovalev_D 22:12e6183f04d4 181 {
Kovalev_D 22:12e6183f04d4 182 mrs r0, primask
Kovalev_D 22:12e6183f04d4 183 bx lr
Kovalev_D 22:12e6183f04d4 184 }
Kovalev_D 22:12e6183f04d4 185
Kovalev_D 22:12e6183f04d4 186 /**
Kovalev_D 22:12e6183f04d4 187 * @brief Set the Priority Mask value
Kovalev_D 22:12e6183f04d4 188 *
Kovalev_D 22:12e6183f04d4 189 * @param priMask PriMask
Kovalev_D 22:12e6183f04d4 190 *
Kovalev_D 22:12e6183f04d4 191 * Set the priority mask bit in the priority mask register
Kovalev_D 22:12e6183f04d4 192 */
Kovalev_D 22:12e6183f04d4 193 __ASM void __set_PRIMASK(uint32_t priMask)
Kovalev_D 22:12e6183f04d4 194 {
Kovalev_D 22:12e6183f04d4 195 msr primask, r0
Kovalev_D 22:12e6183f04d4 196 bx lr
Kovalev_D 22:12e6183f04d4 197 }
Kovalev_D 22:12e6183f04d4 198
Kovalev_D 22:12e6183f04d4 199 /**
Kovalev_D 22:12e6183f04d4 200 * @brief Return the Fault Mask value
Kovalev_D 22:12e6183f04d4 201 *
Kovalev_D 22:12e6183f04d4 202 * @return FaultMask
Kovalev_D 22:12e6183f04d4 203 *
Kovalev_D 22:12e6183f04d4 204 * Return the content of the fault mask register
Kovalev_D 22:12e6183f04d4 205 */
Kovalev_D 22:12e6183f04d4 206 __ASM uint32_t __get_FAULTMASK(void)
Kovalev_D 22:12e6183f04d4 207 {
Kovalev_D 22:12e6183f04d4 208 mrs r0, faultmask
Kovalev_D 22:12e6183f04d4 209 bx lr
Kovalev_D 22:12e6183f04d4 210 }
Kovalev_D 22:12e6183f04d4 211
Kovalev_D 22:12e6183f04d4 212 /**
Kovalev_D 22:12e6183f04d4 213 * @brief Set the Fault Mask value
Kovalev_D 22:12e6183f04d4 214 *
Kovalev_D 22:12e6183f04d4 215 * @param faultMask faultMask value
Kovalev_D 22:12e6183f04d4 216 *
Kovalev_D 22:12e6183f04d4 217 * Set the fault mask register
Kovalev_D 22:12e6183f04d4 218 */
Kovalev_D 22:12e6183f04d4 219 __ASM void __set_FAULTMASK(uint32_t faultMask)
Kovalev_D 22:12e6183f04d4 220 {
Kovalev_D 22:12e6183f04d4 221 msr faultmask, r0
Kovalev_D 22:12e6183f04d4 222 bx lr
Kovalev_D 22:12e6183f04d4 223 }
Kovalev_D 22:12e6183f04d4 224
Kovalev_D 22:12e6183f04d4 225 /**
Kovalev_D 22:12e6183f04d4 226 * @brief Return the Control Register value
Kovalev_D 22:12e6183f04d4 227 *
Kovalev_D 22:12e6183f04d4 228 * @return Control value
Kovalev_D 22:12e6183f04d4 229 *
Kovalev_D 22:12e6183f04d4 230 * Return the content of the control register
Kovalev_D 22:12e6183f04d4 231 */
Kovalev_D 22:12e6183f04d4 232 __ASM uint32_t __get_CONTROL(void)
Kovalev_D 22:12e6183f04d4 233 {
Kovalev_D 22:12e6183f04d4 234 mrs r0, control
Kovalev_D 22:12e6183f04d4 235 bx lr
Kovalev_D 22:12e6183f04d4 236 }
Kovalev_D 22:12e6183f04d4 237
Kovalev_D 22:12e6183f04d4 238 /**
Kovalev_D 22:12e6183f04d4 239 * @brief Set the Control Register value
Kovalev_D 22:12e6183f04d4 240 *
Kovalev_D 22:12e6183f04d4 241 * @param control Control value
Kovalev_D 22:12e6183f04d4 242 *
Kovalev_D 22:12e6183f04d4 243 * Set the control register
Kovalev_D 22:12e6183f04d4 244 */
Kovalev_D 22:12e6183f04d4 245 __ASM void __set_CONTROL(uint32_t control)
Kovalev_D 22:12e6183f04d4 246 {
Kovalev_D 22:12e6183f04d4 247 msr control, r0
Kovalev_D 22:12e6183f04d4 248 bx lr
Kovalev_D 22:12e6183f04d4 249 }
Kovalev_D 22:12e6183f04d4 250
Kovalev_D 22:12e6183f04d4 251 #endif /* __ARMCC_VERSION */
Kovalev_D 22:12e6183f04d4 252
Kovalev_D 22:12e6183f04d4 253
Kovalev_D 22:12e6183f04d4 254
Kovalev_D 22:12e6183f04d4 255 #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
Kovalev_D 22:12e6183f04d4 256 /* IAR iccarm specific functions */
Kovalev_D 22:12e6183f04d4 257 #pragma diag_suppress=Pe940
Kovalev_D 22:12e6183f04d4 258
Kovalev_D 22:12e6183f04d4 259 /**
Kovalev_D 22:12e6183f04d4 260 * @brief Return the Process Stack Pointer
Kovalev_D 22:12e6183f04d4 261 *
Kovalev_D 22:12e6183f04d4 262 * @return ProcessStackPointer
Kovalev_D 22:12e6183f04d4 263 *
Kovalev_D 22:12e6183f04d4 264 * Return the actual process stack pointer
Kovalev_D 22:12e6183f04d4 265 */
Kovalev_D 22:12e6183f04d4 266 uint32_t __get_PSP(void)
Kovalev_D 22:12e6183f04d4 267 {
Kovalev_D 22:12e6183f04d4 268 __ASM("mrs r0, psp");
Kovalev_D 22:12e6183f04d4 269 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 270 }
Kovalev_D 22:12e6183f04d4 271
Kovalev_D 22:12e6183f04d4 272 /**
Kovalev_D 22:12e6183f04d4 273 * @brief Set the Process Stack Pointer
Kovalev_D 22:12e6183f04d4 274 *
Kovalev_D 22:12e6183f04d4 275 * @param topOfProcStack Process Stack Pointer
Kovalev_D 22:12e6183f04d4 276 *
Kovalev_D 22:12e6183f04d4 277 * Assign the value ProcessStackPointer to the MSP
Kovalev_D 22:12e6183f04d4 278 * (process stack pointer) Cortex processor register
Kovalev_D 22:12e6183f04d4 279 */
Kovalev_D 22:12e6183f04d4 280 void __set_PSP(uint32_t topOfProcStack)
Kovalev_D 22:12e6183f04d4 281 {
Kovalev_D 22:12e6183f04d4 282 __ASM("msr psp, r0");
Kovalev_D 22:12e6183f04d4 283 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 284 }
Kovalev_D 22:12e6183f04d4 285
Kovalev_D 22:12e6183f04d4 286 /**
Kovalev_D 22:12e6183f04d4 287 * @brief Return the Main Stack Pointer
Kovalev_D 22:12e6183f04d4 288 *
Kovalev_D 22:12e6183f04d4 289 * @return Main Stack Pointer
Kovalev_D 22:12e6183f04d4 290 *
Kovalev_D 22:12e6183f04d4 291 * Return the current value of the MSP (main stack pointer)
Kovalev_D 22:12e6183f04d4 292 * Cortex processor register
Kovalev_D 22:12e6183f04d4 293 */
Kovalev_D 22:12e6183f04d4 294 uint32_t __get_MSP(void)
Kovalev_D 22:12e6183f04d4 295 {
Kovalev_D 22:12e6183f04d4 296 __ASM("mrs r0, msp");
Kovalev_D 22:12e6183f04d4 297 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 298 }
Kovalev_D 22:12e6183f04d4 299
Kovalev_D 22:12e6183f04d4 300 /**
Kovalev_D 22:12e6183f04d4 301 * @brief Set the Main Stack Pointer
Kovalev_D 22:12e6183f04d4 302 *
Kovalev_D 22:12e6183f04d4 303 * @param topOfMainStack Main Stack Pointer
Kovalev_D 22:12e6183f04d4 304 *
Kovalev_D 22:12e6183f04d4 305 * Assign the value mainStackPointer to the MSP
Kovalev_D 22:12e6183f04d4 306 * (main stack pointer) Cortex processor register
Kovalev_D 22:12e6183f04d4 307 */
Kovalev_D 22:12e6183f04d4 308 void __set_MSP(uint32_t topOfMainStack)
Kovalev_D 22:12e6183f04d4 309 {
Kovalev_D 22:12e6183f04d4 310 __ASM("msr msp, r0");
Kovalev_D 22:12e6183f04d4 311 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 312 }
Kovalev_D 22:12e6183f04d4 313
Kovalev_D 22:12e6183f04d4 314 /**
Kovalev_D 22:12e6183f04d4 315 * @brief Reverse byte order in unsigned short value
Kovalev_D 22:12e6183f04d4 316 *
Kovalev_D 22:12e6183f04d4 317 * @param value value to reverse
Kovalev_D 22:12e6183f04d4 318 * @return reversed value
Kovalev_D 22:12e6183f04d4 319 *
Kovalev_D 22:12e6183f04d4 320 * Reverse byte order in unsigned short value
Kovalev_D 22:12e6183f04d4 321 */
Kovalev_D 22:12e6183f04d4 322 uint32_t __REV16(uint16_t value)
Kovalev_D 22:12e6183f04d4 323 {
Kovalev_D 22:12e6183f04d4 324 __ASM("rev16 r0, r0");
Kovalev_D 22:12e6183f04d4 325 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 326 }
Kovalev_D 22:12e6183f04d4 327
Kovalev_D 22:12e6183f04d4 328 /**
Kovalev_D 22:12e6183f04d4 329 * @brief Reverse bit order of value
Kovalev_D 22:12e6183f04d4 330 *
Kovalev_D 22:12e6183f04d4 331 * @param value value to reverse
Kovalev_D 22:12e6183f04d4 332 * @return reversed value
Kovalev_D 22:12e6183f04d4 333 *
Kovalev_D 22:12e6183f04d4 334 * Reverse bit order of value
Kovalev_D 22:12e6183f04d4 335 */
Kovalev_D 22:12e6183f04d4 336 uint32_t __RBIT(uint32_t value)
Kovalev_D 22:12e6183f04d4 337 {
Kovalev_D 22:12e6183f04d4 338 __ASM("rbit r0, r0");
Kovalev_D 22:12e6183f04d4 339 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 340 }
Kovalev_D 22:12e6183f04d4 341
Kovalev_D 22:12e6183f04d4 342 /**
Kovalev_D 22:12e6183f04d4 343 * @brief LDR Exclusive (8 bit)
Kovalev_D 22:12e6183f04d4 344 *
Kovalev_D 22:12e6183f04d4 345 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 346 * @return value of (*address)
Kovalev_D 22:12e6183f04d4 347 *
Kovalev_D 22:12e6183f04d4 348 * Exclusive LDR command for 8 bit values)
Kovalev_D 22:12e6183f04d4 349 */
Kovalev_D 22:12e6183f04d4 350 uint8_t __LDREXB(uint8_t *addr)
Kovalev_D 22:12e6183f04d4 351 {
Kovalev_D 22:12e6183f04d4 352 __ASM("ldrexb r0, [r0]");
Kovalev_D 22:12e6183f04d4 353 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 354 }
Kovalev_D 22:12e6183f04d4 355
Kovalev_D 22:12e6183f04d4 356 /**
Kovalev_D 22:12e6183f04d4 357 * @brief LDR Exclusive (16 bit)
Kovalev_D 22:12e6183f04d4 358 *
Kovalev_D 22:12e6183f04d4 359 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 360 * @return value of (*address)
Kovalev_D 22:12e6183f04d4 361 *
Kovalev_D 22:12e6183f04d4 362 * Exclusive LDR command for 16 bit values
Kovalev_D 22:12e6183f04d4 363 */
Kovalev_D 22:12e6183f04d4 364 uint16_t __LDREXH(uint16_t *addr)
Kovalev_D 22:12e6183f04d4 365 {
Kovalev_D 22:12e6183f04d4 366 __ASM("ldrexh r0, [r0]");
Kovalev_D 22:12e6183f04d4 367 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 368 }
Kovalev_D 22:12e6183f04d4 369
Kovalev_D 22:12e6183f04d4 370 /**
Kovalev_D 22:12e6183f04d4 371 * @brief LDR Exclusive (32 bit)
Kovalev_D 22:12e6183f04d4 372 *
Kovalev_D 22:12e6183f04d4 373 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 374 * @return value of (*address)
Kovalev_D 22:12e6183f04d4 375 *
Kovalev_D 22:12e6183f04d4 376 * Exclusive LDR command for 32 bit values
Kovalev_D 22:12e6183f04d4 377 */
Kovalev_D 22:12e6183f04d4 378 uint32_t __LDREXW(uint32_t *addr)
Kovalev_D 22:12e6183f04d4 379 {
Kovalev_D 22:12e6183f04d4 380 __ASM("ldrex r0, [r0]");
Kovalev_D 22:12e6183f04d4 381 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 382 }
Kovalev_D 22:12e6183f04d4 383
Kovalev_D 22:12e6183f04d4 384 /**
Kovalev_D 22:12e6183f04d4 385 * @brief STR Exclusive (8 bit)
Kovalev_D 22:12e6183f04d4 386 *
Kovalev_D 22:12e6183f04d4 387 * @param value value to store
Kovalev_D 22:12e6183f04d4 388 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 389 * @return successful / failed
Kovalev_D 22:12e6183f04d4 390 *
Kovalev_D 22:12e6183f04d4 391 * Exclusive STR command for 8 bit values
Kovalev_D 22:12e6183f04d4 392 */
Kovalev_D 22:12e6183f04d4 393 uint32_t __STREXB(uint8_t value, uint8_t *addr)
Kovalev_D 22:12e6183f04d4 394 {
Kovalev_D 22:12e6183f04d4 395 __ASM("strexb r0, r0, [r1]");
Kovalev_D 22:12e6183f04d4 396 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 397 }
Kovalev_D 22:12e6183f04d4 398
Kovalev_D 22:12e6183f04d4 399 /**
Kovalev_D 22:12e6183f04d4 400 * @brief STR Exclusive (16 bit)
Kovalev_D 22:12e6183f04d4 401 *
Kovalev_D 22:12e6183f04d4 402 * @param value value to store
Kovalev_D 22:12e6183f04d4 403 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 404 * @return successful / failed
Kovalev_D 22:12e6183f04d4 405 *
Kovalev_D 22:12e6183f04d4 406 * Exclusive STR command for 16 bit values
Kovalev_D 22:12e6183f04d4 407 */
Kovalev_D 22:12e6183f04d4 408 uint32_t __STREXH(uint16_t value, uint16_t *addr)
Kovalev_D 22:12e6183f04d4 409 {
Kovalev_D 22:12e6183f04d4 410 __ASM("strexh r0, r0, [r1]");
Kovalev_D 22:12e6183f04d4 411 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 412 }
Kovalev_D 22:12e6183f04d4 413
Kovalev_D 22:12e6183f04d4 414 /**
Kovalev_D 22:12e6183f04d4 415 * @brief STR Exclusive (32 bit)
Kovalev_D 22:12e6183f04d4 416 *
Kovalev_D 22:12e6183f04d4 417 * @param value value to store
Kovalev_D 22:12e6183f04d4 418 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 419 * @return successful / failed
Kovalev_D 22:12e6183f04d4 420 *
Kovalev_D 22:12e6183f04d4 421 * Exclusive STR command for 32 bit values
Kovalev_D 22:12e6183f04d4 422 */
Kovalev_D 22:12e6183f04d4 423 uint32_t __STREXW(uint32_t value, uint32_t *addr)
Kovalev_D 22:12e6183f04d4 424 {
Kovalev_D 22:12e6183f04d4 425 __ASM("strex r0, r0, [r1]");
Kovalev_D 22:12e6183f04d4 426 __ASM("bx lr");
Kovalev_D 22:12e6183f04d4 427 }
Kovalev_D 22:12e6183f04d4 428
Kovalev_D 22:12e6183f04d4 429 #pragma diag_default=Pe940
Kovalev_D 22:12e6183f04d4 430
Kovalev_D 22:12e6183f04d4 431
Kovalev_D 22:12e6183f04d4 432 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
Kovalev_D 22:12e6183f04d4 433 /* GNU gcc specific functions */
Kovalev_D 22:12e6183f04d4 434
Kovalev_D 22:12e6183f04d4 435 /**
Kovalev_D 22:12e6183f04d4 436 * @brief Return the Process Stack Pointer
Kovalev_D 22:12e6183f04d4 437 *
Kovalev_D 22:12e6183f04d4 438 * @return ProcessStackPointer
Kovalev_D 22:12e6183f04d4 439 *
Kovalev_D 22:12e6183f04d4 440 * Return the actual process stack pointer
Kovalev_D 22:12e6183f04d4 441 */
Kovalev_D 22:12e6183f04d4 442 uint32_t __get_PSP(void) __attribute__( ( naked ) );
Kovalev_D 22:12e6183f04d4 443 uint32_t __get_PSP(void)
Kovalev_D 22:12e6183f04d4 444 {
Kovalev_D 22:12e6183f04d4 445 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 446
Kovalev_D 22:12e6183f04d4 447 __ASM volatile ("MRS %0, psp\n\t"
Kovalev_D 22:12e6183f04d4 448 "MOV r0, %0 \n\t"
Kovalev_D 22:12e6183f04d4 449 "BX lr \n\t" : "=r" (result) );
Kovalev_D 22:12e6183f04d4 450 return(result);
Kovalev_D 22:12e6183f04d4 451 }
Kovalev_D 22:12e6183f04d4 452
Kovalev_D 22:12e6183f04d4 453 /**
Kovalev_D 22:12e6183f04d4 454 * @brief Set the Process Stack Pointer
Kovalev_D 22:12e6183f04d4 455 *
Kovalev_D 22:12e6183f04d4 456 * @param topOfProcStack Process Stack Pointer
Kovalev_D 22:12e6183f04d4 457 *
Kovalev_D 22:12e6183f04d4 458 * Assign the value ProcessStackPointer to the MSP
Kovalev_D 22:12e6183f04d4 459 * (process stack pointer) Cortex processor register
Kovalev_D 22:12e6183f04d4 460 */
Kovalev_D 22:12e6183f04d4 461 void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
Kovalev_D 22:12e6183f04d4 462 void __set_PSP(uint32_t topOfProcStack)
Kovalev_D 22:12e6183f04d4 463 {
Kovalev_D 22:12e6183f04d4 464 __ASM volatile ("MSR psp, %0\n\t"
Kovalev_D 22:12e6183f04d4 465 "BX lr \n\t" : : "r" (topOfProcStack) );
Kovalev_D 22:12e6183f04d4 466 }
Kovalev_D 22:12e6183f04d4 467
Kovalev_D 22:12e6183f04d4 468 /**
Kovalev_D 22:12e6183f04d4 469 * @brief Return the Main Stack Pointer
Kovalev_D 22:12e6183f04d4 470 *
Kovalev_D 22:12e6183f04d4 471 * @return Main Stack Pointer
Kovalev_D 22:12e6183f04d4 472 *
Kovalev_D 22:12e6183f04d4 473 * Return the current value of the MSP (main stack pointer)
Kovalev_D 22:12e6183f04d4 474 * Cortex processor register
Kovalev_D 22:12e6183f04d4 475 */
Kovalev_D 22:12e6183f04d4 476 uint32_t __get_MSP(void) __attribute__( ( naked ) );
Kovalev_D 22:12e6183f04d4 477 uint32_t __get_MSP(void)
Kovalev_D 22:12e6183f04d4 478 {
Kovalev_D 22:12e6183f04d4 479 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 480
Kovalev_D 22:12e6183f04d4 481 __ASM volatile ("MRS %0, msp\n\t"
Kovalev_D 22:12e6183f04d4 482 "MOV r0, %0 \n\t"
Kovalev_D 22:12e6183f04d4 483 "BX lr \n\t" : "=r" (result) );
Kovalev_D 22:12e6183f04d4 484 return(result);
Kovalev_D 22:12e6183f04d4 485 }
Kovalev_D 22:12e6183f04d4 486
Kovalev_D 22:12e6183f04d4 487 /**
Kovalev_D 22:12e6183f04d4 488 * @brief Set the Main Stack Pointer
Kovalev_D 22:12e6183f04d4 489 *
Kovalev_D 22:12e6183f04d4 490 * @param topOfMainStack Main Stack Pointer
Kovalev_D 22:12e6183f04d4 491 *
Kovalev_D 22:12e6183f04d4 492 * Assign the value mainStackPointer to the MSP
Kovalev_D 22:12e6183f04d4 493 * (main stack pointer) Cortex processor register
Kovalev_D 22:12e6183f04d4 494 */
Kovalev_D 22:12e6183f04d4 495 void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
Kovalev_D 22:12e6183f04d4 496 void __set_MSP(uint32_t topOfMainStack)
Kovalev_D 22:12e6183f04d4 497 {
Kovalev_D 22:12e6183f04d4 498 __ASM volatile ("MSR msp, %0\n\t"
Kovalev_D 22:12e6183f04d4 499 "BX lr \n\t" : : "r" (topOfMainStack) );
Kovalev_D 22:12e6183f04d4 500 }
Kovalev_D 22:12e6183f04d4 501
Kovalev_D 22:12e6183f04d4 502 /**
Kovalev_D 22:12e6183f04d4 503 * @brief Return the Base Priority value
Kovalev_D 22:12e6183f04d4 504 *
Kovalev_D 22:12e6183f04d4 505 * @return BasePriority
Kovalev_D 22:12e6183f04d4 506 *
Kovalev_D 22:12e6183f04d4 507 * Return the content of the base priority register
Kovalev_D 22:12e6183f04d4 508 */
Kovalev_D 22:12e6183f04d4 509 uint32_t __get_BASEPRI(void)
Kovalev_D 22:12e6183f04d4 510 {
Kovalev_D 22:12e6183f04d4 511 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 512
Kovalev_D 22:12e6183f04d4 513 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
Kovalev_D 22:12e6183f04d4 514 return(result);
Kovalev_D 22:12e6183f04d4 515 }
Kovalev_D 22:12e6183f04d4 516
Kovalev_D 22:12e6183f04d4 517 /**
Kovalev_D 22:12e6183f04d4 518 * @brief Set the Base Priority value
Kovalev_D 22:12e6183f04d4 519 *
Kovalev_D 22:12e6183f04d4 520 * @param basePri BasePriority
Kovalev_D 22:12e6183f04d4 521 *
Kovalev_D 22:12e6183f04d4 522 * Set the base priority register
Kovalev_D 22:12e6183f04d4 523 */
Kovalev_D 22:12e6183f04d4 524 void __set_BASEPRI(uint32_t value)
Kovalev_D 22:12e6183f04d4 525 {
Kovalev_D 22:12e6183f04d4 526 __ASM volatile ("MSR basepri, %0" : : "r" (value) );
Kovalev_D 22:12e6183f04d4 527 }
Kovalev_D 22:12e6183f04d4 528
Kovalev_D 22:12e6183f04d4 529 /**
Kovalev_D 22:12e6183f04d4 530 * @brief Return the Priority Mask value
Kovalev_D 22:12e6183f04d4 531 *
Kovalev_D 22:12e6183f04d4 532 * @return PriMask
Kovalev_D 22:12e6183f04d4 533 *
Kovalev_D 22:12e6183f04d4 534 * Return state of the priority mask bit from the priority mask register
Kovalev_D 22:12e6183f04d4 535 */
Kovalev_D 22:12e6183f04d4 536 uint32_t __get_PRIMASK(void)
Kovalev_D 22:12e6183f04d4 537 {
Kovalev_D 22:12e6183f04d4 538 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 539
Kovalev_D 22:12e6183f04d4 540 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Kovalev_D 22:12e6183f04d4 541 return(result);
Kovalev_D 22:12e6183f04d4 542 }
Kovalev_D 22:12e6183f04d4 543
Kovalev_D 22:12e6183f04d4 544 /**
Kovalev_D 22:12e6183f04d4 545 * @brief Set the Priority Mask value
Kovalev_D 22:12e6183f04d4 546 *
Kovalev_D 22:12e6183f04d4 547 * @param priMask PriMask
Kovalev_D 22:12e6183f04d4 548 *
Kovalev_D 22:12e6183f04d4 549 * Set the priority mask bit in the priority mask register
Kovalev_D 22:12e6183f04d4 550 */
Kovalev_D 22:12e6183f04d4 551 void __set_PRIMASK(uint32_t priMask)
Kovalev_D 22:12e6183f04d4 552 {
Kovalev_D 22:12e6183f04d4 553 __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
Kovalev_D 22:12e6183f04d4 554 }
Kovalev_D 22:12e6183f04d4 555
Kovalev_D 22:12e6183f04d4 556 /**
Kovalev_D 22:12e6183f04d4 557 * @brief Return the Fault Mask value
Kovalev_D 22:12e6183f04d4 558 *
Kovalev_D 22:12e6183f04d4 559 * @return FaultMask
Kovalev_D 22:12e6183f04d4 560 *
Kovalev_D 22:12e6183f04d4 561 * Return the content of the fault mask register
Kovalev_D 22:12e6183f04d4 562 */
Kovalev_D 22:12e6183f04d4 563 uint32_t __get_FAULTMASK(void)
Kovalev_D 22:12e6183f04d4 564 {
Kovalev_D 22:12e6183f04d4 565 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 566
Kovalev_D 22:12e6183f04d4 567 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Kovalev_D 22:12e6183f04d4 568 return(result);
Kovalev_D 22:12e6183f04d4 569 }
Kovalev_D 22:12e6183f04d4 570
Kovalev_D 22:12e6183f04d4 571 /**
Kovalev_D 22:12e6183f04d4 572 * @brief Set the Fault Mask value
Kovalev_D 22:12e6183f04d4 573 *
Kovalev_D 22:12e6183f04d4 574 * @param faultMask faultMask value
Kovalev_D 22:12e6183f04d4 575 *
Kovalev_D 22:12e6183f04d4 576 * Set the fault mask register
Kovalev_D 22:12e6183f04d4 577 */
Kovalev_D 22:12e6183f04d4 578 void __set_FAULTMASK(uint32_t faultMask)
Kovalev_D 22:12e6183f04d4 579 {
Kovalev_D 22:12e6183f04d4 580 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
Kovalev_D 22:12e6183f04d4 581 }
Kovalev_D 22:12e6183f04d4 582
Kovalev_D 22:12e6183f04d4 583 /**
Kovalev_D 22:12e6183f04d4 584 * @brief Return the Control Register value
Kovalev_D 22:12e6183f04d4 585 *
Kovalev_D 22:12e6183f04d4 586 * @return Control value
Kovalev_D 22:12e6183f04d4 587 *
Kovalev_D 22:12e6183f04d4 588 * Return the content of the control register
Kovalev_D 22:12e6183f04d4 589 */
Kovalev_D 22:12e6183f04d4 590 uint32_t __get_CONTROL(void)
Kovalev_D 22:12e6183f04d4 591 {
Kovalev_D 22:12e6183f04d4 592 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 593
Kovalev_D 22:12e6183f04d4 594 __ASM volatile ("MRS %0, control" : "=r" (result) );
Kovalev_D 22:12e6183f04d4 595 return(result);
Kovalev_D 22:12e6183f04d4 596 }
Kovalev_D 22:12e6183f04d4 597
Kovalev_D 22:12e6183f04d4 598 /**
Kovalev_D 22:12e6183f04d4 599 * @brief Set the Control Register value
Kovalev_D 22:12e6183f04d4 600 *
Kovalev_D 22:12e6183f04d4 601 * @param control Control value
Kovalev_D 22:12e6183f04d4 602 *
Kovalev_D 22:12e6183f04d4 603 * Set the control register
Kovalev_D 22:12e6183f04d4 604 */
Kovalev_D 22:12e6183f04d4 605 void __set_CONTROL(uint32_t control)
Kovalev_D 22:12e6183f04d4 606 {
Kovalev_D 22:12e6183f04d4 607 __ASM volatile ("MSR control, %0" : : "r" (control) );
Kovalev_D 22:12e6183f04d4 608 }
Kovalev_D 22:12e6183f04d4 609
Kovalev_D 22:12e6183f04d4 610
Kovalev_D 22:12e6183f04d4 611 /**
Kovalev_D 22:12e6183f04d4 612 * @brief Reverse byte order in integer value
Kovalev_D 22:12e6183f04d4 613 *
Kovalev_D 22:12e6183f04d4 614 * @param value value to reverse
Kovalev_D 22:12e6183f04d4 615 * @return reversed value
Kovalev_D 22:12e6183f04d4 616 *
Kovalev_D 22:12e6183f04d4 617 * Reverse byte order in integer value
Kovalev_D 22:12e6183f04d4 618 */
Kovalev_D 22:12e6183f04d4 619 uint32_t __REV(uint32_t value)
Kovalev_D 22:12e6183f04d4 620 {
Kovalev_D 22:12e6183f04d4 621 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 622
Kovalev_D 22:12e6183f04d4 623 __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
Kovalev_D 22:12e6183f04d4 624 return(result);
Kovalev_D 22:12e6183f04d4 625 }
Kovalev_D 22:12e6183f04d4 626
Kovalev_D 22:12e6183f04d4 627 /**
Kovalev_D 22:12e6183f04d4 628 * @brief Reverse byte order in unsigned short value
Kovalev_D 22:12e6183f04d4 629 *
Kovalev_D 22:12e6183f04d4 630 * @param value value to reverse
Kovalev_D 22:12e6183f04d4 631 * @return reversed value
Kovalev_D 22:12e6183f04d4 632 *
Kovalev_D 22:12e6183f04d4 633 * Reverse byte order in unsigned short value
Kovalev_D 22:12e6183f04d4 634 */
Kovalev_D 22:12e6183f04d4 635 uint32_t __REV16(uint16_t value)
Kovalev_D 22:12e6183f04d4 636 {
Kovalev_D 22:12e6183f04d4 637 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 638
Kovalev_D 22:12e6183f04d4 639 __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
Kovalev_D 22:12e6183f04d4 640 return(result);
Kovalev_D 22:12e6183f04d4 641 }
Kovalev_D 22:12e6183f04d4 642
Kovalev_D 22:12e6183f04d4 643 /**
Kovalev_D 22:12e6183f04d4 644 * @brief Reverse byte order in signed short value with sign extension to integer
Kovalev_D 22:12e6183f04d4 645 *
Kovalev_D 22:12e6183f04d4 646 * @param value value to reverse
Kovalev_D 22:12e6183f04d4 647 * @return reversed value
Kovalev_D 22:12e6183f04d4 648 *
Kovalev_D 22:12e6183f04d4 649 * Reverse byte order in signed short value with sign extension to integer
Kovalev_D 22:12e6183f04d4 650 */
Kovalev_D 22:12e6183f04d4 651 int32_t __REVSH(int16_t value)
Kovalev_D 22:12e6183f04d4 652 {
Kovalev_D 22:12e6183f04d4 653 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 654
Kovalev_D 22:12e6183f04d4 655 __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
Kovalev_D 22:12e6183f04d4 656 return(result);
Kovalev_D 22:12e6183f04d4 657 }
Kovalev_D 22:12e6183f04d4 658
Kovalev_D 22:12e6183f04d4 659 /**
Kovalev_D 22:12e6183f04d4 660 * @brief Reverse bit order of value
Kovalev_D 22:12e6183f04d4 661 *
Kovalev_D 22:12e6183f04d4 662 * @param value value to reverse
Kovalev_D 22:12e6183f04d4 663 * @return reversed value
Kovalev_D 22:12e6183f04d4 664 *
Kovalev_D 22:12e6183f04d4 665 * Reverse bit order of value
Kovalev_D 22:12e6183f04d4 666 */
Kovalev_D 22:12e6183f04d4 667 uint32_t __RBIT(uint32_t value)
Kovalev_D 22:12e6183f04d4 668 {
Kovalev_D 22:12e6183f04d4 669 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 670
Kovalev_D 22:12e6183f04d4 671 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
Kovalev_D 22:12e6183f04d4 672 return(result);
Kovalev_D 22:12e6183f04d4 673 }
Kovalev_D 22:12e6183f04d4 674
Kovalev_D 22:12e6183f04d4 675 /**
Kovalev_D 22:12e6183f04d4 676 * @brief LDR Exclusive (8 bit)
Kovalev_D 22:12e6183f04d4 677 *
Kovalev_D 22:12e6183f04d4 678 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 679 * @return value of (*address)
Kovalev_D 22:12e6183f04d4 680 *
Kovalev_D 22:12e6183f04d4 681 * Exclusive LDR command for 8 bit value
Kovalev_D 22:12e6183f04d4 682 */
Kovalev_D 22:12e6183f04d4 683 uint8_t __LDREXB(uint8_t *addr)
Kovalev_D 22:12e6183f04d4 684 {
Kovalev_D 22:12e6183f04d4 685 uint8_t result=0;
Kovalev_D 22:12e6183f04d4 686
Kovalev_D 22:12e6183f04d4 687 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
Kovalev_D 22:12e6183f04d4 688 return(result);
Kovalev_D 22:12e6183f04d4 689 }
Kovalev_D 22:12e6183f04d4 690
Kovalev_D 22:12e6183f04d4 691 /**
Kovalev_D 22:12e6183f04d4 692 * @brief LDR Exclusive (16 bit)
Kovalev_D 22:12e6183f04d4 693 *
Kovalev_D 22:12e6183f04d4 694 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 695 * @return value of (*address)
Kovalev_D 22:12e6183f04d4 696 *
Kovalev_D 22:12e6183f04d4 697 * Exclusive LDR command for 16 bit values
Kovalev_D 22:12e6183f04d4 698 */
Kovalev_D 22:12e6183f04d4 699 uint16_t __LDREXH(uint16_t *addr)
Kovalev_D 22:12e6183f04d4 700 {
Kovalev_D 22:12e6183f04d4 701 uint16_t result=0;
Kovalev_D 22:12e6183f04d4 702
Kovalev_D 22:12e6183f04d4 703 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
Kovalev_D 22:12e6183f04d4 704 return(result);
Kovalev_D 22:12e6183f04d4 705 }
Kovalev_D 22:12e6183f04d4 706
Kovalev_D 22:12e6183f04d4 707 /**
Kovalev_D 22:12e6183f04d4 708 * @brief LDR Exclusive (32 bit)
Kovalev_D 22:12e6183f04d4 709 *
Kovalev_D 22:12e6183f04d4 710 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 711 * @return value of (*address)
Kovalev_D 22:12e6183f04d4 712 *
Kovalev_D 22:12e6183f04d4 713 * Exclusive LDR command for 32 bit values
Kovalev_D 22:12e6183f04d4 714 */
Kovalev_D 22:12e6183f04d4 715 uint32_t __LDREXW(uint32_t *addr)
Kovalev_D 22:12e6183f04d4 716 {
Kovalev_D 22:12e6183f04d4 717 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 718
Kovalev_D 22:12e6183f04d4 719 __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
Kovalev_D 22:12e6183f04d4 720 return(result);
Kovalev_D 22:12e6183f04d4 721 }
Kovalev_D 22:12e6183f04d4 722
Kovalev_D 22:12e6183f04d4 723 /**
Kovalev_D 22:12e6183f04d4 724 * @brief STR Exclusive (8 bit)
Kovalev_D 22:12e6183f04d4 725 *
Kovalev_D 22:12e6183f04d4 726 * @param value value to store
Kovalev_D 22:12e6183f04d4 727 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 728 * @return successful / failed
Kovalev_D 22:12e6183f04d4 729 *
Kovalev_D 22:12e6183f04d4 730 * Exclusive STR command for 8 bit values
Kovalev_D 22:12e6183f04d4 731 */
Kovalev_D 22:12e6183f04d4 732 uint32_t __STREXB(uint8_t value, uint8_t *addr)
Kovalev_D 22:12e6183f04d4 733 {
Kovalev_D 22:12e6183f04d4 734 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 735
Kovalev_D 22:12e6183f04d4 736 __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
Kovalev_D 22:12e6183f04d4 737 return(result);
Kovalev_D 22:12e6183f04d4 738 }
Kovalev_D 22:12e6183f04d4 739
Kovalev_D 22:12e6183f04d4 740 /**
Kovalev_D 22:12e6183f04d4 741 * @brief STR Exclusive (16 bit)
Kovalev_D 22:12e6183f04d4 742 *
Kovalev_D 22:12e6183f04d4 743 * @param value value to store
Kovalev_D 22:12e6183f04d4 744 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 745 * @return successful / failed
Kovalev_D 22:12e6183f04d4 746 *
Kovalev_D 22:12e6183f04d4 747 * Exclusive STR command for 16 bit values
Kovalev_D 22:12e6183f04d4 748 */
Kovalev_D 22:12e6183f04d4 749 uint32_t __STREXH(uint16_t value, uint16_t *addr)
Kovalev_D 22:12e6183f04d4 750 {
Kovalev_D 22:12e6183f04d4 751 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 752
Kovalev_D 22:12e6183f04d4 753 __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
Kovalev_D 22:12e6183f04d4 754 return(result);
Kovalev_D 22:12e6183f04d4 755 }
Kovalev_D 22:12e6183f04d4 756
Kovalev_D 22:12e6183f04d4 757 /**
Kovalev_D 22:12e6183f04d4 758 * @brief STR Exclusive (32 bit)
Kovalev_D 22:12e6183f04d4 759 *
Kovalev_D 22:12e6183f04d4 760 * @param value value to store
Kovalev_D 22:12e6183f04d4 761 * @param *addr address pointer
Kovalev_D 22:12e6183f04d4 762 * @return successful / failed
Kovalev_D 22:12e6183f04d4 763 *
Kovalev_D 22:12e6183f04d4 764 * Exclusive STR command for 32 bit values
Kovalev_D 22:12e6183f04d4 765 */
Kovalev_D 22:12e6183f04d4 766 uint32_t __STREXW(uint32_t value, uint32_t *addr)
Kovalev_D 22:12e6183f04d4 767 {
Kovalev_D 22:12e6183f04d4 768 uint32_t result=0;
Kovalev_D 22:12e6183f04d4 769
Kovalev_D 22:12e6183f04d4 770 __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
Kovalev_D 22:12e6183f04d4 771 return(result);
Kovalev_D 22:12e6183f04d4 772 }
Kovalev_D 22:12e6183f04d4 773
Kovalev_D 22:12e6183f04d4 774
Kovalev_D 22:12e6183f04d4 775 #elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
Kovalev_D 22:12e6183f04d4 776 /* TASKING carm specific functions */
Kovalev_D 22:12e6183f04d4 777
Kovalev_D 22:12e6183f04d4 778 /*
Kovalev_D 22:12e6183f04d4 779 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kovalev_D 22:12e6183f04d4 780 * Please use "carm -?i" to get an up to date list of all instrinsics,
Kovalev_D 22:12e6183f04d4 781 * Including the CMSIS ones.
Kovalev_D 22:12e6183f04d4 782 */
Kovalev_D 22:12e6183f04d4 783
Kovalev_D 22:12e6183f04d4 784 #endif