Iftikhar Aziz
4545
Fork of
mbed-dev
by 
Umar Naeem
Diff: targets/TARGET_ONSEMI/TARGET_NCS36510/rfAna.c
- Revision:
- 150:02e0a0aed4ec
- Parent:
- 149:156823d33999
--- a/targets/TARGET_ONSEMI/TARGET_NCS36510/rfAna.c Fri Oct 28 11:17:30 2016 +0100
+++ b/targets/TARGET_ONSEMI/TARGET_NCS36510/rfAna.c Tue Nov 08 17:45:16 2016 +0000
@@ -41,10 +41,6 @@
#include "rfAna.h"
#include "clock.h"
-#ifdef REVA
-#include "test.h"
-#endif
-
/*************************************************************************************************
* *
* Global variables *
@@ -78,7 +74,6 @@
*/
// RR: Making high side injection changes to RevD
-#ifdef REVD
/** This rf LUT is built for high side injection, using low side injection
* would requiere to change this LUT. */
@@ -107,93 +102,6 @@
13,14,15,16,17,18,19,20,20,20
}; // +1dBm to +10 dBm
-#endif /* REVD */
-
-#ifdef REVC
-/** This rf LUT is built for low side injection, using high side injection
- * would requiere to change this LUT. */
-const uint32_t rfLut[16][4] = {{0x47,0xFF15FC,0x4B,0x00A000},
- {0x47,0xFFAC93,0x4B,0x014001},
- {0x47,0x00432A,0x4B,0x01E001},
- {0x47,0x00D9C1,0x4C,0xFE7FFF},
- {0x47,0x017058,0x4C,0xFF1FFF},
- {0x48,0xFE06EC,0x4C,0xFFC000},
- {0x48,0xFE9D83,0x4C,0x006000},
- {0x48,0xFF341A,0x4C,0x010001},
- {0x48,0xFFCAB1,0x4C,0x01A001},
- {0x48,0x006148,0x4D,0xFE3FFF},
- {0x48,0x00F7DF,0x4D,0xFEDFFF},
- {0x48,0x018E76,0x4D,0xFF8000},
- {0x49,0xFE250A,0x4D,0x002000},
- {0x49,0xFEBBA1,0x4D,0x00C001},
- {0x49,0xFF5238,0x4D,0x016001},
- {0x49,0xFFE8CF,0x4E,0xFDFFFE}
-};
-
-const uint8_t txPowerLut[43] = {0,0,0, // -32dBm to -30dBm
- 0,0,0,0,0,0,0,0,0,0, // -29dBm to -20dBm
- 0,0,0,0,0,0,1,1,2,2, // -19dBm to -10dBm (clamp low at -14dB)
- 3,3,4,6,7,9,10,12,13,15, // -9dBm to 0dBm
- 17,19,20,20,20,20,20,20,20,20
- }; // +1dBm to +10 dBm (clamp high at +3dB)
-#endif /* REVC */
-
-#ifdef REVB
-/** This rf LUT is built for low side injection, using high side injection
- * would requiere to change this LUT. */
-const uint32_t rfLut[16][4] = {{0x47,0xFF15FC,0x4B,0x00A000},
- {0x47,0xFFAC93,0x4B,0x014001},
- {0x47,0x00432A,0x4B,0x01E001},
- {0x47,0x00D9C1,0x4C,0xFE7FFF},
- {0x47,0x017058,0x4C,0xFF1FFF},
- {0x48,0xFE06EC,0x4C,0xFFC000},
- {0x48,0xFE9D83,0x4C,0x006000},
- {0x48,0xFF341A,0x4C,0x010001},
- {0x48,0xFFCAB1,0x4C,0x01A001},
- {0x48,0x006148,0x4D,0xFE3FFF},
- {0x48,0x00F7DF,0x4D,0xFEDFFF},
- {0x48,0x018E76,0x4D,0xFF8000},
- {0x49,0xFE250A,0x4D,0x002000},
- {0x49,0xFEBBA1,0x4D,0x00C001},
- {0x49,0xFF5238,0x4D,0x016001},
- {0x49,0xFFE8CF,0x4E,0xFDFFFE}
-};
-
-const uint8_t txPowerLut[43] = {0,0,0, // -32dBm to -30dBm
- 0,0,0,0,0,0,0,0,0,0, // -29dBm to -20dBm
- 0,0,0,0,0,0,1,1,2,2, // -19dBm to -10dBm (clamp low at -14dB)
- 3,3,4,6,7,9,10,12,13,15, // -9dBm to 0dBm
- 17,19,20,20,20,20,20,20,20,20
- }; // +1dBm to +10 dBm (clamp high at +3dB)
-#endif
-
-#ifdef REVA
-const uint32_t rfLut[16][4] = {{0x57,0xFF5D2F,0x51,0x018001},
- {0x57,0x0007DA,0x52,0xFE1FFF},
- {0x57,0x00B285,0x52,0xFEBFFF},
- {0x57,0x015D30,0x52,0xFF6000},
- {0x58,0xFE07D8,0x52,0x000000},
- {0x58,0xFEB283,0x52,0x00A000},
- {0x58,0xFF5D2F,0x52,0x014001},
- {0x58,0x0007DA,0x52,0x01E001},
- {0x58,0x00B285,0x53,0xFE7FFF},
- {0x58,0x015D30,0x53,0xFF1FFF},
- {0x59,0xFE07D8,0x53,0xFFC000},
- {0x59,0xFEB283,0x53,0x006000},
- {0x59,0xFF5D2F,0x53,0x010001},
- {0x59,0x0007DA,0x53,0x01A001},
- {0x59,0x00B285,0x53,0xFE3FFF},
- {0x59,0x015D30,0x53,0xFEDFFF}
-};
-
-const uint8_t txPowerLut[43] = {1,2,3, // -32dBm to -30dBm
- 4,5,5,5,5,5,5,5,5,5, // -29dBm to -20dBm (clamp at -28dB)
- 5,5,5,5,5,5,5,5,5,5, // -19dBm to -10dBm
- 5,5,5,5,5,5,5,5,5,5, // -9dBm to 0dBm
- 5,5,5,5,5,5,5,5,5,5
- }; // +1dBm to +10 dBm
-#endif
-
/*************************************************************************************************
* *
* Functions *
@@ -205,13 +113,6 @@
// Enable rfana clock
CLOCK_ENABLE(CLOCK_RFANA);
-#ifdef REVA
- // Force Pll lock (it shouldn't be needed for either silicon if the part is configured/trimmed properly)
- fTestForcePllLock();
- // Bypass Pll regulator
- fTestBypassPllReg();
-#endif
-
// Set PLL timing
RFANAREG->PLL_TIMING.BITS.PLL_RESET_TIME = 0x1E; // 30us
RFANAREG->PLL_TIMING.BITS.PLL_LOCK_TIME = 0x2F; // 47us
@@ -239,29 +140,6 @@
RFANAREG->RX_LO_CONTROL.BITS.INT_WORD = rfLut[channel - 11][0];
// Set tx/rx vco trims
-#ifdef REVB
- /** REVB is requiering to adjust tx/rx vco trims each time a new 15.4 channel is used, in revB it is done
- * from trims stored in flash A, it has the drawback that it is not workable when flash A is not accessible.*/
- if (channel < 19) {
- RFANATRIMREG->PLL_TRIM.BITS.TX_VCO_TRIM = (TRIMREG->TX_VCO_LUT1.WORD) >> ((channel - 11) * 4);
- RFANATRIMREG->PLL_TRIM.BITS.RX_VCO_TRIM = (TRIMREG->RX_VCO_LUT1.WORD) >> ((channel - 11) * 4);
- } else {
- RFANATRIMREG->PLL_TRIM.BITS.TX_VCO_TRIM = (TRIMREG->TX_VCO_LUT2.WORD) >> ((channel - 19) * 4);
- RFANATRIMREG->PLL_TRIM.BITS.RX_VCO_TRIM = (TRIMREG->RX_VCO_LUT2.WORD) >> ((channel - 19) * 4);
- }
-#endif /* REVB */
-#ifdef REVC
- /** REVC is requiering to adjust tx/rx vco trims each time a new 15.4 channel is used, in revB it is done
- * from trims stored in dedicated registers available in digital.*/
- if (channel < 19) {
- RFANATRIMREG->PLL_TRIM.BITS.TX_VCO_TRIM = (RFANATRIMREG->TX_VCO_TRIM_LUT1) >> ((channel - 11) * 4);
- RFANATRIMREG->PLL_TRIM.BITS.RX_VCO_TRIM = (RFANATRIMREG->RX_VCO_TRIM_LUT1) >> ((channel - 11) * 4);
- } else {
- RFANATRIMREG->PLL_TRIM.BITS.TX_VCO_TRIM = (RFANATRIMREG->TX_VCO_TRIM_LUT2) >> ((channel - 19) * 4);
- RFANATRIMREG->PLL_TRIM.BITS.RX_VCO_TRIM = (RFANATRIMREG->RX_VCO_TRIM_LUT2) >> ((channel - 19) * 4);
- }
-#endif /* REVC */
-#ifdef REVD
/** REVD is requiering to adjust tx/rx vco trims each time a new 15.4 channel is used, in revB it is done
* from trims stored in dedicated registers available in digital.*/
if (channel < 19) {
@@ -271,7 +149,6 @@
RFANATRIMREG->PLL_TRIM.BITS.TX_VCO_TRIM = (RFANATRIMREG->TX_VCO_TRIM_LUT2) >> ((channel - 19) * 4);
RFANATRIMREG->PLL_TRIM.BITS.RX_VCO_TRIM = (RFANATRIMREG->RX_VCO_TRIM_LUT2) >> ((channel - 19) * 4);
}
-#endif /* REVD */
break;
case SET_TX_POWER:
txPower = *(uint8_t*)argument;