iforce2d Chris / Mbed 2 deprecated ubxDistanceMeter

Displays distance to start location on OLED screen.

Dependencies:   mbed

u8g_dev_t6963_240x64.c@0:972874f31c98, 2018-03-07 (annotated)

Committer:
iforce2d
Date:
Wed Mar 07 12:49:14 2018 +0000
Revision:
0:972874f31c98
First commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
iforce2d 0:972874f31c98 1 /*
iforce2d 0:972874f31c98 2
iforce2d 0:972874f31c98 3 u8g_dev_t6963_240x64.c
iforce2d 0:972874f31c98 4
iforce2d 0:972874f31c98 5 Tested with Varitronix MGLS240128TZ
iforce2d 0:972874f31c98 6
iforce2d 0:972874f31c98 7 Universal 8bit Graphics Library
iforce2d 0:972874f31c98 8
iforce2d 0:972874f31c98 9 Copyright (c) 2013, olikraus@gmail.com
iforce2d 0:972874f31c98 10 All rights reserved.
iforce2d 0:972874f31c98 11
iforce2d 0:972874f31c98 12 Redistribution and use in source and binary forms, with or without modification,
iforce2d 0:972874f31c98 13 are permitted provided that the following conditions are met:
iforce2d 0:972874f31c98 14
iforce2d 0:972874f31c98 15 * Redistributions of source code must retain the above copyright notice, this list
iforce2d 0:972874f31c98 16 of conditions and the following disclaimer.
iforce2d 0:972874f31c98 17
iforce2d 0:972874f31c98 18 * Redistributions in binary form must reproduce the above copyright notice, this
iforce2d 0:972874f31c98 19 list of conditions and the following disclaimer in the documentation and/or other
iforce2d 0:972874f31c98 20 materials provided with the distribution.
iforce2d 0:972874f31c98 21
iforce2d 0:972874f31c98 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
iforce2d 0:972874f31c98 23 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
iforce2d 0:972874f31c98 24 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
iforce2d 0:972874f31c98 25 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
iforce2d 0:972874f31c98 26 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
iforce2d 0:972874f31c98 27 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
iforce2d 0:972874f31c98 28 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
iforce2d 0:972874f31c98 29 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
iforce2d 0:972874f31c98 30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
iforce2d 0:972874f31c98 31 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
iforce2d 0:972874f31c98 32 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
iforce2d 0:972874f31c98 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
iforce2d 0:972874f31c98 34 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
iforce2d 0:972874f31c98 35
iforce2d 0:972874f31c98 36
iforce2d 0:972874f31c98 37 Application Notes for the MGLS 240x128
iforce2d 0:972874f31c98 38 www.baso.no/content/pdf/T6963C_Application.pdf
iforce2d 0:972874f31c98 39
iforce2d 0:972874f31c98 40 Hitachi App Notes:
iforce2d 0:972874f31c98 41 https://www.sparkfun.com/datasheets/LCD/Monochrome/AN-029-Toshiba_T6963C.pdf
iforce2d 0:972874f31c98 42
iforce2d 0:972874f31c98 43 Notes:
iforce2d 0:972874f31c98 44 The font selection pins should generate the 8x8 font.
iforce2d 0:972874f31c98 45 For the MGLS240128TZ only FS1 is available on pin 18.
iforce2d 0:972874f31c98 46 FS1 must be low to generate the 8x8 font.
iforce2d 0:972874f31c98 47
iforce2d 0:972874f31c98 48
iforce2d 0:972874f31c98 49 */
iforce2d 0:972874f31c98 50
iforce2d 0:972874f31c98 51 #include "u8g.h"
iforce2d 0:972874f31c98 52
iforce2d 0:972874f31c98 53 #define WIDTH 240
iforce2d 0:972874f31c98 54 #define HEIGHT 64
iforce2d 0:972874f31c98 55 #define PAGE_HEIGHT 16
iforce2d 0:972874f31c98 56
iforce2d 0:972874f31c98 57
iforce2d 0:972874f31c98 58 /*
iforce2d 0:972874f31c98 59 http://www.mark-products.com/graphics.htm#240x64%20Pixel%20Format
iforce2d 0:972874f31c98 60 */
iforce2d 0:972874f31c98 61
iforce2d 0:972874f31c98 62 /* text is not used, so settings are not relevant */
iforce2d 0:972874f31c98 63 static const uint8_t u8g_dev_t6963_240x64_init_seq[] PROGMEM = {
iforce2d 0:972874f31c98 64 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 65 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 66 U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
iforce2d 0:972874f31c98 67
iforce2d 0:972874f31c98 68 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 69 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 70
iforce2d 0:972874f31c98 71 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 72 0x000, /* low byte */
iforce2d 0:972874f31c98 73 0x000, /* height byte */
iforce2d 0:972874f31c98 74 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 75 0x021, /* set cursor position */
iforce2d 0:972874f31c98 76
iforce2d 0:972874f31c98 77 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 78 0x000, /* low byte */
iforce2d 0:972874f31c98 79 0x000, /* height byte */
iforce2d 0:972874f31c98 80 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 81 0x022, /* set offset */
iforce2d 0:972874f31c98 82
iforce2d 0:972874f31c98 83 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 84 0x000, /* low byte */
iforce2d 0:972874f31c98 85 0x000, /* height byte */
iforce2d 0:972874f31c98 86 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 87 0x040, /* text home */
iforce2d 0:972874f31c98 88
iforce2d 0:972874f31c98 89 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 90 WIDTH/8, /* low byte */
iforce2d 0:972874f31c98 91 0x000, /* height byte */
iforce2d 0:972874f31c98 92 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 93 0x041, /* text columns */
iforce2d 0:972874f31c98 94
iforce2d 0:972874f31c98 95 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 96 0x000, /* low byte */
iforce2d 0:972874f31c98 97 0x000, /* height byte */
iforce2d 0:972874f31c98 98 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 99 0x042, /* graphics home */
iforce2d 0:972874f31c98 100
iforce2d 0:972874f31c98 101 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 102 WIDTH/8, /* low byte */
iforce2d 0:972874f31c98 103 0x000, /* height byte */
iforce2d 0:972874f31c98 104 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 105 0x043, /* graphics columns */
iforce2d 0:972874f31c98 106
iforce2d 0:972874f31c98 107 // mode set
iforce2d 0:972874f31c98 108 // 0x080: Internal CG, OR Mode
iforce2d 0:972874f31c98 109 // 0x081: Internal CG, EXOR Mode
iforce2d 0:972874f31c98 110 // 0x083: Internal CG, AND Mode
iforce2d 0:972874f31c98 111 // 0x088: External CG, OR Mode
iforce2d 0:972874f31c98 112 // 0x089: External CG, EXOR Mode
iforce2d 0:972874f31c98 113 // 0x08B: External CG, AND Mode
iforce2d 0:972874f31c98 114 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 115 0x080, /* mode register: OR Mode, Internal Character Mode */
iforce2d 0:972874f31c98 116
iforce2d 0:972874f31c98 117 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 118 // display mode
iforce2d 0:972874f31c98 119 // 0x090: Display off
iforce2d 0:972874f31c98 120 // 0x094: Graphic off, text on, cursor off, blink off
iforce2d 0:972874f31c98 121 // 0x096: Graphic off, text on, cursor on, blink off
iforce2d 0:972874f31c98 122 // 0x097: Graphic off, text on, cursor on, blink on
iforce2d 0:972874f31c98 123 // 0x098: Graphic on, text off, cursor off, blink off
iforce2d 0:972874f31c98 124 // 0x09a: Graphic on, text off, cursor on, blink off
iforce2d 0:972874f31c98 125 // ...
iforce2d 0:972874f31c98 126 // 0x09c: Graphic on, text on, cursor off, blink off
iforce2d 0:972874f31c98 127 // 0x09f: Graphic on, text on, cursor on, blink on
iforce2d 0:972874f31c98 128 0x098, /* mode register: Display Mode, Graphics on, Text off, Cursor off */
iforce2d 0:972874f31c98 129
iforce2d 0:972874f31c98 130 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 131 0x000, /* low byte */
iforce2d 0:972874f31c98 132 0x000, /* height byte */
iforce2d 0:972874f31c98 133 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 134 0x024, /* set adr pointer */
iforce2d 0:972874f31c98 135
iforce2d 0:972874f31c98 136
iforce2d 0:972874f31c98 137 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 138
iforce2d 0:972874f31c98 139 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 140 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 141 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 142 };
iforce2d 0:972874f31c98 143
iforce2d 0:972874f31c98 144 uint8_t u8g_dev_t6963_240x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
iforce2d 0:972874f31c98 145 {
iforce2d 0:972874f31c98 146 switch(msg)
iforce2d 0:972874f31c98 147 {
iforce2d 0:972874f31c98 148 case U8G_DEV_MSG_INIT:
iforce2d 0:972874f31c98 149 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE);
iforce2d 0:972874f31c98 150 u8g_WriteEscSeqP(u8g, dev, u8g_dev_t6963_240x64_init_seq);
iforce2d 0:972874f31c98 151 break;
iforce2d 0:972874f31c98 152 case U8G_DEV_MSG_STOP:
iforce2d 0:972874f31c98 153 break;
iforce2d 0:972874f31c98 154 case U8G_DEV_MSG_PAGE_NEXT:
iforce2d 0:972874f31c98 155 {
iforce2d 0:972874f31c98 156 uint8_t y, i;
iforce2d 0:972874f31c98 157 uint16_t disp_ram_adr;
iforce2d 0:972874f31c98 158 uint8_t *ptr;
iforce2d 0:972874f31c98 159 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
iforce2d 0:972874f31c98 160
iforce2d 0:972874f31c98 161
iforce2d 0:972874f31c98 162 u8g_SetAddress(u8g, dev, 0); /* data mode */
iforce2d 0:972874f31c98 163 u8g_SetChipSelect(u8g, dev, 1);
iforce2d 0:972874f31c98 164 y = pb->p.page_y0;
iforce2d 0:972874f31c98 165 ptr = pb->buf;
iforce2d 0:972874f31c98 166 disp_ram_adr = WIDTH/8;
iforce2d 0:972874f31c98 167 disp_ram_adr *= y;
iforce2d 0:972874f31c98 168 for( i = 0; i < PAGE_HEIGHT; i ++ )
iforce2d 0:972874f31c98 169 {
iforce2d 0:972874f31c98 170 u8g_SetAddress(u8g, dev, 0); /* data mode */
iforce2d 0:972874f31c98 171 u8g_WriteByte(u8g, dev, disp_ram_adr&255 ); /* address low byte */
iforce2d 0:972874f31c98 172 u8g_WriteByte(u8g, dev, disp_ram_adr>>8 ); /* address hight byte */
iforce2d 0:972874f31c98 173 u8g_SetAddress(u8g, dev, 1); /* cmd mode */
iforce2d 0:972874f31c98 174 u8g_WriteByte(u8g, dev, 0x024 ); /* set adr ptr */
iforce2d 0:972874f31c98 175
iforce2d 0:972874f31c98 176 u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
iforce2d 0:972874f31c98 177
iforce2d 0:972874f31c98 178 ptr += WIDTH/8;
iforce2d 0:972874f31c98 179 disp_ram_adr += WIDTH/8;
iforce2d 0:972874f31c98 180 }
iforce2d 0:972874f31c98 181 u8g_SetAddress(u8g, dev, 0); /* data mode */
iforce2d 0:972874f31c98 182 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 183 }
iforce2d 0:972874f31c98 184 break;
iforce2d 0:972874f31c98 185 }
iforce2d 0:972874f31c98 186 return u8g_dev_pb16h1_base_fn(u8g, dev, msg, arg);
iforce2d 0:972874f31c98 187 }
iforce2d 0:972874f31c98 188
iforce2d 0:972874f31c98 189 // U8G_PB_DEV(u8g_dev_t6963_240x64_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_t6963_240x64_fn, U8G_COM_T6963);
iforce2d 0:972874f31c98 190
iforce2d 0:972874f31c98 191 uint8_t u8g_dev_t6963_240x64_2x_bw_buf[WIDTH/8*PAGE_HEIGHT] U8G_NOCOMMON ;
iforce2d 0:972874f31c98 192 u8g_pb_t u8g_dev_t6963_240x64_2x_bw_pb = { {PAGE_HEIGHT, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_t6963_240x64_2x_bw_buf};
iforce2d 0:972874f31c98 193 u8g_dev_t u8g_dev_t6963_240x64_8bit = { u8g_dev_t6963_240x64_fn, &u8g_dev_t6963_240x64_2x_bw_pb, U8G_COM_T6963 };
iforce2d 0:972874f31c98 194
iforce2d 0:972874f31c98 195
iforce2d 0:972874f31c98 196