iforce2d Chris / Mbed 2 deprecated ubxDistanceMeter

Displays distance to start location on OLED screen.

Dependencies:   mbed

u8g_dev_st7565_lm6063.c@0:972874f31c98, 2018-03-07 (annotated)

Committer:
iforce2d
Date:
Wed Mar 07 12:49:14 2018 +0000
Revision:
0:972874f31c98
First commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
iforce2d 0:972874f31c98 1 /*
iforce2d 0:972874f31c98 2
iforce2d 0:972874f31c98 3 u8g_dev_st7565_lm6063.c
iforce2d 0:972874f31c98 4
iforce2d 0:972874f31c98 5 Universal 8bit Graphics Library
iforce2d 0:972874f31c98 6
iforce2d 0:972874f31c98 7 Copyright (c) 2011, olikraus@gmail.com
iforce2d 0:972874f31c98 8 All rights reserved.
iforce2d 0:972874f31c98 9
iforce2d 0:972874f31c98 10 Redistribution and use in source and binary forms, with or without modification,
iforce2d 0:972874f31c98 11 are permitted provided that the following conditions are met:
iforce2d 0:972874f31c98 12
iforce2d 0:972874f31c98 13 * Redistributions of source code must retain the above copyright notice, this list
iforce2d 0:972874f31c98 14 of conditions and the following disclaimer.
iforce2d 0:972874f31c98 15
iforce2d 0:972874f31c98 16 * Redistributions in binary form must reproduce the above copyright notice, this
iforce2d 0:972874f31c98 17 list of conditions and the following disclaimer in the documentation and/or other
iforce2d 0:972874f31c98 18 materials provided with the distribution.
iforce2d 0:972874f31c98 19
iforce2d 0:972874f31c98 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
iforce2d 0:972874f31c98 21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
iforce2d 0:972874f31c98 22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
iforce2d 0:972874f31c98 23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
iforce2d 0:972874f31c98 24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
iforce2d 0:972874f31c98 25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
iforce2d 0:972874f31c98 26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
iforce2d 0:972874f31c98 27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
iforce2d 0:972874f31c98 28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
iforce2d 0:972874f31c98 29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
iforce2d 0:972874f31c98 30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
iforce2d 0:972874f31c98 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
iforce2d 0:972874f31c98 32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
iforce2d 0:972874f31c98 33
iforce2d 0:972874f31c98 34
iforce2d 0:972874f31c98 35 */
iforce2d 0:972874f31c98 36
iforce2d 0:972874f31c98 37 #include "u8g.h"
iforce2d 0:972874f31c98 38
iforce2d 0:972874f31c98 39 #define WIDTH 128
iforce2d 0:972874f31c98 40 #define HEIGHT 64
iforce2d 0:972874f31c98 41 #define PAGE_HEIGHT 8
iforce2d 0:972874f31c98 42
iforce2d 0:972874f31c98 43 #ifdef OLD_ADAFRUIT_CODE
iforce2d 0:972874f31c98 44 static const uint8_t OLD_u8g_dev_st7565_lm6063_init_seq[] PROGMEM = {
iforce2d 0:972874f31c98 45 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 46 U8G_ESC_ADR(0), /* instruction mode */
iforce2d 0:972874f31c98 47 U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
iforce2d 0:972874f31c98 48 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 49
iforce2d 0:972874f31c98 50 0x040, /* set display start line */
iforce2d 0:972874f31c98 51 0x0a1, /* ADC set to reverse */
iforce2d 0:972874f31c98 52 0x0c8, /* common output mode: set scan direction normal operation/SHL Select / 17 Jan: seems to be a bug, must be 0x0c0 */
iforce2d 0:972874f31c98 53 0x0a6, /* display normal, bit val 0: LCD pixel off. */
iforce2d 0:972874f31c98 54 0x0a2, /* LCD bias 1/9 */
iforce2d 0:972874f31c98 55 0x02f, /* all power control circuits on */
iforce2d 0:972874f31c98 56 /*0x0f8,*/ /* set booster ratio to */
iforce2d 0:972874f31c98 57 /*0x000, */ /* 4x */
iforce2d 0:972874f31c98 58 /*0x027,*/ /* set V0 voltage resistor ratio to large */
iforce2d 0:972874f31c98 59 0x081, /* set contrast */
iforce2d 0:972874f31c98 60 0x018, /* contrast value*/
iforce2d 0:972874f31c98 61 0x0ac, /* indicator */
iforce2d 0:972874f31c98 62 0x000, /* disable */
iforce2d 0:972874f31c98 63 0x0af, /* display on */
iforce2d 0:972874f31c98 64
iforce2d 0:972874f31c98 65 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 66 0x0a5, /* display all points, ST7565 */
iforce2d 0:972874f31c98 67 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 68 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 69 0x0a4, /* normal display */
iforce2d 0:972874f31c98 70 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 71 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 72 };
iforce2d 0:972874f31c98 73 #endif
iforce2d 0:972874f31c98 74
iforce2d 0:972874f31c98 75 /* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
iforce2d 0:972874f31c98 76 static const uint8_t u8g_dev_st7565_lm6063_init_seq[] PROGMEM = {
iforce2d 0:972874f31c98 77 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 78 U8G_ESC_ADR(0), /* instruction mode */
iforce2d 0:972874f31c98 79 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 80 U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
iforce2d 0:972874f31c98 81
iforce2d 0:972874f31c98 82 0x0a3, /* 0x0a2: LCD bias 1/9 (suggested for the LM6063), 0x0a3: Used by Adafruit */
iforce2d 0:972874f31c98 83 0x0a1, /* 0x0a1: ADC set to reverse (suggested for the LM6063), 0x0a0: Used by Adafruit -> normal mode */
iforce2d 0:972874f31c98 84 0x0c0, /* common output mode: set scan direction normal operation/SHL Select, 0x0c0 --> SHL = 0, normal, 0x0c8 --> SHL = 1 */
iforce2d 0:972874f31c98 85 0x040, /* set display start line */
iforce2d 0:972874f31c98 86
iforce2d 0:972874f31c98 87 0x028 | 0x04, /* power control: turn on voltage converter */
iforce2d 0:972874f31c98 88 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 89
iforce2d 0:972874f31c98 90 0x028 | 0x06, /* power control: turn on voltage regulator */
iforce2d 0:972874f31c98 91 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 92
iforce2d 0:972874f31c98 93 0x028 | 0x07, /* power control: turn on voltage follower */
iforce2d 0:972874f31c98 94 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 95
iforce2d 0:972874f31c98 96 0x026, /* set V0 voltage resistor ratio to 6 (Adafruit Value, no info from LM6063 Manual) */
iforce2d 0:972874f31c98 97
iforce2d 0:972874f31c98 98 0x0a6, /* display normal, bit val 0: LCD pixel off. */
iforce2d 0:972874f31c98 99
iforce2d 0:972874f31c98 100 0x081, /* set contrast */
iforce2d 0:972874f31c98 101 0x018, /* contrast value*/
iforce2d 0:972874f31c98 102
iforce2d 0:972874f31c98 103 /*0x0ac,*/ /* indicator */
iforce2d 0:972874f31c98 104 /*0x000,*/ /* disable */
iforce2d 0:972874f31c98 105
iforce2d 0:972874f31c98 106 0x0af, /* display on */
iforce2d 0:972874f31c98 107
iforce2d 0:972874f31c98 108 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 109 0x0a5, /* display all points, ST7565 */
iforce2d 0:972874f31c98 110 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 111 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 112 0x0a4, /* normal display */
iforce2d 0:972874f31c98 113 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 114 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 115 };
iforce2d 0:972874f31c98 116
iforce2d 0:972874f31c98 117 static const uint8_t u8g_dev_st7565_lm6063_data_start[] PROGMEM = {
iforce2d 0:972874f31c98 118 U8G_ESC_ADR(0), /* instruction mode */
iforce2d 0:972874f31c98 119 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 120 0x010, /* set upper 4 bit of the col adr to 0 */
iforce2d 0:972874f31c98 121 0x000, /* set lower 4 bit of the col adr to 0 */
iforce2d 0:972874f31c98 122 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 123 };
iforce2d 0:972874f31c98 124
iforce2d 0:972874f31c98 125 static const uint8_t u8g_dev_st7565_st7565_sleep_on[] PROGMEM = {
iforce2d 0:972874f31c98 126 U8G_ESC_ADR(0), /* instruction mode */
iforce2d 0:972874f31c98 127 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 128 0x0ac, /* static indicator off */
iforce2d 0:972874f31c98 129 0x000, /* indicator register set (not sure if this is required) */
iforce2d 0:972874f31c98 130 0x0ae, /* display off */
iforce2d 0:972874f31c98 131 0x0a5, /* all points on */
iforce2d 0:972874f31c98 132 U8G_ESC_CS(1), /* disable chip */
iforce2d 0:972874f31c98 133 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 134 };
iforce2d 0:972874f31c98 135
iforce2d 0:972874f31c98 136 static const uint8_t u8g_dev_st7565_st7565_sleep_off[] PROGMEM = {
iforce2d 0:972874f31c98 137 U8G_ESC_ADR(0), /* instruction mode */
iforce2d 0:972874f31c98 138 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 139 0x0a4, /* all points off */
iforce2d 0:972874f31c98 140 0x0af, /* display on */
iforce2d 0:972874f31c98 141 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 142 U8G_ESC_CS(1), /* disable chip */
iforce2d 0:972874f31c98 143 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 144 };
iforce2d 0:972874f31c98 145
iforce2d 0:972874f31c98 146
iforce2d 0:972874f31c98 147 uint8_t u8g_dev_st7565_lm6063_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
iforce2d 0:972874f31c98 148 {
iforce2d 0:972874f31c98 149 switch(msg)
iforce2d 0:972874f31c98 150 {
iforce2d 0:972874f31c98 151 case U8G_DEV_MSG_INIT:
iforce2d 0:972874f31c98 152 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
iforce2d 0:972874f31c98 153 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6063_init_seq);
iforce2d 0:972874f31c98 154 break;
iforce2d 0:972874f31c98 155 case U8G_DEV_MSG_STOP:
iforce2d 0:972874f31c98 156 break;
iforce2d 0:972874f31c98 157 case U8G_DEV_MSG_PAGE_NEXT:
iforce2d 0:972874f31c98 158 {
iforce2d 0:972874f31c98 159 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
iforce2d 0:972874f31c98 160 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6063_data_start);
iforce2d 0:972874f31c98 161 u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (ST7565R) */
iforce2d 0:972874f31c98 162 u8g_SetAddress(u8g, dev, 1); /* data mode */
iforce2d 0:972874f31c98 163 if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
iforce2d 0:972874f31c98 164 return 0;
iforce2d 0:972874f31c98 165 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 166 }
iforce2d 0:972874f31c98 167 break;
iforce2d 0:972874f31c98 168 case U8G_DEV_MSG_CONTRAST:
iforce2d 0:972874f31c98 169 u8g_SetChipSelect(u8g, dev, 1);
iforce2d 0:972874f31c98 170 u8g_SetAddress(u8g, dev, 0); /* instruction mode */
iforce2d 0:972874f31c98 171 u8g_WriteByte(u8g, dev, 0x081);
iforce2d 0:972874f31c98 172 u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
iforce2d 0:972874f31c98 173 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 174 return 1;
iforce2d 0:972874f31c98 175 case U8G_DEV_MSG_SLEEP_ON:
iforce2d 0:972874f31c98 176 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_st7565_sleep_on);
iforce2d 0:972874f31c98 177 return 1;
iforce2d 0:972874f31c98 178 case U8G_DEV_MSG_SLEEP_OFF:
iforce2d 0:972874f31c98 179 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_st7565_sleep_off);
iforce2d 0:972874f31c98 180 return 1;
iforce2d 0:972874f31c98 181 }
iforce2d 0:972874f31c98 182 return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
iforce2d 0:972874f31c98 183 }
iforce2d 0:972874f31c98 184
iforce2d 0:972874f31c98 185 uint8_t u8g_dev_st7565_lm6063_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
iforce2d 0:972874f31c98 186 {
iforce2d 0:972874f31c98 187 switch(msg)
iforce2d 0:972874f31c98 188 {
iforce2d 0:972874f31c98 189 case U8G_DEV_MSG_INIT:
iforce2d 0:972874f31c98 190 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
iforce2d 0:972874f31c98 191 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6063_init_seq);
iforce2d 0:972874f31c98 192 break;
iforce2d 0:972874f31c98 193 case U8G_DEV_MSG_STOP:
iforce2d 0:972874f31c98 194 break;
iforce2d 0:972874f31c98 195 case U8G_DEV_MSG_PAGE_NEXT:
iforce2d 0:972874f31c98 196 {
iforce2d 0:972874f31c98 197 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
iforce2d 0:972874f31c98 198
iforce2d 0:972874f31c98 199 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6063_data_start);
iforce2d 0:972874f31c98 200 u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page (ST7565R) */
iforce2d 0:972874f31c98 201 u8g_SetAddress(u8g, dev, 1); /* data mode */
iforce2d 0:972874f31c98 202 u8g_WriteSequence(u8g, dev, pb->width, pb->buf);
iforce2d 0:972874f31c98 203 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 204
iforce2d 0:972874f31c98 205 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6063_data_start);
iforce2d 0:972874f31c98 206 u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
iforce2d 0:972874f31c98 207 u8g_SetAddress(u8g, dev, 1); /* data mode */
iforce2d 0:972874f31c98 208 u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width);
iforce2d 0:972874f31c98 209 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 210 }
iforce2d 0:972874f31c98 211 break;
iforce2d 0:972874f31c98 212 case U8G_DEV_MSG_CONTRAST:
iforce2d 0:972874f31c98 213 u8g_SetChipSelect(u8g, dev, 1);
iforce2d 0:972874f31c98 214 u8g_SetAddress(u8g, dev, 0); /* instruction mode */
iforce2d 0:972874f31c98 215 u8g_WriteByte(u8g, dev, 0x081);
iforce2d 0:972874f31c98 216 u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
iforce2d 0:972874f31c98 217 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 218 return 1;
iforce2d 0:972874f31c98 219 case U8G_DEV_MSG_SLEEP_ON:
iforce2d 0:972874f31c98 220 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_st7565_sleep_on);
iforce2d 0:972874f31c98 221 return 1;
iforce2d 0:972874f31c98 222 case U8G_DEV_MSG_SLEEP_OFF:
iforce2d 0:972874f31c98 223 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_st7565_sleep_off);
iforce2d 0:972874f31c98 224 return 1;
iforce2d 0:972874f31c98 225 }
iforce2d 0:972874f31c98 226 return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
iforce2d 0:972874f31c98 227 }
iforce2d 0:972874f31c98 228
iforce2d 0:972874f31c98 229 U8G_PB_DEV(u8g_dev_st7565_lm6063_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_lm6063_fn, U8G_COM_SW_SPI);
iforce2d 0:972874f31c98 230 U8G_PB_DEV(u8g_dev_st7565_lm6063_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_lm6063_fn, U8G_COM_HW_SPI);
iforce2d 0:972874f31c98 231
iforce2d 0:972874f31c98 232 uint8_t u8g_dev_st7565_lm6063_2x_buf[WIDTH*2] U8G_NOCOMMON ;
iforce2d 0:972874f31c98 233 u8g_pb_t u8g_dev_st7565_lm6063_2x_pb = { {16, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_st7565_lm6063_2x_buf};
iforce2d 0:972874f31c98 234 u8g_dev_t u8g_dev_st7565_lm6063_2x_sw_spi = { u8g_dev_st7565_lm6063_2x_fn, &u8g_dev_st7565_lm6063_2x_pb, U8G_COM_SW_SPI };
iforce2d 0:972874f31c98 235 u8g_dev_t u8g_dev_st7565_lm6063_2x_hw_spi = { u8g_dev_st7565_lm6063_2x_fn, &u8g_dev_st7565_lm6063_2x_pb, U8G_COM_HW_SPI };
iforce2d 0:972874f31c98 236
iforce2d 0:972874f31c98 237