Displays distance to start location on OLED screen.

Dependencies:   mbed

Committer:
iforce2d
Date:
Wed Mar 07 12:49:14 2018 +0000
Revision:
0:972874f31c98
First commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
iforce2d 0:972874f31c98 1 /*
iforce2d 0:972874f31c98 2
iforce2d 0:972874f31c98 3 u8g_dev_pcf8812_96x65.c
iforce2d 0:972874f31c98 4
iforce2d 0:972874f31c98 5 Display: Nokia 96x65
iforce2d 0:972874f31c98 6
iforce2d 0:972874f31c98 7 Universal 8bit Graphics Library
iforce2d 0:972874f31c98 8
iforce2d 0:972874f31c98 9 Copyright (c) 2011, olikraus@gmail.com
iforce2d 0:972874f31c98 10 All rights reserved.
iforce2d 0:972874f31c98 11
iforce2d 0:972874f31c98 12 Redistribution and use in source and binary forms, with or without modification,
iforce2d 0:972874f31c98 13 are permitted provided that the following conditions are met:
iforce2d 0:972874f31c98 14
iforce2d 0:972874f31c98 15 * Redistributions of source code must retain the above copyright notice, this list
iforce2d 0:972874f31c98 16 of conditions and the following disclaimer.
iforce2d 0:972874f31c98 17
iforce2d 0:972874f31c98 18 * Redistributions in binary form must reproduce the above copyright notice, this
iforce2d 0:972874f31c98 19 list of conditions and the following disclaimer in the documentation and/or other
iforce2d 0:972874f31c98 20 materials provided with the distribution.
iforce2d 0:972874f31c98 21
iforce2d 0:972874f31c98 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
iforce2d 0:972874f31c98 23 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
iforce2d 0:972874f31c98 24 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
iforce2d 0:972874f31c98 25 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
iforce2d 0:972874f31c98 26 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
iforce2d 0:972874f31c98 27 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
iforce2d 0:972874f31c98 28 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
iforce2d 0:972874f31c98 29 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
iforce2d 0:972874f31c98 30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
iforce2d 0:972874f31c98 31 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
iforce2d 0:972874f31c98 32 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
iforce2d 0:972874f31c98 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
iforce2d 0:972874f31c98 34 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
iforce2d 0:972874f31c98 35
iforce2d 0:972874f31c98 36
iforce2d 0:972874f31c98 37
iforce2d 0:972874f31c98 38 om6206 comaptible to pcf8812 ?
iforce2d 0:972874f31c98 39
iforce2d 0:972874f31c98 40 Status: Tested
iforce2d 0:972874f31c98 41
iforce2d 0:972874f31c98 42
iforce2d 0:972874f31c98 43 Display Controller Seen in
iforce2d 0:972874f31c98 44 LPH7366 (9 pins, 84x48) PCD8544 Nokia 5110 / 5120 / 5130 / 5160 / 6110 / 6150
iforce2d 0:972874f31c98 45 LPH7677 (8 pins, 84x48) PCD8544 Nokia 3210
iforce2d 0:972874f31c98 46 LPH7779 (8 pins, 84x48) PCD8544 Nokia 3310 / 3315 / 3330 / 3110, also 3410?
iforce2d 0:972874f31c98 47 ??? PCD8544 Nokia 5110 / 6110
iforce2d 0:972874f31c98 48 LPH7690 ? (96x65) PCF8455/OM6202 Nokia 3410
iforce2d 0:972874f31c98 49 LPH7690 ? (96x65?) SED1565/S1D15605 Nokia 7110 / 3510?
iforce2d 0:972874f31c98 50 LPH7690 ??? Nokia 6210
iforce2d 0:972874f31c98 51
iforce2d 0:972874f31c98 52
iforce2d 0:972874f31c98 53
iforce2d 0:972874f31c98 54 */
iforce2d 0:972874f31c98 55
iforce2d 0:972874f31c98 56 #include "u8g.h"
iforce2d 0:972874f31c98 57
iforce2d 0:972874f31c98 58 #define WIDTH 96
iforce2d 0:972874f31c98 59 #define HEIGHT 65
iforce2d 0:972874f31c98 60 #define PAGE_HEIGHT 8
iforce2d 0:972874f31c98 61
iforce2d 0:972874f31c98 62
iforce2d 0:972874f31c98 63 static const uint8_t u8g_dev_pcf8812_init_seq[] PROGMEM = {
iforce2d 0:972874f31c98 64 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 65 U8G_ESC_ADR(0), /* instruction mode */
iforce2d 0:972874f31c98 66 U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
iforce2d 0:972874f31c98 67 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 68 0x021, /* activate chip (PD=0), horizontal increment (V=0), enter extended command set (H=1) */
iforce2d 0:972874f31c98 69 0x006, /* temp. control: b10 = 2 */
iforce2d 0:972874f31c98 70 0x013, /* bias system 1:48 */
iforce2d 0:972874f31c98 71 0x080 | 0x040, /* medium Vop */
iforce2d 0:972874f31c98 72 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
iforce2d 0:972874f31c98 73 0x00c, /* display on, normal operation */
iforce2d 0:972874f31c98 74 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 75 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
iforce2d 0:972874f31c98 76 0x00d, /* display on, invert */
iforce2d 0:972874f31c98 77 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 78 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 79 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
iforce2d 0:972874f31c98 80 0x00c, /* display on, normal */
iforce2d 0:972874f31c98 81 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 82 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 83 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 84 };
iforce2d 0:972874f31c98 85
iforce2d 0:972874f31c98 86 uint8_t u8g_dev_pcf8812_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
iforce2d 0:972874f31c98 87 {
iforce2d 0:972874f31c98 88 switch(msg)
iforce2d 0:972874f31c98 89 {
iforce2d 0:972874f31c98 90 case U8G_DEV_MSG_INIT:
iforce2d 0:972874f31c98 91 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
iforce2d 0:972874f31c98 92 u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcf8812_init_seq);
iforce2d 0:972874f31c98 93 break;
iforce2d 0:972874f31c98 94 case U8G_DEV_MSG_STOP:
iforce2d 0:972874f31c98 95 break;
iforce2d 0:972874f31c98 96 case U8G_DEV_MSG_PAGE_NEXT:
iforce2d 0:972874f31c98 97 {
iforce2d 0:972874f31c98 98 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
iforce2d 0:972874f31c98 99 u8g_SetAddress(u8g, dev, 0); /* command mode */
iforce2d 0:972874f31c98 100 u8g_SetChipSelect(u8g, dev, 1);
iforce2d 0:972874f31c98 101 u8g_WriteByte(u8g, dev, 0x020 ); /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
iforce2d 0:972874f31c98 102 u8g_WriteByte(u8g, dev, 0x080 ); /* set X address */
iforce2d 0:972874f31c98 103 u8g_WriteByte(u8g, dev, 0x040 | pb->p.page); /* set Y address */
iforce2d 0:972874f31c98 104 u8g_SetAddress(u8g, dev, 1); /* data mode */
iforce2d 0:972874f31c98 105 if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
iforce2d 0:972874f31c98 106 return 0;
iforce2d 0:972874f31c98 107 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 108 }
iforce2d 0:972874f31c98 109 break;
iforce2d 0:972874f31c98 110 case U8G_DEV_MSG_CONTRAST:
iforce2d 0:972874f31c98 111 /* the contrast adjustment does not work, needs to be analysed */
iforce2d 0:972874f31c98 112 u8g_SetAddress(u8g, dev, 0); /* instruction mode */
iforce2d 0:972874f31c98 113 u8g_SetChipSelect(u8g, dev, 1);
iforce2d 0:972874f31c98 114 u8g_WriteByte(u8g, dev, 0x021); /* command mode, extended function set */
iforce2d 0:972874f31c98 115 u8g_WriteByte(u8g, dev, 0x080 | ( (*(uint8_t *)arg) >> 1 ) );
iforce2d 0:972874f31c98 116 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 117 return 1;
iforce2d 0:972874f31c98 118 }
iforce2d 0:972874f31c98 119 return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
iforce2d 0:972874f31c98 120 }
iforce2d 0:972874f31c98 121
iforce2d 0:972874f31c98 122 /* u8g_com_arduino_sw_spi_fn does not work, too fast??? */
iforce2d 0:972874f31c98 123 U8G_PB_DEV(u8g_dev_pcf8812_96x65_sw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_pcf8812_fn, U8G_COM_SW_SPI);
iforce2d 0:972874f31c98 124 U8G_PB_DEV(u8g_dev_pcf8812_96x65_hw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_pcf8812_fn, U8G_COM_HW_SPI);
iforce2d 0:972874f31c98 125