iforce2d Chris / Mbed 2 deprecated ubxDistanceMeter

Displays distance to start location on OLED screen.

Dependencies:   mbed

u8g_dev_pcd8544_84x48.c@0:972874f31c98, 2018-03-07 (annotated)

Committer:
iforce2d
Date:
Wed Mar 07 12:49:14 2018 +0000
Revision:
0:972874f31c98
First commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
iforce2d 0:972874f31c98 1 /*
iforce2d 0:972874f31c98 2
iforce2d 0:972874f31c98 3 u8g_dev_pcd8544_84x48.c
iforce2d 0:972874f31c98 4
iforce2d 0:972874f31c98 5 Display: Nokia 84x48
iforce2d 0:972874f31c98 6
iforce2d 0:972874f31c98 7 Status: Tested with PCF8812 Display
iforce2d 0:972874f31c98 8
iforce2d 0:972874f31c98 9
iforce2d 0:972874f31c98 10 Universal 8bit Graphics Library
iforce2d 0:972874f31c98 11
iforce2d 0:972874f31c98 12 Copyright (c) 2011, olikraus@gmail.com
iforce2d 0:972874f31c98 13 All rights reserved.
iforce2d 0:972874f31c98 14
iforce2d 0:972874f31c98 15 Redistribution and use in source and binary forms, with or without modification,
iforce2d 0:972874f31c98 16 are permitted provided that the following conditions are met:
iforce2d 0:972874f31c98 17
iforce2d 0:972874f31c98 18 * Redistributions of source code must retain the above copyright notice, this list
iforce2d 0:972874f31c98 19 of conditions and the following disclaimer.
iforce2d 0:972874f31c98 20
iforce2d 0:972874f31c98 21 * Redistributions in binary form must reproduce the above copyright notice, this
iforce2d 0:972874f31c98 22 list of conditions and the following disclaimer in the documentation and/or other
iforce2d 0:972874f31c98 23 materials provided with the distribution.
iforce2d 0:972874f31c98 24
iforce2d 0:972874f31c98 25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
iforce2d 0:972874f31c98 26 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
iforce2d 0:972874f31c98 27 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
iforce2d 0:972874f31c98 28 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
iforce2d 0:972874f31c98 29 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
iforce2d 0:972874f31c98 30 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
iforce2d 0:972874f31c98 31 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
iforce2d 0:972874f31c98 32 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
iforce2d 0:972874f31c98 33 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
iforce2d 0:972874f31c98 34 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
iforce2d 0:972874f31c98 35 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
iforce2d 0:972874f31c98 36 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
iforce2d 0:972874f31c98 37 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
iforce2d 0:972874f31c98 38
iforce2d 0:972874f31c98 39
iforce2d 0:972874f31c98 40 */
iforce2d 0:972874f31c98 41
iforce2d 0:972874f31c98 42 #include "u8g.h"
iforce2d 0:972874f31c98 43
iforce2d 0:972874f31c98 44 #define WIDTH 84
iforce2d 0:972874f31c98 45 #define HEIGHT 48
iforce2d 0:972874f31c98 46 #define PAGE_HEIGHT 8
iforce2d 0:972874f31c98 47
iforce2d 0:972874f31c98 48
iforce2d 0:972874f31c98 49 static const uint8_t u8g_dev_pcd8544_init_seq[] PROGMEM = {
iforce2d 0:972874f31c98 50 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 51 U8G_ESC_ADR(0), /* instruction mode */
iforce2d 0:972874f31c98 52 U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
iforce2d 0:972874f31c98 53 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 54 0x021, /* activate chip (PD=0), horizontal increment (V=0), enter extended command set (H=1) */
iforce2d 0:972874f31c98 55 0x006, /* temp. control: b10 = 2 */
iforce2d 0:972874f31c98 56 0x013, /* bias system 1:48 */
iforce2d 0:972874f31c98 57 0x0c0, /* medium Vop */
iforce2d 0:972874f31c98 58 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
iforce2d 0:972874f31c98 59 0x00c, /* display on, normal operation */
iforce2d 0:972874f31c98 60 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 61 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
iforce2d 0:972874f31c98 62 0x00d, /* display on, invert */
iforce2d 0:972874f31c98 63 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 64 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 65 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
iforce2d 0:972874f31c98 66 0x00c, /* display on, normal */
iforce2d 0:972874f31c98 67 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 68 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 69 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 70 };
iforce2d 0:972874f31c98 71
iforce2d 0:972874f31c98 72 uint8_t u8g_dev_pcd8544_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
iforce2d 0:972874f31c98 73 {
iforce2d 0:972874f31c98 74 switch(msg)
iforce2d 0:972874f31c98 75 {
iforce2d 0:972874f31c98 76 case U8G_DEV_MSG_INIT:
iforce2d 0:972874f31c98 77 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
iforce2d 0:972874f31c98 78 u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcd8544_init_seq);
iforce2d 0:972874f31c98 79 break;
iforce2d 0:972874f31c98 80 case U8G_DEV_MSG_STOP:
iforce2d 0:972874f31c98 81 break;
iforce2d 0:972874f31c98 82 case U8G_DEV_MSG_PAGE_NEXT:
iforce2d 0:972874f31c98 83 {
iforce2d 0:972874f31c98 84 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
iforce2d 0:972874f31c98 85 u8g_SetAddress(u8g, dev, 0); /* command mode */
iforce2d 0:972874f31c98 86 u8g_SetChipSelect(u8g, dev, 1);
iforce2d 0:972874f31c98 87 u8g_WriteByte(u8g, dev, 0x020 ); /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
iforce2d 0:972874f31c98 88 u8g_WriteByte(u8g, dev, 0x080 ); /* set X address */
iforce2d 0:972874f31c98 89 u8g_WriteByte(u8g, dev, 0x040 | pb->p.page); /* set Y address */
iforce2d 0:972874f31c98 90 u8g_SetAddress(u8g, dev, 1); /* data mode */
iforce2d 0:972874f31c98 91 if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
iforce2d 0:972874f31c98 92 return 0;
iforce2d 0:972874f31c98 93 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 94 }
iforce2d 0:972874f31c98 95 break;
iforce2d 0:972874f31c98 96 case U8G_DEV_MSG_CONTRAST:
iforce2d 0:972874f31c98 97 /* the contrast adjustment does not work, needs to be analysed */
iforce2d 0:972874f31c98 98 u8g_SetAddress(u8g, dev, 0); /* instruction mode */
iforce2d 0:972874f31c98 99 u8g_SetChipSelect(u8g, dev, 1);
iforce2d 0:972874f31c98 100 u8g_WriteByte(u8g, dev, 0x021); /* command mode, extended function set */
iforce2d 0:972874f31c98 101 u8g_WriteByte(u8g, dev, 0x080 | ( (*(uint8_t *)arg) >> 1 ) );
iforce2d 0:972874f31c98 102 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 103 return 1;
iforce2d 0:972874f31c98 104 }
iforce2d 0:972874f31c98 105 return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
iforce2d 0:972874f31c98 106 }
iforce2d 0:972874f31c98 107
iforce2d 0:972874f31c98 108
iforce2d 0:972874f31c98 109 U8G_PB_DEV(u8g_dev_pcd8544_84x48_sw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_pcd8544_fn, U8G_COM_SW_SPI);
iforce2d 0:972874f31c98 110 U8G_PB_DEV(u8g_dev_pcd8544_84x48_hw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_pcd8544_fn, U8G_COM_HW_SPI);
iforce2d 0:972874f31c98 111
iforce2d 0:972874f31c98 112