iforce2d Chris / Mbed 2 deprecated ubxDistanceMeter

Displays distance to start location on OLED screen.

Dependencies:   mbed

u8g_dev_lc7981_240x128.c@0:972874f31c98, 2018-03-07 (annotated)

Committer:
iforce2d
Date:
Wed Mar 07 12:49:14 2018 +0000
Revision:
0:972874f31c98
First commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
iforce2d 0:972874f31c98 1 /*
iforce2d 0:972874f31c98 2
iforce2d 0:972874f31c98 3 u8g_dev_lc7981_240x128.c
iforce2d 0:972874f31c98 4
iforce2d 0:972874f31c98 5 Hitachi Display SP14N002
iforce2d 0:972874f31c98 6
iforce2d 0:972874f31c98 7 Universal 8bit Graphics Library
iforce2d 0:972874f31c98 8
iforce2d 0:972874f31c98 9 Copyright (c) 2012, olikraus@gmail.com
iforce2d 0:972874f31c98 10 All rights reserved.
iforce2d 0:972874f31c98 11
iforce2d 0:972874f31c98 12 Redistribution and use in source and binary forms, with or without modification,
iforce2d 0:972874f31c98 13 are permitted provided that the following conditions are met:
iforce2d 0:972874f31c98 14
iforce2d 0:972874f31c98 15 * Redistributions of source code must retain the above copyright notice, this list
iforce2d 0:972874f31c98 16 of conditions and the following disclaimer.
iforce2d 0:972874f31c98 17
iforce2d 0:972874f31c98 18 * Redistributions in binary form must reproduce the above copyright notice, this
iforce2d 0:972874f31c98 19 list of conditions and the following disclaimer in the documentation and/or other
iforce2d 0:972874f31c98 20 materials provided with the distribution.
iforce2d 0:972874f31c98 21
iforce2d 0:972874f31c98 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
iforce2d 0:972874f31c98 23 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
iforce2d 0:972874f31c98 24 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
iforce2d 0:972874f31c98 25 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
iforce2d 0:972874f31c98 26 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
iforce2d 0:972874f31c98 27 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
iforce2d 0:972874f31c98 28 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
iforce2d 0:972874f31c98 29 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
iforce2d 0:972874f31c98 30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
iforce2d 0:972874f31c98 31 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
iforce2d 0:972874f31c98 32 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
iforce2d 0:972874f31c98 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
iforce2d 0:972874f31c98 34 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
iforce2d 0:972874f31c98 35
iforce2d 0:972874f31c98 36
iforce2d 0:972874f31c98 37 */
iforce2d 0:972874f31c98 38
iforce2d 0:972874f31c98 39 #include "u8g.h"
iforce2d 0:972874f31c98 40
iforce2d 0:972874f31c98 41 #define WIDTH 240
iforce2d 0:972874f31c98 42 #define HEIGHT 128
iforce2d 0:972874f31c98 43 #define PAGE_HEIGHT 8
iforce2d 0:972874f31c98 44
iforce2d 0:972874f31c98 45
iforce2d 0:972874f31c98 46 /*
iforce2d 0:972874f31c98 47 http://www.mark-products.com/graphics.htm#240x128%20Pixel%20Format
iforce2d 0:972874f31c98 48 */
iforce2d 0:972874f31c98 49
iforce2d 0:972874f31c98 50 static const uint8_t u8g_dev_lc7981_240x128_init_seq[] PROGMEM = {
iforce2d 0:972874f31c98 51 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 52 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 53 U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
iforce2d 0:972874f31c98 54 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 55 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 56
iforce2d 0:972874f31c98 57
iforce2d 0:972874f31c98 58 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 59 0x000, /* mode register */
iforce2d 0:972874f31c98 60 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 61 0x032, /* display on (bit 5), master mode on (bit 4), graphics mode on (bit 1)*/
iforce2d 0:972874f31c98 62
iforce2d 0:972874f31c98 63 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 64 0x001, /* character/bits per pixel pitch */
iforce2d 0:972874f31c98 65 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 66 0x007, /* 8 bits per pixel */
iforce2d 0:972874f31c98 67
iforce2d 0:972874f31c98 68 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 69 0x002, /* number of chars/byte width of the screen */
iforce2d 0:972874f31c98 70 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 71 WIDTH/8-1, /* 8 bits per pixel */
iforce2d 0:972874f31c98 72
iforce2d 0:972874f31c98 73 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 74 0x003, /* time division */
iforce2d 0:972874f31c98 75 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 76 0x07f, /* */
iforce2d 0:972874f31c98 77
iforce2d 0:972874f31c98 78 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 79 0x008, /* display start low */
iforce2d 0:972874f31c98 80 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 81 0x000, /* */
iforce2d 0:972874f31c98 82
iforce2d 0:972874f31c98 83 U8G_ESC_ADR(1), /* instruction mode */
iforce2d 0:972874f31c98 84 0x009, /* display start high */
iforce2d 0:972874f31c98 85 U8G_ESC_ADR(0), /* data mode */
iforce2d 0:972874f31c98 86 0x000, /* */
iforce2d 0:972874f31c98 87
iforce2d 0:972874f31c98 88 U8G_ESC_DLY(10), /* delay 10 ms */
iforce2d 0:972874f31c98 89
iforce2d 0:972874f31c98 90 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 91 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 92 };
iforce2d 0:972874f31c98 93
iforce2d 0:972874f31c98 94 uint8_t u8g_dev_lc7981_240x128_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
iforce2d 0:972874f31c98 95 {
iforce2d 0:972874f31c98 96 switch(msg)
iforce2d 0:972874f31c98 97 {
iforce2d 0:972874f31c98 98 case U8G_DEV_MSG_INIT:
iforce2d 0:972874f31c98 99 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE);
iforce2d 0:972874f31c98 100 u8g_WriteEscSeqP(u8g, dev, u8g_dev_lc7981_240x128_init_seq);
iforce2d 0:972874f31c98 101 break;
iforce2d 0:972874f31c98 102 case U8G_DEV_MSG_STOP:
iforce2d 0:972874f31c98 103 break;
iforce2d 0:972874f31c98 104 case U8G_DEV_MSG_PAGE_NEXT:
iforce2d 0:972874f31c98 105 {
iforce2d 0:972874f31c98 106 uint8_t y, i;
iforce2d 0:972874f31c98 107 uint16_t disp_ram_adr;
iforce2d 0:972874f31c98 108 uint8_t *ptr;
iforce2d 0:972874f31c98 109 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
iforce2d 0:972874f31c98 110
iforce2d 0:972874f31c98 111 u8g_SetAddress(u8g, dev, 1); /* cmd mode */
iforce2d 0:972874f31c98 112 u8g_SetChipSelect(u8g, dev, 1);
iforce2d 0:972874f31c98 113 y = pb->p.page_y0;
iforce2d 0:972874f31c98 114 ptr = pb->buf;
iforce2d 0:972874f31c98 115 disp_ram_adr = WIDTH/8;
iforce2d 0:972874f31c98 116 disp_ram_adr *= y;
iforce2d 0:972874f31c98 117 for( i = 0; i < 8; i ++ )
iforce2d 0:972874f31c98 118 {
iforce2d 0:972874f31c98 119 u8g_SetAddress(u8g, dev, 1); /* cmd mode */
iforce2d 0:972874f31c98 120 u8g_WriteByte(u8g, dev, 0x00a ); /* display ram (cursor) address low byte */
iforce2d 0:972874f31c98 121 u8g_SetAddress(u8g, dev, 0); /* data mode */
iforce2d 0:972874f31c98 122 u8g_WriteByte(u8g, dev, disp_ram_adr & 0x0ff );
iforce2d 0:972874f31c98 123
iforce2d 0:972874f31c98 124 u8g_SetAddress(u8g, dev, 1); /* cmd mode */
iforce2d 0:972874f31c98 125 u8g_WriteByte(u8g, dev, 0x00b ); /* display ram (cursor) address hight byte */
iforce2d 0:972874f31c98 126 u8g_SetAddress(u8g, dev, 0); /* data mode */
iforce2d 0:972874f31c98 127 u8g_WriteByte(u8g, dev, disp_ram_adr >> 8 );
iforce2d 0:972874f31c98 128
iforce2d 0:972874f31c98 129 u8g_SetAddress(u8g, dev, 1); /* cmd mode */
iforce2d 0:972874f31c98 130 u8g_WriteByte(u8g, dev, 0x00c ); /* write data */
iforce2d 0:972874f31c98 131 u8g_SetAddress(u8g, dev, 0); /* data mode */
iforce2d 0:972874f31c98 132 u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
iforce2d 0:972874f31c98 133 ptr += WIDTH/8;
iforce2d 0:972874f31c98 134 disp_ram_adr += WIDTH/8;
iforce2d 0:972874f31c98 135 }
iforce2d 0:972874f31c98 136 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 137 }
iforce2d 0:972874f31c98 138 break;
iforce2d 0:972874f31c98 139 }
iforce2d 0:972874f31c98 140 return u8g_dev_pb8h1f_base_fn(u8g, dev, msg, arg);
iforce2d 0:972874f31c98 141 }
iforce2d 0:972874f31c98 142
iforce2d 0:972874f31c98 143 U8G_PB_DEV(u8g_dev_lc7981_240x128_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_lc7981_240x128_fn, U8G_COM_FAST_PARALLEL);
iforce2d 0:972874f31c98 144
iforce2d 0:972874f31c98 145
iforce2d 0:972874f31c98 146