iforce2d Chris / Mbed 2 deprecated ubxDistanceMeter

Displays distance to start location on OLED screen.

Dependencies:   mbed

u8g_dev_ili9325d_320x240.c@0:972874f31c98, 2018-03-07 (annotated)

Committer:
iforce2d
Date:
Wed Mar 07 12:49:14 2018 +0000
Revision:
0:972874f31c98
First commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
iforce2d 0:972874f31c98 1 /*
iforce2d 0:972874f31c98 2
iforce2d 0:972874f31c98 3 u8g_dev_ili9325d_320x240.c
iforce2d 0:972874f31c98 4
iforce2d 0:972874f31c98 5 Universal 8bit Graphics Library
iforce2d 0:972874f31c98 6
iforce2d 0:972874f31c98 7 Copyright (c) 2011, olikraus@gmail.com
iforce2d 0:972874f31c98 8 All rights reserved.
iforce2d 0:972874f31c98 9
iforce2d 0:972874f31c98 10 Redistribution and use in source and binary forms, with or without modification,
iforce2d 0:972874f31c98 11 are permitted provided that the following conditions are met:
iforce2d 0:972874f31c98 12
iforce2d 0:972874f31c98 13 * Redistributions of source code must retain the above copyright notice, this list
iforce2d 0:972874f31c98 14 of conditions and the following disclaimer.
iforce2d 0:972874f31c98 15
iforce2d 0:972874f31c98 16 * Redistributions in binary form must reproduce the above copyright notice, this
iforce2d 0:972874f31c98 17 list of conditions and the following disclaimer in the documentation and/or other
iforce2d 0:972874f31c98 18 materials provided with the distribution.
iforce2d 0:972874f31c98 19
iforce2d 0:972874f31c98 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
iforce2d 0:972874f31c98 21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
iforce2d 0:972874f31c98 22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
iforce2d 0:972874f31c98 23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
iforce2d 0:972874f31c98 24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
iforce2d 0:972874f31c98 25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
iforce2d 0:972874f31c98 26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
iforce2d 0:972874f31c98 27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
iforce2d 0:972874f31c98 28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
iforce2d 0:972874f31c98 29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
iforce2d 0:972874f31c98 30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
iforce2d 0:972874f31c98 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
iforce2d 0:972874f31c98 32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
iforce2d 0:972874f31c98 33
iforce2d 0:972874f31c98 34 Color format
iforce2d 0:972874f31c98 35 Red: 5 Bit
iforce2d 0:972874f31c98 36 Green: 6 Bit
iforce2d 0:972874f31c98 37 Blue: 5 Bit
iforce2d 0:972874f31c98 38
iforce2d 0:972874f31c98 39
iforce2d 0:972874f31c98 40 */
iforce2d 0:972874f31c98 41
iforce2d 0:972874f31c98 42 #include "u8g.h"
iforce2d 0:972874f31c98 43
iforce2d 0:972874f31c98 44 #define WIDTH 240
iforce2d 0:972874f31c98 45
iforce2d 0:972874f31c98 46 #if defined(U8G_16BIT)
iforce2d 0:972874f31c98 47 #define HEIGHT 320
iforce2d 0:972874f31c98 48 #else
iforce2d 0:972874f31c98 49 /* if the user tries to compile the 8Bit version of the lib, then restrict the height to something which fits to 8Bit */
iforce2d 0:972874f31c98 50 #define HEIGHT 240
iforce2d 0:972874f31c98 51 #endif
iforce2d 0:972874f31c98 52 #define PAGE_HEIGHT 4
iforce2d 0:972874f31c98 53
iforce2d 0:972874f31c98 54
iforce2d 0:972874f31c98 55 /*
iforce2d 0:972874f31c98 56 reference board for this device:
iforce2d 0:972874f31c98 57 http://iteadstudio.com/store/index.php?main_page=product_info&cPath=57_58&products_id=55
iforce2d 0:972874f31c98 58 documentation:
iforce2d 0:972874f31c98 59 http://iteadstudio.com/Downloadfile/ITDB02_material.rar
iforce2d 0:972874f31c98 60 datasheet
iforce2d 0:972874f31c98 61 http://www.newhavendisplay.com/app_notes/ILI9325D.pdf
iforce2d 0:972874f31c98 62 other libs
iforce2d 0:972874f31c98 63 http://henningkarlsen.com/electronics/library.php
iforce2d 0:972874f31c98 64 init sequence
iforce2d 0:972874f31c98 65 http://code.google.com/p/itdb02/, ITDB02.cpp, iteadstudio.com
iforce2d 0:972874f31c98 66 */
iforce2d 0:972874f31c98 67
iforce2d 0:972874f31c98 68 static const uint8_t u8g_dev_ili9325d_320x240_init_seq[] PROGMEM = {
iforce2d 0:972874f31c98 69 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 70 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 71 U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
iforce2d 0:972874f31c98 72 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 73 U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
iforce2d 0:972874f31c98 74 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 75 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 76 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 77
iforce2d 0:972874f31c98 78
iforce2d 0:972874f31c98 79 //U8G_ESC_ADR(0), 0x000, 0x0E5, /* only used for none D version: set SRAM internal timing */
iforce2d 0:972874f31c98 80 //U8G_ESC_ADR(1), 0x078, 0x0f0,
iforce2d 0:972874f31c98 81 U8G_ESC_ADR(0), 0x000, 0x001, /* Driver Output Control, bits 8 & 10 */
iforce2d 0:972874f31c98 82 U8G_ESC_ADR(1), 0x001, 0x000,
iforce2d 0:972874f31c98 83 U8G_ESC_ADR(0), 0x000, 0x002, /* LCD Driving Wave Control, bit 9: Set line inversion */
iforce2d 0:972874f31c98 84 U8G_ESC_ADR(1), 0x002, 0x000, /* ITDB02 none D verion: 0x007, 0x000 */
iforce2d 0:972874f31c98 85 U8G_ESC_ADR(0), 0x000, 0x003, /* Entry Mode, GRAM write direction and BGR=1 */
iforce2d 0:972874f31c98 86 U8G_ESC_ADR(1), 0x010, 0x030,
iforce2d 0:972874f31c98 87 U8G_ESC_ADR(0), 0x000, 0x004, /* Resize register */
iforce2d 0:972874f31c98 88 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 89 U8G_ESC_ADR(0), 0x000, 0x008, /* Display Control 2: set the back porch and front porch */
iforce2d 0:972874f31c98 90 U8G_ESC_ADR(1), 0x002, 0x007,
iforce2d 0:972874f31c98 91
iforce2d 0:972874f31c98 92 U8G_ESC_ADR(0), 0x000, 0x009, /* Display Control 3 */
iforce2d 0:972874f31c98 93 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 94
iforce2d 0:972874f31c98 95 U8G_ESC_ADR(0), 0x000, 0x00a, /* Display Control 4: FMARK */
iforce2d 0:972874f31c98 96 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 97 U8G_ESC_ADR(0), 0x000, 0x00c, /* RGB Display Interface Control 1 */
iforce2d 0:972874f31c98 98 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 99 U8G_ESC_ADR(0), 0x000, 0x00d, /* Frame Maker Position */
iforce2d 0:972874f31c98 100 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 101 U8G_ESC_ADR(0), 0x000, 0x00f, /* RGB Display Interface Control 2 */
iforce2d 0:972874f31c98 102 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 103 U8G_ESC_ADR(0), 0x000, 0x010, /* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB */
iforce2d 0:972874f31c98 104 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 105 U8G_ESC_ADR(0), 0x000, 0x011, /* Power Control 2: DC1[2:0], DC0[2:0], VC[2:0] */
iforce2d 0:972874f31c98 106 U8G_ESC_ADR(1), 0x000, 0x007,
iforce2d 0:972874f31c98 107 U8G_ESC_ADR(0), 0x000, 0x012, /* Power Control 3: VREG1OUT voltage */
iforce2d 0:972874f31c98 108 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 109 U8G_ESC_ADR(0), 0x000, 0x013, /* Power Control 4: VDV[4:0] for VCOM amplitude */
iforce2d 0:972874f31c98 110 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 111 U8G_ESC_ADR(0), 0x000, 0x007, /* Display Control 1: Operate, but do not display */
iforce2d 0:972874f31c98 112 U8G_ESC_ADR(1), 0x000, 0x001,
iforce2d 0:972874f31c98 113
iforce2d 0:972874f31c98 114 U8G_ESC_DLY(100), /* delay 100 ms */ /* ITDB02 none D verion: 50ms */
iforce2d 0:972874f31c98 115 U8G_ESC_DLY(100), /* delay 100 ms */
iforce2d 0:972874f31c98 116
iforce2d 0:972874f31c98 117 U8G_ESC_ADR(0), 0x000, 0x010, /* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB */
iforce2d 0:972874f31c98 118 U8G_ESC_ADR(1), 0x016, 0x090, /* ITDB02 none D verion: 0x010, 0x090 */
iforce2d 0:972874f31c98 119 U8G_ESC_ADR(0), 0x000, 0x011, /* Power Control 2: SAP, BT[3:0], AP, DSTB, SLP, STB */
iforce2d 0:972874f31c98 120 U8G_ESC_ADR(1), 0x002, 0x027,
iforce2d 0:972874f31c98 121
iforce2d 0:972874f31c98 122 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 123
iforce2d 0:972874f31c98 124 U8G_ESC_ADR(0), 0x000, 0x012, /* Power Control 3: VCI: External, VCI*1.80 */
iforce2d 0:972874f31c98 125 U8G_ESC_ADR(1), 0x000, 0x00d, /* ITDB02 none D verion: 0x000, 0x01f */
iforce2d 0:972874f31c98 126
iforce2d 0:972874f31c98 127 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 128
iforce2d 0:972874f31c98 129 U8G_ESC_ADR(0), 0x000, 0x013, /* Power Control 4: VDV[4:0] for VCOM amplitude */
iforce2d 0:972874f31c98 130 U8G_ESC_ADR(1), 0x012, 0x000, /* ITDB02 none D verion: 0x015, 0x000 */
iforce2d 0:972874f31c98 131 U8G_ESC_ADR(0), 0x000, 0x029, /* Power Control 7 */
iforce2d 0:972874f31c98 132 U8G_ESC_ADR(1), 0x000, 0x00a, /* ITDB02 none D verion: 0x000, 0x027 */
iforce2d 0:972874f31c98 133 U8G_ESC_ADR(0), 0x000, 0x02b, /* Frame Rate: 83 */
iforce2d 0:972874f31c98 134 U8G_ESC_ADR(1), 0x000, 0x00d,
iforce2d 0:972874f31c98 135
iforce2d 0:972874f31c98 136 U8G_ESC_DLY(50), /* delay 50 ms */
iforce2d 0:972874f31c98 137
iforce2d 0:972874f31c98 138 U8G_ESC_ADR(0), 0x000, 0x020, /* Horizontal GRAM Address Set */
iforce2d 0:972874f31c98 139 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 140 U8G_ESC_ADR(0), 0x000, 0x021, /* Vertical GRAM Address Set */
iforce2d 0:972874f31c98 141 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 142
iforce2d 0:972874f31c98 143 /* gamma control */
iforce2d 0:972874f31c98 144 U8G_ESC_ADR(0), 0x000, 0x030,
iforce2d 0:972874f31c98 145 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 146 U8G_ESC_ADR(0), 0x000, 0x031,
iforce2d 0:972874f31c98 147 U8G_ESC_ADR(1), 0x004, 0x004,
iforce2d 0:972874f31c98 148 U8G_ESC_ADR(0), 0x000, 0x032,
iforce2d 0:972874f31c98 149 U8G_ESC_ADR(1), 0x000, 0x003,
iforce2d 0:972874f31c98 150 U8G_ESC_ADR(0), 0x000, 0x035,
iforce2d 0:972874f31c98 151 U8G_ESC_ADR(1), 0x004, 0x005,
iforce2d 0:972874f31c98 152 U8G_ESC_ADR(0), 0x000, 0x036,
iforce2d 0:972874f31c98 153 U8G_ESC_ADR(1), 0x008, 0x008,
iforce2d 0:972874f31c98 154 U8G_ESC_ADR(0), 0x000, 0x037,
iforce2d 0:972874f31c98 155 U8G_ESC_ADR(1), 0x004, 0x007,
iforce2d 0:972874f31c98 156 U8G_ESC_ADR(0), 0x000, 0x038,
iforce2d 0:972874f31c98 157 U8G_ESC_ADR(1), 0x003, 0x003,
iforce2d 0:972874f31c98 158 U8G_ESC_ADR(0), 0x000, 0x039,
iforce2d 0:972874f31c98 159 U8G_ESC_ADR(1), 0x007, 0x007,
iforce2d 0:972874f31c98 160 U8G_ESC_ADR(0), 0x000, 0x03c,
iforce2d 0:972874f31c98 161 U8G_ESC_ADR(1), 0x005, 0x004,
iforce2d 0:972874f31c98 162 U8G_ESC_ADR(0), 0x000, 0x03d,
iforce2d 0:972874f31c98 163 U8G_ESC_ADR(1), 0x008, 0x008,
iforce2d 0:972874f31c98 164
iforce2d 0:972874f31c98 165 U8G_ESC_ADR(0), 0x000, 0x050, /* Horizontal GRAM Start Address */
iforce2d 0:972874f31c98 166 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 167 U8G_ESC_ADR(0), 0x000, 0x051, /* Horizontal GRAM End Address: 239 */
iforce2d 0:972874f31c98 168 U8G_ESC_ADR(1), 0x000, 0x0EF,
iforce2d 0:972874f31c98 169 U8G_ESC_ADR(0), 0x000, 0x052, /* Vertical GRAM Start Address */
iforce2d 0:972874f31c98 170 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 171 U8G_ESC_ADR(0), 0x000, 0x053, /* Vertical GRAM End Address: 319 */
iforce2d 0:972874f31c98 172 U8G_ESC_ADR(1), 0x001, 0x03F,
iforce2d 0:972874f31c98 173
iforce2d 0:972874f31c98 174 U8G_ESC_ADR(0), 0x000, 0x060, /* Driver Output Control 2 */
iforce2d 0:972874f31c98 175 U8G_ESC_ADR(1), 0x0a7, 0x000,
iforce2d 0:972874f31c98 176 U8G_ESC_ADR(0), 0x000, 0x061, /* Base Image Display Control: NDL,VLE, REV */
iforce2d 0:972874f31c98 177 U8G_ESC_ADR(1), 0x000, 0x001,
iforce2d 0:972874f31c98 178 U8G_ESC_ADR(0), 0x000, 0x06a, /* Vertical Scroll Control */
iforce2d 0:972874f31c98 179 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 180
iforce2d 0:972874f31c98 181 U8G_ESC_ADR(0), 0x000, 0x080, /* Partial Image 1 Display Position */
iforce2d 0:972874f31c98 182 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 183 U8G_ESC_ADR(0), 0x000, 0x081, /* Partial Image 1 RAM Start Address */
iforce2d 0:972874f31c98 184 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 185 U8G_ESC_ADR(0), 0x000, 0x082, /* Partial Image 1 RAM End Address */
iforce2d 0:972874f31c98 186 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 187 U8G_ESC_ADR(0), 0x000, 0x083, /* Partial Image 2 Display Position */
iforce2d 0:972874f31c98 188 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 189 U8G_ESC_ADR(0), 0x000, 0x084, /* Partial Image 2 RAM Start Address */
iforce2d 0:972874f31c98 190 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 191 U8G_ESC_ADR(0), 0x000, 0x085, /* Partial Image 2 RAM End Address */
iforce2d 0:972874f31c98 192 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 193
iforce2d 0:972874f31c98 194 U8G_ESC_ADR(0), 0x000, 0x090, /* Panel Interface Control 1 */
iforce2d 0:972874f31c98 195 U8G_ESC_ADR(1), 0x000, 0x010,
iforce2d 0:972874f31c98 196 U8G_ESC_ADR(0), 0x000, 0x092, /* Panel Interface Control 2 */
iforce2d 0:972874f31c98 197 U8G_ESC_ADR(1), 0x000, 0x000, /* 0x006, 0x000 */
iforce2d 0:972874f31c98 198
iforce2d 0:972874f31c98 199 U8G_ESC_ADR(0), 0x000, 0x007, /* Display Control 1: Operate, display ON */
iforce2d 0:972874f31c98 200 U8G_ESC_ADR(1), 0x001, 0x033,
iforce2d 0:972874f31c98 201
iforce2d 0:972874f31c98 202 U8G_ESC_DLY(10), /* delay 10 ms */
iforce2d 0:972874f31c98 203
iforce2d 0:972874f31c98 204 /* write test pattern */
iforce2d 0:972874f31c98 205 U8G_ESC_ADR(0), 0x000, 0x020, /* Horizontal GRAM Address Set */
iforce2d 0:972874f31c98 206 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 207 U8G_ESC_ADR(0), 0x000, 0x021, /* Vertical GRAM Address Set */
iforce2d 0:972874f31c98 208 U8G_ESC_ADR(1), 0x000, 0x010,
iforce2d 0:972874f31c98 209 U8G_ESC_ADR(0), 0x000, 0x022, /* Write Data to GRAM */
iforce2d 0:972874f31c98 210 U8G_ESC_ADR(1), 0x0fe, 0x0fe,
iforce2d 0:972874f31c98 211 0x000, 0x000,
iforce2d 0:972874f31c98 212 0x0fe, 0x0fe,
iforce2d 0:972874f31c98 213 0x000, 0x000,
iforce2d 0:972874f31c98 214 0x0fe, 0x0fe,
iforce2d 0:972874f31c98 215 0x000, 0x000,
iforce2d 0:972874f31c98 216 0x0fe, 0x0fe,
iforce2d 0:972874f31c98 217 0x000, 0x000,
iforce2d 0:972874f31c98 218 0x0fe, 0x0fe,
iforce2d 0:972874f31c98 219 0x000, 0x000,
iforce2d 0:972874f31c98 220 0x0fe, 0x0fe,
iforce2d 0:972874f31c98 221 0x000, 0x000,
iforce2d 0:972874f31c98 222 0x0fe, 0x0fe,
iforce2d 0:972874f31c98 223 0x000, 0x000,
iforce2d 0:972874f31c98 224 0x0fe, 0x0fe,
iforce2d 0:972874f31c98 225 0x000, 0x000,
iforce2d 0:972874f31c98 226 0x0fe, 0x0fe,
iforce2d 0:972874f31c98 227
iforce2d 0:972874f31c98 228 U8G_ESC_CS(0), /* disable chip */
iforce2d 0:972874f31c98 229 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 230 };
iforce2d 0:972874f31c98 231
iforce2d 0:972874f31c98 232
iforce2d 0:972874f31c98 233 static const uint8_t u8g_dev_ili9325d_320x240_page_seq[] PROGMEM = {
iforce2d 0:972874f31c98 234 U8G_ESC_CS(1), /* enable chip */
iforce2d 0:972874f31c98 235 U8G_ESC_ADR(0), 0x000, 0x020, /* Horizontal GRAM Address Set */
iforce2d 0:972874f31c98 236 U8G_ESC_ADR(1), 0x000, 0x000,
iforce2d 0:972874f31c98 237 U8G_ESC_ADR(0), 0x000, 0x021, /* Vertical GRAM Address Set */
iforce2d 0:972874f31c98 238 U8G_ESC_ADR(1),
iforce2d 0:972874f31c98 239 U8G_ESC_END /* end of sequence */
iforce2d 0:972874f31c98 240 };
iforce2d 0:972874f31c98 241
iforce2d 0:972874f31c98 242 /* convert the internal RGB 332 to 65K high byte */
iforce2d 0:972874f31c98 243 static uint8_t u8g_dev_ili9325d_get_65K_high_byte(uint8_t color)
iforce2d 0:972874f31c98 244 {
iforce2d 0:972874f31c98 245 uint8_t h;
iforce2d 0:972874f31c98 246 h = color;
iforce2d 0:972874f31c98 247 h &= 0x0e0;
iforce2d 0:972874f31c98 248 h |= h>>3;
iforce2d 0:972874f31c98 249 h &= 0x0f8;
iforce2d 0:972874f31c98 250 color>>=2;
iforce2d 0:972874f31c98 251 color &= 7;
iforce2d 0:972874f31c98 252 h |= color;
iforce2d 0:972874f31c98 253 return h;
iforce2d 0:972874f31c98 254 }
iforce2d 0:972874f31c98 255
iforce2d 0:972874f31c98 256 /* convert the internal RGB 332 to 65K high byte */
iforce2d 0:972874f31c98 257 static uint8_t u8g_dev_ili9325d_get_65K_low_byte(uint8_t color)
iforce2d 0:972874f31c98 258 {
iforce2d 0:972874f31c98 259 uint8_t l;
iforce2d 0:972874f31c98 260 l = color;
iforce2d 0:972874f31c98 261 l <<= 3;
iforce2d 0:972874f31c98 262 color &= 3;
iforce2d 0:972874f31c98 263 color <<= 1;
iforce2d 0:972874f31c98 264 l |= color;
iforce2d 0:972874f31c98 265 return l;
iforce2d 0:972874f31c98 266 }
iforce2d 0:972874f31c98 267
iforce2d 0:972874f31c98 268
iforce2d 0:972874f31c98 269 uint8_t u8g_dev_ili9325d_320x240_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
iforce2d 0:972874f31c98 270 {
iforce2d 0:972874f31c98 271
iforce2d 0:972874f31c98 272 switch(msg)
iforce2d 0:972874f31c98 273 {
iforce2d 0:972874f31c98 274 case U8G_DEV_MSG_INIT:
iforce2d 0:972874f31c98 275 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_50NS);
iforce2d 0:972874f31c98 276 //for(;;)
iforce2d 0:972874f31c98 277 u8g_WriteEscSeqP(u8g, dev, u8g_dev_ili9325d_320x240_init_seq);
iforce2d 0:972874f31c98 278
iforce2d 0:972874f31c98 279 break;
iforce2d 0:972874f31c98 280 case U8G_DEV_MSG_STOP:
iforce2d 0:972874f31c98 281 break;
iforce2d 0:972874f31c98 282 case U8G_DEV_MSG_PAGE_NEXT:
iforce2d 0:972874f31c98 283 {
iforce2d 0:972874f31c98 284 uint8_t i;
iforce2d 0:972874f31c98 285 uint16_t y, j;
iforce2d 0:972874f31c98 286 uint8_t *ptr;
iforce2d 0:972874f31c98 287 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
iforce2d 0:972874f31c98 288
iforce2d 0:972874f31c98 289 y = pb->p.page_y0;
iforce2d 0:972874f31c98 290 ptr = pb->buf;
iforce2d 0:972874f31c98 291 for( i = 0; i < pb->p.page_height; i ++ )
iforce2d 0:972874f31c98 292 {
iforce2d 0:972874f31c98 293 u8g_WriteEscSeqP(u8g, dev, u8g_dev_ili9325d_320x240_page_seq);
iforce2d 0:972874f31c98 294 u8g_WriteByte(u8g, dev, y >> 8 ); /* display ram (cursor) address high byte */
iforce2d 0:972874f31c98 295 u8g_WriteByte(u8g, dev, y & 255 ); /* display ram (cursor) address low byte */
iforce2d 0:972874f31c98 296
iforce2d 0:972874f31c98 297 u8g_SetAddress(u8g, dev, 0); /* cmd mode */
iforce2d 0:972874f31c98 298 u8g_WriteByte(u8g, dev, 0 );
iforce2d 0:972874f31c98 299 u8g_WriteByte(u8g, dev, 0x022 ); /* start gram data */
iforce2d 0:972874f31c98 300
iforce2d 0:972874f31c98 301 u8g_SetAddress(u8g, dev, 1); /* data mode */
iforce2d 0:972874f31c98 302
iforce2d 0:972874f31c98 303 for( j = 0; j < pb->width; j++ )
iforce2d 0:972874f31c98 304 {
iforce2d 0:972874f31c98 305 u8g_WriteByte(u8g, dev, u8g_dev_ili9325d_get_65K_high_byte(*ptr) );
iforce2d 0:972874f31c98 306 u8g_WriteByte(u8g, dev, u8g_dev_ili9325d_get_65K_low_byte(*ptr) );
iforce2d 0:972874f31c98 307
iforce2d 0:972874f31c98 308 ptr++;
iforce2d 0:972874f31c98 309 }
iforce2d 0:972874f31c98 310 y++;
iforce2d 0:972874f31c98 311 }
iforce2d 0:972874f31c98 312 u8g_SetChipSelect(u8g, dev, 0);
iforce2d 0:972874f31c98 313 }
iforce2d 0:972874f31c98 314 break;
iforce2d 0:972874f31c98 315 }
iforce2d 0:972874f31c98 316 return u8g_dev_pb8h8_base_fn(u8g, dev, msg, arg);
iforce2d 0:972874f31c98 317 }
iforce2d 0:972874f31c98 318
iforce2d 0:972874f31c98 319 uint8_t u8g_ili9325d_320x240_8h8_buf[WIDTH*PAGE_HEIGHT] U8G_NOCOMMON ;
iforce2d 0:972874f31c98 320 u8g_pb_t u8g_ili9325d_320x240_8h8_pb U8G_NOCOMMON = { {PAGE_HEIGHT, HEIGHT, 0, 0, 0}, WIDTH, u8g_ili9325d_320x240_8h8_buf};
iforce2d 0:972874f31c98 321 u8g_dev_t u8g_dev_ili9325d_320x240_8bit U8G_NOCOMMON = { u8g_dev_ili9325d_320x240_fn, &u8g_ili9325d_320x240_8h8_pb, u8g_com_arduino_port_d_wr_fn };
iforce2d 0:972874f31c98 322 //u8g_dev_t u8g_dev_ili9325d_320x240_8bit = { u8g_dev_ili9325d_320x240_fn, &u8g_ili9325d_320x240_8h8_pb, u8g_com_arduino_parallel_fn };
iforce2d 0:972874f31c98 323
iforce2d 0:972874f31c98 324 //U8G_PB_DEV(u8g_dev_ili9325d_320x240_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ili9325d_320x240_fn, U8G_COM_PARALLEL);
iforce2d 0:972874f31c98 325
iforce2d 0:972874f31c98 326
iforce2d 0:972874f31c98 327