Displays distance to start location on OLED screen.

Dependencies:   mbed

Committer:
iforce2d
Date:
Wed Mar 07 12:49:14 2018 +0000
Revision:
0:972874f31c98
First commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
iforce2d 0:972874f31c98 1 /*
iforce2d 0:972874f31c98 2
iforce2d 0:972874f31c98 3 u8g_com_arduino_ssd_i2c.c
iforce2d 0:972874f31c98 4
iforce2d 0:972874f31c98 5 com interface for arduino (AND atmega) and the SSDxxxx chip (SOLOMON) variant
iforce2d 0:972874f31c98 6 I2C protocol
iforce2d 0:972874f31c98 7
iforce2d 0:972874f31c98 8 ToDo: Rename this to u8g_com_avr_ssd_i2c.c
iforce2d 0:972874f31c98 9
iforce2d 0:972874f31c98 10 Universal 8bit Graphics Library
iforce2d 0:972874f31c98 11
iforce2d 0:972874f31c98 12 Copyright (c) 2012, olikraus@gmail.com
iforce2d 0:972874f31c98 13 All rights reserved.
iforce2d 0:972874f31c98 14
iforce2d 0:972874f31c98 15 Redistribution and use in source and binary forms, with or without modification,
iforce2d 0:972874f31c98 16 are permitted provided that the following conditions are met:
iforce2d 0:972874f31c98 17
iforce2d 0:972874f31c98 18 * Redistributions of source code must retain the above copyright notice, this list
iforce2d 0:972874f31c98 19 of conditions and the following disclaimer.
iforce2d 0:972874f31c98 20
iforce2d 0:972874f31c98 21 * Redistributions in binary form must reproduce the above copyright notice, this
iforce2d 0:972874f31c98 22 list of conditions and the following disclaimer in the documentation and/or other
iforce2d 0:972874f31c98 23 materials provided with the distribution.
iforce2d 0:972874f31c98 24
iforce2d 0:972874f31c98 25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
iforce2d 0:972874f31c98 26 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
iforce2d 0:972874f31c98 27 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
iforce2d 0:972874f31c98 28 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
iforce2d 0:972874f31c98 29 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
iforce2d 0:972874f31c98 30 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
iforce2d 0:972874f31c98 31 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
iforce2d 0:972874f31c98 32 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
iforce2d 0:972874f31c98 33 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
iforce2d 0:972874f31c98 34 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
iforce2d 0:972874f31c98 35 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
iforce2d 0:972874f31c98 36 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
iforce2d 0:972874f31c98 37 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
iforce2d 0:972874f31c98 38
iforce2d 0:972874f31c98 39 Special pin usage:
iforce2d 0:972874f31c98 40 U8G_PI_I2C_OPTION additional options
iforce2d 0:972874f31c98 41 U8G_PI_A0_STATE used to store the last value of the command/data register selection
iforce2d 0:972874f31c98 42 U8G_PI_SET_A0 1: Signal request to update I2C device with new A0_STATE, 0: Do nothing, A0_STATE matches I2C device
iforce2d 0:972874f31c98 43 U8G_PI_SCL clock line (NOT USED)
iforce2d 0:972874f31c98 44 U8G_PI_SDA data line (NOT USED)
iforce2d 0:972874f31c98 45
iforce2d 0:972874f31c98 46 U8G_PI_RESET reset line (currently disabled, see below)
iforce2d 0:972874f31c98 47
iforce2d 0:972874f31c98 48 Protocol:
iforce2d 0:972874f31c98 49 SLA, Cmd/Data Selection, Arguments
iforce2d 0:972874f31c98 50 The command/data register is selected by a special instruction byte, which is sent after SLA
iforce2d 0:972874f31c98 51
iforce2d 0:972874f31c98 52 The continue bit is always 0 so that a (re)start is equired for the change from cmd to/data mode
iforce2d 0:972874f31c98 53 */
iforce2d 0:972874f31c98 54
iforce2d 0:972874f31c98 55 #include "u8g.h"
iforce2d 0:972874f31c98 56
iforce2d 0:972874f31c98 57 #define I2C_SLA (0x3c*2)
iforce2d 0:972874f31c98 58 //#define I2C_CMD_MODE 0x080
iforce2d 0:972874f31c98 59 #define I2C_CMD_MODE 0x000
iforce2d 0:972874f31c98 60 #define I2C_DATA_MODE 0x040
iforce2d 0:972874f31c98 61
iforce2d 0:972874f31c98 62 #if defined(U8G_WITH_PINLIST)
iforce2d 0:972874f31c98 63
iforce2d 0:972874f31c98 64 uint8_t u8g_com_arduino_ssd_start_sequence(u8g_t *u8g)
iforce2d 0:972874f31c98 65 {
iforce2d 0:972874f31c98 66 /* are we requested to set the a0 state? */
iforce2d 0:972874f31c98 67 if ( u8g->pin_list[U8G_PI_SET_A0] == 0 )
iforce2d 0:972874f31c98 68 return 1;
iforce2d 0:972874f31c98 69
iforce2d 0:972874f31c98 70 /* setup bus, might be a repeated start */
iforce2d 0:972874f31c98 71 if ( u8g_i2c_start(I2C_SLA) == 0 )
iforce2d 0:972874f31c98 72 return 0;
iforce2d 0:972874f31c98 73 if ( u8g->pin_list[U8G_PI_A0_STATE] == 0 )
iforce2d 0:972874f31c98 74 {
iforce2d 0:972874f31c98 75 if ( u8g_i2c_send_byte(I2C_CMD_MODE) == 0 )
iforce2d 0:972874f31c98 76 return 0;
iforce2d 0:972874f31c98 77 }
iforce2d 0:972874f31c98 78 else
iforce2d 0:972874f31c98 79 {
iforce2d 0:972874f31c98 80 if ( u8g_i2c_send_byte(I2C_DATA_MODE) == 0 )
iforce2d 0:972874f31c98 81 return 0;
iforce2d 0:972874f31c98 82 }
iforce2d 0:972874f31c98 83
iforce2d 0:972874f31c98 84
iforce2d 0:972874f31c98 85 u8g->pin_list[U8G_PI_SET_A0] = 0;
iforce2d 0:972874f31c98 86 return 1;
iforce2d 0:972874f31c98 87 }
iforce2d 0:972874f31c98 88
iforce2d 0:972874f31c98 89 uint8_t u8g_com_arduino_ssd_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
iforce2d 0:972874f31c98 90 {
iforce2d 0:972874f31c98 91 switch(msg)
iforce2d 0:972874f31c98 92 {
iforce2d 0:972874f31c98 93 case U8G_COM_MSG_INIT:
iforce2d 0:972874f31c98 94 //u8g_com_arduino_digital_write(u8g, U8G_PI_SCL, HIGH);
iforce2d 0:972874f31c98 95 //u8g_com_arduino_digital_write(u8g, U8G_PI_SDA, HIGH);
iforce2d 0:972874f31c98 96 //u8g->pin_list[U8G_PI_A0_STATE] = 0; /* inital RS state: unknown mode */
iforce2d 0:972874f31c98 97
iforce2d 0:972874f31c98 98 u8g_i2c_init(u8g->pin_list[U8G_PI_I2C_OPTION]);
iforce2d 0:972874f31c98 99
iforce2d 0:972874f31c98 100 break;
iforce2d 0:972874f31c98 101
iforce2d 0:972874f31c98 102 case U8G_COM_MSG_STOP:
iforce2d 0:972874f31c98 103 break;
iforce2d 0:972874f31c98 104
iforce2d 0:972874f31c98 105 case U8G_COM_MSG_RESET:
iforce2d 0:972874f31c98 106 /* Currently disabled, but it could be enable. Previous restrictions have been removed */
iforce2d 0:972874f31c98 107 /* u8g_com_arduino_digital_write(u8g, U8G_PI_RESET, arg_val); */
iforce2d 0:972874f31c98 108 break;
iforce2d 0:972874f31c98 109
iforce2d 0:972874f31c98 110 case U8G_COM_MSG_CHIP_SELECT:
iforce2d 0:972874f31c98 111 u8g->pin_list[U8G_PI_A0_STATE] = 0;
iforce2d 0:972874f31c98 112 u8g->pin_list[U8G_PI_SET_A0] = 1; /* force a0 to set again, also forces start condition */
iforce2d 0:972874f31c98 113 if ( arg_val == 0 )
iforce2d 0:972874f31c98 114 {
iforce2d 0:972874f31c98 115 /* disable chip, send stop condition */
iforce2d 0:972874f31c98 116 u8g_i2c_stop();
iforce2d 0:972874f31c98 117 }
iforce2d 0:972874f31c98 118 else
iforce2d 0:972874f31c98 119 {
iforce2d 0:972874f31c98 120 /* enable, do nothing: any byte writing will trigger the i2c start */
iforce2d 0:972874f31c98 121 }
iforce2d 0:972874f31c98 122 break;
iforce2d 0:972874f31c98 123
iforce2d 0:972874f31c98 124 case U8G_COM_MSG_WRITE_BYTE:
iforce2d 0:972874f31c98 125 //u8g->pin_list[U8G_PI_SET_A0] = 1;
iforce2d 0:972874f31c98 126 if ( u8g_com_arduino_ssd_start_sequence(u8g) == 0 )
iforce2d 0:972874f31c98 127 return u8g_i2c_stop(), 0;
iforce2d 0:972874f31c98 128 if ( u8g_i2c_send_byte(arg_val) == 0 )
iforce2d 0:972874f31c98 129 return u8g_i2c_stop(), 0;
iforce2d 0:972874f31c98 130 // u8g_i2c_stop();
iforce2d 0:972874f31c98 131 break;
iforce2d 0:972874f31c98 132
iforce2d 0:972874f31c98 133 case U8G_COM_MSG_WRITE_SEQ:
iforce2d 0:972874f31c98 134 //u8g->pin_list[U8G_PI_SET_A0] = 1;
iforce2d 0:972874f31c98 135 if ( u8g_com_arduino_ssd_start_sequence(u8g) == 0 )
iforce2d 0:972874f31c98 136 return u8g_i2c_stop(), 0;
iforce2d 0:972874f31c98 137 {
iforce2d 0:972874f31c98 138 register uint8_t *ptr = arg_ptr;
iforce2d 0:972874f31c98 139 while( arg_val > 0 )
iforce2d 0:972874f31c98 140 {
iforce2d 0:972874f31c98 141 if ( u8g_i2c_send_byte(*ptr++) == 0 )
iforce2d 0:972874f31c98 142 return u8g_i2c_stop(), 0;
iforce2d 0:972874f31c98 143 arg_val--;
iforce2d 0:972874f31c98 144 }
iforce2d 0:972874f31c98 145 }
iforce2d 0:972874f31c98 146 // u8g_i2c_stop();
iforce2d 0:972874f31c98 147 break;
iforce2d 0:972874f31c98 148
iforce2d 0:972874f31c98 149 case U8G_COM_MSG_WRITE_SEQ_P:
iforce2d 0:972874f31c98 150 //u8g->pin_list[U8G_PI_SET_A0] = 1;
iforce2d 0:972874f31c98 151 if ( u8g_com_arduino_ssd_start_sequence(u8g) == 0 )
iforce2d 0:972874f31c98 152 return u8g_i2c_stop(), 0;
iforce2d 0:972874f31c98 153 {
iforce2d 0:972874f31c98 154 register uint8_t *ptr = arg_ptr;
iforce2d 0:972874f31c98 155 while( arg_val > 0 )
iforce2d 0:972874f31c98 156 {
iforce2d 0:972874f31c98 157 if ( u8g_i2c_send_byte(u8g_pgm_read(ptr)) == 0 )
iforce2d 0:972874f31c98 158 return 0;
iforce2d 0:972874f31c98 159 ptr++;
iforce2d 0:972874f31c98 160 arg_val--;
iforce2d 0:972874f31c98 161 }
iforce2d 0:972874f31c98 162 }
iforce2d 0:972874f31c98 163 // u8g_i2c_stop();
iforce2d 0:972874f31c98 164 break;
iforce2d 0:972874f31c98 165
iforce2d 0:972874f31c98 166 case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
iforce2d 0:972874f31c98 167 u8g->pin_list[U8G_PI_A0_STATE] = arg_val;
iforce2d 0:972874f31c98 168 u8g->pin_list[U8G_PI_SET_A0] = 1; /* force a0 to set again */
iforce2d 0:972874f31c98 169
iforce2d 0:972874f31c98 170 #ifdef OLD_CODE
iforce2d 0:972874f31c98 171 if ( i2c_state != 0 )
iforce2d 0:972874f31c98 172 {
iforce2d 0:972874f31c98 173 u8g_i2c_stop();
iforce2d 0:972874f31c98 174 i2c_state = 0;
iforce2d 0:972874f31c98 175 }
iforce2d 0:972874f31c98 176
iforce2d 0:972874f31c98 177 if ( u8g_com_arduino_ssd_start_sequence(arg_val) == 0 )
iforce2d 0:972874f31c98 178 return 0;
iforce2d 0:972874f31c98 179
iforce2d 0:972874f31c98 180 /* setup bus, might be a repeated start */
iforce2d 0:972874f31c98 181 /*
iforce2d 0:972874f31c98 182 if ( u8g_i2c_start(I2C_SLA) == 0 )
iforce2d 0:972874f31c98 183 return 0;
iforce2d 0:972874f31c98 184 if ( arg_val == 0 )
iforce2d 0:972874f31c98 185 {
iforce2d 0:972874f31c98 186 i2c_state = 1;
iforce2d 0:972874f31c98 187
iforce2d 0:972874f31c98 188 if ( u8g_i2c_send_byte(I2C_CMD_MODE) == 0 )
iforce2d 0:972874f31c98 189 return 0;
iforce2d 0:972874f31c98 190 }
iforce2d 0:972874f31c98 191 else
iforce2d 0:972874f31c98 192 {
iforce2d 0:972874f31c98 193 i2c_state = 2;
iforce2d 0:972874f31c98 194 if ( u8g_i2c_send_byte(I2C_DATA_MODE) == 0 )
iforce2d 0:972874f31c98 195 return 0;
iforce2d 0:972874f31c98 196 }
iforce2d 0:972874f31c98 197 */
iforce2d 0:972874f31c98 198 #endif
iforce2d 0:972874f31c98 199 break;
iforce2d 0:972874f31c98 200 }
iforce2d 0:972874f31c98 201 return 1;
iforce2d 0:972874f31c98 202 }
iforce2d 0:972874f31c98 203
iforce2d 0:972874f31c98 204 #else /* defined(U8G_WITH_PINLIST) */
iforce2d 0:972874f31c98 205
iforce2d 0:972874f31c98 206 uint8_t u8g_com_arduino_ssd_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
iforce2d 0:972874f31c98 207 {
iforce2d 0:972874f31c98 208 return 1;
iforce2d 0:972874f31c98 209 }
iforce2d 0:972874f31c98 210
iforce2d 0:972874f31c98 211 #endif /* defined(U8G_WITH_PINLIST) */
iforce2d 0:972874f31c98 212
iforce2d 0:972874f31c98 213