iforce2d Chris
/
ubxDistanceMeter
Displays distance to start location on OLED screen.
u8g_com_arduino_hw_spi.c@0:972874f31c98, 2018-03-07 (annotated)
- Committer:
- iforce2d
- Date:
- Wed Mar 07 12:49:14 2018 +0000
- Revision:
- 0:972874f31c98
First commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
iforce2d | 0:972874f31c98 | 1 | /* |
iforce2d | 0:972874f31c98 | 2 | |
iforce2d | 0:972874f31c98 | 3 | u8g_com_arduino_hw_spi.c |
iforce2d | 0:972874f31c98 | 4 | |
iforce2d | 0:972874f31c98 | 5 | Universal 8bit Graphics Library |
iforce2d | 0:972874f31c98 | 6 | |
iforce2d | 0:972874f31c98 | 7 | Copyright (c) 2011, olikraus@gmail.com |
iforce2d | 0:972874f31c98 | 8 | All rights reserved. |
iforce2d | 0:972874f31c98 | 9 | |
iforce2d | 0:972874f31c98 | 10 | Redistribution and use in source and binary forms, with or without modification, |
iforce2d | 0:972874f31c98 | 11 | are permitted provided that the following conditions are met: |
iforce2d | 0:972874f31c98 | 12 | |
iforce2d | 0:972874f31c98 | 13 | * Redistributions of source code must retain the above copyright notice, this list |
iforce2d | 0:972874f31c98 | 14 | of conditions and the following disclaimer. |
iforce2d | 0:972874f31c98 | 15 | |
iforce2d | 0:972874f31c98 | 16 | * Redistributions in binary form must reproduce the above copyright notice, this |
iforce2d | 0:972874f31c98 | 17 | list of conditions and the following disclaimer in the documentation and/or other |
iforce2d | 0:972874f31c98 | 18 | materials provided with the distribution. |
iforce2d | 0:972874f31c98 | 19 | |
iforce2d | 0:972874f31c98 | 20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND |
iforce2d | 0:972874f31c98 | 21 | CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, |
iforce2d | 0:972874f31c98 | 22 | INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
iforce2d | 0:972874f31c98 | 23 | MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
iforce2d | 0:972874f31c98 | 24 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR |
iforce2d | 0:972874f31c98 | 25 | CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
iforce2d | 0:972874f31c98 | 26 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
iforce2d | 0:972874f31c98 | 27 | NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
iforce2d | 0:972874f31c98 | 28 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
iforce2d | 0:972874f31c98 | 29 | CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
iforce2d | 0:972874f31c98 | 30 | STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
iforce2d | 0:972874f31c98 | 31 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
iforce2d | 0:972874f31c98 | 32 | ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
iforce2d | 0:972874f31c98 | 33 | |
iforce2d | 0:972874f31c98 | 34 | SPI Clock Cycle Type |
iforce2d | 0:972874f31c98 | 35 | |
iforce2d | 0:972874f31c98 | 36 | SSD1351 50ns 20 MHz |
iforce2d | 0:972874f31c98 | 37 | SSD1322 300ns 3.3 MHz |
iforce2d | 0:972874f31c98 | 38 | SSD1327 300ns |
iforce2d | 0:972874f31c98 | 39 | SSD1306 300ns |
iforce2d | 0:972874f31c98 | 40 | ST7565 400ns 2.5 MHz |
iforce2d | 0:972874f31c98 | 41 | ST7920 400ns |
iforce2d | 0:972874f31c98 | 42 | |
iforce2d | 0:972874f31c98 | 43 | Arduino DUE |
iforce2d | 0:972874f31c98 | 44 | |
iforce2d | 0:972874f31c98 | 45 | PA25 MISO |
iforce2d | 0:972874f31c98 | 46 | PA26 MOSI 75 |
iforce2d | 0:972874f31c98 | 47 | PA27 SCLK 76 |
iforce2d | 0:972874f31c98 | 48 | |
iforce2d | 0:972874f31c98 | 49 | |
iforce2d | 0:972874f31c98 | 50 | typedef struct { |
iforce2d | 0:972874f31c98 | 51 | WoReg SPI_CR; (Spi Offset: 0x00) Control Register |
iforce2d | 0:972874f31c98 | 52 | RwReg SPI_MR; (Spi Offset: 0x04) Mode Register |
iforce2d | 0:972874f31c98 | 53 | RoReg SPI_RDR; (Spi Offset: 0x08) Receive Data Register |
iforce2d | 0:972874f31c98 | 54 | WoReg SPI_TDR; (Spi Offset: 0x0C) Transmit Data Register |
iforce2d | 0:972874f31c98 | 55 | RoReg SPI_SR; (Spi Offset: 0x10) Status Register |
iforce2d | 0:972874f31c98 | 56 | WoReg SPI_IER; (Spi Offset: 0x14) Interrupt Enable Register |
iforce2d | 0:972874f31c98 | 57 | WoReg SPI_IDR; (Spi Offset: 0x18) Interrupt Disable Register |
iforce2d | 0:972874f31c98 | 58 | RoReg SPI_IMR; (Spi Offset: 0x1C) Interrupt Mask Register |
iforce2d | 0:972874f31c98 | 59 | RoReg Reserved1[4]; |
iforce2d | 0:972874f31c98 | 60 | RwReg SPI_CSR[4]; (Spi Offset: 0x30) Chip Select Register |
iforce2d | 0:972874f31c98 | 61 | RoReg Reserved2[41]; |
iforce2d | 0:972874f31c98 | 62 | RwReg SPI_WPMR; (Spi Offset: 0xE4) Write Protection Control Register |
iforce2d | 0:972874f31c98 | 63 | RoReg SPI_WPSR; (Spi Offset: 0xE8) Write Protection Status Register |
iforce2d | 0:972874f31c98 | 64 | } Spi; |
iforce2d | 0:972874f31c98 | 65 | |
iforce2d | 0:972874f31c98 | 66 | Power Management Controller (PMC) |
iforce2d | 0:972874f31c98 | 67 | arduino-1.5.2/hardware/arduino/sam/system/CMSIS/Device/ATMEL/sam3xa/include/instance/instance_pmc.h |
iforce2d | 0:972874f31c98 | 68 | - enable PIO |
iforce2d | 0:972874f31c98 | 69 | |
iforce2d | 0:972874f31c98 | 70 | REG_PMC_PCER0 = 1UL << ID_PIOA |
iforce2d | 0:972874f31c98 | 71 | - enable SPI |
iforce2d | 0:972874f31c98 | 72 | REG_PMC_PCER0 = 1UL << ID_SPI0 |
iforce2d | 0:972874f31c98 | 73 | |
iforce2d | 0:972874f31c98 | 74 | |
iforce2d | 0:972874f31c98 | 75 | - enable PIOA and SPI0 |
iforce2d | 0:972874f31c98 | 76 | REG_PMC_PCER0 = (1UL << ID_PIOA) | (1UL << ID_SPI0); |
iforce2d | 0:972874f31c98 | 77 | |
iforce2d | 0:972874f31c98 | 78 | Parallel Input/Output Controller (PIO) |
iforce2d | 0:972874f31c98 | 79 | arduino-1.5.2/hardware/arduino/sam/system/CMSIS/Device/ATMEL/sam3xa/include/instance/instance_pioa.h |
iforce2d | 0:972874f31c98 | 80 | - enable special function of the pin: disable PIO on A26 and A27: |
iforce2d | 0:972874f31c98 | 81 | REG_PIOA_PDR = 0x0c000000 |
iforce2d | 0:972874f31c98 | 82 | PIOA->PIO_PDR = 0x0c000000 |
iforce2d | 0:972874f31c98 | 83 | |
iforce2d | 0:972874f31c98 | 84 | SPI |
iforce2d | 0:972874f31c98 | 85 | SPI0->SPI_CR = SPI_CR_SPIDIS |
iforce2d | 0:972874f31c98 | 86 | SPI0->SPI_CR = SPI_CR_SWRST ; |
iforce2d | 0:972874f31c98 | 87 | SPI0->SPI_CR = SPI_CR_SWRST ; |
iforce2d | 0:972874f31c98 | 88 | SPI0->SPI_CR = SPI_CR_SPIEN |
iforce2d | 0:972874f31c98 | 89 | |
iforce2d | 0:972874f31c98 | 90 | Bit 0: Master Mode = 1 (active) |
iforce2d | 0:972874f31c98 | 91 | Bit 1: Peripheral Select = 0 (fixed) |
iforce2d | 0:972874f31c98 | 92 | Bit 2: Chip Select Decode Mode = 1 (4 to 16) |
iforce2d | 0:972874f31c98 | 93 | Bit 4: Mode Fault Detection = 1 (disabled) |
iforce2d | 0:972874f31c98 | 94 | Bit 5: Wait Data Read = 0 (disabled) |
iforce2d | 0:972874f31c98 | 95 | Bit 7: Loop Back Mode = 0 (disabled) |
iforce2d | 0:972874f31c98 | 96 | Bit 16-19: Peripheral Chip Select = 0 (chip select 0) |
iforce2d | 0:972874f31c98 | 97 | SPI0->SPI_MR = SPI_MR_MSTR | SPI_MR_PCSDEC | SPI_MR_MODFDIS |
iforce2d | 0:972874f31c98 | 98 | |
iforce2d | 0:972874f31c98 | 99 | Bit 0: Clock Polarity = 0 |
iforce2d | 0:972874f31c98 | 100 | Bit 1: Clock Phase = 0 |
iforce2d | 0:972874f31c98 | 101 | Bit 4-7: Bits = 0 (8 Bit) |
iforce2d | 0:972874f31c98 | 102 | Bit 8-15: SCBR = 1 |
iforce2d | 0:972874f31c98 | 103 | SPI0->SPI_CSR[0] = SPI_CSR_SCBR(x) Serial Baud Rate |
iforce2d | 0:972874f31c98 | 104 | SCBR / 84000000 > 50 / 1000000000 |
iforce2d | 0:972874f31c98 | 105 | SCBR / 84 > 5 / 100 |
iforce2d | 0:972874f31c98 | 106 | SCBR > 50 *84 / 1000 --> SCBR=5 |
iforce2d | 0:972874f31c98 | 107 | SCBR > 300*84 / 1000 --> SCBR=26 |
iforce2d | 0:972874f31c98 | 108 | SCBR > 400*84 / 1000 --> SCBR=34 |
iforce2d | 0:972874f31c98 | 109 | |
iforce2d | 0:972874f31c98 | 110 | Arduino Due test code: |
iforce2d | 0:972874f31c98 | 111 | REG_PMC_PCER0 = (1UL << ID_PIOA) | (1UL << ID_SPI0); |
iforce2d | 0:972874f31c98 | 112 | REG_PIOA_PDR = 0x0c000000; |
iforce2d | 0:972874f31c98 | 113 | SPI0->SPI_CR = SPI_CR_SPIDIS; |
iforce2d | 0:972874f31c98 | 114 | SPI0->SPI_CR = SPI_CR_SWRST; |
iforce2d | 0:972874f31c98 | 115 | SPI0->SPI_CR = SPI_CR_SWRST; |
iforce2d | 0:972874f31c98 | 116 | SPI0->SPI_CR = SPI_CR_SPIEN; |
iforce2d | 0:972874f31c98 | 117 | SPI0->SPI_MR = SPI_MR_MSTR | SPI_MR_PCSDEC | SPI_MR_MODFDIS; |
iforce2d | 0:972874f31c98 | 118 | SPI0->SPI_CSR[0] = SPI_CSR_SCBR(30); |
iforce2d | 0:972874f31c98 | 119 | |
iforce2d | 0:972874f31c98 | 120 | for(;;) |
iforce2d | 0:972874f31c98 | 121 | { |
iforce2d | 0:972874f31c98 | 122 | while( (SPI0->SPI_SR & SPI_SR_TDRE) == 0 ) |
iforce2d | 0:972874f31c98 | 123 | ; |
iforce2d | 0:972874f31c98 | 124 | SPI0->SPI_TDR = 0x050; |
iforce2d | 0:972874f31c98 | 125 | } |
iforce2d | 0:972874f31c98 | 126 | |
iforce2d | 0:972874f31c98 | 127 | */ |
iforce2d | 0:972874f31c98 | 128 | |
iforce2d | 0:972874f31c98 | 129 | #include "u8g.h" |
iforce2d | 0:972874f31c98 | 130 | |
iforce2d | 0:972874f31c98 | 131 | #if defined(ARDUINO) |
iforce2d | 0:972874f31c98 | 132 | |
iforce2d | 0:972874f31c98 | 133 | #if defined(__AVR__) |
iforce2d | 0:972874f31c98 | 134 | #define U8G_ARDUINO_ATMEGA_HW_SPI |
iforce2d | 0:972874f31c98 | 135 | /* remove the definition for attiny */ |
iforce2d | 0:972874f31c98 | 136 | #if __AVR_ARCH__ == 2 |
iforce2d | 0:972874f31c98 | 137 | #undef U8G_ARDUINO_ATMEGA_HW_SPI |
iforce2d | 0:972874f31c98 | 138 | #endif |
iforce2d | 0:972874f31c98 | 139 | #if __AVR_ARCH__ == 25 |
iforce2d | 0:972874f31c98 | 140 | #undef U8G_ARDUINO_ATMEGA_HW_SPI |
iforce2d | 0:972874f31c98 | 141 | #endif |
iforce2d | 0:972874f31c98 | 142 | #endif |
iforce2d | 0:972874f31c98 | 143 | |
iforce2d | 0:972874f31c98 | 144 | #if defined(U8G_ARDUINO_ATMEGA_HW_SPI) |
iforce2d | 0:972874f31c98 | 145 | |
iforce2d | 0:972874f31c98 | 146 | #include <avr/interrupt.h> |
iforce2d | 0:972874f31c98 | 147 | #include <avr/io.h> |
iforce2d | 0:972874f31c98 | 148 | |
iforce2d | 0:972874f31c98 | 149 | #if ARDUINO < 100 |
iforce2d | 0:972874f31c98 | 150 | #include <WProgram.h> |
iforce2d | 0:972874f31c98 | 151 | |
iforce2d | 0:972874f31c98 | 152 | /* fixed pins */ |
iforce2d | 0:972874f31c98 | 153 | #if defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__) // Sanguino.cc board |
iforce2d | 0:972874f31c98 | 154 | #define PIN_SCK 7 |
iforce2d | 0:972874f31c98 | 155 | #define PIN_MISO 6 |
iforce2d | 0:972874f31c98 | 156 | #define PIN_MOSI 5 |
iforce2d | 0:972874f31c98 | 157 | #define PIN_CS 4 |
iforce2d | 0:972874f31c98 | 158 | #else // Arduino Board |
iforce2d | 0:972874f31c98 | 159 | #define PIN_SCK 13 |
iforce2d | 0:972874f31c98 | 160 | #define PIN_MISO 12 |
iforce2d | 0:972874f31c98 | 161 | #define PIN_MOSI 11 |
iforce2d | 0:972874f31c98 | 162 | #define PIN_CS 10 |
iforce2d | 0:972874f31c98 | 163 | #endif // (__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__) |
iforce2d | 0:972874f31c98 | 164 | |
iforce2d | 0:972874f31c98 | 165 | #else |
iforce2d | 0:972874f31c98 | 166 | |
iforce2d | 0:972874f31c98 | 167 | #include <Arduino.h> |
iforce2d | 0:972874f31c98 | 168 | |
iforce2d | 0:972874f31c98 | 169 | /* use Arduino pin definitions */ |
iforce2d | 0:972874f31c98 | 170 | #define PIN_SCK SCK |
iforce2d | 0:972874f31c98 | 171 | #define PIN_MISO MISO |
iforce2d | 0:972874f31c98 | 172 | #define PIN_MOSI MOSI |
iforce2d | 0:972874f31c98 | 173 | #define PIN_CS SS |
iforce2d | 0:972874f31c98 | 174 | |
iforce2d | 0:972874f31c98 | 175 | #endif |
iforce2d | 0:972874f31c98 | 176 | |
iforce2d | 0:972874f31c98 | 177 | |
iforce2d | 0:972874f31c98 | 178 | |
iforce2d | 0:972874f31c98 | 179 | //static uint8_t u8g_spi_out(uint8_t data) U8G_NOINLINE; |
iforce2d | 0:972874f31c98 | 180 | static uint8_t u8g_spi_out(uint8_t data) |
iforce2d | 0:972874f31c98 | 181 | { |
iforce2d | 0:972874f31c98 | 182 | /* unsigned char x = 100; */ |
iforce2d | 0:972874f31c98 | 183 | /* send data */ |
iforce2d | 0:972874f31c98 | 184 | SPDR = data; |
iforce2d | 0:972874f31c98 | 185 | /* wait for transmission */ |
iforce2d | 0:972874f31c98 | 186 | while (!(SPSR & (1<<SPIF))) |
iforce2d | 0:972874f31c98 | 187 | ; |
iforce2d | 0:972874f31c98 | 188 | /* clear the SPIF flag by reading SPDR */ |
iforce2d | 0:972874f31c98 | 189 | return SPDR; |
iforce2d | 0:972874f31c98 | 190 | } |
iforce2d | 0:972874f31c98 | 191 | |
iforce2d | 0:972874f31c98 | 192 | |
iforce2d | 0:972874f31c98 | 193 | uint8_t u8g_com_arduino_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) |
iforce2d | 0:972874f31c98 | 194 | { |
iforce2d | 0:972874f31c98 | 195 | switch(msg) |
iforce2d | 0:972874f31c98 | 196 | { |
iforce2d | 0:972874f31c98 | 197 | case U8G_COM_MSG_STOP: |
iforce2d | 0:972874f31c98 | 198 | break; |
iforce2d | 0:972874f31c98 | 199 | |
iforce2d | 0:972874f31c98 | 200 | case U8G_COM_MSG_INIT: |
iforce2d | 0:972874f31c98 | 201 | u8g_com_arduino_assign_pin_output_high(u8g); |
iforce2d | 0:972874f31c98 | 202 | pinMode(PIN_SCK, OUTPUT); |
iforce2d | 0:972874f31c98 | 203 | digitalWrite(PIN_SCK, LOW); |
iforce2d | 0:972874f31c98 | 204 | pinMode(PIN_MOSI, OUTPUT); |
iforce2d | 0:972874f31c98 | 205 | digitalWrite(PIN_MOSI, LOW); |
iforce2d | 0:972874f31c98 | 206 | /* pinMode(PIN_MISO, INPUT); */ |
iforce2d | 0:972874f31c98 | 207 | |
iforce2d | 0:972874f31c98 | 208 | pinMode(PIN_CS, OUTPUT); /* system chip select for the atmega board */ |
iforce2d | 0:972874f31c98 | 209 | digitalWrite(PIN_CS, HIGH); |
iforce2d | 0:972874f31c98 | 210 | |
iforce2d | 0:972874f31c98 | 211 | |
iforce2d | 0:972874f31c98 | 212 | |
iforce2d | 0:972874f31c98 | 213 | /* |
iforce2d | 0:972874f31c98 | 214 | SPR1 SPR0 |
iforce2d | 0:972874f31c98 | 215 | 0 0 fclk/4 |
iforce2d | 0:972874f31c98 | 216 | 0 1 fclk/16 |
iforce2d | 0:972874f31c98 | 217 | 1 0 fclk/64 |
iforce2d | 0:972874f31c98 | 218 | 1 1 fclk/128 |
iforce2d | 0:972874f31c98 | 219 | */ |
iforce2d | 0:972874f31c98 | 220 | SPCR = 0; |
iforce2d | 0:972874f31c98 | 221 | SPCR = (1<<SPE) | (1<<MSTR)|(0<<SPR1)|(0<<SPR0)|(0<<CPOL)|(0<<CPHA); |
iforce2d | 0:972874f31c98 | 222 | #ifdef U8G_HW_SPI_2X |
iforce2d | 0:972874f31c98 | 223 | SPSR = (1 << SPI2X); /* double speed, issue 89 */ |
iforce2d | 0:972874f31c98 | 224 | #else |
iforce2d | 0:972874f31c98 | 225 | if ( arg_val <= U8G_SPI_CLK_CYCLE_50NS ) |
iforce2d | 0:972874f31c98 | 226 | { |
iforce2d | 0:972874f31c98 | 227 | SPSR = (1 << SPI2X); /* double speed, issue 89 */ |
iforce2d | 0:972874f31c98 | 228 | } |
iforce2d | 0:972874f31c98 | 229 | #endif |
iforce2d | 0:972874f31c98 | 230 | |
iforce2d | 0:972874f31c98 | 231 | |
iforce2d | 0:972874f31c98 | 232 | break; |
iforce2d | 0:972874f31c98 | 233 | |
iforce2d | 0:972874f31c98 | 234 | case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */ |
iforce2d | 0:972874f31c98 | 235 | u8g_com_arduino_digital_write(u8g, U8G_PI_A0, arg_val); |
iforce2d | 0:972874f31c98 | 236 | break; |
iforce2d | 0:972874f31c98 | 237 | |
iforce2d | 0:972874f31c98 | 238 | case U8G_COM_MSG_CHIP_SELECT: |
iforce2d | 0:972874f31c98 | 239 | if ( arg_val == 0 ) |
iforce2d | 0:972874f31c98 | 240 | { |
iforce2d | 0:972874f31c98 | 241 | /* disable */ |
iforce2d | 0:972874f31c98 | 242 | u8g_com_arduino_digital_write(u8g, U8G_PI_CS, HIGH); |
iforce2d | 0:972874f31c98 | 243 | } |
iforce2d | 0:972874f31c98 | 244 | else |
iforce2d | 0:972874f31c98 | 245 | { |
iforce2d | 0:972874f31c98 | 246 | /* enable */ |
iforce2d | 0:972874f31c98 | 247 | u8g_com_arduino_digital_write(u8g, U8G_PI_SCK, LOW); |
iforce2d | 0:972874f31c98 | 248 | u8g_com_arduino_digital_write(u8g, U8G_PI_CS, LOW); |
iforce2d | 0:972874f31c98 | 249 | } |
iforce2d | 0:972874f31c98 | 250 | break; |
iforce2d | 0:972874f31c98 | 251 | |
iforce2d | 0:972874f31c98 | 252 | case U8G_COM_MSG_RESET: |
iforce2d | 0:972874f31c98 | 253 | if ( u8g->pin_list[U8G_PI_RESET] != U8G_PIN_NONE ) |
iforce2d | 0:972874f31c98 | 254 | u8g_com_arduino_digital_write(u8g, U8G_PI_RESET, arg_val); |
iforce2d | 0:972874f31c98 | 255 | break; |
iforce2d | 0:972874f31c98 | 256 | |
iforce2d | 0:972874f31c98 | 257 | case U8G_COM_MSG_WRITE_BYTE: |
iforce2d | 0:972874f31c98 | 258 | u8g_spi_out(arg_val); |
iforce2d | 0:972874f31c98 | 259 | break; |
iforce2d | 0:972874f31c98 | 260 | |
iforce2d | 0:972874f31c98 | 261 | case U8G_COM_MSG_WRITE_SEQ: |
iforce2d | 0:972874f31c98 | 262 | { |
iforce2d | 0:972874f31c98 | 263 | register uint8_t *ptr = arg_ptr; |
iforce2d | 0:972874f31c98 | 264 | while( arg_val > 0 ) |
iforce2d | 0:972874f31c98 | 265 | { |
iforce2d | 0:972874f31c98 | 266 | u8g_spi_out(*ptr++); |
iforce2d | 0:972874f31c98 | 267 | arg_val--; |
iforce2d | 0:972874f31c98 | 268 | } |
iforce2d | 0:972874f31c98 | 269 | } |
iforce2d | 0:972874f31c98 | 270 | break; |
iforce2d | 0:972874f31c98 | 271 | case U8G_COM_MSG_WRITE_SEQ_P: |
iforce2d | 0:972874f31c98 | 272 | { |
iforce2d | 0:972874f31c98 | 273 | register uint8_t *ptr = arg_ptr; |
iforce2d | 0:972874f31c98 | 274 | while( arg_val > 0 ) |
iforce2d | 0:972874f31c98 | 275 | { |
iforce2d | 0:972874f31c98 | 276 | u8g_spi_out(u8g_pgm_read(ptr)); |
iforce2d | 0:972874f31c98 | 277 | ptr++; |
iforce2d | 0:972874f31c98 | 278 | arg_val--; |
iforce2d | 0:972874f31c98 | 279 | } |
iforce2d | 0:972874f31c98 | 280 | } |
iforce2d | 0:972874f31c98 | 281 | break; |
iforce2d | 0:972874f31c98 | 282 | } |
iforce2d | 0:972874f31c98 | 283 | return 1; |
iforce2d | 0:972874f31c98 | 284 | } |
iforce2d | 0:972874f31c98 | 285 | |
iforce2d | 0:972874f31c98 | 286 | /* #elif defined(__18CXX) || defined(__PIC32MX) */ |
iforce2d | 0:972874f31c98 | 287 | |
iforce2d | 0:972874f31c98 | 288 | #elif defined(__arm__) // Arduino Due, maybe we should better check for __SAM3X8E__ |
iforce2d | 0:972874f31c98 | 289 | |
iforce2d | 0:972874f31c98 | 290 | #include <Arduino.h> |
iforce2d | 0:972874f31c98 | 291 | |
iforce2d | 0:972874f31c98 | 292 | /* use Arduino pin definitions */ |
iforce2d | 0:972874f31c98 | 293 | #define PIN_SCK SCK |
iforce2d | 0:972874f31c98 | 294 | #define PIN_MISO MISO |
iforce2d | 0:972874f31c98 | 295 | #define PIN_MOSI MOSI |
iforce2d | 0:972874f31c98 | 296 | #define PIN_CS SS |
iforce2d | 0:972874f31c98 | 297 | |
iforce2d | 0:972874f31c98 | 298 | |
iforce2d | 0:972874f31c98 | 299 | static uint8_t u8g_spi_out(uint8_t data) |
iforce2d | 0:972874f31c98 | 300 | { |
iforce2d | 0:972874f31c98 | 301 | /* wait until tx register is empty */ |
iforce2d | 0:972874f31c98 | 302 | while( (SPI0->SPI_SR & SPI_SR_TDRE) == 0 ) |
iforce2d | 0:972874f31c98 | 303 | ; |
iforce2d | 0:972874f31c98 | 304 | /* send data */ |
iforce2d | 0:972874f31c98 | 305 | SPI0->SPI_TDR = (uint32_t)data; |
iforce2d | 0:972874f31c98 | 306 | return data; |
iforce2d | 0:972874f31c98 | 307 | } |
iforce2d | 0:972874f31c98 | 308 | |
iforce2d | 0:972874f31c98 | 309 | |
iforce2d | 0:972874f31c98 | 310 | uint8_t u8g_com_arduino_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) |
iforce2d | 0:972874f31c98 | 311 | { |
iforce2d | 0:972874f31c98 | 312 | switch(msg) |
iforce2d | 0:972874f31c98 | 313 | { |
iforce2d | 0:972874f31c98 | 314 | case U8G_COM_MSG_STOP: |
iforce2d | 0:972874f31c98 | 315 | break; |
iforce2d | 0:972874f31c98 | 316 | |
iforce2d | 0:972874f31c98 | 317 | case U8G_COM_MSG_INIT: |
iforce2d | 0:972874f31c98 | 318 | u8g_com_arduino_assign_pin_output_high(u8g); |
iforce2d | 0:972874f31c98 | 319 | u8g_com_arduino_digital_write(u8g, U8G_PI_CS, HIGH); |
iforce2d | 0:972874f31c98 | 320 | |
iforce2d | 0:972874f31c98 | 321 | /* Arduino Due specific code */ |
iforce2d | 0:972874f31c98 | 322 | |
iforce2d | 0:972874f31c98 | 323 | /* enable PIOA and SPI0 */ |
iforce2d | 0:972874f31c98 | 324 | REG_PMC_PCER0 = (1UL << ID_PIOA) | (1UL << ID_SPI0); |
iforce2d | 0:972874f31c98 | 325 | |
iforce2d | 0:972874f31c98 | 326 | /* disable PIO on A26 and A27 */ |
iforce2d | 0:972874f31c98 | 327 | REG_PIOA_PDR = 0x0c000000; |
iforce2d | 0:972874f31c98 | 328 | |
iforce2d | 0:972874f31c98 | 329 | /* reset SPI0 (from sam lib) */ |
iforce2d | 0:972874f31c98 | 330 | SPI0->SPI_CR = SPI_CR_SPIDIS; |
iforce2d | 0:972874f31c98 | 331 | SPI0->SPI_CR = SPI_CR_SWRST; |
iforce2d | 0:972874f31c98 | 332 | SPI0->SPI_CR = SPI_CR_SWRST; |
iforce2d | 0:972874f31c98 | 333 | SPI0->SPI_CR = SPI_CR_SPIEN; |
iforce2d | 0:972874f31c98 | 334 | u8g_MicroDelay(); |
iforce2d | 0:972874f31c98 | 335 | |
iforce2d | 0:972874f31c98 | 336 | /* master mode, no fault detection, chip select 0 */ |
iforce2d | 0:972874f31c98 | 337 | SPI0->SPI_MR = SPI_MR_MSTR | SPI_MR_PCSDEC | SPI_MR_MODFDIS; |
iforce2d | 0:972874f31c98 | 338 | |
iforce2d | 0:972874f31c98 | 339 | /* Polarity, Phase, 8 Bit data transfer, baud rate */ |
iforce2d | 0:972874f31c98 | 340 | /* x * 1000 / 84 --> clock cycle in ns |
iforce2d | 0:972874f31c98 | 341 | 5 * 1000 / 84 = 58 ns |
iforce2d | 0:972874f31c98 | 342 | SCBR > 50 *84 / 1000 --> SCBR=5 |
iforce2d | 0:972874f31c98 | 343 | SCBR > 300*84 / 1000 --> SCBR=26 |
iforce2d | 0:972874f31c98 | 344 | SCBR > 400*84 / 1000 --> SCBR=34 |
iforce2d | 0:972874f31c98 | 345 | */ |
iforce2d | 0:972874f31c98 | 346 | |
iforce2d | 0:972874f31c98 | 347 | if ( arg_val <= U8G_SPI_CLK_CYCLE_50NS ) |
iforce2d | 0:972874f31c98 | 348 | { |
iforce2d | 0:972874f31c98 | 349 | SPI0->SPI_CSR[0] = SPI_CSR_SCBR(5) | 1; |
iforce2d | 0:972874f31c98 | 350 | } |
iforce2d | 0:972874f31c98 | 351 | else if ( arg_val <= U8G_SPI_CLK_CYCLE_300NS ) |
iforce2d | 0:972874f31c98 | 352 | { |
iforce2d | 0:972874f31c98 | 353 | SPI0->SPI_CSR[0] = SPI_CSR_SCBR(26) | 1; |
iforce2d | 0:972874f31c98 | 354 | } |
iforce2d | 0:972874f31c98 | 355 | else if ( arg_val <= U8G_SPI_CLK_CYCLE_400NS ) |
iforce2d | 0:972874f31c98 | 356 | { |
iforce2d | 0:972874f31c98 | 357 | SPI0->SPI_CSR[0] = SPI_CSR_SCBR(34) | 1; |
iforce2d | 0:972874f31c98 | 358 | } |
iforce2d | 0:972874f31c98 | 359 | else |
iforce2d | 0:972874f31c98 | 360 | { |
iforce2d | 0:972874f31c98 | 361 | SPI0->SPI_CSR[0] = SPI_CSR_SCBR(84) | 1; |
iforce2d | 0:972874f31c98 | 362 | } |
iforce2d | 0:972874f31c98 | 363 | |
iforce2d | 0:972874f31c98 | 364 | u8g_MicroDelay(); |
iforce2d | 0:972874f31c98 | 365 | break; |
iforce2d | 0:972874f31c98 | 366 | |
iforce2d | 0:972874f31c98 | 367 | case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */ |
iforce2d | 0:972874f31c98 | 368 | u8g_com_arduino_digital_write(u8g, U8G_PI_A0, arg_val); |
iforce2d | 0:972874f31c98 | 369 | u8g_MicroDelay(); |
iforce2d | 0:972874f31c98 | 370 | break; |
iforce2d | 0:972874f31c98 | 371 | |
iforce2d | 0:972874f31c98 | 372 | case U8G_COM_MSG_CHIP_SELECT: |
iforce2d | 0:972874f31c98 | 373 | if ( arg_val == 0 ) |
iforce2d | 0:972874f31c98 | 374 | { |
iforce2d | 0:972874f31c98 | 375 | /* disable */ |
iforce2d | 0:972874f31c98 | 376 | u8g_MicroDelay(); /* this delay is required to avoid that the display is switched off too early --> DOGS102 with DUE */ |
iforce2d | 0:972874f31c98 | 377 | u8g_com_arduino_digital_write(u8g, U8G_PI_CS, HIGH); |
iforce2d | 0:972874f31c98 | 378 | u8g_MicroDelay(); |
iforce2d | 0:972874f31c98 | 379 | } |
iforce2d | 0:972874f31c98 | 380 | else |
iforce2d | 0:972874f31c98 | 381 | { |
iforce2d | 0:972874f31c98 | 382 | /* enable */ |
iforce2d | 0:972874f31c98 | 383 | //u8g_com_arduino_digital_write(u8g, U8G_PI_SCK, LOW); |
iforce2d | 0:972874f31c98 | 384 | u8g_com_arduino_digital_write(u8g, U8G_PI_CS, LOW); |
iforce2d | 0:972874f31c98 | 385 | u8g_MicroDelay(); |
iforce2d | 0:972874f31c98 | 386 | } |
iforce2d | 0:972874f31c98 | 387 | break; |
iforce2d | 0:972874f31c98 | 388 | |
iforce2d | 0:972874f31c98 | 389 | case U8G_COM_MSG_RESET: |
iforce2d | 0:972874f31c98 | 390 | if ( u8g->pin_list[U8G_PI_RESET] != U8G_PIN_NONE ) |
iforce2d | 0:972874f31c98 | 391 | u8g_com_arduino_digital_write(u8g, U8G_PI_RESET, arg_val); |
iforce2d | 0:972874f31c98 | 392 | break; |
iforce2d | 0:972874f31c98 | 393 | |
iforce2d | 0:972874f31c98 | 394 | case U8G_COM_MSG_WRITE_BYTE: |
iforce2d | 0:972874f31c98 | 395 | u8g_spi_out(arg_val); |
iforce2d | 0:972874f31c98 | 396 | u8g_MicroDelay(); |
iforce2d | 0:972874f31c98 | 397 | break; |
iforce2d | 0:972874f31c98 | 398 | |
iforce2d | 0:972874f31c98 | 399 | case U8G_COM_MSG_WRITE_SEQ: |
iforce2d | 0:972874f31c98 | 400 | { |
iforce2d | 0:972874f31c98 | 401 | register uint8_t *ptr = arg_ptr; |
iforce2d | 0:972874f31c98 | 402 | while( arg_val > 0 ) |
iforce2d | 0:972874f31c98 | 403 | { |
iforce2d | 0:972874f31c98 | 404 | u8g_spi_out(*ptr++); |
iforce2d | 0:972874f31c98 | 405 | arg_val--; |
iforce2d | 0:972874f31c98 | 406 | } |
iforce2d | 0:972874f31c98 | 407 | } |
iforce2d | 0:972874f31c98 | 408 | break; |
iforce2d | 0:972874f31c98 | 409 | case U8G_COM_MSG_WRITE_SEQ_P: |
iforce2d | 0:972874f31c98 | 410 | { |
iforce2d | 0:972874f31c98 | 411 | register uint8_t *ptr = arg_ptr; |
iforce2d | 0:972874f31c98 | 412 | while( arg_val > 0 ) |
iforce2d | 0:972874f31c98 | 413 | { |
iforce2d | 0:972874f31c98 | 414 | u8g_spi_out(u8g_pgm_read(ptr)); |
iforce2d | 0:972874f31c98 | 415 | ptr++; |
iforce2d | 0:972874f31c98 | 416 | arg_val--; |
iforce2d | 0:972874f31c98 | 417 | } |
iforce2d | 0:972874f31c98 | 418 | } |
iforce2d | 0:972874f31c98 | 419 | break; |
iforce2d | 0:972874f31c98 | 420 | } |
iforce2d | 0:972874f31c98 | 421 | return 1; |
iforce2d | 0:972874f31c98 | 422 | } |
iforce2d | 0:972874f31c98 | 423 | |
iforce2d | 0:972874f31c98 | 424 | |
iforce2d | 0:972874f31c98 | 425 | |
iforce2d | 0:972874f31c98 | 426 | #else /* U8G_ARDUINO_ATMEGA_HW_SPI */ |
iforce2d | 0:972874f31c98 | 427 | |
iforce2d | 0:972874f31c98 | 428 | #endif /* U8G_ARDUINO_ATMEGA_HW_SPI */ |
iforce2d | 0:972874f31c98 | 429 | |
iforce2d | 0:972874f31c98 | 430 | #else /* ARDUINO */ |
iforce2d | 0:972874f31c98 | 431 | |
iforce2d | 0:972874f31c98 | 432 | uint8_t u8g_com_arduino_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) |
iforce2d | 0:972874f31c98 | 433 | { |
iforce2d | 0:972874f31c98 | 434 | return 1; |
iforce2d | 0:972874f31c98 | 435 | } |
iforce2d | 0:972874f31c98 | 436 | |
iforce2d | 0:972874f31c98 | 437 | #endif /* ARDUINO */ |
iforce2d | 0:972874f31c98 | 438 | |
iforce2d | 0:972874f31c98 | 439 |